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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK13// RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK15// RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK36// RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s7// RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"10// RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"12// RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"13// RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s14// RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"15 16// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK917// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++  -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap  %s --check-prefix=CHECK919 20// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"21// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s22// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++  -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"23 24// expected-no-diagnostics25#ifndef HEADER26#define HEADER27 28struct St {29  int a, b;30  St() : a(0), b(0) {}31  St(const St &st) : a(st.a + st.b), b(0) {}32  ~St() {}33};34 35volatile int g = 1212;36volatile int &g1 = g;37 38template <class T>39struct S {40  T f;41  S(T a) : f(a + g) {}42  S() : f(g) {}43  S(const S &s, St t = St()) : f(s.f + t.a) {}44  operator T() { return T(); }45  ~S() {}46};47 48 49template <typename T>50T tmain() {51  S<T> test;52  T t_var = T();53  T vec[] = {1, 2};54  S<T> s_arr[] = {1, 2};55  S<T> &var = test;56#pragma omp target57#pragma omp teams distribute parallel for private(t_var, vec, s_arr, var)58  for (int i = 0; i < 2; ++i) {59    vec[i] = t_var;60    s_arr[i] = var;61  }62  return T();63}64 65S<float> test;66int t_var = 333;67int vec[] = {1, 2};68S<float> s_arr[] = {1, 2};69S<float> var(3);70 71int main() {72  static int sivar;73#ifdef LAMBDA74  [&]() {75#pragma omp target76#pragma omp teams distribute parallel for private(g, g1, sivar)77  for (int i = 0; i < 2; ++i) {78 79    // Skip global, bound tid and loop vars80 81    g = 1;82    g1 = 1;83    sivar = 2;84 85    // Skip global, bound tid and loop vars86    [&]() {87      g = 2;88      g1 = 2;89      sivar = 4;90 91    }();92  }93  }();94  return 0;95#else96#pragma omp target97#pragma omp teams distribute parallel for private(t_var, vec, s_arr, var, sivar)98  for (int i = 0; i < 2; ++i) {99    vec[i] = t_var;100    s_arr[i] = var;101    sivar += i;102  }103  return tmain<int>();104#endif105}106 107 108 109// Skip global, bound tid and loop vars110 111// private(s_arr)112 113// private(var)114 115 116// Skip global, bound tid and loop vars117 118// private(s_arr)119 120// private(var)121 122 123 124 125// Skip global, bound tid and loop vars126 127// private(s_arr)128 129 130// private(var)131 132 133// Skip global, bound tid and loop vars134// prev lb and ub135// iter variables136 137// private(s_arr)138 139 140// private(var)141 142 143 144#endif145// CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init146// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {147// CHECK1-NEXT:  entry:148// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @test)149// CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @test, ptr @__dso_handle) #[[ATTR2:[0-9]+]]150// CHECK1-NEXT:    ret void151//152//153// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev154// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {155// CHECK1-NEXT:  entry:156// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8157// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8158// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8159// CHECK1-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])160// CHECK1-NEXT:    ret void161//162//163// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev164// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {165// CHECK1-NEXT:  entry:166// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8167// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8168// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8169// CHECK1-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]170// CHECK1-NEXT:    ret void171//172//173// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev174// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {175// CHECK1-NEXT:  entry:176// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8177// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8178// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8179// CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0180// CHECK1-NEXT:    [[TMP0:%.*]] = load volatile i32, ptr @g, align 4181// CHECK1-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float182// CHECK1-NEXT:    store float [[CONV]], ptr [[F]], align 4183// CHECK1-NEXT:    ret void184//185//186// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev187// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {188// CHECK1-NEXT:  entry:189// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8190// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8191// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8192// CHECK1-NEXT:    ret void193//194//195// CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.1196// CHECK1-SAME: () #[[ATTR0]] {197// CHECK1-NEXT:  entry:198// CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @s_arr, float noundef 1.000000e+00)199// CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i64 1), float noundef 2.000000e+00)200// CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @__cxx_global_array_dtor, ptr null, ptr @__dso_handle) #[[ATTR2]]201// CHECK1-NEXT:    ret void202//203//204// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef205// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {206// CHECK1-NEXT:  entry:207// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8208// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4209// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8210// CHECK1-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4211// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8212// CHECK1-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4213// CHECK1-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])214// CHECK1-NEXT:    ret void215//216//217// CHECK1-LABEL: define {{[^@]+}}@__cxx_global_array_dtor218// CHECK1-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR0]] {219// CHECK1-NEXT:  entry:220// CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8221// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8222// CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]223// CHECK1:       arraydestroy.body:224// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]225// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1226// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]227// CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], @s_arr228// CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]229// CHECK1:       arraydestroy.done1:230// CHECK1-NEXT:    ret void231//232//233// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef234// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {235// CHECK1-NEXT:  entry:236// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8237// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4238// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8239// CHECK1-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4240// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8241// CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0242// CHECK1-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4243// CHECK1-NEXT:    [[TMP1:%.*]] = load volatile i32, ptr @g, align 4244// CHECK1-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float245// CHECK1-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]246// CHECK1-NEXT:    store float [[ADD]], ptr [[F]], align 4247// CHECK1-NEXT:    ret void248//249//250// CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.2251// CHECK1-SAME: () #[[ATTR0]] {252// CHECK1-NEXT:  entry:253// CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @var, float noundef 3.000000e+00)254// CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @var, ptr @__dso_handle) #[[ATTR2]]255// CHECK1-NEXT:    ret void256//257//258// CHECK1-LABEL: define {{[^@]+}}@main259// CHECK1-SAME: () #[[ATTR3:[0-9]+]] {260// CHECK1-NEXT:  entry:261// CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4262// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4263// CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8264// CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4265// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0266// CHECK1-NEXT:    store i32 3, ptr [[TMP0]], align 4267// CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1268// CHECK1-NEXT:    store i32 0, ptr [[TMP1]], align 4269// CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2270// CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8271// CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3272// CHECK1-NEXT:    store ptr null, ptr [[TMP3]], align 8273// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4274// CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8275// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5276// CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8277// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6278// CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8279// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7280// CHECK1-NEXT:    store ptr null, ptr [[TMP7]], align 8281// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8282// CHECK1-NEXT:    store i64 2, ptr [[TMP8]], align 8283// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9284// CHECK1-NEXT:    store i64 0, ptr [[TMP9]], align 8285// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10286// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4287// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11288// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4289// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12290// CHECK1-NEXT:    store i32 0, ptr [[TMP12]], align 4291// CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, ptr [[KERNEL_ARGS]])292// CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0293// CHECK1-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]294// CHECK1:       omp_offload.failed:295// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96() #[[ATTR2]]296// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]297// CHECK1:       omp_offload.cont:298// CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()299// CHECK1-NEXT:    ret i32 [[CALL]]300//301//302// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96303// CHECK1-SAME: () #[[ATTR4:[0-9]+]] {304// CHECK1-NEXT:  entry:305// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined)306// CHECK1-NEXT:    ret void307//308//309// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined310// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {311// CHECK1-NEXT:  entry:312// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8313// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8314// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4315// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4316// CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4317// CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4318// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4319// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4320// CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4321// CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4322// CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4323// CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4324// CHECK1-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4325// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4326// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8327// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8328// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4329// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4330// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4331// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4332// CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0333// CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2334// CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]335// CHECK1:       arrayctor.loop:336// CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]337// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])338// CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1339// CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]340// CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]341// CHECK1:       arrayctor.cont:342// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])343// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8344// CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4345// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)346// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4347// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1348// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]349// CHECK1:       cond.true:350// CHECK1-NEXT:    br label [[COND_END:%.*]]351// CHECK1:       cond.false:352// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4353// CHECK1-NEXT:    br label [[COND_END]]354// CHECK1:       cond.end:355// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]356// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4357// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4358// CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4359// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]360// CHECK1:       omp.inner.for.cond:361// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4362// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4363// CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]364// CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]365// CHECK1:       omp.inner.for.cond.cleanup:366// CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]367// CHECK1:       omp.inner.for.body:368// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4369// CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64370// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4371// CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64372// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])373// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]374// CHECK1:       omp.inner.for.inc:375// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4376// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4377// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]378// CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4379// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]380// CHECK1:       omp.inner.for.end:381// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]382// CHECK1:       omp.loop.exit:383// CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8384// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4385// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])386// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]387// CHECK1-NEXT:    [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0388// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN2]], i64 2389// CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]390// CHECK1:       arraydestroy.body:391// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]392// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1393// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]394// CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]395// CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]396// CHECK1:       arraydestroy.done3:397// CHECK1-NEXT:    ret void398//399//400// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined.omp_outlined401// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {402// CHECK1-NEXT:  entry:403// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8404// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8405// CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8406// CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8407// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4408// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4409// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4410// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4411// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4412// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4413// CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4414// CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4415// CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4416// CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4417// CHECK1-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4418// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4419// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8420// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8421// CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8422// CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8423// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4424// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4425// CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8426// CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32427// CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8428// CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32429// CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4430// CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4431// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4432// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4433// CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0434// CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2435// CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]436// CHECK1:       arrayctor.loop:437// CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]438// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])439// CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1440// CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]441// CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]442// CHECK1:       arrayctor.cont:443// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])444// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8445// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4446// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)447// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4448// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1449// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]450// CHECK1:       cond.true:451// CHECK1-NEXT:    br label [[COND_END:%.*]]452// CHECK1:       cond.false:453// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4454// CHECK1-NEXT:    br label [[COND_END]]455// CHECK1:       cond.end:456// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]457// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4458// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4459// CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4460// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]461// CHECK1:       omp.inner.for.cond:462// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4463// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4464// CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]465// CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]466// CHECK1:       omp.inner.for.cond.cleanup:467// CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]468// CHECK1:       omp.inner.for.body:469// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4470// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1471// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]472// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4473// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4474// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4475// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64476// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]]477// CHECK1-NEXT:    store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4478// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4479// CHECK1-NEXT:    [[IDXPROM3:%.*]] = sext i32 [[TMP12]] to i64480// CHECK1-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 [[IDXPROM3]]481// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[VAR]], i64 4, i1 false)482// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4483// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[SIVAR]], align 4484// CHECK1-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP13]]485// CHECK1-NEXT:    store i32 [[ADD5]], ptr [[SIVAR]], align 4486// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]487// CHECK1:       omp.body.continue:488// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]489// CHECK1:       omp.inner.for.inc:490// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4491// CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1492// CHECK1-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4493// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]494// CHECK1:       omp.inner.for.end:495// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]496// CHECK1:       omp.loop.exit:497// CHECK1-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8498// CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4499// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP17]])500// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]501// CHECK1-NEXT:    [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0502// CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 2503// CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]504// CHECK1:       arraydestroy.body:505// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]506// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1507// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]508// CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]509// CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]510// CHECK1:       arraydestroy.done8:511// CHECK1-NEXT:    ret void512//513//514// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v515// CHECK1-SAME: () #[[ATTR1]] comdat {516// CHECK1-NEXT:  entry:517// CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4518// CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4519// CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4520// CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4521// CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4522// CHECK1-NEXT:    [[VAR:%.*]] = alloca ptr, align 8523// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4524// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8525// CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8526// CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])527// CHECK1-NEXT:    store i32 0, ptr [[T_VAR]], align 4528// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)529// CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)530// CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1531// CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)532// CHECK1-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8533// CHECK1-NEXT:    store ptr undef, ptr [[_TMP1]], align 8534// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0535// CHECK1-NEXT:    store i32 3, ptr [[TMP0]], align 4536// CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1537// CHECK1-NEXT:    store i32 0, ptr [[TMP1]], align 4538// CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2539// CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8540// CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3541// CHECK1-NEXT:    store ptr null, ptr [[TMP3]], align 8542// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4543// CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8544// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5545// CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8546// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6547// CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8548// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7549// CHECK1-NEXT:    store ptr null, ptr [[TMP7]], align 8550// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8551// CHECK1-NEXT:    store i64 2, ptr [[TMP8]], align 8552// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9553// CHECK1-NEXT:    store i64 0, ptr [[TMP9]], align 8554// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10555// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4556// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11557// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4558// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12559// CHECK1-NEXT:    store i32 0, ptr [[TMP12]], align 4560// CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.region_id, ptr [[KERNEL_ARGS]])561// CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0562// CHECK1-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]563// CHECK1:       omp_offload.failed:564// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56() #[[ATTR2]]565// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]566// CHECK1:       omp_offload.cont:567// CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4568// CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0569// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2570// CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]571// CHECK1:       arraydestroy.body:572// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]573// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1574// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]575// CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]576// CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]577// CHECK1:       arraydestroy.done2:578// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]579// CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4580// CHECK1-NEXT:    ret i32 [[TMP16]]581//582//583// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev584// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {585// CHECK1-NEXT:  entry:586// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8587// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8588// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8589// CHECK1-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])590// CHECK1-NEXT:    ret void591//592//593// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei594// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {595// CHECK1-NEXT:  entry:596// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8597// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4598// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8599// CHECK1-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4600// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8601// CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4602// CHECK1-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])603// CHECK1-NEXT:    ret void604//605//606// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56607// CHECK1-SAME: () #[[ATTR4]] {608// CHECK1-NEXT:  entry:609// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined)610// CHECK1-NEXT:    ret void611//612//613// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined614// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {615// CHECK1-NEXT:  entry:616// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8617// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8618// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4619// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4620// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8621// CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4622// CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4623// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4624// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4625// CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4626// CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4627// CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4628// CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4629// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8630// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4631// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8632// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8633// CHECK1-NEXT:    store ptr undef, ptr [[_TMP1]], align 8634// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4635// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4636// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4637// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4638// CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0639// CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2640// CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]641// CHECK1:       arrayctor.loop:642// CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]643// CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])644// CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1645// CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]646// CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]647// CHECK1:       arrayctor.cont:648// CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])649// CHECK1-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 8650// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8651// CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4652// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)653// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4654// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1655// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]656// CHECK1:       cond.true:657// CHECK1-NEXT:    br label [[COND_END:%.*]]658// CHECK1:       cond.false:659// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4660// CHECK1-NEXT:    br label [[COND_END]]661// CHECK1:       cond.end:662// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]663// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4664// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4665// CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4666// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]667// CHECK1:       omp.inner.for.cond:668// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4669// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4670// CHECK1-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]671// CHECK1-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]672// CHECK1:       omp.inner.for.cond.cleanup:673// CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]674// CHECK1:       omp.inner.for.body:675// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4676// CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64677// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4678// CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64679// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])680// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]681// CHECK1:       omp.inner.for.inc:682// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4683// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4684// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]685// CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4686// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]687// CHECK1:       omp.inner.for.end:688// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]689// CHECK1:       omp.loop.exit:690// CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8691// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4692// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])693// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]694// CHECK1-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0695// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN4]], i64 2696// CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]697// CHECK1:       arraydestroy.body:698// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]699// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1700// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]701// CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]702// CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]703// CHECK1:       arraydestroy.done5:704// CHECK1-NEXT:    ret void705//706//707// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined.omp_outlined708// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {709// CHECK1-NEXT:  entry:710// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8711// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8712// CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8713// CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8714// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4715// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4716// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8717// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4718// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4719// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4720// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4721// CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4722// CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4723// CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4724// CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4725// CHECK1-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8726// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4727// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8728// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8729// CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8730// CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8731// CHECK1-NEXT:    store ptr undef, ptr [[_TMP1]], align 8732// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4733// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4734// CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8735// CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32736// CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8737// CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32738// CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4739// CHECK1-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4740// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4741// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4742// CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0743// CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2744// CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]745// CHECK1:       arrayctor.loop:746// CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]747// CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])748// CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1749// CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]750// CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]751// CHECK1:       arrayctor.cont:752// CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])753// CHECK1-NEXT:    store ptr [[VAR]], ptr [[_TMP3]], align 8754// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8755// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4756// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)757// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4758// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1759// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]760// CHECK1:       cond.true:761// CHECK1-NEXT:    br label [[COND_END:%.*]]762// CHECK1:       cond.false:763// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4764// CHECK1-NEXT:    br label [[COND_END]]765// CHECK1:       cond.end:766// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]767// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4768// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4769// CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4770// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]771// CHECK1:       omp.inner.for.cond:772// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4773// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4774// CHECK1-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]775// CHECK1-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]776// CHECK1:       omp.inner.for.cond.cleanup:777// CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]778// CHECK1:       omp.inner.for.body:779// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4780// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1781// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]782// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4783// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4784// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4785// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64786// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]]787// CHECK1-NEXT:    store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4788// CHECK1-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP3]], align 8789// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4790// CHECK1-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64791// CHECK1-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 [[IDXPROM5]]792// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[TMP12]], i64 4, i1 false)793// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]794// CHECK1:       omp.body.continue:795// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]796// CHECK1:       omp.inner.for.inc:797// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4798// CHECK1-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP14]], 1799// CHECK1-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4800// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]801// CHECK1:       omp.inner.for.end:802// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]803// CHECK1:       omp.loop.exit:804// CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8805// CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4806// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]])807// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]808// CHECK1-NEXT:    [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0809// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN8]], i64 2810// CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]811// CHECK1:       arraydestroy.body:812// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]813// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1814// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]815// CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]816// CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]817// CHECK1:       arraydestroy.done9:818// CHECK1-NEXT:    ret void819//820//821// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev822// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {823// CHECK1-NEXT:  entry:824// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8825// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8826// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8827// CHECK1-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]828// CHECK1-NEXT:    ret void829//830//831// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev832// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {833// CHECK1-NEXT:  entry:834// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8835// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8836// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8837// CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0838// CHECK1-NEXT:    [[TMP0:%.*]] = load volatile i32, ptr @g, align 4839// CHECK1-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4840// CHECK1-NEXT:    ret void841//842//843// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei844// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {845// CHECK1-NEXT:  entry:846// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8847// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4848// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8849// CHECK1-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4850// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8851// CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0852// CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4853// CHECK1-NEXT:    [[TMP1:%.*]] = load volatile i32, ptr @g, align 4854// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]855// CHECK1-NEXT:    store i32 [[ADD]], ptr [[F]], align 4856// CHECK1-NEXT:    ret void857//858//859// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev860// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {861// CHECK1-NEXT:  entry:862// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8863// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8864// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8865// CHECK1-NEXT:    ret void866//867//868// CHECK1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_teams_distribute_parallel_for_private_codegen.cpp869// CHECK1-SAME: () #[[ATTR0]] {870// CHECK1-NEXT:  entry:871// CHECK1-NEXT:    call void @__cxx_global_var_init()872// CHECK1-NEXT:    call void @__cxx_global_var_init.1()873// CHECK1-NEXT:    call void @__cxx_global_var_init.2()874// CHECK1-NEXT:    ret void875//876//877// CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init878// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {879// CHECK3-NEXT:  entry:880// CHECK3-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @test)881// CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @test, ptr @__dso_handle) #[[ATTR2:[0-9]+]]882// CHECK3-NEXT:    ret void883//884//885// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev886// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {887// CHECK3-NEXT:  entry:888// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4889// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4890// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4891// CHECK3-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])892// CHECK3-NEXT:    ret void893//894//895// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev896// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {897// CHECK3-NEXT:  entry:898// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4899// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4900// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4901// CHECK3-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]902// CHECK3-NEXT:    ret void903//904//905// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev906// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {907// CHECK3-NEXT:  entry:908// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4909// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4910// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4911// CHECK3-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0912// CHECK3-NEXT:    [[TMP0:%.*]] = load volatile i32, ptr @g, align 4913// CHECK3-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float914// CHECK3-NEXT:    store float [[CONV]], ptr [[F]], align 4915// CHECK3-NEXT:    ret void916//917//918// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev919// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {920// CHECK3-NEXT:  entry:921// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4922// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4923// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4924// CHECK3-NEXT:    ret void925//926//927// CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init.1928// CHECK3-SAME: () #[[ATTR0]] {929// CHECK3-NEXT:  entry:930// CHECK3-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @s_arr, float noundef 1.000000e+00)931// CHECK3-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i32 1), float noundef 2.000000e+00)932// CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @__cxx_global_array_dtor, ptr null, ptr @__dso_handle) #[[ATTR2]]933// CHECK3-NEXT:    ret void934//935//936// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef937// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {938// CHECK3-NEXT:  entry:939// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4940// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4941// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4942// CHECK3-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4943// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4944// CHECK3-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4945// CHECK3-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])946// CHECK3-NEXT:    ret void947//948//949// CHECK3-LABEL: define {{[^@]+}}@__cxx_global_array_dtor950// CHECK3-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR0]] {951// CHECK3-NEXT:  entry:952// CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 4953// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 4954// CHECK3-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]955// CHECK3:       arraydestroy.body:956// CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i32 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]957// CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1958// CHECK3-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]959// CHECK3-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], @s_arr960// CHECK3-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]961// CHECK3:       arraydestroy.done1:962// CHECK3-NEXT:    ret void963//964//965// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef966// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {967// CHECK3-NEXT:  entry:968// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4969// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4970// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4971// CHECK3-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4972// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4973// CHECK3-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0974// CHECK3-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4975// CHECK3-NEXT:    [[TMP1:%.*]] = load volatile i32, ptr @g, align 4976// CHECK3-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float977// CHECK3-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]978// CHECK3-NEXT:    store float [[ADD]], ptr [[F]], align 4979// CHECK3-NEXT:    ret void980//981//982// CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init.2983// CHECK3-SAME: () #[[ATTR0]] {984// CHECK3-NEXT:  entry:985// CHECK3-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @var, float noundef 3.000000e+00)986// CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @var, ptr @__dso_handle) #[[ATTR2]]987// CHECK3-NEXT:    ret void988//989//990// CHECK3-LABEL: define {{[^@]+}}@main991// CHECK3-SAME: () #[[ATTR3:[0-9]+]] {992// CHECK3-NEXT:  entry:993// CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4994// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4995// CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8996// CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4997// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0998// CHECK3-NEXT:    store i32 3, ptr [[TMP0]], align 4999// CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11000// CHECK3-NEXT:    store i32 0, ptr [[TMP1]], align 41001// CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21002// CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 41003// CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31004// CHECK3-NEXT:    store ptr null, ptr [[TMP3]], align 41005// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41006// CHECK3-NEXT:    store ptr null, ptr [[TMP4]], align 41007// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51008// CHECK3-NEXT:    store ptr null, ptr [[TMP5]], align 41009// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61010// CHECK3-NEXT:    store ptr null, ptr [[TMP6]], align 41011// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71012// CHECK3-NEXT:    store ptr null, ptr [[TMP7]], align 41013// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81014// CHECK3-NEXT:    store i64 2, ptr [[TMP8]], align 81015// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91016// CHECK3-NEXT:    store i64 0, ptr [[TMP9]], align 81017// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101018// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 41019// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111020// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 41021// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121022// CHECK3-NEXT:    store i32 0, ptr [[TMP12]], align 41023// CHECK3-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, ptr [[KERNEL_ARGS]])1024// CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01025// CHECK3-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1026// CHECK3:       omp_offload.failed:1027// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96() #[[ATTR2]]1028// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]1029// CHECK3:       omp_offload.cont:1030// CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1031// CHECK3-NEXT:    ret i32 [[CALL]]1032//1033//1034// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l961035// CHECK3-SAME: () #[[ATTR4:[0-9]+]] {1036// CHECK3-NEXT:  entry:1037// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined)1038// CHECK3-NEXT:    ret void1039//1040//1041// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined1042// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {1043// CHECK3-NEXT:  entry:1044// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41045// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41046// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41047// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41048// CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41049// CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41050// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41051// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41052// CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41053// CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41054// CHECK3-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41055// CHECK3-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 41056// CHECK3-NEXT:    [[SIVAR:%.*]] = alloca i32, align 41057// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 41058// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41059// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41060// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 41061// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 41062// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41063// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41064// CHECK3-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01065// CHECK3-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21066// CHECK3-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1067// CHECK3:       arrayctor.loop:1068// CHECK3-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1069// CHECK3-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1070// CHECK3-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 11071// CHECK3-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1072// CHECK3-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1073// CHECK3:       arrayctor.cont:1074// CHECK3-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1075// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41076// CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41077// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1078// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41079// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11080// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1081// CHECK3:       cond.true:1082// CHECK3-NEXT:    br label [[COND_END:%.*]]1083// CHECK3:       cond.false:1084// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41085// CHECK3-NEXT:    br label [[COND_END]]1086// CHECK3:       cond.end:1087// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1088// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41089// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41090// CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41091// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1092// CHECK3:       omp.inner.for.cond:1093// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41094// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41095// CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1096// CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1097// CHECK3:       omp.inner.for.cond.cleanup:1098// CHECK3-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1099// CHECK3:       omp.inner.for.body:1100// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41101// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41102// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]])1103// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1104// CHECK3:       omp.inner.for.inc:1105// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41106// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41107// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]1108// CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41109// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]1110// CHECK3:       omp.inner.for.end:1111// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1112// CHECK3:       omp.loop.exit:1113// CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41114// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 41115// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP12]])1116// CHECK3-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]1117// CHECK3-NEXT:    [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01118// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN2]], i32 21119// CHECK3-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1120// CHECK3:       arraydestroy.body:1121// CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1122// CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11123// CHECK3-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]1124// CHECK3-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]1125// CHECK3-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]1126// CHECK3:       arraydestroy.done3:1127// CHECK3-NEXT:    ret void1128//1129//1130// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined.omp_outlined1131// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {1132// CHECK3-NEXT:  entry:1133// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41134// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41135// CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 41136// CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 41137// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41138// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41139// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41140// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41141// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41142// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41143// CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41144// CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41145// CHECK3-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41146// CHECK3-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 41147// CHECK3-NEXT:    [[SIVAR:%.*]] = alloca i32, align 41148// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 41149// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41150// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41151// CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 41152// CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 41153// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41154// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41155// CHECK3-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 41156// CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41157// CHECK3-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 41158// CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 41159// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41160// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41161// CHECK3-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01162// CHECK3-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21163// CHECK3-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1164// CHECK3:       arrayctor.loop:1165// CHECK3-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1166// CHECK3-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1167// CHECK3-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 11168// CHECK3-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1169// CHECK3-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1170// CHECK3:       arrayctor.cont:1171// CHECK3-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1172// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41173// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 41174// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1175// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41176// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 11177// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1178// CHECK3:       cond.true:1179// CHECK3-NEXT:    br label [[COND_END:%.*]]1180// CHECK3:       cond.false:1181// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41182// CHECK3-NEXT:    br label [[COND_END]]1183// CHECK3:       cond.end:1184// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]1185// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41186// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41187// CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 41188// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1189// CHECK3:       omp.inner.for.cond:1190// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41191// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41192// CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1193// CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1194// CHECK3:       omp.inner.for.cond.cleanup:1195// CHECK3-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1196// CHECK3:       omp.inner.for.body:1197// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41198// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 11199// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1200// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 41201// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 41202// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 41203// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP11]]1204// CHECK3-NEXT:    store i32 [[TMP10]], ptr [[ARRAYIDX]], align 41205// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 41206// CHECK3-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 [[TMP12]]1207// CHECK3-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX2]], ptr align 4 [[VAR]], i32 4, i1 false)1208// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 41209// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[SIVAR]], align 41210// CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], [[TMP13]]1211// CHECK3-NEXT:    store i32 [[ADD3]], ptr [[SIVAR]], align 41212// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1213// CHECK3:       omp.body.continue:1214// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1215// CHECK3:       omp.inner.for.inc:1216// CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41217// CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP15]], 11218// CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 41219// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]1220// CHECK3:       omp.inner.for.end:1221// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1222// CHECK3:       omp.loop.exit:1223// CHECK3-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41224// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 41225// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP17]])1226// CHECK3-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]1227// CHECK3-NEXT:    [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01228// CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN5]], i32 21229// CHECK3-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1230// CHECK3:       arraydestroy.body:1231// CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1232// CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11233// CHECK3-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]1234// CHECK3-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]]1235// CHECK3-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]1236// CHECK3:       arraydestroy.done6:1237// CHECK3-NEXT:    ret void1238//1239//1240// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1241// CHECK3-SAME: () #[[ATTR1]] comdat {1242// CHECK3-NEXT:  entry:1243// CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41244// CHECK3-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41245// CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41246// CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41247// CHECK3-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41248// CHECK3-NEXT:    [[VAR:%.*]] = alloca ptr, align 41249// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41250// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41251// CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81252// CHECK3-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1253// CHECK3-NEXT:    store i32 0, ptr [[T_VAR]], align 41254// CHECK3-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)1255// CHECK3-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1256// CHECK3-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 11257// CHECK3-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1258// CHECK3-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 41259// CHECK3-NEXT:    store ptr undef, ptr [[_TMP1]], align 41260// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01261// CHECK3-NEXT:    store i32 3, ptr [[TMP0]], align 41262// CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11263// CHECK3-NEXT:    store i32 0, ptr [[TMP1]], align 41264// CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21265// CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 41266// CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31267// CHECK3-NEXT:    store ptr null, ptr [[TMP3]], align 41268// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41269// CHECK3-NEXT:    store ptr null, ptr [[TMP4]], align 41270// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51271// CHECK3-NEXT:    store ptr null, ptr [[TMP5]], align 41272// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61273// CHECK3-NEXT:    store ptr null, ptr [[TMP6]], align 41274// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71275// CHECK3-NEXT:    store ptr null, ptr [[TMP7]], align 41276// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81277// CHECK3-NEXT:    store i64 2, ptr [[TMP8]], align 81278// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91279// CHECK3-NEXT:    store i64 0, ptr [[TMP9]], align 81280// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101281// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 41282// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111283// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 41284// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121285// CHECK3-NEXT:    store i32 0, ptr [[TMP12]], align 41286// CHECK3-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.region_id, ptr [[KERNEL_ARGS]])1287// CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01288// CHECK3-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1289// CHECK3:       omp_offload.failed:1290// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56() #[[ATTR2]]1291// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]1292// CHECK3:       omp_offload.cont:1293// CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 41294// CHECK3-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01295// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21296// CHECK3-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1297// CHECK3:       arraydestroy.body:1298// CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1299// CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11300// CHECK3-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]1301// CHECK3-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1302// CHECK3-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1303// CHECK3:       arraydestroy.done2:1304// CHECK3-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]1305// CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 41306// CHECK3-NEXT:    ret i32 [[TMP16]]1307//1308//1309// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1310// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1311// CHECK3-NEXT:  entry:1312// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41313// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41314// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41315// CHECK3-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1316// CHECK3-NEXT:    ret void1317//1318//1319// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1320// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1321// CHECK3-NEXT:  entry:1322// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41323// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41324// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41325// CHECK3-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41326// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41327// CHECK3-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41328// CHECK3-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1329// CHECK3-NEXT:    ret void1330//1331//1332// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l561333// CHECK3-SAME: () #[[ATTR4]] {1334// CHECK3-NEXT:  entry:1335// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined)1336// CHECK3-NEXT:    ret void1337//1338//1339// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined1340// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {1341// CHECK3-NEXT:  entry:1342// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41343// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41344// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41345// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41346// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41347// CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41348// CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41349// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41350// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41351// CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41352// CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41353// CHECK3-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41354// CHECK3-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41355// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 41356// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 41357// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41358// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41359// CHECK3-NEXT:    store ptr undef, ptr [[_TMP1]], align 41360// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 41361// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 41362// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41363// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41364// CHECK3-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01365// CHECK3-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21366// CHECK3-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1367// CHECK3:       arrayctor.loop:1368// CHECK3-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1369// CHECK3-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1370// CHECK3-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 11371// CHECK3-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1372// CHECK3-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1373// CHECK3:       arrayctor.cont:1374// CHECK3-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1375// CHECK3-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 41376// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41377// CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41378// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1379// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41380// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11381// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1382// CHECK3:       cond.true:1383// CHECK3-NEXT:    br label [[COND_END:%.*]]1384// CHECK3:       cond.false:1385// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41386// CHECK3-NEXT:    br label [[COND_END]]1387// CHECK3:       cond.end:1388// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1389// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41390// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41391// CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41392// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1393// CHECK3:       omp.inner.for.cond:1394// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41395// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41396// CHECK3-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1397// CHECK3-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1398// CHECK3:       omp.inner.for.cond.cleanup:1399// CHECK3-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1400// CHECK3:       omp.inner.for.body:1401// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41402// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41403// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]])1404// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1405// CHECK3:       omp.inner.for.inc:1406// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41407// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41408// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]1409// CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41410// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]1411// CHECK3:       omp.inner.for.end:1412// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1413// CHECK3:       omp.loop.exit:1414// CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41415// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 41416// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP12]])1417// CHECK3-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]1418// CHECK3-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01419// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN4]], i32 21420// CHECK3-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1421// CHECK3:       arraydestroy.body:1422// CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1423// CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11424// CHECK3-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]1425// CHECK3-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]1426// CHECK3-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]1427// CHECK3:       arraydestroy.done5:1428// CHECK3-NEXT:    ret void1429//1430//1431// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined.omp_outlined1432// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {1433// CHECK3-NEXT:  entry:1434// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41435// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41436// CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 41437// CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 41438// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41439// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41440// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41441// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41442// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41443// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41444// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41445// CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41446// CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41447// CHECK3-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41448// CHECK3-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41449// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 41450// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 41451// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41452// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41453// CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 41454// CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 41455// CHECK3-NEXT:    store ptr undef, ptr [[_TMP1]], align 41456// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41457// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41458// CHECK3-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 41459// CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41460// CHECK3-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 41461// CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 41462// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41463// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41464// CHECK3-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01465// CHECK3-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21466// CHECK3-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1467// CHECK3:       arrayctor.loop:1468// CHECK3-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1469// CHECK3-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1470// CHECK3-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 11471// CHECK3-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1472// CHECK3-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1473// CHECK3:       arrayctor.cont:1474// CHECK3-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1475// CHECK3-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 41476// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41477// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 41478// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1479// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41480// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 11481// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1482// CHECK3:       cond.true:1483// CHECK3-NEXT:    br label [[COND_END:%.*]]1484// CHECK3:       cond.false:1485// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41486// CHECK3-NEXT:    br label [[COND_END]]1487// CHECK3:       cond.end:1488// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]1489// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41490// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41491// CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 41492// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1493// CHECK3:       omp.inner.for.cond:1494// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41495// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41496// CHECK3-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1497// CHECK3-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1498// CHECK3:       omp.inner.for.cond.cleanup:1499// CHECK3-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1500// CHECK3:       omp.inner.for.body:1501// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41502// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 11503// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1504// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 41505// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 41506// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 41507// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP11]]1508// CHECK3-NEXT:    store i32 [[TMP10]], ptr [[ARRAYIDX]], align 41509// CHECK3-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP2]], align 41510// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 41511// CHECK3-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 [[TMP13]]1512// CHECK3-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP12]], i32 4, i1 false)1513// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1514// CHECK3:       omp.body.continue:1515// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1516// CHECK3:       omp.inner.for.inc:1517// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41518// CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP14]], 11519// CHECK3-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 41520// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]1521// CHECK3:       omp.inner.for.end:1522// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1523// CHECK3:       omp.loop.exit:1524// CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41525// CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 41526// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]])1527// CHECK3-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]1528// CHECK3-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01529// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN6]], i32 21530// CHECK3-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1531// CHECK3:       arraydestroy.body:1532// CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1533// CHECK3-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11534// CHECK3-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]1535// CHECK3-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]1536// CHECK3-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]1537// CHECK3:       arraydestroy.done7:1538// CHECK3-NEXT:    ret void1539//1540//1541// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1542// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1543// CHECK3-NEXT:  entry:1544// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41545// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41546// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41547// CHECK3-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]1548// CHECK3-NEXT:    ret void1549//1550//1551// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1552// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1553// CHECK3-NEXT:  entry:1554// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41555// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41556// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41557// CHECK3-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01558// CHECK3-NEXT:    [[TMP0:%.*]] = load volatile i32, ptr @g, align 41559// CHECK3-NEXT:    store i32 [[TMP0]], ptr [[F]], align 41560// CHECK3-NEXT:    ret void1561//1562//1563// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1564// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1565// CHECK3-NEXT:  entry:1566// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41567// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41568// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41569// CHECK3-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41570// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41571// CHECK3-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01572// CHECK3-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41573// CHECK3-NEXT:    [[TMP1:%.*]] = load volatile i32, ptr @g, align 41574// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]1575// CHECK3-NEXT:    store i32 [[ADD]], ptr [[F]], align 41576// CHECK3-NEXT:    ret void1577//1578//1579// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1580// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1581// CHECK3-NEXT:  entry:1582// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41583// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41584// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41585// CHECK3-NEXT:    ret void1586//1587//1588// CHECK3-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_teams_distribute_parallel_for_private_codegen.cpp1589// CHECK3-SAME: () #[[ATTR0]] {1590// CHECK3-NEXT:  entry:1591// CHECK3-NEXT:    call void @__cxx_global_var_init()1592// CHECK3-NEXT:    call void @__cxx_global_var_init.1()1593// CHECK3-NEXT:    call void @__cxx_global_var_init.2()1594// CHECK3-NEXT:    ret void1595//1596//1597// CHECK9-LABEL: define {{[^@]+}}@__cxx_global_var_init1598// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {1599// CHECK9-NEXT:  entry:1600// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @test)1601// CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @test, ptr @__dso_handle) #[[ATTR2:[0-9]+]]1602// CHECK9-NEXT:    ret void1603//1604//1605// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1606// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {1607// CHECK9-NEXT:  entry:1608// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81609// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81610// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81611// CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1612// CHECK9-NEXT:    ret void1613//1614//1615// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1616// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1617// CHECK9-NEXT:  entry:1618// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81619// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81620// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81621// CHECK9-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]1622// CHECK9-NEXT:    ret void1623//1624//1625// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1626// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1627// CHECK9-NEXT:  entry:1628// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81629// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81630// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81631// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01632// CHECK9-NEXT:    [[TMP0:%.*]] = load volatile i32, ptr @g, align 41633// CHECK9-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float1634// CHECK9-NEXT:    store float [[CONV]], ptr [[F]], align 41635// CHECK9-NEXT:    ret void1636//1637//1638// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1639// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1640// CHECK9-NEXT:  entry:1641// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81642// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81643// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81644// CHECK9-NEXT:    ret void1645//1646//1647// CHECK9-LABEL: define {{[^@]+}}@__cxx_global_var_init.11648// CHECK9-SAME: () #[[ATTR0]] {1649// CHECK9-NEXT:  entry:1650// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @s_arr, float noundef 1.000000e+00)1651// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i64 1), float noundef 2.000000e+00)1652// CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @__cxx_global_array_dtor, ptr null, ptr @__dso_handle) #[[ATTR2]]1653// CHECK9-NEXT:    ret void1654//1655//1656// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1657// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1658// CHECK9-NEXT:  entry:1659// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81660// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41661// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81662// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41663// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81664// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41665// CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1666// CHECK9-NEXT:    ret void1667//1668//1669// CHECK9-LABEL: define {{[^@]+}}@__cxx_global_array_dtor1670// CHECK9-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR0]] {1671// CHECK9-NEXT:  entry:1672// CHECK9-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 81673// CHECK9-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 81674// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1675// CHECK9:       arraydestroy.body:1676// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1677// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11678// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]1679// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], @s_arr1680// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]1681// CHECK9:       arraydestroy.done1:1682// CHECK9-NEXT:    ret void1683//1684//1685// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1686// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1687// CHECK9-NEXT:  entry:1688// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81689// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41690// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81691// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41692// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81693// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01694// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41695// CHECK9-NEXT:    [[TMP1:%.*]] = load volatile i32, ptr @g, align 41696// CHECK9-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float1697// CHECK9-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]1698// CHECK9-NEXT:    store float [[ADD]], ptr [[F]], align 41699// CHECK9-NEXT:    ret void1700//1701//1702// CHECK9-LABEL: define {{[^@]+}}@__cxx_global_var_init.21703// CHECK9-SAME: () #[[ATTR0]] {1704// CHECK9-NEXT:  entry:1705// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @var, float noundef 3.000000e+00)1706// CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @var, ptr @__dso_handle) #[[ATTR2]]1707// CHECK9-NEXT:    ret void1708//1709//1710// CHECK9-LABEL: define {{[^@]+}}@main1711// CHECK9-SAME: () #[[ATTR3:[0-9]+]] {1712// CHECK9-NEXT:  entry:1713// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41714// CHECK9-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 11715// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 41716// CHECK9-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])1717// CHECK9-NEXT:    ret i32 01718//1719//1720// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l751721// CHECK9-SAME: (i64 noundef [[G1:%.*]]) #[[ATTR4:[0-9]+]] {1722// CHECK9-NEXT:  entry:1723// CHECK9-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 81724// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 81725// CHECK9-NEXT:    store i64 [[G1]], ptr [[G1_ADDR]], align 81726// CHECK9-NEXT:    store ptr [[G1_ADDR]], ptr [[TMP]], align 81727// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l75.omp_outlined)1728// CHECK9-NEXT:    ret void1729//1730//1731// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l75.omp_outlined1732// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {1733// CHECK9-NEXT:  entry:1734// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81735// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81736// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41737// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 41738// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81739// CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41740// CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41741// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41742// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41743// CHECK9-NEXT:    [[G:%.*]] = alloca i32, align 41744// CHECK9-NEXT:    [[G1:%.*]] = alloca i32, align 41745// CHECK9-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 81746// CHECK9-NEXT:    [[SIVAR:%.*]] = alloca i32, align 41747// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41748// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81749// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81750// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 81751// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 41752// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 41753// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41754// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41755// CHECK9-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 81756// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81757// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41758// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1759// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41760// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11761// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1762// CHECK9:       cond.true:1763// CHECK9-NEXT:    br label [[COND_END:%.*]]1764// CHECK9:       cond.false:1765// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41766// CHECK9-NEXT:    br label [[COND_END]]1767// CHECK9:       cond.end:1768// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1769// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41770// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41771// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41772// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1773// CHECK9:       omp.inner.for.cond:1774// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41775// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41776// CHECK9-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1777// CHECK9-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1778// CHECK9:       omp.inner.for.body:1779// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41780// CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i641781// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41782// CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i641783// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l75.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])1784// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1785// CHECK9:       omp.inner.for.inc:1786// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41787// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41788// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]1789// CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41790// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]1791// CHECK9:       omp.inner.for.end:1792// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1793// CHECK9:       omp.loop.exit:1794// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])1795// CHECK9-NEXT:    ret void1796//1797//1798// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l75.omp_outlined.omp_outlined1799// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] {1800// CHECK9-NEXT:  entry:1801// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81802// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81803// CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81804// CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81805// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41806// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 41807// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81808// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41809// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41810// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41811// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41812// CHECK9-NEXT:    [[G:%.*]] = alloca i32, align 41813// CHECK9-NEXT:    [[G1:%.*]] = alloca i32, align 41814// CHECK9-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 81815// CHECK9-NEXT:    [[SIVAR:%.*]] = alloca i32, align 41816// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41817// CHECK9-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 81818// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81819// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81820// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81821// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81822// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 81823// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41824// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41825// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81826// CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i321827// CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81828// CHECK9-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i321829// CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41830// CHECK9-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 41831// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41832// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41833// CHECK9-NEXT:    store ptr [[G1]], ptr [[_TMP3]], align 81834// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81835// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 41836// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1837// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41838// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 11839// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1840// CHECK9:       cond.true:1841// CHECK9-NEXT:    br label [[COND_END:%.*]]1842// CHECK9:       cond.false:1843// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41844// CHECK9-NEXT:    br label [[COND_END]]1845// CHECK9:       cond.end:1846// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]1847// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41848// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41849// CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 41850// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1851// CHECK9:       omp.inner.for.cond:1852// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41853// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41854// CHECK9-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1855// CHECK9-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1856// CHECK9:       omp.inner.for.body:1857// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41858// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 11859// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1860// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 41861// CHECK9-NEXT:    store i32 1, ptr [[G]], align 41862// CHECK9-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP3]], align 81863// CHECK9-NEXT:    store volatile i32 1, ptr [[TMP10]], align 41864// CHECK9-NEXT:    store i32 2, ptr [[SIVAR]], align 41865// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 01866// CHECK9-NEXT:    store ptr [[G]], ptr [[TMP11]], align 81867// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 11868// CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[_TMP3]], align 81869// CHECK9-NEXT:    store ptr [[TMP13]], ptr [[TMP12]], align 81870// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 21871// CHECK9-NEXT:    store ptr [[SIVAR]], ptr [[TMP14]], align 81872// CHECK9-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]])1873// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1874// CHECK9:       omp.body.continue:1875// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1876// CHECK9:       omp.inner.for.inc:1877// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41878// CHECK9-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], 11879// CHECK9-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 41880// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]1881// CHECK9:       omp.inner.for.end:1882// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1883// CHECK9:       omp.loop.exit:1884// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])1885// CHECK9-NEXT:    ret void1886//1887//1888// CHECK9-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_teams_distribute_parallel_for_private_codegen.cpp1889// CHECK9-SAME: () #[[ATTR0]] {1890// CHECK9-NEXT:  entry:1891// CHECK9-NEXT:    call void @__cxx_global_var_init()1892// CHECK9-NEXT:    call void @__cxx_global_var_init.1()1893// CHECK9-NEXT:    call void @__cxx_global_var_init.2()1894// CHECK9-NEXT:    ret void1895//1896