13702 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// expected-no-diagnostics3#ifndef HEADER4#define HEADER5 6// Test host codegen.7// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK18// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s9// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK110// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK311// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s12// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK313 14// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK515// RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s16// RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK517// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK718// RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s19// RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK720 21// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"22// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s23// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"24// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"25// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s26// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"27#ifdef CK128 29template <typename T, int X, long long Y>30struct SS{31 T a[X];32 float b;33 int foo(void) {34 35 #pragma omp target36 #pragma omp teams distribute parallel for37 for(int i = 0; i < X; i++) {38 a[i] = (T)0;39 }40 #pragma omp target41 #pragma omp teams distribute parallel for schedule(static)42 for(int i = 0; i < X; i++) {43 a[i] = (T)0;44 }45 #pragma omp target46 #pragma omp teams distribute parallel for schedule(static, X/2)47 for(int i = 0; i < X; i++) {48 a[i] = (T)0;49 }50 51 #pragma omp target52 #pragma omp teams distribute parallel for schedule(dynamic)53 for(int i = 0; i < X; i++) {54 a[i] = (T)0;55 }56 57 #pragma omp target58 #pragma omp teams distribute parallel for schedule(dynamic, X/2)59 for(int i = 0; i < X; i++) {60 a[i] = (T)0;61 }62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 return a[0];79 }80};81 82int teams_template_struct(void) {83 SS<int, 123, 456> V;84 return V.foo();85 86}87#endif // CK188 89// Test host codegen.90// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1391// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s92// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1393// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1594// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s95// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1596 97// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1798// RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s99// RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17100// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19101// RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s102// RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19103 104// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"105// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s106// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"107// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"108// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s109// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"110#ifdef CK2111 112template <typename T, int n>113int tmain(T argc) {114 T a[n];115 int m = 10;116#pragma omp target117#pragma omp teams distribute parallel for118 for(int i = 0; i < n; i++) {119 a[i] = (T)0;120 }121#pragma omp target122#pragma omp teams distribute parallel for schedule(static)123 for(int i = 0; i < n; i++) {124 a[i] = (T)0;125 }126#pragma omp target127#pragma omp teams distribute parallel for schedule(static, m)128 for(int i = 0; i < n; i++) {129 a[i] = (T)0;130 }131#pragma omp target132#pragma omp teams distribute parallel for schedule(dynamic)133 for(int i = 0; i < n; i++) {134 a[i] = (T)0;135 }136#pragma omp target137#pragma omp teams distribute parallel for schedule(dynamic, m)138 for(int i = 0; i < n; i++) {139 a[i] = (T)0;140 }141 return 0;142}143 144int main (int argc, char **argv) {145 int n = 100;146 int a[n];147 int m = 10;148#pragma omp target149#pragma omp teams distribute parallel for150 for(int i = 0; i < n; i++) {151 a[i] = 0;152 }153#pragma omp target154#pragma omp teams distribute parallel for dist_schedule(static)155 for(int i = 0; i < n; i++) {156 a[i] = 0;157 }158#pragma omp target159#pragma omp teams distribute parallel for dist_schedule(static, m)160 for(int i = 0; i < n; i++) {161 a[i] = 0;162 }163#pragma omp target164#pragma omp teams distribute parallel for schedule(dynamic)165 for(int i = 0; i < n; i++) {166 a[i] = 0;167 }168#pragma omp target169#pragma omp teams distribute parallel for schedule(dynamic, m)170 for(int i = 0; i < n; i++) {171 a[i] = 0;172 }173 return tmain<int, 10>(argc);174}175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209#endif // CK2210#endif // #ifndef HEADER211// CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv212// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {213// CHECK1-NEXT: entry:214// CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4215// CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])216// CHECK1-NEXT: ret i32 [[CALL]]217//218//219// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv220// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {221// CHECK1-NEXT: entry:222// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8223// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8224// CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8225// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8226// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4227// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8228// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8229// CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8230// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8231// CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4232// CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8233// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8234// CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8235// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8236// CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4237// CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8238// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 8239// CHECK1-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 8240// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 8241// CHECK1-NEXT: [[_TMP22:%.*]] = alloca i32, align 4242// CHECK1-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8243// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 8244// CHECK1-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 8245// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 8246// CHECK1-NEXT: [[_TMP30:%.*]] = alloca i32, align 4247// CHECK1-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8248// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8249// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8250// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0251// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0252// CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8253// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0254// CHECK1-NEXT: store ptr [[A]], ptr [[TMP1]], align 8255// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0256// CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8257// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0258// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0259// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0260// CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4261// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1262// CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4263// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2264// CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8265// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3266// CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8267// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4268// CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8269// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5270// CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8271// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6272// CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8273// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7274// CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8275// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8276// CHECK1-NEXT: store i64 123, ptr [[TMP13]], align 8277// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9278// CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8279// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10280// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4281// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11282// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4283// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12284// CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4285// CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, ptr [[KERNEL_ARGS]])286// CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0287// CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]288// CHECK1: omp_offload.failed:289// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]290// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]291// CHECK1: omp_offload.cont:292// CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0293// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0294// CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 8295// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0296// CHECK1-NEXT: store ptr [[A2]], ptr [[TMP21]], align 8297// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0298// CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8299// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0300// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0301// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0302// CHECK1-NEXT: store i32 3, ptr [[TMP25]], align 4303// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1304// CHECK1-NEXT: store i32 1, ptr [[TMP26]], align 4305// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2306// CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8307// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3308// CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8309// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4310// CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 8311// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5312// CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8313// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6314// CHECK1-NEXT: store ptr null, ptr [[TMP31]], align 8315// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7316// CHECK1-NEXT: store ptr null, ptr [[TMP32]], align 8317// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8318// CHECK1-NEXT: store i64 123, ptr [[TMP33]], align 8319// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9320// CHECK1-NEXT: store i64 0, ptr [[TMP34]], align 8321// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10322// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4323// CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11324// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4325// CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12326// CHECK1-NEXT: store i32 0, ptr [[TMP37]], align 4327// CHECK1-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]])328// CHECK1-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0329// CHECK1-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]330// CHECK1: omp_offload.failed8:331// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]]332// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]]333// CHECK1: omp_offload.cont9:334// CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0335// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0336// CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 8337// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0338// CHECK1-NEXT: store ptr [[A10]], ptr [[TMP41]], align 8339// CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0340// CHECK1-NEXT: store ptr null, ptr [[TMP42]], align 8341// CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0342// CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0343// CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0344// CHECK1-NEXT: store i32 3, ptr [[TMP45]], align 4345// CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1346// CHECK1-NEXT: store i32 1, ptr [[TMP46]], align 4347// CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2348// CHECK1-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8349// CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3350// CHECK1-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8351// CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4352// CHECK1-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 8353// CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5354// CHECK1-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8355// CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6356// CHECK1-NEXT: store ptr null, ptr [[TMP51]], align 8357// CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7358// CHECK1-NEXT: store ptr null, ptr [[TMP52]], align 8359// CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8360// CHECK1-NEXT: store i64 123, ptr [[TMP53]], align 8361// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9362// CHECK1-NEXT: store i64 0, ptr [[TMP54]], align 8363// CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10364// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4365// CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11366// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4367// CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12368// CHECK1-NEXT: store i32 0, ptr [[TMP57]], align 4369// CHECK1-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, ptr [[KERNEL_ARGS15]])370// CHECK1-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0371// CHECK1-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]372// CHECK1: omp_offload.failed16:373// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(ptr [[THIS1]]) #[[ATTR2]]374// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]]375// CHECK1: omp_offload.cont17:376// CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0377// CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0378// CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP60]], align 8379// CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0380// CHECK1-NEXT: store ptr [[A18]], ptr [[TMP61]], align 8381// CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0382// CHECK1-NEXT: store ptr null, ptr [[TMP62]], align 8383// CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0384// CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0385// CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0386// CHECK1-NEXT: store i32 3, ptr [[TMP65]], align 4387// CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1388// CHECK1-NEXT: store i32 1, ptr [[TMP66]], align 4389// CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2390// CHECK1-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 8391// CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3392// CHECK1-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 8393// CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4394// CHECK1-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 8395// CHECK1-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5396// CHECK1-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 8397// CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6398// CHECK1-NEXT: store ptr null, ptr [[TMP71]], align 8399// CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7400// CHECK1-NEXT: store ptr null, ptr [[TMP72]], align 8401// CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8402// CHECK1-NEXT: store i64 123, ptr [[TMP73]], align 8403// CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9404// CHECK1-NEXT: store i64 0, ptr [[TMP74]], align 8405// CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10406// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4407// CHECK1-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11408// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4409// CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12410// CHECK1-NEXT: store i32 0, ptr [[TMP77]], align 4411// CHECK1-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, ptr [[KERNEL_ARGS23]])412// CHECK1-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0413// CHECK1-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]414// CHECK1: omp_offload.failed24:415// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(ptr [[THIS1]]) #[[ATTR2]]416// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT25]]417// CHECK1: omp_offload.cont25:418// CHECK1-NEXT: [[A26:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0419// CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0420// CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP80]], align 8421// CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0422// CHECK1-NEXT: store ptr [[A26]], ptr [[TMP81]], align 8423// CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0424// CHECK1-NEXT: store ptr null, ptr [[TMP82]], align 8425// CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0426// CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0427// CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0428// CHECK1-NEXT: store i32 3, ptr [[TMP85]], align 4429// CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1430// CHECK1-NEXT: store i32 1, ptr [[TMP86]], align 4431// CHECK1-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2432// CHECK1-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 8433// CHECK1-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3434// CHECK1-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 8435// CHECK1-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4436// CHECK1-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 8437// CHECK1-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5438// CHECK1-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 8439// CHECK1-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6440// CHECK1-NEXT: store ptr null, ptr [[TMP91]], align 8441// CHECK1-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7442// CHECK1-NEXT: store ptr null, ptr [[TMP92]], align 8443// CHECK1-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8444// CHECK1-NEXT: store i64 123, ptr [[TMP93]], align 8445// CHECK1-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9446// CHECK1-NEXT: store i64 0, ptr [[TMP94]], align 8447// CHECK1-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10448// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4449// CHECK1-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11450// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4451// CHECK1-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12452// CHECK1-NEXT: store i32 0, ptr [[TMP97]], align 4453// CHECK1-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, ptr [[KERNEL_ARGS31]])454// CHECK1-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0455// CHECK1-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]456// CHECK1: omp_offload.failed32:457// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(ptr [[THIS1]]) #[[ATTR2]]458// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT33]]459// CHECK1: omp_offload.cont33:460// CHECK1-NEXT: [[A34:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0461// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i64 0, i64 0462// CHECK1-NEXT: [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4463// CHECK1-NEXT: ret i32 [[TMP100]]464//465//466// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35467// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {468// CHECK1-NEXT: entry:469// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8470// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8471// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8472// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined, ptr [[TMP0]])473// CHECK1-NEXT: ret void474//475//476// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined477// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {478// CHECK1-NEXT: entry:479// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8480// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8481// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8482// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4483// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4484// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4485// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4486// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4487// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4488// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4489// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8490// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8491// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8492// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8493// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4494// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4495// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4496// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4497// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8498// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4499// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)500// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4501// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122502// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]503// CHECK1: cond.true:504// CHECK1-NEXT: br label [[COND_END:%.*]]505// CHECK1: cond.false:506// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4507// CHECK1-NEXT: br label [[COND_END]]508// CHECK1: cond.end:509// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]510// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4511// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4512// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4513// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]514// CHECK1: omp.inner.for.cond:515// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4516// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4517// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]518// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]519// CHECK1: omp.inner.for.body:520// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4521// CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64522// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4523// CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64524// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])525// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]526// CHECK1: omp.inner.for.inc:527// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4528// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4529// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]530// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4531// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]532// CHECK1: omp.inner.for.end:533// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]534// CHECK1: omp.loop.exit:535// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])536// CHECK1-NEXT: ret void537//538//539// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined540// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {541// CHECK1-NEXT: entry:542// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8543// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8544// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8545// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8546// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8547// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4548// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4549// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4550// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4551// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4552// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4553// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4554// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8555// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8556// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8557// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8558// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8559// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8560// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4561// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4562// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8563// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32564// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8565// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32566// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4567// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4568// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4569// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4570// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8571// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4572// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)573// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4574// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122575// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]576// CHECK1: cond.true:577// CHECK1-NEXT: br label [[COND_END:%.*]]578// CHECK1: cond.false:579// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4580// CHECK1-NEXT: br label [[COND_END]]581// CHECK1: cond.end:582// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]583// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4584// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4585// CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4586// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]587// CHECK1: omp.inner.for.cond:588// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4589// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4590// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]591// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]592// CHECK1: omp.inner.for.body:593// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4594// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1595// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]596// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4597// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0598// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4599// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64600// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]601// CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4602// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]603// CHECK1: omp.body.continue:604// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]605// CHECK1: omp.inner.for.inc:606// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4607// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1608// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4609// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]610// CHECK1: omp.inner.for.end:611// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]612// CHECK1: omp.loop.exit:613// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])614// CHECK1-NEXT: ret void615//616//617// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40618// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {619// CHECK1-NEXT: entry:620// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8621// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8622// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8623// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]])624// CHECK1-NEXT: ret void625//626//627// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined628// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {629// CHECK1-NEXT: entry:630// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8631// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8632// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8633// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4634// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4635// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4636// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4637// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4638// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4639// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4640// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8641// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8642// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8643// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8644// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4645// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4646// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4647// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4648// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8649// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4650// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)651// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4652// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122653// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]654// CHECK1: cond.true:655// CHECK1-NEXT: br label [[COND_END:%.*]]656// CHECK1: cond.false:657// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4658// CHECK1-NEXT: br label [[COND_END]]659// CHECK1: cond.end:660// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]661// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4662// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4663// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4664// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]665// CHECK1: omp.inner.for.cond:666// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4667// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4668// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]669// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]670// CHECK1: omp.inner.for.body:671// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4672// CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64673// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4674// CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64675// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])676// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]677// CHECK1: omp.inner.for.inc:678// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4679// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4680// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]681// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4682// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]683// CHECK1: omp.inner.for.end:684// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]685// CHECK1: omp.loop.exit:686// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])687// CHECK1-NEXT: ret void688//689//690// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined691// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {692// CHECK1-NEXT: entry:693// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8694// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8695// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8696// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8697// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8698// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4699// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4700// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4701// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4702// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4703// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4704// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4705// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8706// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8707// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8708// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8709// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8710// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8711// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4712// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4713// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8714// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32715// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8716// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32717// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4718// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4719// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4720// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4721// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8722// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4723// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)724// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4725// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122726// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]727// CHECK1: cond.true:728// CHECK1-NEXT: br label [[COND_END:%.*]]729// CHECK1: cond.false:730// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4731// CHECK1-NEXT: br label [[COND_END]]732// CHECK1: cond.end:733// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]734// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4735// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4736// CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4737// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]738// CHECK1: omp.inner.for.cond:739// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4740// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4741// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]742// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]743// CHECK1: omp.inner.for.body:744// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4745// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1746// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]747// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4748// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0749// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4750// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64751// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]752// CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4753// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]754// CHECK1: omp.body.continue:755// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]756// CHECK1: omp.inner.for.inc:757// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4758// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1759// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4760// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]761// CHECK1: omp.inner.for.end:762// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]763// CHECK1: omp.loop.exit:764// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])765// CHECK1-NEXT: ret void766//767//768// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45769// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {770// CHECK1-NEXT: entry:771// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8772// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8773// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8774// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined, ptr [[TMP0]])775// CHECK1-NEXT: ret void776//777//778// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined779// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {780// CHECK1-NEXT: entry:781// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8782// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8783// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8784// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4785// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4786// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4787// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4788// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4789// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4790// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4791// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8792// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8793// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8794// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8795// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4796// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4797// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4798// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4799// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8800// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4801// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)802// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4803// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122804// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]805// CHECK1: cond.true:806// CHECK1-NEXT: br label [[COND_END:%.*]]807// CHECK1: cond.false:808// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4809// CHECK1-NEXT: br label [[COND_END]]810// CHECK1: cond.end:811// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]812// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4813// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4814// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4815// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]816// CHECK1: omp.inner.for.cond:817// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4818// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4819// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]820// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]821// CHECK1: omp.inner.for.body:822// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4823// CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64824// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4825// CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64826// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])827// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]828// CHECK1: omp.inner.for.inc:829// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4830// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4831// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]832// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4833// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]834// CHECK1: omp.inner.for.end:835// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]836// CHECK1: omp.loop.exit:837// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])838// CHECK1-NEXT: ret void839//840//841// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined842// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {843// CHECK1-NEXT: entry:844// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8845// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8846// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8847// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8848// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8849// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4850// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4851// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4852// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4853// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4854// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4855// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4856// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8857// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8858// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8859// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8860// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8861// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8862// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4863// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4864// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8865// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32866// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8867// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32868// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4869// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4870// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4871// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4872// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8873// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4874// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)875// CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]876// CHECK1: omp.dispatch.cond:877// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4878// CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8879// CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32880// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]881// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]882// CHECK1: cond.true:883// CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8884// CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32885// CHECK1-NEXT: br label [[COND_END:%.*]]886// CHECK1: cond.false:887// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4888// CHECK1-NEXT: br label [[COND_END]]889// CHECK1: cond.end:890// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]891// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4892// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4893// CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4894// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4895// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4896// CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]897// CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]898// CHECK1: omp.dispatch.body:899// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]900// CHECK1: omp.inner.for.cond:901// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4902// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4903// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]904// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]905// CHECK1: omp.inner.for.body:906// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4907// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1908// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]909// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4910// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0911// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4912// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64913// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]914// CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4915// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]916// CHECK1: omp.body.continue:917// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]918// CHECK1: omp.inner.for.inc:919// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4920// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1921// CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4922// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]923// CHECK1: omp.inner.for.end:924// CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]925// CHECK1: omp.dispatch.inc:926// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4927// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4928// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]929// CHECK1-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4930// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4931// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4932// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]933// CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4934// CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]935// CHECK1: omp.dispatch.end:936// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])937// CHECK1-NEXT: ret void938//939//940// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51941// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {942// CHECK1-NEXT: entry:943// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8944// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8945// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8946// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined, ptr [[TMP0]])947// CHECK1-NEXT: ret void948//949//950// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined951// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {952// CHECK1-NEXT: entry:953// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8954// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8955// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8956// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4957// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4958// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4959// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4960// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4961// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4962// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4963// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8964// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8965// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8966// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8967// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4968// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4969// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4970// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4971// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8972// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4973// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)974// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4975// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122976// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]977// CHECK1: cond.true:978// CHECK1-NEXT: br label [[COND_END:%.*]]979// CHECK1: cond.false:980// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4981// CHECK1-NEXT: br label [[COND_END]]982// CHECK1: cond.end:983// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]984// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4985// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4986// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4987// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]988// CHECK1: omp.inner.for.cond:989// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4990// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4991// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]992// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]993// CHECK1: omp.inner.for.body:994// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4995// CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64996// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4997// CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64998// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])999// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1000// CHECK1: omp.inner.for.inc:1001// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41002// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41003// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]1004// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41005// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]1006// CHECK1: omp.inner.for.end:1007// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1008// CHECK1: omp.loop.exit:1009// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1010// CHECK1-NEXT: ret void1011//1012//1013// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined1014// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1015// CHECK1-NEXT: entry:1016// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81017// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81018// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81019// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81020// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81021// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41022// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41023// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41024// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41025// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41026// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41027// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41028// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81029// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81030// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81031// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81032// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81033// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81034// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41035// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 41036// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81037// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i321038// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81039// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i321040// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41041// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 41042// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41043// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41044// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41045// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41046// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81047// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 41048// CHECK1-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)1049// CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]1050// CHECK1: omp.dispatch.cond:1051// CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])1052// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 01053// CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]1054// CHECK1: omp.dispatch.body:1055// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41056// CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 41057// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1058// CHECK1: omp.inner.for.cond:1059// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]1060// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]1061// CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]1062// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1063// CHECK1: omp.inner.for.body:1064// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1065// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 11066// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1067// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1068// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 01069// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1070// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i641071// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]1072// CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]1073// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1074// CHECK1: omp.body.continue:1075// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1076// CHECK1: omp.inner.for.inc:1077// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1078// CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 11079// CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1080// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]1081// CHECK1: omp.inner.for.end:1082// CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]1083// CHECK1: omp.dispatch.inc:1084// CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]1085// CHECK1: omp.dispatch.end:1086// CHECK1-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]])1087// CHECK1-NEXT: ret void1088//1089//1090// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l571091// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1092// CHECK1-NEXT: entry:1093// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81094// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81095// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81096// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined, ptr [[TMP0]])1097// CHECK1-NEXT: ret void1098//1099//1100// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined1101// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1102// CHECK1-NEXT: entry:1103// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81104// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81105// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81106// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41107// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41108// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41109// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41110// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41111// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41112// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41113// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81114// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81115// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81116// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81117// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41118// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 41119// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41120// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41121// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81122// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41123// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1124// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41125// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1221126// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1127// CHECK1: cond.true:1128// CHECK1-NEXT: br label [[COND_END:%.*]]1129// CHECK1: cond.false:1130// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41131// CHECK1-NEXT: br label [[COND_END]]1132// CHECK1: cond.end:1133// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1134// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41135// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41136// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41137// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1138// CHECK1: omp.inner.for.cond:1139// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41140// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41141// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1142// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1143// CHECK1: omp.inner.for.body:1144// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41145// CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i641146// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41147// CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i641148// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])1149// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1150// CHECK1: omp.inner.for.inc:1151// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41152// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41153// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]1154// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41155// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]1156// CHECK1: omp.inner.for.end:1157// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1158// CHECK1: omp.loop.exit:1159// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1160// CHECK1-NEXT: ret void1161//1162//1163// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined1164// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1165// CHECK1-NEXT: entry:1166// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81167// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81168// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81169// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81170// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81171// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41172// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41173// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41174// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41175// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41176// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41177// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41178// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81179// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81180// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81181// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81182// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81183// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81184// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41185// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 41186// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81187// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i321188// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81189// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i321190// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41191// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 41192// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41193// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41194// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41195// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41196// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81197// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 41198// CHECK1-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)1199// CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]1200// CHECK1: omp.dispatch.cond:1201// CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])1202// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 01203// CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]1204// CHECK1: omp.dispatch.body:1205// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41206// CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 41207// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1208// CHECK1: omp.inner.for.cond:1209// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]1210// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]1211// CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]1212// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1213// CHECK1: omp.inner.for.body:1214// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]1215// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 11216// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1217// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]1218// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 01219// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]1220// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i641221// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]1222// CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]1223// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1224// CHECK1: omp.body.continue:1225// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1226// CHECK1: omp.inner.for.inc:1227// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]1228// CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 11229// CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]1230// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]1231// CHECK1: omp.inner.for.end:1232// CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]1233// CHECK1: omp.dispatch.inc:1234// CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]1235// CHECK1: omp.dispatch.end:1236// CHECK1-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]])1237// CHECK1-NEXT: ret void1238//1239//1240// CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv1241// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {1242// CHECK3-NEXT: entry:1243// CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 41244// CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])1245// CHECK3-NEXT: ret i32 [[CALL]]1246//1247//1248// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv1249// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {1250// CHECK3-NEXT: entry:1251// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41252// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 41253// CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 41254// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 41255// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41256// CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81257// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 41258// CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 41259// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 41260// CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 41261// CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81262// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 41263// CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 41264// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 41265// CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 41266// CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81267// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 41268// CHECK3-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 41269// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 41270// CHECK3-NEXT: [[_TMP22:%.*]] = alloca i32, align 41271// CHECK3-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81272// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 41273// CHECK3-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 41274// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 41275// CHECK3-NEXT: [[_TMP30:%.*]] = alloca i32, align 41276// CHECK3-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81277// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41278// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41279// CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 01280// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01281// CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 41282// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01283// CHECK3-NEXT: store ptr [[A]], ptr [[TMP1]], align 41284// CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01285// CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 41286// CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01287// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01288// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01289// CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 41290// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11291// CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 41292// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21293// CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 41294// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31295// CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 41296// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41297// CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 41298// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51299// CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 41300// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61301// CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 41302// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71303// CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 41304// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81305// CHECK3-NEXT: store i64 123, ptr [[TMP13]], align 81306// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91307// CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 81308// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101309// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 41310// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111311// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 41312// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121313// CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 41314// CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, ptr [[KERNEL_ARGS]])1315// CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 01316// CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1317// CHECK3: omp_offload.failed:1318// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]1319// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]1320// CHECK3: omp_offload.cont:1321// CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01322// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 01323// CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 41324// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 01325// CHECK3-NEXT: store ptr [[A2]], ptr [[TMP21]], align 41326// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 01327// CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 41328// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 01329// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 01330// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 01331// CHECK3-NEXT: store i32 3, ptr [[TMP25]], align 41332// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11333// CHECK3-NEXT: store i32 1, ptr [[TMP26]], align 41334// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 21335// CHECK3-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 41336// CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 31337// CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 41338// CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 41339// CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 41340// CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 51341// CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 41342// CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 61343// CHECK3-NEXT: store ptr null, ptr [[TMP31]], align 41344// CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 71345// CHECK3-NEXT: store ptr null, ptr [[TMP32]], align 41346// CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 81347// CHECK3-NEXT: store i64 123, ptr [[TMP33]], align 81348// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 91349// CHECK3-NEXT: store i64 0, ptr [[TMP34]], align 81350// CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 101351// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 41352// CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 111353// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 41354// CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 121355// CHECK3-NEXT: store i32 0, ptr [[TMP37]], align 41356// CHECK3-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]])1357// CHECK3-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 01358// CHECK3-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]1359// CHECK3: omp_offload.failed8:1360// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]]1361// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]]1362// CHECK3: omp_offload.cont9:1363// CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01364// CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 01365// CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 41366// CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 01367// CHECK3-NEXT: store ptr [[A10]], ptr [[TMP41]], align 41368// CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 01369// CHECK3-NEXT: store ptr null, ptr [[TMP42]], align 41370// CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 01371// CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 01372// CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 01373// CHECK3-NEXT: store i32 3, ptr [[TMP45]], align 41374// CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11375// CHECK3-NEXT: store i32 1, ptr [[TMP46]], align 41376// CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 21377// CHECK3-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 41378// CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 31379// CHECK3-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 41380// CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 41381// CHECK3-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 41382// CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 51383// CHECK3-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 41384// CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 61385// CHECK3-NEXT: store ptr null, ptr [[TMP51]], align 41386// CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 71387// CHECK3-NEXT: store ptr null, ptr [[TMP52]], align 41388// CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 81389// CHECK3-NEXT: store i64 123, ptr [[TMP53]], align 81390// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 91391// CHECK3-NEXT: store i64 0, ptr [[TMP54]], align 81392// CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 101393// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 41394// CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 111395// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 41396// CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 121397// CHECK3-NEXT: store i32 0, ptr [[TMP57]], align 41398// CHECK3-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, ptr [[KERNEL_ARGS15]])1399// CHECK3-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 01400// CHECK3-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]1401// CHECK3: omp_offload.failed16:1402// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(ptr [[THIS1]]) #[[ATTR2]]1403// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]]1404// CHECK3: omp_offload.cont17:1405// CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01406// CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 01407// CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP60]], align 41408// CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 01409// CHECK3-NEXT: store ptr [[A18]], ptr [[TMP61]], align 41410// CHECK3-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 01411// CHECK3-NEXT: store ptr null, ptr [[TMP62]], align 41412// CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 01413// CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 01414// CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 01415// CHECK3-NEXT: store i32 3, ptr [[TMP65]], align 41416// CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11417// CHECK3-NEXT: store i32 1, ptr [[TMP66]], align 41418// CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 21419// CHECK3-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 41420// CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 31421// CHECK3-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 41422// CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 41423// CHECK3-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 41424// CHECK3-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 51425// CHECK3-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 41426// CHECK3-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 61427// CHECK3-NEXT: store ptr null, ptr [[TMP71]], align 41428// CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 71429// CHECK3-NEXT: store ptr null, ptr [[TMP72]], align 41430// CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 81431// CHECK3-NEXT: store i64 123, ptr [[TMP73]], align 81432// CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 91433// CHECK3-NEXT: store i64 0, ptr [[TMP74]], align 81434// CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 101435// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 41436// CHECK3-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 111437// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 41438// CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 121439// CHECK3-NEXT: store i32 0, ptr [[TMP77]], align 41440// CHECK3-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, ptr [[KERNEL_ARGS23]])1441// CHECK3-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 01442// CHECK3-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]1443// CHECK3: omp_offload.failed24:1444// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(ptr [[THIS1]]) #[[ATTR2]]1445// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT25]]1446// CHECK3: omp_offload.cont25:1447// CHECK3-NEXT: [[A26:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01448// CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 01449// CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP80]], align 41450// CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 01451// CHECK3-NEXT: store ptr [[A26]], ptr [[TMP81]], align 41452// CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 01453// CHECK3-NEXT: store ptr null, ptr [[TMP82]], align 41454// CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 01455// CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 01456// CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 01457// CHECK3-NEXT: store i32 3, ptr [[TMP85]], align 41458// CHECK3-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11459// CHECK3-NEXT: store i32 1, ptr [[TMP86]], align 41460// CHECK3-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 21461// CHECK3-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 41462// CHECK3-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 31463// CHECK3-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 41464// CHECK3-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 41465// CHECK3-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 41466// CHECK3-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 51467// CHECK3-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 41468// CHECK3-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 61469// CHECK3-NEXT: store ptr null, ptr [[TMP91]], align 41470// CHECK3-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 71471// CHECK3-NEXT: store ptr null, ptr [[TMP92]], align 41472// CHECK3-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 81473// CHECK3-NEXT: store i64 123, ptr [[TMP93]], align 81474// CHECK3-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 91475// CHECK3-NEXT: store i64 0, ptr [[TMP94]], align 81476// CHECK3-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 101477// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 41478// CHECK3-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 111479// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 41480// CHECK3-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 121481// CHECK3-NEXT: store i32 0, ptr [[TMP97]], align 41482// CHECK3-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, ptr [[KERNEL_ARGS31]])1483// CHECK3-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 01484// CHECK3-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]1485// CHECK3: omp_offload.failed32:1486// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(ptr [[THIS1]]) #[[ATTR2]]1487// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT33]]1488// CHECK3: omp_offload.cont33:1489// CHECK3-NEXT: [[A34:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01490// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i32 0, i32 01491// CHECK3-NEXT: [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 41492// CHECK3-NEXT: ret i32 [[TMP100]]1493//1494//1495// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l351496// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {1497// CHECK3-NEXT: entry:1498// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41499// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41500// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41501// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined, ptr [[TMP0]])1502// CHECK3-NEXT: ret void1503//1504//1505// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined1506// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1507// CHECK3-NEXT: entry:1508// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41509// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41510// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41511// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41512// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41513// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41514// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41515// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41516// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41517// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41518// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41519// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41520// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41521// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41522// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41523// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 41524// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41525// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41526// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41527// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41528// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1529// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41530// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1221531// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1532// CHECK3: cond.true:1533// CHECK3-NEXT: br label [[COND_END:%.*]]1534// CHECK3: cond.false:1535// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41536// CHECK3-NEXT: br label [[COND_END]]1537// CHECK3: cond.end:1538// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1539// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41540// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41541// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41542// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1543// CHECK3: omp.inner.for.cond:1544// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41545// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41546// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1547// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1548// CHECK3: omp.inner.for.body:1549// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41550// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41551// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])1552// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1553// CHECK3: omp.inner.for.inc:1554// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41555// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41556// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]1557// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41558// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]1559// CHECK3: omp.inner.for.end:1560// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1561// CHECK3: omp.loop.exit:1562// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1563// CHECK3-NEXT: ret void1564//1565//1566// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined1567// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1568// CHECK3-NEXT: entry:1569// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41570// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41571// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 41572// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 41573// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41574// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41575// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41576// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41577// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41578// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41579// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41580// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41581// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41582// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41583// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 41584// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 41585// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41586// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41587// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41588// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 41589// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 41590// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41591// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 41592// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 41593// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41594// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41595// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41596// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41597// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1598// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41599// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1221600// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1601// CHECK3: cond.true:1602// CHECK3-NEXT: br label [[COND_END:%.*]]1603// CHECK3: cond.false:1604// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41605// CHECK3-NEXT: br label [[COND_END]]1606// CHECK3: cond.end:1607// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]1608// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41609// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41610// CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 41611// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1612// CHECK3: omp.inner.for.cond:1613// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41614// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41615// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]1616// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1617// CHECK3: omp.inner.for.body:1618// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41619// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 11620// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1621// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 41622// CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 01623// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 41624// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]1625// CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 41626// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1627// CHECK3: omp.body.continue:1628// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1629// CHECK3: omp.inner.for.inc:1630// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41631// CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 11632// CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 41633// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]1634// CHECK3: omp.inner.for.end:1635// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1636// CHECK3: omp.loop.exit:1637// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])1638// CHECK3-NEXT: ret void1639//1640//1641// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l401642// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1643// CHECK3-NEXT: entry:1644// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41645// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41646// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41647// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]])1648// CHECK3-NEXT: ret void1649//1650//1651// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined1652// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1653// CHECK3-NEXT: entry:1654// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41655// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41656// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41657// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41658// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41659// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41660// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41661// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41662// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41663// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41664// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41665// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41666// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41667// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41668// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41669// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 41670// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41671// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41672// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41673// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41674// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1675// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41676// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1221677// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1678// CHECK3: cond.true:1679// CHECK3-NEXT: br label [[COND_END:%.*]]1680// CHECK3: cond.false:1681// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41682// CHECK3-NEXT: br label [[COND_END]]1683// CHECK3: cond.end:1684// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1685// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41686// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41687// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41688// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1689// CHECK3: omp.inner.for.cond:1690// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41691// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41692// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1693// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1694// CHECK3: omp.inner.for.body:1695// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41696// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41697// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])1698// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1699// CHECK3: omp.inner.for.inc:1700// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41701// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41702// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]1703// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41704// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]1705// CHECK3: omp.inner.for.end:1706// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1707// CHECK3: omp.loop.exit:1708// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1709// CHECK3-NEXT: ret void1710//1711//1712// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined1713// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1714// CHECK3-NEXT: entry:1715// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41716// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41717// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 41718// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 41719// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41720// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41721// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41722// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41723// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41724// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41725// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41726// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41727// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41728// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41729// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 41730// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 41731// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41732// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41733// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41734// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 41735// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 41736// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41737// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 41738// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 41739// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41740// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41741// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41742// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41743// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1744// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41745// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1221746// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1747// CHECK3: cond.true:1748// CHECK3-NEXT: br label [[COND_END:%.*]]1749// CHECK3: cond.false:1750// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41751// CHECK3-NEXT: br label [[COND_END]]1752// CHECK3: cond.end:1753// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]1754// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41755// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41756// CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 41757// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1758// CHECK3: omp.inner.for.cond:1759// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41760// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41761// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]1762// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1763// CHECK3: omp.inner.for.body:1764// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41765// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 11766// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1767// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 41768// CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 01769// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 41770// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]1771// CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 41772// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1773// CHECK3: omp.body.continue:1774// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1775// CHECK3: omp.inner.for.inc:1776// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41777// CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 11778// CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 41779// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]1780// CHECK3: omp.inner.for.end:1781// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1782// CHECK3: omp.loop.exit:1783// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])1784// CHECK3-NEXT: ret void1785//1786//1787// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l451788// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1789// CHECK3-NEXT: entry:1790// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41791// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41792// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41793// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined, ptr [[TMP0]])1794// CHECK3-NEXT: ret void1795//1796//1797// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined1798// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1799// CHECK3-NEXT: entry:1800// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41801// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41802// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41803// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41804// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41805// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41806// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41807// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41808// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41809// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41810// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41811// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41812// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41813// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41814// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41815// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 41816// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41817// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41818// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41819// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41820// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1821// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41822// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1221823// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1824// CHECK3: cond.true:1825// CHECK3-NEXT: br label [[COND_END:%.*]]1826// CHECK3: cond.false:1827// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41828// CHECK3-NEXT: br label [[COND_END]]1829// CHECK3: cond.end:1830// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1831// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41832// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41833// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41834// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1835// CHECK3: omp.inner.for.cond:1836// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41837// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41838// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1839// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1840// CHECK3: omp.inner.for.body:1841// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41842// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41843// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])1844// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1845// CHECK3: omp.inner.for.inc:1846// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41847// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41848// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]1849// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41850// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]1851// CHECK3: omp.inner.for.end:1852// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1853// CHECK3: omp.loop.exit:1854// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1855// CHECK3-NEXT: ret void1856//1857//1858// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined1859// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1860// CHECK3-NEXT: entry:1861// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41862// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41863// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 41864// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 41865// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41866// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41867// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41868// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41869// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41870// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41871// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41872// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41873// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41874// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41875// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 41876// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 41877// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41878// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41879// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41880// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 41881// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 41882// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41883// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 41884// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 41885// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41886// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41887// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41888// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41889// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)1890// CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]1891// CHECK3: omp.dispatch.cond:1892// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41893// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41894// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]1895// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1896// CHECK3: cond.true:1897// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41898// CHECK3-NEXT: br label [[COND_END:%.*]]1899// CHECK3: cond.false:1900// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41901// CHECK3-NEXT: br label [[COND_END]]1902// CHECK3: cond.end:1903// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]1904// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41905// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41906// CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 41907// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41908// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41909// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]1910// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]1911// CHECK3: omp.dispatch.body:1912// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1913// CHECK3: omp.inner.for.cond:1914// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41915// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41916// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]1917// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1918// CHECK3: omp.inner.for.body:1919// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41920// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 11921// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1922// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 41923// CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 01924// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 41925// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP15]]1926// CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 41927// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1928// CHECK3: omp.body.continue:1929// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1930// CHECK3: omp.inner.for.inc:1931// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41932// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 11933// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 41934// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]1935// CHECK3: omp.inner.for.end:1936// CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]1937// CHECK3: omp.dispatch.inc:1938// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41939// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41940// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]1941// CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 41942// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41943// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41944// CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]1945// CHECK3-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 41946// CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]1947// CHECK3: omp.dispatch.end:1948// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])1949// CHECK3-NEXT: ret void1950//1951//1952// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l511953// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1954// CHECK3-NEXT: entry:1955// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41956// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41957// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41958// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined, ptr [[TMP0]])1959// CHECK3-NEXT: ret void1960//1961//1962// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined1963// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {1964// CHECK3-NEXT: entry:1965// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41966// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41967// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41968// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41969// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41970// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41971// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41972// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41973// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41974// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41975// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41976// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41977// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41978// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41979// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41980// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 41981// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41982// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41983// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41984// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41985// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1986// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41987// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1221988// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1989// CHECK3: cond.true:1990// CHECK3-NEXT: br label [[COND_END:%.*]]1991// CHECK3: cond.false:1992// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41993// CHECK3-NEXT: br label [[COND_END]]1994// CHECK3: cond.end:1995// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1996// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41997// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41998// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41999// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2000// CHECK3: omp.inner.for.cond:2001// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42002// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42003// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2004// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2005// CHECK3: omp.inner.for.body:2006// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42007// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42008// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])2009// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2010// CHECK3: omp.inner.for.inc:2011// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42012// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42013// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]2014// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 42015// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]2016// CHECK3: omp.inner.for.end:2017// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2018// CHECK3: omp.loop.exit:2019// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2020// CHECK3-NEXT: ret void2021//2022//2023// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined2024// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2025// CHECK3-NEXT: entry:2026// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42027// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42028// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 42029// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 42030// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42031// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42032// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42033// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42034// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42035// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42036// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42037// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42038// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42039// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42040// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 42041// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 42042// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42043// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42044// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42045// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 42046// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 42047// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 42048// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 42049// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 42050// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42051// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42052// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42053// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42054// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42055// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 42056// CHECK3-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)2057// CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]2058// CHECK3: omp.dispatch.cond:2059// CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])2060// CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 02061// CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]2062// CHECK3: omp.dispatch.body:2063// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42064// CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 42065// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2066// CHECK3: omp.inner.for.cond:2067// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]2068// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]2069// CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]2070// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2071// CHECK3: omp.inner.for.body:2072// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]2073// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 12074// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2075// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]2076// CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 02077// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]2078// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]]2079// CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]2080// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2081// CHECK3: omp.body.continue:2082// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2083// CHECK3: omp.inner.for.inc:2084// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]2085// CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 12086// CHECK3-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]2087// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]2088// CHECK3: omp.inner.for.end:2089// CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]2090// CHECK3: omp.dispatch.inc:2091// CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]2092// CHECK3: omp.dispatch.end:2093// CHECK3-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]])2094// CHECK3-NEXT: ret void2095//2096//2097// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l572098// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2099// CHECK3-NEXT: entry:2100// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42101// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42102// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42103// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined, ptr [[TMP0]])2104// CHECK3-NEXT: ret void2105//2106//2107// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined2108// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2109// CHECK3-NEXT: entry:2110// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42111// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42112// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42113// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42114// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42115// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42116// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42117// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42118// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42119// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42120// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42121// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42122// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42123// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42124// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42125// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 42126// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42127// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42128// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42129// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42130// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2131// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42132// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1222133// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2134// CHECK3: cond.true:2135// CHECK3-NEXT: br label [[COND_END:%.*]]2136// CHECK3: cond.false:2137// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42138// CHECK3-NEXT: br label [[COND_END]]2139// CHECK3: cond.end:2140// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2141// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42142// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42143// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42144// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2145// CHECK3: omp.inner.for.cond:2146// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42147// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42148// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2149// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2150// CHECK3: omp.inner.for.body:2151// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42152// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42153// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])2154// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2155// CHECK3: omp.inner.for.inc:2156// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42157// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42158// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]2159// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 42160// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]2161// CHECK3: omp.inner.for.end:2162// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2163// CHECK3: omp.loop.exit:2164// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2165// CHECK3-NEXT: ret void2166//2167//2168// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined2169// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2170// CHECK3-NEXT: entry:2171// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42172// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42173// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 42174// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 42175// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42176// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42177// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42178// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42179// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42180// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42181// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42182// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42183// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42184// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42185// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 42186// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 42187// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42188// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42189// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42190// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 42191// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 42192// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 42193// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 42194// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 42195// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42196// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42197// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42198// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42199// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42200// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 42201// CHECK3-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)2202// CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]2203// CHECK3: omp.dispatch.cond:2204// CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])2205// CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 02206// CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]2207// CHECK3: omp.dispatch.body:2208// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42209// CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 42210// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2211// CHECK3: omp.inner.for.cond:2212// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]2213// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]2214// CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]2215// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2216// CHECK3: omp.inner.for.body:2217// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]2218// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 12219// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2220// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]2221// CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 02222// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]2223// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]]2224// CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]]2225// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2226// CHECK3: omp.body.continue:2227// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2228// CHECK3: omp.inner.for.inc:2229// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]2230// CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 12231// CHECK3-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]2232// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]2233// CHECK3: omp.inner.for.end:2234// CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]2235// CHECK3: omp.dispatch.inc:2236// CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]2237// CHECK3: omp.dispatch.end:2238// CHECK3-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]])2239// CHECK3-NEXT: ret void2240//2241//2242// CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv2243// CHECK5-SAME: () #[[ATTR0:[0-9]+]] {2244// CHECK5-NEXT: entry:2245// CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 42246// CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])2247// CHECK5-NEXT: ret i32 [[CALL]]2248//2249//2250// CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv2251// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {2252// CHECK5-NEXT: entry:2253// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82254// CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 82255// CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 82256// CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 82257// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 42258// CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82259// CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 82260// CHECK5-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 82261// CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 82262// CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32, align 42263// CHECK5-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82264// CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 82265// CHECK5-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 82266// CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 82267// CHECK5-NEXT: [[_TMP14:%.*]] = alloca i32, align 42268// CHECK5-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82269// CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 82270// CHECK5-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 82271// CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 82272// CHECK5-NEXT: [[_TMP22:%.*]] = alloca i32, align 42273// CHECK5-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82274// CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 82275// CHECK5-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 82276// CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 82277// CHECK5-NEXT: [[_TMP30:%.*]] = alloca i32, align 42278// CHECK5-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82279// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82280// CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82281// CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 02282// CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02283// CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 82284// CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02285// CHECK5-NEXT: store ptr [[A]], ptr [[TMP1]], align 82286// CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 02287// CHECK5-NEXT: store ptr null, ptr [[TMP2]], align 82288// CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02289// CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02290// CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02291// CHECK5-NEXT: store i32 3, ptr [[TMP5]], align 42292// CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12293// CHECK5-NEXT: store i32 1, ptr [[TMP6]], align 42294// CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22295// CHECK5-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 82296// CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32297// CHECK5-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 82298// CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42299// CHECK5-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 82300// CHECK5-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52301// CHECK5-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 82302// CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62303// CHECK5-NEXT: store ptr null, ptr [[TMP11]], align 82304// CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72305// CHECK5-NEXT: store ptr null, ptr [[TMP12]], align 82306// CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82307// CHECK5-NEXT: store i64 123, ptr [[TMP13]], align 82308// CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92309// CHECK5-NEXT: store i64 0, ptr [[TMP14]], align 82310// CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102311// CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 42312// CHECK5-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112313// CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 42314// CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122315// CHECK5-NEXT: store i32 0, ptr [[TMP17]], align 42316// CHECK5-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, ptr [[KERNEL_ARGS]])2317// CHECK5-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 02318// CHECK5-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2319// CHECK5: omp_offload.failed:2320// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]2321// CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]2322// CHECK5: omp_offload.cont:2323// CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 02324// CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 02325// CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 82326// CHECK5-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 02327// CHECK5-NEXT: store ptr [[A2]], ptr [[TMP21]], align 82328// CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 02329// CHECK5-NEXT: store ptr null, ptr [[TMP22]], align 82330// CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 02331// CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 02332// CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 02333// CHECK5-NEXT: store i32 3, ptr [[TMP25]], align 42334// CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12335// CHECK5-NEXT: store i32 1, ptr [[TMP26]], align 42336// CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 22337// CHECK5-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 82338// CHECK5-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 32339// CHECK5-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 82340// CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 42341// CHECK5-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 82342// CHECK5-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 52343// CHECK5-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 82344// CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 62345// CHECK5-NEXT: store ptr null, ptr [[TMP31]], align 82346// CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 72347// CHECK5-NEXT: store ptr null, ptr [[TMP32]], align 82348// CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 82349// CHECK5-NEXT: store i64 123, ptr [[TMP33]], align 82350// CHECK5-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 92351// CHECK5-NEXT: store i64 0, ptr [[TMP34]], align 82352// CHECK5-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 102353// CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 42354// CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 112355// CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 42356// CHECK5-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 122357// CHECK5-NEXT: store i32 0, ptr [[TMP37]], align 42358// CHECK5-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]])2359// CHECK5-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 02360// CHECK5-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]2361// CHECK5: omp_offload.failed8:2362// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]]2363// CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT9]]2364// CHECK5: omp_offload.cont9:2365// CHECK5-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 02366// CHECK5-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 02367// CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 82368// CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 02369// CHECK5-NEXT: store ptr [[A10]], ptr [[TMP41]], align 82370// CHECK5-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 02371// CHECK5-NEXT: store ptr null, ptr [[TMP42]], align 82372// CHECK5-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 02373// CHECK5-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 02374// CHECK5-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 02375// CHECK5-NEXT: store i32 3, ptr [[TMP45]], align 42376// CHECK5-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12377// CHECK5-NEXT: store i32 1, ptr [[TMP46]], align 42378// CHECK5-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 22379// CHECK5-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 82380// CHECK5-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 32381// CHECK5-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 82382// CHECK5-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 42383// CHECK5-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 82384// CHECK5-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 52385// CHECK5-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 82386// CHECK5-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 62387// CHECK5-NEXT: store ptr null, ptr [[TMP51]], align 82388// CHECK5-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 72389// CHECK5-NEXT: store ptr null, ptr [[TMP52]], align 82390// CHECK5-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 82391// CHECK5-NEXT: store i64 123, ptr [[TMP53]], align 82392// CHECK5-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 92393// CHECK5-NEXT: store i64 0, ptr [[TMP54]], align 82394// CHECK5-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 102395// CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 42396// CHECK5-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 112397// CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 42398// CHECK5-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 122399// CHECK5-NEXT: store i32 0, ptr [[TMP57]], align 42400// CHECK5-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, ptr [[KERNEL_ARGS15]])2401// CHECK5-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 02402// CHECK5-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]2403// CHECK5: omp_offload.failed16:2404// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(ptr [[THIS1]]) #[[ATTR2]]2405// CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT17]]2406// CHECK5: omp_offload.cont17:2407// CHECK5-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 02408// CHECK5-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 02409// CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP60]], align 82410// CHECK5-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 02411// CHECK5-NEXT: store ptr [[A18]], ptr [[TMP61]], align 82412// CHECK5-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 02413// CHECK5-NEXT: store ptr null, ptr [[TMP62]], align 82414// CHECK5-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 02415// CHECK5-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 02416// CHECK5-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 02417// CHECK5-NEXT: store i32 3, ptr [[TMP65]], align 42418// CHECK5-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12419// CHECK5-NEXT: store i32 1, ptr [[TMP66]], align 42420// CHECK5-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 22421// CHECK5-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 82422// CHECK5-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 32423// CHECK5-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 82424// CHECK5-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 42425// CHECK5-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 82426// CHECK5-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 52427// CHECK5-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 82428// CHECK5-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 62429// CHECK5-NEXT: store ptr null, ptr [[TMP71]], align 82430// CHECK5-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 72431// CHECK5-NEXT: store ptr null, ptr [[TMP72]], align 82432// CHECK5-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 82433// CHECK5-NEXT: store i64 123, ptr [[TMP73]], align 82434// CHECK5-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 92435// CHECK5-NEXT: store i64 0, ptr [[TMP74]], align 82436// CHECK5-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 102437// CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 42438// CHECK5-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 112439// CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 42440// CHECK5-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 122441// CHECK5-NEXT: store i32 0, ptr [[TMP77]], align 42442// CHECK5-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, ptr [[KERNEL_ARGS23]])2443// CHECK5-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 02444// CHECK5-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]2445// CHECK5: omp_offload.failed24:2446// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(ptr [[THIS1]]) #[[ATTR2]]2447// CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT25]]2448// CHECK5: omp_offload.cont25:2449// CHECK5-NEXT: [[A26:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 02450// CHECK5-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 02451// CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP80]], align 82452// CHECK5-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 02453// CHECK5-NEXT: store ptr [[A26]], ptr [[TMP81]], align 82454// CHECK5-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 02455// CHECK5-NEXT: store ptr null, ptr [[TMP82]], align 82456// CHECK5-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 02457// CHECK5-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 02458// CHECK5-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 02459// CHECK5-NEXT: store i32 3, ptr [[TMP85]], align 42460// CHECK5-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12461// CHECK5-NEXT: store i32 1, ptr [[TMP86]], align 42462// CHECK5-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 22463// CHECK5-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 82464// CHECK5-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 32465// CHECK5-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 82466// CHECK5-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 42467// CHECK5-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 82468// CHECK5-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 52469// CHECK5-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 82470// CHECK5-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 62471// CHECK5-NEXT: store ptr null, ptr [[TMP91]], align 82472// CHECK5-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 72473// CHECK5-NEXT: store ptr null, ptr [[TMP92]], align 82474// CHECK5-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 82475// CHECK5-NEXT: store i64 123, ptr [[TMP93]], align 82476// CHECK5-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 92477// CHECK5-NEXT: store i64 0, ptr [[TMP94]], align 82478// CHECK5-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 102479// CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 42480// CHECK5-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 112481// CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 42482// CHECK5-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 122483// CHECK5-NEXT: store i32 0, ptr [[TMP97]], align 42484// CHECK5-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, ptr [[KERNEL_ARGS31]])2485// CHECK5-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 02486// CHECK5-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]2487// CHECK5: omp_offload.failed32:2488// CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(ptr [[THIS1]]) #[[ATTR2]]2489// CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT33]]2490// CHECK5: omp_offload.cont33:2491// CHECK5-NEXT: [[A34:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 02492// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i64 0, i64 02493// CHECK5-NEXT: [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 42494// CHECK5-NEXT: ret i32 [[TMP100]]2495//2496//2497// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l352498// CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {2499// CHECK5-NEXT: entry:2500// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82501// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82502// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82503// CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined, ptr [[TMP0]])2504// CHECK5-NEXT: ret void2505//2506//2507// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined2508// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2509// CHECK5-NEXT: entry:2510// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82511// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82512// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82513// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42514// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 42515// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42516// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42517// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42518// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42519// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 42520// CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82521// CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82522// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82523// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82524// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42525// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 42526// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42527// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42528// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82529// CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42530// CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2531// CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42532// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1222533// CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2534// CHECK5: cond.true:2535// CHECK5-NEXT: br label [[COND_END:%.*]]2536// CHECK5: cond.false:2537// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42538// CHECK5-NEXT: br label [[COND_END]]2539// CHECK5: cond.end:2540// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2541// CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42542// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42543// CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42544// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2545// CHECK5: omp.inner.for.cond:2546// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42547// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42548// CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2549// CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2550// CHECK5: omp.inner.for.body:2551// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42552// CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i642553// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42554// CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i642555// CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])2556// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2557// CHECK5: omp.inner.for.inc:2558// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42559// CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42560// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]2561// CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 42562// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]2563// CHECK5: omp.inner.for.end:2564// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2565// CHECK5: omp.loop.exit:2566// CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2567// CHECK5-NEXT: ret void2568//2569//2570// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined2571// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2572// CHECK5-NEXT: entry:2573// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82574// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82575// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 82576// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 82577// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82578// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42579// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 42580// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42581// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42582// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42583// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42584// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 42585// CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82586// CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82587// CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 82588// CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 82589// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82590// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82591// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42592// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 42593// CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 82594// CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i322595// CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82596// CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i322597// CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 42598// CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 42599// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42600// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42601// CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82602// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 42603// CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2604// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42605// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1222606// CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2607// CHECK5: cond.true:2608// CHECK5-NEXT: br label [[COND_END:%.*]]2609// CHECK5: cond.false:2610// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42611// CHECK5-NEXT: br label [[COND_END]]2612// CHECK5: cond.end:2613// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]2614// CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42615// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42616// CHECK5-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 42617// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2618// CHECK5: omp.inner.for.cond:2619// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42620// CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42621// CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]2622// CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2623// CHECK5: omp.inner.for.body:2624// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42625// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 12626// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2627// CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 42628// CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 02629// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 42630// CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i642631// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]2632// CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 42633// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2634// CHECK5: omp.body.continue:2635// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2636// CHECK5: omp.inner.for.inc:2637// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42638// CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 12639// CHECK5-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 42640// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]2641// CHECK5: omp.inner.for.end:2642// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2643// CHECK5: omp.loop.exit:2644// CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])2645// CHECK5-NEXT: ret void2646//2647//2648// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l402649// CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2650// CHECK5-NEXT: entry:2651// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82652// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82653// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82654// CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]])2655// CHECK5-NEXT: ret void2656//2657//2658// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined2659// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2660// CHECK5-NEXT: entry:2661// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82662// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82663// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82664// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42665// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 42666// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42667// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42668// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42669// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42670// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 42671// CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82672// CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82673// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82674// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82675// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42676// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 42677// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42678// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42679// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82680// CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42681// CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2682// CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42683// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1222684// CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2685// CHECK5: cond.true:2686// CHECK5-NEXT: br label [[COND_END:%.*]]2687// CHECK5: cond.false:2688// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42689// CHECK5-NEXT: br label [[COND_END]]2690// CHECK5: cond.end:2691// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2692// CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42693// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42694// CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42695// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2696// CHECK5: omp.inner.for.cond:2697// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42698// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42699// CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2700// CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2701// CHECK5: omp.inner.for.body:2702// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42703// CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i642704// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42705// CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i642706// CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])2707// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2708// CHECK5: omp.inner.for.inc:2709// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42710// CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42711// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]2712// CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 42713// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]2714// CHECK5: omp.inner.for.end:2715// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2716// CHECK5: omp.loop.exit:2717// CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2718// CHECK5-NEXT: ret void2719//2720//2721// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined2722// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2723// CHECK5-NEXT: entry:2724// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82725// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82726// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 82727// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 82728// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82729// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42730// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 42731// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42732// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42733// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42734// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42735// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 42736// CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82737// CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82738// CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 82739// CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 82740// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82741// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82742// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42743// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 42744// CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 82745// CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i322746// CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82747// CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i322748// CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 42749// CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 42750// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42751// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42752// CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82753// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 42754// CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2755// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42756// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1222757// CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2758// CHECK5: cond.true:2759// CHECK5-NEXT: br label [[COND_END:%.*]]2760// CHECK5: cond.false:2761// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42762// CHECK5-NEXT: br label [[COND_END]]2763// CHECK5: cond.end:2764// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]2765// CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42766// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42767// CHECK5-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 42768// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2769// CHECK5: omp.inner.for.cond:2770// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42771// CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42772// CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]2773// CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2774// CHECK5: omp.inner.for.body:2775// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42776// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 12777// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2778// CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 42779// CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 02780// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 42781// CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i642782// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]2783// CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 42784// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2785// CHECK5: omp.body.continue:2786// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2787// CHECK5: omp.inner.for.inc:2788// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42789// CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 12790// CHECK5-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 42791// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]2792// CHECK5: omp.inner.for.end:2793// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2794// CHECK5: omp.loop.exit:2795// CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])2796// CHECK5-NEXT: ret void2797//2798//2799// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l452800// CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2801// CHECK5-NEXT: entry:2802// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82803// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82804// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82805// CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined, ptr [[TMP0]])2806// CHECK5-NEXT: ret void2807//2808//2809// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined2810// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2811// CHECK5-NEXT: entry:2812// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82813// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82814// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82815// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42816// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 42817// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42818// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42819// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42820// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42821// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 42822// CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82823// CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82824// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82825// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82826// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42827// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 42828// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42829// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42830// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82831// CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42832// CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2833// CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42834// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1222835// CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2836// CHECK5: cond.true:2837// CHECK5-NEXT: br label [[COND_END:%.*]]2838// CHECK5: cond.false:2839// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42840// CHECK5-NEXT: br label [[COND_END]]2841// CHECK5: cond.end:2842// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2843// CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42844// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42845// CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42846// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2847// CHECK5: omp.inner.for.cond:2848// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42849// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42850// CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2851// CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2852// CHECK5: omp.inner.for.body:2853// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42854// CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i642855// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42856// CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i642857// CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])2858// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2859// CHECK5: omp.inner.for.inc:2860// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42861// CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42862// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]2863// CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 42864// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]2865// CHECK5: omp.inner.for.end:2866// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2867// CHECK5: omp.loop.exit:2868// CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2869// CHECK5-NEXT: ret void2870//2871//2872// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined2873// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2874// CHECK5-NEXT: entry:2875// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82876// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82877// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 82878// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 82879// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82880// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42881// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 42882// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42883// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42884// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42885// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42886// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 42887// CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82888// CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82889// CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 82890// CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 82891// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82892// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82893// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42894// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 42895// CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 82896// CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i322897// CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82898// CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i322899// CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 42900// CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 42901// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42902// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42903// CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82904// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 42905// CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)2906// CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]2907// CHECK5: omp.dispatch.cond:2908// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42909// CHECK5-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82910// CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i322911// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]2912// CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2913// CHECK5: cond.true:2914// CHECK5-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82915// CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i322916// CHECK5-NEXT: br label [[COND_END:%.*]]2917// CHECK5: cond.false:2918// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42919// CHECK5-NEXT: br label [[COND_END]]2920// CHECK5: cond.end:2921// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]2922// CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42923// CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42924// CHECK5-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 42925// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42926// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42927// CHECK5-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]2928// CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]2929// CHECK5: omp.dispatch.body:2930// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2931// CHECK5: omp.inner.for.cond:2932// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42933// CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42934// CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]2935// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2936// CHECK5: omp.inner.for.body:2937// CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42938// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 12939// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2940// CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 42941// CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 02942// CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 42943// CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i642944// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]2945// CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 42946// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2947// CHECK5: omp.body.continue:2948// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2949// CHECK5: omp.inner.for.inc:2950// CHECK5-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42951// CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 12952// CHECK5-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 42953// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]2954// CHECK5: omp.inner.for.end:2955// CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]2956// CHECK5: omp.dispatch.inc:2957// CHECK5-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42958// CHECK5-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42959// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]2960// CHECK5-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 42961// CHECK5-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42962// CHECK5-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42963// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]2964// CHECK5-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 42965// CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]2966// CHECK5: omp.dispatch.end:2967// CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])2968// CHECK5-NEXT: ret void2969//2970//2971// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l512972// CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2973// CHECK5-NEXT: entry:2974// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82975// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82976// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82977// CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined, ptr [[TMP0]])2978// CHECK5-NEXT: ret void2979//2980//2981// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined2982// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2983// CHECK5-NEXT: entry:2984// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82985// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82986// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82987// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42988// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 42989// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42990// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42991// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42992// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42993// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 42994// CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82995// CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82996// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82997// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82998// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42999// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 43000// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43001// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43002// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83003// CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43004// CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3005// CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43006// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1223007// CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3008// CHECK5: cond.true:3009// CHECK5-NEXT: br label [[COND_END:%.*]]3010// CHECK5: cond.false:3011// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43012// CHECK5-NEXT: br label [[COND_END]]3013// CHECK5: cond.end:3014// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3015// CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43016// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43017// CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43018// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3019// CHECK5: omp.inner.for.cond:3020// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43021// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43022// CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3023// CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3024// CHECK5: omp.inner.for.body:3025// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43026// CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i643027// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43028// CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i643029// CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])3030// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3031// CHECK5: omp.inner.for.inc:3032// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43033// CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43034// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]3035// CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 43036// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]3037// CHECK5: omp.inner.for.end:3038// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3039// CHECK5: omp.loop.exit:3040// CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3041// CHECK5-NEXT: ret void3042//3043//3044// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined3045// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3046// CHECK5-NEXT: entry:3047// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83048// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83049// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 83050// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 83051// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 83052// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43053// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 43054// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43055// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43056// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43057// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43058// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 43059// CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83060// CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83061// CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 83062// CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 83063// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 83064// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83065// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43066// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 43067// CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 83068// CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i323069// CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 83070// CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i323071// CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 43072// CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 43073// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43074// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43075// CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43076// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43077// CHECK5-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83078// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 43079// CHECK5-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)3080// CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]3081// CHECK5: omp.dispatch.cond:3082// CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])3083// CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 03084// CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]3085// CHECK5: omp.dispatch.body:3086// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43087// CHECK5-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 43088// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3089// CHECK5: omp.inner.for.cond:3090// CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]3091// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]3092// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]3093// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3094// CHECK5: omp.inner.for.body:3095// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]3096// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 13097// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3098// CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]3099// CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 03100// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]3101// CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i643102// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]3103// CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]3104// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3105// CHECK5: omp.body.continue:3106// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3107// CHECK5: omp.inner.for.inc:3108// CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]3109// CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 13110// CHECK5-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]3111// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]3112// CHECK5: omp.inner.for.end:3113// CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]3114// CHECK5: omp.dispatch.inc:3115// CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]3116// CHECK5: omp.dispatch.end:3117// CHECK5-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]])3118// CHECK5-NEXT: ret void3119//3120//3121// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l573122// CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3123// CHECK5-NEXT: entry:3124// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 83125// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 83126// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83127// CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined, ptr [[TMP0]])3128// CHECK5-NEXT: ret void3129//3130//3131// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined3132// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3133// CHECK5-NEXT: entry:3134// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83135// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83136// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 83137// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43138// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 43139// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 43140// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 43141// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43142// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43143// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 43144// CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83145// CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83146// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 83147// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83148// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 43149// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 43150// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43151// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43152// CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83153// CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43154// CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3155// CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43156// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1223157// CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3158// CHECK5: cond.true:3159// CHECK5-NEXT: br label [[COND_END:%.*]]3160// CHECK5: cond.false:3161// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43162// CHECK5-NEXT: br label [[COND_END]]3163// CHECK5: cond.end:3164// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3165// CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43166// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43167// CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43168// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3169// CHECK5: omp.inner.for.cond:3170// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43171// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43172// CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3173// CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3174// CHECK5: omp.inner.for.body:3175// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43176// CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i643177// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43178// CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i643179// CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])3180// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3181// CHECK5: omp.inner.for.inc:3182// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43183// CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43184// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]3185// CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 43186// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]3187// CHECK5: omp.inner.for.end:3188// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3189// CHECK5: omp.loop.exit:3190// CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3191// CHECK5-NEXT: ret void3192//3193//3194// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined3195// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3196// CHECK5-NEXT: entry:3197// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83198// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83199// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 83200// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 83201// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 83202// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43203// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 43204// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43205// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43206// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43207// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43208// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 43209// CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83210// CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83211// CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 83212// CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 83213// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 83214// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83215// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43216// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 43217// CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 83218// CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i323219// CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 83220// CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i323221// CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 43222// CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 43223// CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43224// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43225// CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43226// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43227// CHECK5-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83228// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 43229// CHECK5-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)3230// CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]3231// CHECK5: omp.dispatch.cond:3232// CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])3233// CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 03234// CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]3235// CHECK5: omp.dispatch.body:3236// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43237// CHECK5-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 43238// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3239// CHECK5: omp.inner.for.cond:3240// CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]3241// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]3242// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]3243// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3244// CHECK5: omp.inner.for.body:3245// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]3246// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 13247// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3248// CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]3249// CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 03250// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]3251// CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i643252// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]3253// CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]3254// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3255// CHECK5: omp.body.continue:3256// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3257// CHECK5: omp.inner.for.inc:3258// CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]3259// CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 13260// CHECK5-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]3261// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]3262// CHECK5: omp.inner.for.end:3263// CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]3264// CHECK5: omp.dispatch.inc:3265// CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]3266// CHECK5: omp.dispatch.end:3267// CHECK5-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]])3268// CHECK5-NEXT: ret void3269//3270//3271// CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv3272// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {3273// CHECK7-NEXT: entry:3274// CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 43275// CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])3276// CHECK7-NEXT: ret i32 [[CALL]]3277//3278//3279// CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv3280// CHECK7-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {3281// CHECK7-NEXT: entry:3282// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43283// CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 43284// CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 43285// CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 43286// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 43287// CHECK7-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 83288// CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 43289// CHECK7-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 43290// CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 43291// CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32, align 43292// CHECK7-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 83293// CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 43294// CHECK7-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 43295// CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 43296// CHECK7-NEXT: [[_TMP14:%.*]] = alloca i32, align 43297// CHECK7-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 83298// CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 43299// CHECK7-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 43300// CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 43301// CHECK7-NEXT: [[_TMP22:%.*]] = alloca i32, align 43302// CHECK7-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 83303// CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 43304// CHECK7-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 43305// CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 43306// CHECK7-NEXT: [[_TMP30:%.*]] = alloca i32, align 43307// CHECK7-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 83308// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43309// CHECK7-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43310// CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 03311// CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03312// CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 43313// CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03314// CHECK7-NEXT: store ptr [[A]], ptr [[TMP1]], align 43315// CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 03316// CHECK7-NEXT: store ptr null, ptr [[TMP2]], align 43317// CHECK7-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03318// CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03319// CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 03320// CHECK7-NEXT: store i32 3, ptr [[TMP5]], align 43321// CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 13322// CHECK7-NEXT: store i32 1, ptr [[TMP6]], align 43323// CHECK7-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 23324// CHECK7-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 43325// CHECK7-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 33326// CHECK7-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 43327// CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 43328// CHECK7-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 43329// CHECK7-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 53330// CHECK7-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 43331// CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 63332// CHECK7-NEXT: store ptr null, ptr [[TMP11]], align 43333// CHECK7-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 73334// CHECK7-NEXT: store ptr null, ptr [[TMP12]], align 43335// CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 83336// CHECK7-NEXT: store i64 123, ptr [[TMP13]], align 83337// CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 93338// CHECK7-NEXT: store i64 0, ptr [[TMP14]], align 83339// CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 103340// CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 43341// CHECK7-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 113342// CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 43343// CHECK7-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 123344// CHECK7-NEXT: store i32 0, ptr [[TMP17]], align 43345// CHECK7-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, ptr [[KERNEL_ARGS]])3346// CHECK7-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 03347// CHECK7-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]3348// CHECK7: omp_offload.failed:3349// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]3350// CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]]3351// CHECK7: omp_offload.cont:3352// CHECK7-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 03353// CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 03354// CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 43355// CHECK7-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 03356// CHECK7-NEXT: store ptr [[A2]], ptr [[TMP21]], align 43357// CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 03358// CHECK7-NEXT: store ptr null, ptr [[TMP22]], align 43359// CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 03360// CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 03361// CHECK7-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 03362// CHECK7-NEXT: store i32 3, ptr [[TMP25]], align 43363// CHECK7-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 13364// CHECK7-NEXT: store i32 1, ptr [[TMP26]], align 43365// CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 23366// CHECK7-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 43367// CHECK7-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 33368// CHECK7-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 43369// CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 43370// CHECK7-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 43371// CHECK7-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 53372// CHECK7-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 43373// CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 63374// CHECK7-NEXT: store ptr null, ptr [[TMP31]], align 43375// CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 73376// CHECK7-NEXT: store ptr null, ptr [[TMP32]], align 43377// CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 83378// CHECK7-NEXT: store i64 123, ptr [[TMP33]], align 83379// CHECK7-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 93380// CHECK7-NEXT: store i64 0, ptr [[TMP34]], align 83381// CHECK7-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 103382// CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 43383// CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 113384// CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 43385// CHECK7-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 123386// CHECK7-NEXT: store i32 0, ptr [[TMP37]], align 43387// CHECK7-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]])3388// CHECK7-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 03389// CHECK7-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]3390// CHECK7: omp_offload.failed8:3391// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]]3392// CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT9]]3393// CHECK7: omp_offload.cont9:3394// CHECK7-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 03395// CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 03396// CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 43397// CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 03398// CHECK7-NEXT: store ptr [[A10]], ptr [[TMP41]], align 43399// CHECK7-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 03400// CHECK7-NEXT: store ptr null, ptr [[TMP42]], align 43401// CHECK7-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 03402// CHECK7-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 03403// CHECK7-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 03404// CHECK7-NEXT: store i32 3, ptr [[TMP45]], align 43405// CHECK7-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 13406// CHECK7-NEXT: store i32 1, ptr [[TMP46]], align 43407// CHECK7-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 23408// CHECK7-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 43409// CHECK7-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 33410// CHECK7-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 43411// CHECK7-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 43412// CHECK7-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 43413// CHECK7-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 53414// CHECK7-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 43415// CHECK7-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 63416// CHECK7-NEXT: store ptr null, ptr [[TMP51]], align 43417// CHECK7-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 73418// CHECK7-NEXT: store ptr null, ptr [[TMP52]], align 43419// CHECK7-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 83420// CHECK7-NEXT: store i64 123, ptr [[TMP53]], align 83421// CHECK7-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 93422// CHECK7-NEXT: store i64 0, ptr [[TMP54]], align 83423// CHECK7-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 103424// CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 43425// CHECK7-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 113426// CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 43427// CHECK7-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 123428// CHECK7-NEXT: store i32 0, ptr [[TMP57]], align 43429// CHECK7-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, ptr [[KERNEL_ARGS15]])3430// CHECK7-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 03431// CHECK7-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]3432// CHECK7: omp_offload.failed16:3433// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(ptr [[THIS1]]) #[[ATTR2]]3434// CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT17]]3435// CHECK7: omp_offload.cont17:3436// CHECK7-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 03437// CHECK7-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 03438// CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP60]], align 43439// CHECK7-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 03440// CHECK7-NEXT: store ptr [[A18]], ptr [[TMP61]], align 43441// CHECK7-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 03442// CHECK7-NEXT: store ptr null, ptr [[TMP62]], align 43443// CHECK7-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 03444// CHECK7-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 03445// CHECK7-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 03446// CHECK7-NEXT: store i32 3, ptr [[TMP65]], align 43447// CHECK7-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 13448// CHECK7-NEXT: store i32 1, ptr [[TMP66]], align 43449// CHECK7-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 23450// CHECK7-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 43451// CHECK7-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 33452// CHECK7-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 43453// CHECK7-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 43454// CHECK7-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 43455// CHECK7-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 53456// CHECK7-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 43457// CHECK7-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 63458// CHECK7-NEXT: store ptr null, ptr [[TMP71]], align 43459// CHECK7-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 73460// CHECK7-NEXT: store ptr null, ptr [[TMP72]], align 43461// CHECK7-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 83462// CHECK7-NEXT: store i64 123, ptr [[TMP73]], align 83463// CHECK7-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 93464// CHECK7-NEXT: store i64 0, ptr [[TMP74]], align 83465// CHECK7-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 103466// CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 43467// CHECK7-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 113468// CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 43469// CHECK7-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 123470// CHECK7-NEXT: store i32 0, ptr [[TMP77]], align 43471// CHECK7-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, ptr [[KERNEL_ARGS23]])3472// CHECK7-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 03473// CHECK7-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]3474// CHECK7: omp_offload.failed24:3475// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(ptr [[THIS1]]) #[[ATTR2]]3476// CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT25]]3477// CHECK7: omp_offload.cont25:3478// CHECK7-NEXT: [[A26:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 03479// CHECK7-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 03480// CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP80]], align 43481// CHECK7-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 03482// CHECK7-NEXT: store ptr [[A26]], ptr [[TMP81]], align 43483// CHECK7-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 03484// CHECK7-NEXT: store ptr null, ptr [[TMP82]], align 43485// CHECK7-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 03486// CHECK7-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 03487// CHECK7-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 03488// CHECK7-NEXT: store i32 3, ptr [[TMP85]], align 43489// CHECK7-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 13490// CHECK7-NEXT: store i32 1, ptr [[TMP86]], align 43491// CHECK7-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 23492// CHECK7-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 43493// CHECK7-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 33494// CHECK7-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 43495// CHECK7-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 43496// CHECK7-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 43497// CHECK7-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 53498// CHECK7-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 43499// CHECK7-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 63500// CHECK7-NEXT: store ptr null, ptr [[TMP91]], align 43501// CHECK7-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 73502// CHECK7-NEXT: store ptr null, ptr [[TMP92]], align 43503// CHECK7-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 83504// CHECK7-NEXT: store i64 123, ptr [[TMP93]], align 83505// CHECK7-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 93506// CHECK7-NEXT: store i64 0, ptr [[TMP94]], align 83507// CHECK7-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 103508// CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 43509// CHECK7-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 113510// CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 43511// CHECK7-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 123512// CHECK7-NEXT: store i32 0, ptr [[TMP97]], align 43513// CHECK7-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, ptr [[KERNEL_ARGS31]])3514// CHECK7-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 03515// CHECK7-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]3516// CHECK7: omp_offload.failed32:3517// CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(ptr [[THIS1]]) #[[ATTR2]]3518// CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT33]]3519// CHECK7: omp_offload.cont33:3520// CHECK7-NEXT: [[A34:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 03521// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i32 0, i32 03522// CHECK7-NEXT: [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 43523// CHECK7-NEXT: ret i32 [[TMP100]]3524//3525//3526// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l353527// CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {3528// CHECK7-NEXT: entry:3529// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43530// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43531// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43532// CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined, ptr [[TMP0]])3533// CHECK7-NEXT: ret void3534//3535//3536// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined3537// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3538// CHECK7-NEXT: entry:3539// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43540// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43541// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43542// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43543// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 43544// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 43545// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 43546// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43547// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43548// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 43549// CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43550// CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43551// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43552// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43553// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 43554// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 43555// CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43556// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43557// CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43558// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43559// CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3560// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43561// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1223562// CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3563// CHECK7: cond.true:3564// CHECK7-NEXT: br label [[COND_END:%.*]]3565// CHECK7: cond.false:3566// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43567// CHECK7-NEXT: br label [[COND_END]]3568// CHECK7: cond.end:3569// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3570// CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43571// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43572// CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43573// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3574// CHECK7: omp.inner.for.cond:3575// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43576// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43577// CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3578// CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3579// CHECK7: omp.inner.for.body:3580// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43581// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43582// CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])3583// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3584// CHECK7: omp.inner.for.inc:3585// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43586// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43587// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]3588// CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 43589// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]3590// CHECK7: omp.inner.for.end:3591// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3592// CHECK7: omp.loop.exit:3593// CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3594// CHECK7-NEXT: ret void3595//3596//3597// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined3598// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3599// CHECK7-NEXT: entry:3600// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43601// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43602// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 43603// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 43604// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43605// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43606// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 43607// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43608// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43609// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43610// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43611// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 43612// CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43613// CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43614// CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 43615// CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 43616// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43617// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43618// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43619// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 43620// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 43621// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 43622// CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 43623// CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 43624// CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43625// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43626// CHECK7-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43627// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 43628// CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3629// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43630// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1223631// CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3632// CHECK7: cond.true:3633// CHECK7-NEXT: br label [[COND_END:%.*]]3634// CHECK7: cond.false:3635// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43636// CHECK7-NEXT: br label [[COND_END]]3637// CHECK7: cond.end:3638// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]3639// CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43640// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43641// CHECK7-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 43642// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3643// CHECK7: omp.inner.for.cond:3644// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43645// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43646// CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]3647// CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3648// CHECK7: omp.inner.for.body:3649// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43650// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 13651// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3652// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 43653// CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 03654// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 43655// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]3656// CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 43657// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3658// CHECK7: omp.body.continue:3659// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3660// CHECK7: omp.inner.for.inc:3661// CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43662// CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 13663// CHECK7-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 43664// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]3665// CHECK7: omp.inner.for.end:3666// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3667// CHECK7: omp.loop.exit:3668// CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])3669// CHECK7-NEXT: ret void3670//3671//3672// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l403673// CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3674// CHECK7-NEXT: entry:3675// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43676// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43677// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43678// CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]])3679// CHECK7-NEXT: ret void3680//3681//3682// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined3683// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3684// CHECK7-NEXT: entry:3685// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43686// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43687// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43688// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43689// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 43690// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 43691// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 43692// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43693// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43694// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 43695// CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43696// CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43697// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43698// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43699// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 43700// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 43701// CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43702// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43703// CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43704// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43705// CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3706// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43707// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1223708// CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3709// CHECK7: cond.true:3710// CHECK7-NEXT: br label [[COND_END:%.*]]3711// CHECK7: cond.false:3712// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43713// CHECK7-NEXT: br label [[COND_END]]3714// CHECK7: cond.end:3715// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3716// CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43717// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43718// CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43719// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3720// CHECK7: omp.inner.for.cond:3721// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43722// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43723// CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3724// CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3725// CHECK7: omp.inner.for.body:3726// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43727// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43728// CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])3729// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3730// CHECK7: omp.inner.for.inc:3731// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43732// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43733// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]3734// CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 43735// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]3736// CHECK7: omp.inner.for.end:3737// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3738// CHECK7: omp.loop.exit:3739// CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3740// CHECK7-NEXT: ret void3741//3742//3743// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined3744// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3745// CHECK7-NEXT: entry:3746// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43747// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43748// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 43749// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 43750// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43751// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43752// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 43753// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43754// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43755// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43756// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43757// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 43758// CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43759// CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43760// CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 43761// CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 43762// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43763// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43764// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43765// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 43766// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 43767// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 43768// CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 43769// CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 43770// CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43771// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43772// CHECK7-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43773// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 43774// CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3775// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43776// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1223777// CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3778// CHECK7: cond.true:3779// CHECK7-NEXT: br label [[COND_END:%.*]]3780// CHECK7: cond.false:3781// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43782// CHECK7-NEXT: br label [[COND_END]]3783// CHECK7: cond.end:3784// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]3785// CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43786// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43787// CHECK7-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 43788// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3789// CHECK7: omp.inner.for.cond:3790// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43791// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43792// CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]3793// CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3794// CHECK7: omp.inner.for.body:3795// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43796// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 13797// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3798// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 43799// CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 03800// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 43801// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]3802// CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 43803// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3804// CHECK7: omp.body.continue:3805// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3806// CHECK7: omp.inner.for.inc:3807// CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43808// CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 13809// CHECK7-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 43810// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]3811// CHECK7: omp.inner.for.end:3812// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3813// CHECK7: omp.loop.exit:3814// CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])3815// CHECK7-NEXT: ret void3816//3817//3818// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l453819// CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3820// CHECK7-NEXT: entry:3821// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43822// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43823// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43824// CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined, ptr [[TMP0]])3825// CHECK7-NEXT: ret void3826//3827//3828// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined3829// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3830// CHECK7-NEXT: entry:3831// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43832// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43833// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43834// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43835// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 43836// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 43837// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 43838// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43839// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43840// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 43841// CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43842// CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43843// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43844// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43845// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 43846// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 43847// CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43848// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43849// CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43850// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43851// CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3852// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43853// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1223854// CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3855// CHECK7: cond.true:3856// CHECK7-NEXT: br label [[COND_END:%.*]]3857// CHECK7: cond.false:3858// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43859// CHECK7-NEXT: br label [[COND_END]]3860// CHECK7: cond.end:3861// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3862// CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43863// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43864// CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43865// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3866// CHECK7: omp.inner.for.cond:3867// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43868// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43869// CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3870// CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3871// CHECK7: omp.inner.for.body:3872// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43873// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43874// CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])3875// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3876// CHECK7: omp.inner.for.inc:3877// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43878// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43879// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]3880// CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 43881// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]3882// CHECK7: omp.inner.for.end:3883// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3884// CHECK7: omp.loop.exit:3885// CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3886// CHECK7-NEXT: ret void3887//3888//3889// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined3890// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3891// CHECK7-NEXT: entry:3892// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43893// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43894// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 43895// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 43896// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43897// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43898// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 43899// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43900// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43901// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43902// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43903// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 43904// CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43905// CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43906// CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 43907// CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 43908// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43909// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43910// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43911// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 43912// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 43913// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 43914// CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 43915// CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 43916// CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43917// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43918// CHECK7-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43919// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 43920// CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)3921// CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]3922// CHECK7: omp.dispatch.cond:3923// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43924// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 43925// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]3926// CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3927// CHECK7: cond.true:3928// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 43929// CHECK7-NEXT: br label [[COND_END:%.*]]3930// CHECK7: cond.false:3931// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43932// CHECK7-NEXT: br label [[COND_END]]3933// CHECK7: cond.end:3934// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]3935// CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43936// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43937// CHECK7-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 43938// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43939// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43940// CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]3941// CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]3942// CHECK7: omp.dispatch.body:3943// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3944// CHECK7: omp.inner.for.cond:3945// CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43946// CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43947// CHECK7-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]3948// CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3949// CHECK7: omp.inner.for.body:3950// CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43951// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 13952// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3953// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 43954// CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 03955// CHECK7-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 43956// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP15]]3957// CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 43958// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3959// CHECK7: omp.body.continue:3960// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3961// CHECK7: omp.inner.for.inc:3962// CHECK7-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43963// CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 13964// CHECK7-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 43965// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]3966// CHECK7: omp.inner.for.end:3967// CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]3968// CHECK7: omp.dispatch.inc:3969// CHECK7-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43970// CHECK7-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43971// CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]3972// CHECK7-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 43973// CHECK7-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43974// CHECK7-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43975// CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]3976// CHECK7-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 43977// CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]3978// CHECK7: omp.dispatch.end:3979// CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])3980// CHECK7-NEXT: ret void3981//3982//3983// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l513984// CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3985// CHECK7-NEXT: entry:3986// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43987// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43988// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43989// CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined, ptr [[TMP0]])3990// CHECK7-NEXT: ret void3991//3992//3993// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined3994// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3995// CHECK7-NEXT: entry:3996// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43997// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43998// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43999// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44000// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 44001// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 44002// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 44003// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44004// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44005// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 44006// CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44007// CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44008// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 44009// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 44010// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 44011// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 44012// CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44013// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44014// CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44015// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 44016// CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4017// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44018// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1224019// CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4020// CHECK7: cond.true:4021// CHECK7-NEXT: br label [[COND_END:%.*]]4022// CHECK7: cond.false:4023// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44024// CHECK7-NEXT: br label [[COND_END]]4025// CHECK7: cond.end:4026// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]4027// CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 44028// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44029// CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 44030// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4031// CHECK7: omp.inner.for.cond:4032// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44033// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44034// CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]4035// CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4036// CHECK7: omp.inner.for.body:4037// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44038// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44039// CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])4040// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4041// CHECK7: omp.inner.for.inc:4042// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44043// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 44044// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]4045// CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 44046// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]4047// CHECK7: omp.inner.for.end:4048// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4049// CHECK7: omp.loop.exit:4050// CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])4051// CHECK7-NEXT: ret void4052//4053//4054// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined4055// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {4056// CHECK7-NEXT: entry:4057// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 44058// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 44059// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 44060// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 44061// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 44062// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44063// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 44064// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44065// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44066// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44067// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44068// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 44069// CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44070// CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44071// CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 44072// CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 44073// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 44074// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 44075// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44076// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 44077// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 44078// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 44079// CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 44080// CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 44081// CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44082// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44083// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44084// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44085// CHECK7-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44086// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 44087// CHECK7-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)4088// CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]4089// CHECK7: omp.dispatch.cond:4090// CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])4091// CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 04092// CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]4093// CHECK7: omp.dispatch.body:4094// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44095// CHECK7-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 44096// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4097// CHECK7: omp.inner.for.cond:4098// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]4099// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]4100// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]4101// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4102// CHECK7: omp.inner.for.body:4103// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]4104// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 14105// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4106// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]4107// CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 04108// CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]4109// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]]4110// CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]4111// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4112// CHECK7: omp.body.continue:4113// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4114// CHECK7: omp.inner.for.inc:4115// CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]4116// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 14117// CHECK7-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]4118// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]4119// CHECK7: omp.inner.for.end:4120// CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]4121// CHECK7: omp.dispatch.inc:4122// CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]4123// CHECK7: omp.dispatch.end:4124// CHECK7-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]])4125// CHECK7-NEXT: ret void4126//4127//4128// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l574129// CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {4130// CHECK7-NEXT: entry:4131// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 44132// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 44133// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 44134// CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined, ptr [[TMP0]])4135// CHECK7-NEXT: ret void4136//4137//4138// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined4139// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {4140// CHECK7-NEXT: entry:4141// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 44142// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 44143// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 44144// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44145// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 44146// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 44147// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 44148// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44149// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44150// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 44151// CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44152// CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44153// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 44154// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 44155// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 44156// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 44157// CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44158// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44159// CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44160// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 44161// CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4162// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44163// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1224164// CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4165// CHECK7: cond.true:4166// CHECK7-NEXT: br label [[COND_END:%.*]]4167// CHECK7: cond.false:4168// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44169// CHECK7-NEXT: br label [[COND_END]]4170// CHECK7: cond.end:4171// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]4172// CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 44173// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44174// CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 44175// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4176// CHECK7: omp.inner.for.cond:4177// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44178// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44179// CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]4180// CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4181// CHECK7: omp.inner.for.body:4182// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44183// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44184// CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])4185// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4186// CHECK7: omp.inner.for.inc:4187// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44188// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 44189// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]4190// CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 44191// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]4192// CHECK7: omp.inner.for.end:4193// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4194// CHECK7: omp.loop.exit:4195// CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])4196// CHECK7-NEXT: ret void4197//4198//4199// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined4200// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {4201// CHECK7-NEXT: entry:4202// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 44203// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 44204// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 44205// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 44206// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 44207// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44208// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 44209// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44210// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44211// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44212// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44213// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 44214// CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44215// CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44216// CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 44217// CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 44218// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 44219// CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 44220// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44221// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 44222// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 44223// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 44224// CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 44225// CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 44226// CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44227// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44228// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44229// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44230// CHECK7-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44231// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 44232// CHECK7-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)4233// CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]4234// CHECK7: omp.dispatch.cond:4235// CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])4236// CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 04237// CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]4238// CHECK7: omp.dispatch.body:4239// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44240// CHECK7-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 44241// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4242// CHECK7: omp.inner.for.cond:4243// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]4244// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]4245// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]4246// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4247// CHECK7: omp.inner.for.body:4248// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]4249// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 14250// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4251// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]4252// CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 04253// CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]4254// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]]4255// CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]]4256// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4257// CHECK7: omp.body.continue:4258// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4259// CHECK7: omp.inner.for.inc:4260// CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]4261// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 14262// CHECK7-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]4263// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]4264// CHECK7: omp.inner.for.end:4265// CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]4266// CHECK7: omp.dispatch.inc:4267// CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]4268// CHECK7: omp.dispatch.end:4269// CHECK7-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]])4270// CHECK7-NEXT: ret void4271//4272//4273// CHECK13-LABEL: define {{[^@]+}}@main4274// CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {4275// CHECK13-NEXT: entry:4276// CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 44277// CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 44278// CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 84279// CHECK13-NEXT: [[N:%.*]] = alloca i32, align 44280// CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 84281// CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 84282// CHECK13-NEXT: [[M:%.*]] = alloca i32, align 44283// CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 84284// CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 84285// CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 84286// CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 84287// CHECK13-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 84288// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 44289// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 44290// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 44291// CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 84292// CHECK13-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 84293// CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 84294// CHECK13-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 84295// CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 84296// CHECK13-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 84297// CHECK13-NEXT: [[_TMP8:%.*]] = alloca i32, align 44298// CHECK13-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 44299// CHECK13-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 44300// CHECK13-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84301// CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 84302// CHECK13-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 84303// CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x ptr], align 84304// CHECK13-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x ptr], align 84305// CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x ptr], align 84306// CHECK13-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 84307// CHECK13-NEXT: [[_TMP23:%.*]] = alloca i32, align 44308// CHECK13-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 44309// CHECK13-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 44310// CHECK13-NEXT: [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84311// CHECK13-NEXT: [[N_CASTED33:%.*]] = alloca i64, align 84312// CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [3 x ptr], align 84313// CHECK13-NEXT: [[DOTOFFLOAD_PTRS35:%.*]] = alloca [3 x ptr], align 84314// CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [3 x ptr], align 84315// CHECK13-NEXT: [[DOTOFFLOAD_SIZES37:%.*]] = alloca [3 x i64], align 84316// CHECK13-NEXT: [[_TMP38:%.*]] = alloca i32, align 44317// CHECK13-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 44318// CHECK13-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 44319// CHECK13-NEXT: [[KERNEL_ARGS45:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84320// CHECK13-NEXT: [[M_CASTED48:%.*]] = alloca i64, align 84321// CHECK13-NEXT: [[N_CASTED49:%.*]] = alloca i64, align 84322// CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [4 x ptr], align 84323// CHECK13-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [4 x ptr], align 84324// CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [4 x ptr], align 84325// CHECK13-NEXT: [[DOTOFFLOAD_SIZES53:%.*]] = alloca [4 x i64], align 84326// CHECK13-NEXT: [[_TMP54:%.*]] = alloca i32, align 44327// CHECK13-NEXT: [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 44328// CHECK13-NEXT: [[DOTCAPTURE_EXPR_56:%.*]] = alloca i32, align 44329// CHECK13-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84330// CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 44331// CHECK13-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 44332// CHECK13-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 84333// CHECK13-NEXT: store i32 100, ptr [[N]], align 44334// CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 44335// CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i644336// CHECK13-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()4337// CHECK13-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 84338// CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 44339// CHECK13-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 84340// CHECK13-NEXT: store i32 10, ptr [[M]], align 44341// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 44342// CHECK13-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 44343// CHECK13-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 84344// CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 44345// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false)4346// CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 04347// CHECK13-NEXT: store i64 [[TMP4]], ptr [[TMP6]], align 84348// CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 04349// CHECK13-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 84350// CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 04351// CHECK13-NEXT: store ptr null, ptr [[TMP8]], align 84352// CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 14353// CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 84354// CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 14355// CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP10]], align 84356// CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 14357// CHECK13-NEXT: store ptr null, ptr [[TMP11]], align 84358// CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 24359// CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 84360// CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 24361// CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 84362// CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 24363// CHECK13-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 84364// CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 24365// CHECK13-NEXT: store ptr null, ptr [[TMP15]], align 84366// CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 04367// CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 04368// CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 04369// CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 44370// CHECK13-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 44371// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44372// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 04373// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 14374// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 14375// CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 44376// CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44377// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 14378// CHECK13-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i644379// CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 04380// CHECK13-NEXT: store i32 3, ptr [[TMP23]], align 44381// CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 14382// CHECK13-NEXT: store i32 3, ptr [[TMP24]], align 44383// CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 24384// CHECK13-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 84385// CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 34386// CHECK13-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 84387// CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 44388// CHECK13-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 84389// CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 54390// CHECK13-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 84391// CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 64392// CHECK13-NEXT: store ptr null, ptr [[TMP29]], align 84393// CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 74394// CHECK13-NEXT: store ptr null, ptr [[TMP30]], align 84395// CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 84396// CHECK13-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 84397// CHECK13-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 94398// CHECK13-NEXT: store i64 0, ptr [[TMP32]], align 84399// CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 104400// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 44401// CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 114402// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 44403// CHECK13-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 124404// CHECK13-NEXT: store i32 0, ptr [[TMP35]], align 44405// CHECK13-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, ptr [[KERNEL_ARGS]])4406// CHECK13-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 04407// CHECK13-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]4408// CHECK13: omp_offload.failed:4409// CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]4410// CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]4411// CHECK13: omp_offload.cont:4412// CHECK13-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 44413// CHECK13-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 44414// CHECK13-NEXT: [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 84415// CHECK13-NEXT: [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 44416// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false)4417// CHECK13-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 04418// CHECK13-NEXT: store i64 [[TMP39]], ptr [[TMP41]], align 84419// CHECK13-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 04420// CHECK13-NEXT: store i64 [[TMP39]], ptr [[TMP42]], align 84421// CHECK13-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 04422// CHECK13-NEXT: store ptr null, ptr [[TMP43]], align 84423// CHECK13-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 14424// CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP44]], align 84425// CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 14426// CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP45]], align 84427// CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 14428// CHECK13-NEXT: store ptr null, ptr [[TMP46]], align 84429// CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 24430// CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP47]], align 84431// CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 24432// CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 84433// CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 24434// CHECK13-NEXT: store i64 [[TMP40]], ptr [[TMP49]], align 84435// CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 24436// CHECK13-NEXT: store ptr null, ptr [[TMP50]], align 84437// CHECK13-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 04438// CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 04439// CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 04440// CHECK13-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 44441// CHECK13-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 44442// CHECK13-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 44443// CHECK13-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 04444// CHECK13-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 14445// CHECK13-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 14446// CHECK13-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 44447// CHECK13-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 44448// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP56]], 14449// CHECK13-NEXT: [[TMP57:%.*]] = zext i32 [[ADD14]] to i644450// CHECK13-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 04451// CHECK13-NEXT: store i32 3, ptr [[TMP58]], align 44452// CHECK13-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 14453// CHECK13-NEXT: store i32 3, ptr [[TMP59]], align 44454// CHECK13-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 24455// CHECK13-NEXT: store ptr [[TMP51]], ptr [[TMP60]], align 84456// CHECK13-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 34457// CHECK13-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 84458// CHECK13-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 44459// CHECK13-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 84460// CHECK13-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 54461// CHECK13-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP63]], align 84462// CHECK13-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 64463// CHECK13-NEXT: store ptr null, ptr [[TMP64]], align 84464// CHECK13-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 74465// CHECK13-NEXT: store ptr null, ptr [[TMP65]], align 84466// CHECK13-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 84467// CHECK13-NEXT: store i64 [[TMP57]], ptr [[TMP66]], align 84468// CHECK13-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 94469// CHECK13-NEXT: store i64 0, ptr [[TMP67]], align 84470// CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 104471// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP68]], align 44472// CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 114473// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 44474// CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 124475// CHECK13-NEXT: store i32 0, ptr [[TMP70]], align 44476// CHECK13-NEXT: [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, ptr [[KERNEL_ARGS15]])4477// CHECK13-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 04478// CHECK13-NEXT: br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]4479// CHECK13: omp_offload.failed16:4480// CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]4481// CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT17]]4482// CHECK13: omp_offload.cont17:4483// CHECK13-NEXT: [[TMP73:%.*]] = load i32, ptr [[M]], align 44484// CHECK13-NEXT: store i32 [[TMP73]], ptr [[M_CASTED]], align 44485// CHECK13-NEXT: [[TMP74:%.*]] = load i64, ptr [[M_CASTED]], align 84486// CHECK13-NEXT: [[TMP75:%.*]] = load i32, ptr [[N]], align 44487// CHECK13-NEXT: store i32 [[TMP75]], ptr [[N_CASTED18]], align 44488// CHECK13-NEXT: [[TMP76:%.*]] = load i64, ptr [[N_CASTED18]], align 84489// CHECK13-NEXT: [[TMP77:%.*]] = mul nuw i64 [[TMP1]], 44490// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES22]], ptr align 8 @.offload_sizes.3, i64 32, i1 false)4491// CHECK13-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 04492// CHECK13-NEXT: store i64 [[TMP74]], ptr [[TMP78]], align 84493// CHECK13-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 04494// CHECK13-NEXT: store i64 [[TMP74]], ptr [[TMP79]], align 84495// CHECK13-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 04496// CHECK13-NEXT: store ptr null, ptr [[TMP80]], align 84497// CHECK13-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 14498// CHECK13-NEXT: store i64 [[TMP76]], ptr [[TMP81]], align 84499// CHECK13-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 14500// CHECK13-NEXT: store i64 [[TMP76]], ptr [[TMP82]], align 84501// CHECK13-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 14502// CHECK13-NEXT: store ptr null, ptr [[TMP83]], align 84503// CHECK13-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 24504// CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP84]], align 84505// CHECK13-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 24506// CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP85]], align 84507// CHECK13-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 24508// CHECK13-NEXT: store ptr null, ptr [[TMP86]], align 84509// CHECK13-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 34510// CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP87]], align 84511// CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 34512// CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP88]], align 84513// CHECK13-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 34514// CHECK13-NEXT: store i64 [[TMP77]], ptr [[TMP89]], align 84515// CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 34516// CHECK13-NEXT: store ptr null, ptr [[TMP90]], align 84517// CHECK13-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 04518// CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 04519// CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 04520// CHECK13-NEXT: [[TMP94:%.*]] = load i32, ptr [[N]], align 44521// CHECK13-NEXT: store i32 [[TMP94]], ptr [[DOTCAPTURE_EXPR_24]], align 44522// CHECK13-NEXT: [[TMP95:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 44523// CHECK13-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP95]], 04524// CHECK13-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 14525// CHECK13-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 14526// CHECK13-NEXT: store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 44527// CHECK13-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 44528// CHECK13-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP96]], 14529// CHECK13-NEXT: [[TMP97:%.*]] = zext i32 [[ADD29]] to i644530// CHECK13-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 04531// CHECK13-NEXT: store i32 3, ptr [[TMP98]], align 44532// CHECK13-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 14533// CHECK13-NEXT: store i32 4, ptr [[TMP99]], align 44534// CHECK13-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 24535// CHECK13-NEXT: store ptr [[TMP91]], ptr [[TMP100]], align 84536// CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 34537// CHECK13-NEXT: store ptr [[TMP92]], ptr [[TMP101]], align 84538// CHECK13-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 44539// CHECK13-NEXT: store ptr [[TMP93]], ptr [[TMP102]], align 84540// CHECK13-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 54541// CHECK13-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP103]], align 84542// CHECK13-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 64543// CHECK13-NEXT: store ptr null, ptr [[TMP104]], align 84544// CHECK13-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 74545// CHECK13-NEXT: store ptr null, ptr [[TMP105]], align 84546// CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 84547// CHECK13-NEXT: store i64 [[TMP97]], ptr [[TMP106]], align 84548// CHECK13-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 94549// CHECK13-NEXT: store i64 0, ptr [[TMP107]], align 84550// CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 104551// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 44552// CHECK13-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 114553// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP109]], align 44554// CHECK13-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 124555// CHECK13-NEXT: store i32 0, ptr [[TMP110]], align 44556// CHECK13-NEXT: [[TMP111:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, ptr [[KERNEL_ARGS30]])4557// CHECK13-NEXT: [[TMP112:%.*]] = icmp ne i32 [[TMP111]], 04558// CHECK13-NEXT: br i1 [[TMP112]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]4559// CHECK13: omp_offload.failed31:4560// CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP74]], i64 [[TMP76]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]4561// CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT32]]4562// CHECK13: omp_offload.cont32:4563// CHECK13-NEXT: [[TMP113:%.*]] = load i32, ptr [[N]], align 44564// CHECK13-NEXT: store i32 [[TMP113]], ptr [[N_CASTED33]], align 44565// CHECK13-NEXT: [[TMP114:%.*]] = load i64, ptr [[N_CASTED33]], align 84566// CHECK13-NEXT: [[TMP115:%.*]] = mul nuw i64 [[TMP1]], 44567// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES37]], ptr align 8 @.offload_sizes.5, i64 24, i1 false)4568// CHECK13-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 04569// CHECK13-NEXT: store i64 [[TMP114]], ptr [[TMP116]], align 84570// CHECK13-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 04571// CHECK13-NEXT: store i64 [[TMP114]], ptr [[TMP117]], align 84572// CHECK13-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 04573// CHECK13-NEXT: store ptr null, ptr [[TMP118]], align 84574// CHECK13-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 14575// CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP119]], align 84576// CHECK13-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 14577// CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP120]], align 84578// CHECK13-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 14579// CHECK13-NEXT: store ptr null, ptr [[TMP121]], align 84580// CHECK13-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 24581// CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP122]], align 84582// CHECK13-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 24583// CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP123]], align 84584// CHECK13-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 24585// CHECK13-NEXT: store i64 [[TMP115]], ptr [[TMP124]], align 84586// CHECK13-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 24587// CHECK13-NEXT: store ptr null, ptr [[TMP125]], align 84588// CHECK13-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 04589// CHECK13-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 04590// CHECK13-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 04591// CHECK13-NEXT: [[TMP129:%.*]] = load i32, ptr [[N]], align 44592// CHECK13-NEXT: store i32 [[TMP129]], ptr [[DOTCAPTURE_EXPR_39]], align 44593// CHECK13-NEXT: [[TMP130:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_39]], align 44594// CHECK13-NEXT: [[SUB41:%.*]] = sub nsw i32 [[TMP130]], 04595// CHECK13-NEXT: [[DIV42:%.*]] = sdiv i32 [[SUB41]], 14596// CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[DIV42]], 14597// CHECK13-NEXT: store i32 [[SUB43]], ptr [[DOTCAPTURE_EXPR_40]], align 44598// CHECK13-NEXT: [[TMP131:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 44599// CHECK13-NEXT: [[ADD44:%.*]] = add nsw i32 [[TMP131]], 14600// CHECK13-NEXT: [[TMP132:%.*]] = zext i32 [[ADD44]] to i644601// CHECK13-NEXT: [[TMP133:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 04602// CHECK13-NEXT: store i32 3, ptr [[TMP133]], align 44603// CHECK13-NEXT: [[TMP134:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 14604// CHECK13-NEXT: store i32 3, ptr [[TMP134]], align 44605// CHECK13-NEXT: [[TMP135:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 24606// CHECK13-NEXT: store ptr [[TMP126]], ptr [[TMP135]], align 84607// CHECK13-NEXT: [[TMP136:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 34608// CHECK13-NEXT: store ptr [[TMP127]], ptr [[TMP136]], align 84609// CHECK13-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 44610// CHECK13-NEXT: store ptr [[TMP128]], ptr [[TMP137]], align 84611// CHECK13-NEXT: [[TMP138:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 54612// CHECK13-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP138]], align 84613// CHECK13-NEXT: [[TMP139:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 64614// CHECK13-NEXT: store ptr null, ptr [[TMP139]], align 84615// CHECK13-NEXT: [[TMP140:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 74616// CHECK13-NEXT: store ptr null, ptr [[TMP140]], align 84617// CHECK13-NEXT: [[TMP141:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 84618// CHECK13-NEXT: store i64 [[TMP132]], ptr [[TMP141]], align 84619// CHECK13-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 94620// CHECK13-NEXT: store i64 0, ptr [[TMP142]], align 84621// CHECK13-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 104622// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP143]], align 44623// CHECK13-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 114624// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP144]], align 44625// CHECK13-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 124626// CHECK13-NEXT: store i32 0, ptr [[TMP145]], align 44627// CHECK13-NEXT: [[TMP146:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, ptr [[KERNEL_ARGS45]])4628// CHECK13-NEXT: [[TMP147:%.*]] = icmp ne i32 [[TMP146]], 04629// CHECK13-NEXT: br i1 [[TMP147]], label [[OMP_OFFLOAD_FAILED46:%.*]], label [[OMP_OFFLOAD_CONT47:%.*]]4630// CHECK13: omp_offload.failed46:4631// CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP114]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]4632// CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT47]]4633// CHECK13: omp_offload.cont47:4634// CHECK13-NEXT: [[TMP148:%.*]] = load i32, ptr [[M]], align 44635// CHECK13-NEXT: store i32 [[TMP148]], ptr [[M_CASTED48]], align 44636// CHECK13-NEXT: [[TMP149:%.*]] = load i64, ptr [[M_CASTED48]], align 84637// CHECK13-NEXT: [[TMP150:%.*]] = load i32, ptr [[N]], align 44638// CHECK13-NEXT: store i32 [[TMP150]], ptr [[N_CASTED49]], align 44639// CHECK13-NEXT: [[TMP151:%.*]] = load i64, ptr [[N_CASTED49]], align 84640// CHECK13-NEXT: [[TMP152:%.*]] = mul nuw i64 [[TMP1]], 44641// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES53]], ptr align 8 @.offload_sizes.7, i64 32, i1 false)4642// CHECK13-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 04643// CHECK13-NEXT: store i64 [[TMP149]], ptr [[TMP153]], align 84644// CHECK13-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 04645// CHECK13-NEXT: store i64 [[TMP149]], ptr [[TMP154]], align 84646// CHECK13-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 04647// CHECK13-NEXT: store ptr null, ptr [[TMP155]], align 84648// CHECK13-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 14649// CHECK13-NEXT: store i64 [[TMP151]], ptr [[TMP156]], align 84650// CHECK13-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 14651// CHECK13-NEXT: store i64 [[TMP151]], ptr [[TMP157]], align 84652// CHECK13-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 14653// CHECK13-NEXT: store ptr null, ptr [[TMP158]], align 84654// CHECK13-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 24655// CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP159]], align 84656// CHECK13-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 24657// CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP160]], align 84658// CHECK13-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 24659// CHECK13-NEXT: store ptr null, ptr [[TMP161]], align 84660// CHECK13-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 34661// CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP162]], align 84662// CHECK13-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 34663// CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP163]], align 84664// CHECK13-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 34665// CHECK13-NEXT: store i64 [[TMP152]], ptr [[TMP164]], align 84666// CHECK13-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 34667// CHECK13-NEXT: store ptr null, ptr [[TMP165]], align 84668// CHECK13-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 04669// CHECK13-NEXT: [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 04670// CHECK13-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 04671// CHECK13-NEXT: [[TMP169:%.*]] = load i32, ptr [[N]], align 44672// CHECK13-NEXT: store i32 [[TMP169]], ptr [[DOTCAPTURE_EXPR_55]], align 44673// CHECK13-NEXT: [[TMP170:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_55]], align 44674// CHECK13-NEXT: [[SUB57:%.*]] = sub nsw i32 [[TMP170]], 04675// CHECK13-NEXT: [[DIV58:%.*]] = sdiv i32 [[SUB57]], 14676// CHECK13-NEXT: [[SUB59:%.*]] = sub nsw i32 [[DIV58]], 14677// CHECK13-NEXT: store i32 [[SUB59]], ptr [[DOTCAPTURE_EXPR_56]], align 44678// CHECK13-NEXT: [[TMP171:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_56]], align 44679// CHECK13-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP171]], 14680// CHECK13-NEXT: [[TMP172:%.*]] = zext i32 [[ADD60]] to i644681// CHECK13-NEXT: [[TMP173:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 04682// CHECK13-NEXT: store i32 3, ptr [[TMP173]], align 44683// CHECK13-NEXT: [[TMP174:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 14684// CHECK13-NEXT: store i32 4, ptr [[TMP174]], align 44685// CHECK13-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 24686// CHECK13-NEXT: store ptr [[TMP166]], ptr [[TMP175]], align 84687// CHECK13-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 34688// CHECK13-NEXT: store ptr [[TMP167]], ptr [[TMP176]], align 84689// CHECK13-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 44690// CHECK13-NEXT: store ptr [[TMP168]], ptr [[TMP177]], align 84691// CHECK13-NEXT: [[TMP178:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 54692// CHECK13-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP178]], align 84693// CHECK13-NEXT: [[TMP179:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 64694// CHECK13-NEXT: store ptr null, ptr [[TMP179]], align 84695// CHECK13-NEXT: [[TMP180:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 74696// CHECK13-NEXT: store ptr null, ptr [[TMP180]], align 84697// CHECK13-NEXT: [[TMP181:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 84698// CHECK13-NEXT: store i64 [[TMP172]], ptr [[TMP181]], align 84699// CHECK13-NEXT: [[TMP182:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 94700// CHECK13-NEXT: store i64 0, ptr [[TMP182]], align 84701// CHECK13-NEXT: [[TMP183:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 104702// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP183]], align 44703// CHECK13-NEXT: [[TMP184:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 114704// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP184]], align 44705// CHECK13-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 124706// CHECK13-NEXT: store i32 0, ptr [[TMP185]], align 44707// CHECK13-NEXT: [[TMP186:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, ptr [[KERNEL_ARGS61]])4708// CHECK13-NEXT: [[TMP187:%.*]] = icmp ne i32 [[TMP186]], 04709// CHECK13-NEXT: br i1 [[TMP187]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]4710// CHECK13: omp_offload.failed62:4711// CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP149]], i64 [[TMP151]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]4712// CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT63]]4713// CHECK13: omp_offload.cont63:4714// CHECK13-NEXT: [[TMP188:%.*]] = load i32, ptr [[ARGC_ADDR]], align 44715// CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP188]])4716// CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 44717// CHECK13-NEXT: [[TMP189:%.*]] = load ptr, ptr [[SAVED_STACK]], align 84718// CHECK13-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP189]])4719// CHECK13-NEXT: [[TMP190:%.*]] = load i32, ptr [[RETVAL]], align 44720// CHECK13-NEXT: ret i32 [[TMP190]]4721//4722//4723// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1484724// CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {4725// CHECK13-NEXT: entry:4726// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 84727// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 84728// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 84729// CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 84730// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 84731// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 84732// CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 84733// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 84734// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])4735// CHECK13-NEXT: ret void4736//4737//4738// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined4739// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {4740// CHECK13-NEXT: entry:4741// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 84742// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 84743// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 84744// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 84745// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 84746// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44747// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 44748// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 44749// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 44750// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 44751// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 44752// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 44753// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44754// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44755// CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 44756// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 84757// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 84758// CHECK13-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 84759// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 84760// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 84761// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 84762// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 84763// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 84764// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 44765// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 44766// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44767// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 04768// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 14769// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 14770// CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 44771// CHECK13-NEXT: store i32 0, ptr [[I]], align 44772// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44773// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]4774// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]4775// CHECK13: omp.precond.then:4776// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 44777// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44778// CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 44779// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44780// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44781// CHECK13-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84782// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 44783// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4784// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44785// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44786// CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]4787// CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4788// CHECK13: cond.true:4789// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44790// CHECK13-NEXT: br label [[COND_END:%.*]]4791// CHECK13: cond.false:4792// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44793// CHECK13-NEXT: br label [[COND_END]]4794// CHECK13: cond.end:4795// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]4796// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 44797// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44798// CHECK13-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 44799// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4800// CHECK13: omp.inner.for.cond:4801// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44802// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44803// CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]4804// CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4805// CHECK13: omp.inner.for.body:4806// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44807// CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i644808// CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44809// CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i644810// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])4811// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4812// CHECK13: omp.inner.for.inc:4813// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44814// CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 44815// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]4816// CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 44817// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]4818// CHECK13: omp.inner.for.end:4819// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4820// CHECK13: omp.loop.exit:4821// CHECK13-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84822// CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 44823// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])4824// CHECK13-NEXT: br label [[OMP_PRECOND_END]]4825// CHECK13: omp.precond.end:4826// CHECK13-NEXT: ret void4827//4828//4829// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined4830// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {4831// CHECK13-NEXT: entry:4832// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 84833// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 84834// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 84835// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 84836// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 84837// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 84838// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 84839// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44840// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 44841// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 44842// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 44843// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 44844// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44845// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44846// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44847// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44848// CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 44849// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 84850// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 84851// CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 84852// CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 84853// CHECK13-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 84854// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 84855// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 84856// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 84857// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 84858// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 84859// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 44860// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 44861// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44862// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 04863// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 14864// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 14865// CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 44866// CHECK13-NEXT: store i32 0, ptr [[I]], align 44867// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44868// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]4869// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]4870// CHECK13: omp.precond.then:4871// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44872// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44873// CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 44874// CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 84875// CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i324876// CHECK13-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 84877// CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i324878// CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 44879// CHECK13-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 44880// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44881// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44882// CHECK13-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84883// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 44884// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4885// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44886// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44887// CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]4888// CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4889// CHECK13: cond.true:4890// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44891// CHECK13-NEXT: br label [[COND_END:%.*]]4892// CHECK13: cond.false:4893// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44894// CHECK13-NEXT: br label [[COND_END]]4895// CHECK13: cond.end:4896// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]4897// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 44898// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44899// CHECK13-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 44900// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4901// CHECK13: omp.inner.for.cond:4902// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44903// CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44904// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]4905// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4906// CHECK13: omp.inner.for.body:4907// CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44908// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 14909// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4910// CHECK13-NEXT: store i32 [[ADD]], ptr [[I4]], align 44911// CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 44912// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i644913// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]4914// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 44915// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4916// CHECK13: omp.body.continue:4917// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4918// CHECK13: omp.inner.for.inc:4919// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44920// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 14921// CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 44922// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]4923// CHECK13: omp.inner.for.end:4924// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4925// CHECK13: omp.loop.exit:4926// CHECK13-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84927// CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 44928// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])4929// CHECK13-NEXT: br label [[OMP_PRECOND_END]]4930// CHECK13: omp.precond.end:4931// CHECK13-NEXT: ret void4932//4933//4934// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1534935// CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {4936// CHECK13-NEXT: entry:4937// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 84938// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 84939// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 84940// CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 84941// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 84942// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 84943// CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 84944// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 84945// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])4946// CHECK13-NEXT: ret void4947//4948//4949// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined4950// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {4951// CHECK13-NEXT: entry:4952// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 84953// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 84954// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 84955// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 84956// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 84957// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44958// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 44959// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 44960// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 44961// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 44962// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 44963// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 44964// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44965// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44966// CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 44967// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 84968// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 84969// CHECK13-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 84970// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 84971// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 84972// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 84973// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 84974// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 84975// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 44976// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 44977// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44978// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 04979// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 14980// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 14981// CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 44982// CHECK13-NEXT: store i32 0, ptr [[I]], align 44983// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44984// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]4985// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]4986// CHECK13: omp.precond.then:4987// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 44988// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44989// CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 44990// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44991// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44992// CHECK13-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84993// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 44994// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4995// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44996// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44997// CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]4998// CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4999// CHECK13: cond.true:5000// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45001// CHECK13-NEXT: br label [[COND_END:%.*]]5002// CHECK13: cond.false:5003// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45004// CHECK13-NEXT: br label [[COND_END]]5005// CHECK13: cond.end:5006// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]5007// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 45008// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45009// CHECK13-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 45010// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5011// CHECK13: omp.inner.for.cond:5012// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45013// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45014// CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]5015// CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5016// CHECK13: omp.inner.for.body:5017// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45018// CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i645019// CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45020// CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i645021// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])5022// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5023// CHECK13: omp.inner.for.inc:5024// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45025// CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 45026// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]5027// CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 45028// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]5029// CHECK13: omp.inner.for.end:5030// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5031// CHECK13: omp.loop.exit:5032// CHECK13-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85033// CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 45034// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])5035// CHECK13-NEXT: br label [[OMP_PRECOND_END]]5036// CHECK13: omp.precond.end:5037// CHECK13-NEXT: ret void5038//5039//5040// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined5041// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {5042// CHECK13-NEXT: entry:5043// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85044// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85045// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 85046// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 85047// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 85048// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 85049// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 85050// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45051// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 45052// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 45053// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 45054// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 45055// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45056// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45057// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45058// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45059// CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 45060// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85061// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85062// CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 85063// CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 85064// CHECK13-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 85065// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 85066// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 85067// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 85068// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 85069// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 85070// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 45071// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 45072// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 45073// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 05074// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 15075// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 15076// CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 45077// CHECK13-NEXT: store i32 0, ptr [[I]], align 45078// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 45079// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]5080// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]5081// CHECK13: omp.precond.then:5082// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45083// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45084// CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 45085// CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 85086// CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i325087// CHECK13-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 85088// CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i325089// CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 45090// CHECK13-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 45091// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45092// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45093// CHECK13-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85094// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 45095// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5096// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45097// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45098// CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]5099// CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5100// CHECK13: cond.true:5101// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45102// CHECK13-NEXT: br label [[COND_END:%.*]]5103// CHECK13: cond.false:5104// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45105// CHECK13-NEXT: br label [[COND_END]]5106// CHECK13: cond.end:5107// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]5108// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45109// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45110// CHECK13-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 45111// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5112// CHECK13: omp.inner.for.cond:5113// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45114// CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45115// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]5116// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5117// CHECK13: omp.inner.for.body:5118// CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45119// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 15120// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5121// CHECK13-NEXT: store i32 [[ADD]], ptr [[I4]], align 45122// CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 45123// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i645124// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]5125// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 45126// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5127// CHECK13: omp.body.continue:5128// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5129// CHECK13: omp.inner.for.inc:5130// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45131// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 15132// CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 45133// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]5134// CHECK13: omp.inner.for.end:5135// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5136// CHECK13: omp.loop.exit:5137// CHECK13-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85138// CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 45139// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])5140// CHECK13-NEXT: br label [[OMP_PRECOND_END]]5141// CHECK13: omp.precond.end:5142// CHECK13-NEXT: ret void5143//5144//5145// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1585146// CHECK13-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {5147// CHECK13-NEXT: entry:5148// CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 85149// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 85150// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 85151// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 85152// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 45153// CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 85154// CHECK13-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 85155// CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 85156// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 85157// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 85158// CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 85159// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 85160// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 45161// CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 45162// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 45163// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 45164// CHECK13-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 85165// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP4]])5166// CHECK13-NEXT: ret void5167//5168//5169// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined5170// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {5171// CHECK13-NEXT: entry:5172// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85173// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85174// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 85175// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 85176// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 85177// CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 85178// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45179// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 45180// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 45181// CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 45182// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 45183// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 45184// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 45185// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45186// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45187// CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 45188// CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 85189// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85190// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85191// CHECK13-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 85192// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 85193// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 85194// CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 85195// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 85196// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 85197// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 85198// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 45199// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 45200// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45201// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 05202// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 15203// CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 15204// CHECK13-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 45205// CHECK13-NEXT: store i32 0, ptr [[I]], align 45206// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45207// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]5208// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]5209// CHECK13: omp.precond.then:5210// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 45211// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45212// CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 45213// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45214// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45215// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 45216// CHECK13-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85217// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 45218// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])5219// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45220// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45221// CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]5222// CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5223// CHECK13: cond.true:5224// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45225// CHECK13-NEXT: br label [[COND_END:%.*]]5226// CHECK13: cond.false:5227// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45228// CHECK13-NEXT: br label [[COND_END]]5229// CHECK13: cond.end:5230// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]5231// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 45232// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45233// CHECK13-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 45234// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5235// CHECK13: omp.inner.for.cond:5236// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45237// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45238// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 15239// CHECK13-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]5240// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5241// CHECK13: omp.inner.for.body:5242// CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45243// CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i645244// CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45245// CHECK13-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i645246// CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 45247// CHECK13-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 45248// CHECK13-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 85249// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]], i64 [[TMP22]])5250// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5251// CHECK13: omp.inner.for.inc:5252// CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45253// CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 45254// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]5255// CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 45256// CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45257// CHECK13-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 45258// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]5259// CHECK13-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 45260// CHECK13-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45261// CHECK13-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 45262// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]5263// CHECK13-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 45264// CHECK13-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45265// CHECK13-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45266// CHECK13-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]5267// CHECK13-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]5268// CHECK13: cond.true11:5269// CHECK13-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45270// CHECK13-NEXT: br label [[COND_END13:%.*]]5271// CHECK13: cond.false12:5272// CHECK13-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45273// CHECK13-NEXT: br label [[COND_END13]]5274// CHECK13: cond.end13:5275// CHECK13-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE11]] ], [ [[TMP32]], [[COND_FALSE12]] ]5276// CHECK13-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 45277// CHECK13-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45278// CHECK13-NEXT: store i32 [[TMP33]], ptr [[DOTOMP_IV]], align 45279// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]5280// CHECK13: omp.inner.for.end:5281// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5282// CHECK13: omp.loop.exit:5283// CHECK13-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85284// CHECK13-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 45285// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP35]])5286// CHECK13-NEXT: br label [[OMP_PRECOND_END]]5287// CHECK13: omp.precond.end:5288// CHECK13-NEXT: ret void5289//5290//5291// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined5292// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {5293// CHECK13-NEXT: entry:5294// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85295// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85296// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 85297// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 85298// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 85299// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 85300// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 85301// CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 85302// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45303// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 45304// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 45305// CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 45306// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 45307// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45308// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45309// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45310// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45311// CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 45312// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85313// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85314// CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 85315// CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 85316// CHECK13-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 85317// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 85318// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 85319// CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 85320// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 85321// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 85322// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 85323// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 45324// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 45325// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45326// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 05327// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 15328// CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 15329// CHECK13-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 45330// CHECK13-NEXT: store i32 0, ptr [[I]], align 45331// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45332// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]5333// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]5334// CHECK13: omp.precond.then:5335// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45336// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45337// CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 45338// CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 85339// CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i325340// CHECK13-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 85341// CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i325342// CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 45343// CHECK13-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 45344// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45345// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45346// CHECK13-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85347// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 45348// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5349// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45350// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45351// CHECK13-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]5352// CHECK13-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5353// CHECK13: cond.true:5354// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45355// CHECK13-NEXT: br label [[COND_END:%.*]]5356// CHECK13: cond.false:5357// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45358// CHECK13-NEXT: br label [[COND_END]]5359// CHECK13: cond.end:5360// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]5361// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45362// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45363// CHECK13-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 45364// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5365// CHECK13: omp.inner.for.cond:5366// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45367// CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45368// CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]5369// CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5370// CHECK13: omp.inner.for.body:5371// CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45372// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 15373// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5374// CHECK13-NEXT: store i32 [[ADD]], ptr [[I5]], align 45375// CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[I5]], align 45376// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i645377// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]5378// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 45379// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5380// CHECK13: omp.body.continue:5381// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5382// CHECK13: omp.inner.for.inc:5383// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45384// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 15385// CHECK13-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 45386// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]5387// CHECK13: omp.inner.for.end:5388// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5389// CHECK13: omp.loop.exit:5390// CHECK13-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85391// CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 45392// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])5393// CHECK13-NEXT: br label [[OMP_PRECOND_END]]5394// CHECK13: omp.precond.end:5395// CHECK13-NEXT: ret void5396//5397//5398// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1635399// CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {5400// CHECK13-NEXT: entry:5401// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 85402// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 85403// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 85404// CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 85405// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 85406// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 85407// CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 85408// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 85409// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])5410// CHECK13-NEXT: ret void5411//5412//5413// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined5414// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {5415// CHECK13-NEXT: entry:5416// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85417// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85418// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 85419// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 85420// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 85421// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45422// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 45423// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 45424// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 45425// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 45426// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 45427// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 45428// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45429// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45430// CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 45431// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85432// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85433// CHECK13-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 85434// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 85435// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 85436// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 85437// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 85438// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 85439// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 45440// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 45441// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 45442// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 05443// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 15444// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 15445// CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 45446// CHECK13-NEXT: store i32 0, ptr [[I]], align 45447// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 45448// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]5449// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]5450// CHECK13: omp.precond.then:5451// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 45452// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45453// CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 45454// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45455// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45456// CHECK13-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85457// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 45458// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5459// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45460// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45461// CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]5462// CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5463// CHECK13: cond.true:5464// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45465// CHECK13-NEXT: br label [[COND_END:%.*]]5466// CHECK13: cond.false:5467// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45468// CHECK13-NEXT: br label [[COND_END]]5469// CHECK13: cond.end:5470// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]5471// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 45472// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45473// CHECK13-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 45474// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5475// CHECK13: omp.inner.for.cond:5476// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45477// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45478// CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]5479// CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5480// CHECK13: omp.inner.for.body:5481// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45482// CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i645483// CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45484// CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i645485// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])5486// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5487// CHECK13: omp.inner.for.inc:5488// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45489// CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 45490// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]5491// CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 45492// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]5493// CHECK13: omp.inner.for.end:5494// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5495// CHECK13: omp.loop.exit:5496// CHECK13-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85497// CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 45498// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])5499// CHECK13-NEXT: br label [[OMP_PRECOND_END]]5500// CHECK13: omp.precond.end:5501// CHECK13-NEXT: ret void5502//5503//5504// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined5505// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {5506// CHECK13-NEXT: entry:5507// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85508// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85509// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 85510// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 85511// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 85512// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 85513// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 85514// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45515// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 45516// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 45517// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 45518// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 45519// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45520// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45521// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45522// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45523// CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 45524// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85525// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85526// CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 85527// CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 85528// CHECK13-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 85529// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 85530// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 85531// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 85532// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 85533// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 85534// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 45535// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 45536// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 45537// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 05538// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 15539// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 15540// CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 45541// CHECK13-NEXT: store i32 0, ptr [[I]], align 45542// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 45543// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]5544// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]5545// CHECK13: omp.precond.then:5546// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45547// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45548// CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 45549// CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 85550// CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i325551// CHECK13-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 85552// CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i325553// CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 45554// CHECK13-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 45555// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45556// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45557// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45558// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45559// CHECK13-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85560// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 45561// CHECK13-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)5562// CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]5563// CHECK13: omp.dispatch.cond:5564// CHECK13-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85565// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 45566// CHECK13-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])5567// CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 05568// CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]5569// CHECK13: omp.dispatch.body:5570// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45571// CHECK13-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 45572// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5573// CHECK13: omp.inner.for.cond:5574// CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]5575// CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]5576// CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]5577// CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5578// CHECK13: omp.inner.for.body:5579// CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]5580// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 15581// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5582// CHECK13-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]]5583// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]]5584// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i645585// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]5586// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]5587// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5588// CHECK13: omp.body.continue:5589// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5590// CHECK13: omp.inner.for.inc:5591// CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]5592// CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 15593// CHECK13-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]5594// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]5595// CHECK13: omp.inner.for.end:5596// CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]5597// CHECK13: omp.dispatch.inc:5598// CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]5599// CHECK13: omp.dispatch.end:5600// CHECK13-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85601// CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 45602// CHECK13-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP23]])5603// CHECK13-NEXT: br label [[OMP_PRECOND_END]]5604// CHECK13: omp.precond.end:5605// CHECK13-NEXT: ret void5606//5607//5608// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1685609// CHECK13-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {5610// CHECK13-NEXT: entry:5611// CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 85612// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 85613// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 85614// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 85615// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 45616// CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 85617// CHECK13-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 85618// CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 85619// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 85620// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 85621// CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 85622// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 85623// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 45624// CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 45625// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 45626// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 45627// CHECK13-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 85628// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP4]])5629// CHECK13-NEXT: ret void5630//5631//5632// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined5633// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {5634// CHECK13-NEXT: entry:5635// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85636// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85637// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 85638// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 85639// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 85640// CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 85641// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45642// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 45643// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 45644// CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 45645// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 45646// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 45647// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 45648// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45649// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45650// CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 45651// CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 85652// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85653// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85654// CHECK13-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 85655// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 85656// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 85657// CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 85658// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 85659// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 85660// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 85661// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 45662// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 45663// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45664// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 05665// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 15666// CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 15667// CHECK13-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 45668// CHECK13-NEXT: store i32 0, ptr [[I]], align 45669// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45670// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]5671// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]5672// CHECK13: omp.precond.then:5673// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 45674// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45675// CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 45676// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45677// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45678// CHECK13-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85679// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 45680// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5681// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45682// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45683// CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]5684// CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5685// CHECK13: cond.true:5686// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45687// CHECK13-NEXT: br label [[COND_END:%.*]]5688// CHECK13: cond.false:5689// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45690// CHECK13-NEXT: br label [[COND_END]]5691// CHECK13: cond.end:5692// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]5693// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 45694// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45695// CHECK13-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 45696// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5697// CHECK13: omp.inner.for.cond:5698// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45699// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45700// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]5701// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5702// CHECK13: omp.inner.for.body:5703// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45704// CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i645705// CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45706// CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i645707// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 45708// CHECK13-NEXT: store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 45709// CHECK13-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 85710// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]], i64 [[TMP21]])5711// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5712// CHECK13: omp.inner.for.inc:5713// CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45714// CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 45715// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]5716// CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 45717// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]5718// CHECK13: omp.inner.for.end:5719// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5720// CHECK13: omp.loop.exit:5721// CHECK13-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85722// CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 45723// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP25]])5724// CHECK13-NEXT: br label [[OMP_PRECOND_END]]5725// CHECK13: omp.precond.end:5726// CHECK13-NEXT: ret void5727//5728//5729// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined5730// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {5731// CHECK13-NEXT: entry:5732// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85733// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85734// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 85735// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 85736// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 85737// CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 85738// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 85739// CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 85740// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45741// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 45742// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 45743// CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 45744// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 45745// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45746// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45747// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45748// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45749// CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 45750// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85751// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85752// CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 85753// CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 85754// CHECK13-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 85755// CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 85756// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 85757// CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 85758// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 85759// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 85760// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 85761// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 45762// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 45763// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45764// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 05765// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 15766// CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 15767// CHECK13-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 45768// CHECK13-NEXT: store i32 0, ptr [[I]], align 45769// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45770// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]5771// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]5772// CHECK13: omp.precond.then:5773// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45774// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 45775// CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 45776// CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 85777// CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i325778// CHECK13-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 85779// CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i325780// CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 45781// CHECK13-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 45782// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45783// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45784// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 45785// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45786// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45787// CHECK13-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85788// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 45789// CHECK13-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])5790// CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]5791// CHECK13: omp.dispatch.cond:5792// CHECK13-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85793// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 45794// CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])5795// CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 05796// CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]5797// CHECK13: omp.dispatch.body:5798// CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45799// CHECK13-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 45800// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5801// CHECK13: omp.inner.for.cond:5802// CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]5803// CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]5804// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]5805// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5806// CHECK13: omp.inner.for.body:5807// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]5808// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 15809// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5810// CHECK13-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]]5811// CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]]5812// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i645813// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]5814// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]5815// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5816// CHECK13: omp.body.continue:5817// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5818// CHECK13: omp.inner.for.inc:5819// CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]5820// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], 15821// CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]5822// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]5823// CHECK13: omp.inner.for.end:5824// CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]5825// CHECK13: omp.dispatch.inc:5826// CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]5827// CHECK13: omp.dispatch.end:5828// CHECK13-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85829// CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 45830// CHECK13-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP24]])5831// CHECK13-NEXT: br label [[OMP_PRECOND_END]]5832// CHECK13: omp.precond.end:5833// CHECK13-NEXT: ret void5834//5835//5836// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_5837// CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {5838// CHECK13-NEXT: entry:5839// CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 45840// CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 45841// CHECK13-NEXT: [[M:%.*]] = alloca i32, align 45842// CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 85843// CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 85844// CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 85845// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 45846// CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 85847// CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 85848// CHECK13-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 85849// CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 85850// CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 45851// CHECK13-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85852// CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 85853// CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 85854// CHECK13-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 85855// CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 85856// CHECK13-NEXT: [[_TMP11:%.*]] = alloca i32, align 45857// CHECK13-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85858// CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 85859// CHECK13-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 85860// CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 85861// CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 45862// CHECK13-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85863// CHECK13-NEXT: [[M_CASTED22:%.*]] = alloca i64, align 85864// CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [2 x ptr], align 85865// CHECK13-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [2 x ptr], align 85866// CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [2 x ptr], align 85867// CHECK13-NEXT: [[_TMP26:%.*]] = alloca i32, align 45868// CHECK13-NEXT: [[KERNEL_ARGS27:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85869// CHECK13-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 45870// CHECK13-NEXT: store i32 10, ptr [[M]], align 45871// CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 05872// CHECK13-NEXT: store ptr [[A]], ptr [[TMP0]], align 85873// CHECK13-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 05874// CHECK13-NEXT: store ptr [[A]], ptr [[TMP1]], align 85875// CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 05876// CHECK13-NEXT: store ptr null, ptr [[TMP2]], align 85877// CHECK13-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 05878// CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 05879// CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 05880// CHECK13-NEXT: store i32 3, ptr [[TMP5]], align 45881// CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 15882// CHECK13-NEXT: store i32 1, ptr [[TMP6]], align 45883// CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 25884// CHECK13-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 85885// CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 35886// CHECK13-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 85887// CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 45888// CHECK13-NEXT: store ptr @.offload_sizes.9, ptr [[TMP9]], align 85889// CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 55890// CHECK13-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP10]], align 85891// CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 65892// CHECK13-NEXT: store ptr null, ptr [[TMP11]], align 85893// CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 75894// CHECK13-NEXT: store ptr null, ptr [[TMP12]], align 85895// CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 85896// CHECK13-NEXT: store i64 10, ptr [[TMP13]], align 85897// CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 95898// CHECK13-NEXT: store i64 0, ptr [[TMP14]], align 85899// CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 105900// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 45901// CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 115902// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 45903// CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 125904// CHECK13-NEXT: store i32 0, ptr [[TMP17]], align 45905// CHECK13-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS]])5906// CHECK13-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 05907// CHECK13-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]5908// CHECK13: omp_offload.failed:5909// CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]]5910// CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]5911// CHECK13: omp_offload.cont:5912// CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 05913// CHECK13-NEXT: store ptr [[A]], ptr [[TMP20]], align 85914// CHECK13-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 05915// CHECK13-NEXT: store ptr [[A]], ptr [[TMP21]], align 85916// CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 05917// CHECK13-NEXT: store ptr null, ptr [[TMP22]], align 85918// CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 05919// CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 05920// CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 05921// CHECK13-NEXT: store i32 3, ptr [[TMP25]], align 45922// CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 15923// CHECK13-NEXT: store i32 1, ptr [[TMP26]], align 45924// CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 25925// CHECK13-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 85926// CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 35927// CHECK13-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 85928// CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 45929// CHECK13-NEXT: store ptr @.offload_sizes.11, ptr [[TMP29]], align 85930// CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 55931// CHECK13-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP30]], align 85932// CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 65933// CHECK13-NEXT: store ptr null, ptr [[TMP31]], align 85934// CHECK13-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 75935// CHECK13-NEXT: store ptr null, ptr [[TMP32]], align 85936// CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 85937// CHECK13-NEXT: store i64 10, ptr [[TMP33]], align 85938// CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 95939// CHECK13-NEXT: store i64 0, ptr [[TMP34]], align 85940// CHECK13-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 105941// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 45942// CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 115943// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 45944// CHECK13-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 125945// CHECK13-NEXT: store i32 0, ptr [[TMP37]], align 45946// CHECK13-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, ptr [[KERNEL_ARGS5]])5947// CHECK13-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 05948// CHECK13-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]5949// CHECK13: omp_offload.failed6:5950// CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121(ptr [[A]]) #[[ATTR3]]5951// CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT7]]5952// CHECK13: omp_offload.cont7:5953// CHECK13-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 45954// CHECK13-NEXT: store i32 [[TMP40]], ptr [[M_CASTED]], align 45955// CHECK13-NEXT: [[TMP41:%.*]] = load i64, ptr [[M_CASTED]], align 85956// CHECK13-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 05957// CHECK13-NEXT: store i64 [[TMP41]], ptr [[TMP42]], align 85958// CHECK13-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 05959// CHECK13-NEXT: store i64 [[TMP41]], ptr [[TMP43]], align 85960// CHECK13-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 05961// CHECK13-NEXT: store ptr null, ptr [[TMP44]], align 85962// CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 15963// CHECK13-NEXT: store ptr [[A]], ptr [[TMP45]], align 85964// CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 15965// CHECK13-NEXT: store ptr [[A]], ptr [[TMP46]], align 85966// CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 15967// CHECK13-NEXT: store ptr null, ptr [[TMP47]], align 85968// CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 05969// CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 05970// CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 05971// CHECK13-NEXT: store i32 3, ptr [[TMP50]], align 45972// CHECK13-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 15973// CHECK13-NEXT: store i32 2, ptr [[TMP51]], align 45974// CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 25975// CHECK13-NEXT: store ptr [[TMP48]], ptr [[TMP52]], align 85976// CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 35977// CHECK13-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 85978// CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 45979// CHECK13-NEXT: store ptr @.offload_sizes.13, ptr [[TMP54]], align 85980// CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 55981// CHECK13-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP55]], align 85982// CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 65983// CHECK13-NEXT: store ptr null, ptr [[TMP56]], align 85984// CHECK13-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 75985// CHECK13-NEXT: store ptr null, ptr [[TMP57]], align 85986// CHECK13-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 85987// CHECK13-NEXT: store i64 10, ptr [[TMP58]], align 85988// CHECK13-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 95989// CHECK13-NEXT: store i64 0, ptr [[TMP59]], align 85990// CHECK13-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 105991// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP60]], align 45992// CHECK13-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 115993// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 45994// CHECK13-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 125995// CHECK13-NEXT: store i32 0, ptr [[TMP62]], align 45996// CHECK13-NEXT: [[TMP63:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, ptr [[KERNEL_ARGS12]])5997// CHECK13-NEXT: [[TMP64:%.*]] = icmp ne i32 [[TMP63]], 05998// CHECK13-NEXT: br i1 [[TMP64]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]5999// CHECK13: omp_offload.failed13:6000// CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP41]], ptr [[A]]) #[[ATTR3]]6001// CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT14]]6002// CHECK13: omp_offload.cont14:6003// CHECK13-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 06004// CHECK13-NEXT: store ptr [[A]], ptr [[TMP65]], align 86005// CHECK13-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 06006// CHECK13-NEXT: store ptr [[A]], ptr [[TMP66]], align 86007// CHECK13-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 06008// CHECK13-NEXT: store ptr null, ptr [[TMP67]], align 86009// CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 06010// CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 06011// CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 06012// CHECK13-NEXT: store i32 3, ptr [[TMP70]], align 46013// CHECK13-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 16014// CHECK13-NEXT: store i32 1, ptr [[TMP71]], align 46015// CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 26016// CHECK13-NEXT: store ptr [[TMP68]], ptr [[TMP72]], align 86017// CHECK13-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 36018// CHECK13-NEXT: store ptr [[TMP69]], ptr [[TMP73]], align 86019// CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 46020// CHECK13-NEXT: store ptr @.offload_sizes.15, ptr [[TMP74]], align 86021// CHECK13-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 56022// CHECK13-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP75]], align 86023// CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 66024// CHECK13-NEXT: store ptr null, ptr [[TMP76]], align 86025// CHECK13-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 76026// CHECK13-NEXT: store ptr null, ptr [[TMP77]], align 86027// CHECK13-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 86028// CHECK13-NEXT: store i64 10, ptr [[TMP78]], align 86029// CHECK13-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 96030// CHECK13-NEXT: store i64 0, ptr [[TMP79]], align 86031// CHECK13-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 106032// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP80]], align 46033// CHECK13-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 116034// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP81]], align 46035// CHECK13-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 126036// CHECK13-NEXT: store i32 0, ptr [[TMP82]], align 46037// CHECK13-NEXT: [[TMP83:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, ptr [[KERNEL_ARGS19]])6038// CHECK13-NEXT: [[TMP84:%.*]] = icmp ne i32 [[TMP83]], 06039// CHECK13-NEXT: br i1 [[TMP84]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]6040// CHECK13: omp_offload.failed20:6041// CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131(ptr [[A]]) #[[ATTR3]]6042// CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT21]]6043// CHECK13: omp_offload.cont21:6044// CHECK13-NEXT: [[TMP85:%.*]] = load i32, ptr [[M]], align 46045// CHECK13-NEXT: store i32 [[TMP85]], ptr [[M_CASTED22]], align 46046// CHECK13-NEXT: [[TMP86:%.*]] = load i64, ptr [[M_CASTED22]], align 86047// CHECK13-NEXT: [[TMP87:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 06048// CHECK13-NEXT: store i64 [[TMP86]], ptr [[TMP87]], align 86049// CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 06050// CHECK13-NEXT: store i64 [[TMP86]], ptr [[TMP88]], align 86051// CHECK13-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 06052// CHECK13-NEXT: store ptr null, ptr [[TMP89]], align 86053// CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 16054// CHECK13-NEXT: store ptr [[A]], ptr [[TMP90]], align 86055// CHECK13-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 16056// CHECK13-NEXT: store ptr [[A]], ptr [[TMP91]], align 86057// CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 16058// CHECK13-NEXT: store ptr null, ptr [[TMP92]], align 86059// CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 06060// CHECK13-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 06061// CHECK13-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 06062// CHECK13-NEXT: store i32 3, ptr [[TMP95]], align 46063// CHECK13-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 16064// CHECK13-NEXT: store i32 2, ptr [[TMP96]], align 46065// CHECK13-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 26066// CHECK13-NEXT: store ptr [[TMP93]], ptr [[TMP97]], align 86067// CHECK13-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 36068// CHECK13-NEXT: store ptr [[TMP94]], ptr [[TMP98]], align 86069// CHECK13-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 46070// CHECK13-NEXT: store ptr @.offload_sizes.17, ptr [[TMP99]], align 86071// CHECK13-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 56072// CHECK13-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP100]], align 86073// CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 66074// CHECK13-NEXT: store ptr null, ptr [[TMP101]], align 86075// CHECK13-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 76076// CHECK13-NEXT: store ptr null, ptr [[TMP102]], align 86077// CHECK13-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 86078// CHECK13-NEXT: store i64 10, ptr [[TMP103]], align 86079// CHECK13-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 96080// CHECK13-NEXT: store i64 0, ptr [[TMP104]], align 86081// CHECK13-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 106082// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP105]], align 46083// CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 116084// CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP106]], align 46085// CHECK13-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 126086// CHECK13-NEXT: store i32 0, ptr [[TMP107]], align 46087// CHECK13-NEXT: [[TMP108:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, ptr [[KERNEL_ARGS27]])6088// CHECK13-NEXT: [[TMP109:%.*]] = icmp ne i32 [[TMP108]], 06089// CHECK13-NEXT: br i1 [[TMP109]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]6090// CHECK13: omp_offload.failed28:6091// CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP86]], ptr [[A]]) #[[ATTR3]]6092// CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT29]]6093// CHECK13: omp_offload.cont29:6094// CHECK13-NEXT: ret i32 06095//6096//6097// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l1166098// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {6099// CHECK13-NEXT: entry:6100// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86101// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86102// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86103// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]])6104// CHECK13-NEXT: ret void6105//6106//6107// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined6108// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {6109// CHECK13-NEXT: entry:6110// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86111// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86112// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86113// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46114// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 46115// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 46116// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 46117// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46118// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46119// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 46120// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86121// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86122// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86123// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86124// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 46125// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 46126// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46127// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46128// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86129// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 46130// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6131// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46132// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 96133// CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6134// CHECK13: cond.true:6135// CHECK13-NEXT: br label [[COND_END:%.*]]6136// CHECK13: cond.false:6137// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46138// CHECK13-NEXT: br label [[COND_END]]6139// CHECK13: cond.end:6140// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]6141// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 46142// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46143// CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 46144// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6145// CHECK13: omp.inner.for.cond:6146// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46147// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46148// CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]6149// CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6150// CHECK13: omp.inner.for.body:6151// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46152// CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i646153// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46154// CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i646155// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])6156// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6157// CHECK13: omp.inner.for.inc:6158// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46159// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46160// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]6161// CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 46162// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]6163// CHECK13: omp.inner.for.end:6164// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6165// CHECK13: omp.loop.exit:6166// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])6167// CHECK13-NEXT: ret void6168//6169//6170// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined6171// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {6172// CHECK13-NEXT: entry:6173// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86174// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86175// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 86176// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 86177// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86178// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46179// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 46180// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46181// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46182// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46183// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46184// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 46185// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86186// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86187// CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 86188// CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 86189// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86190// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86191// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46192// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 46193// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 86194// CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i326195// CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 86196// CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i326197// CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 46198// CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 46199// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46200// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46201// CHECK13-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86202// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 46203// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6204// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46205// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 96206// CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6207// CHECK13: cond.true:6208// CHECK13-NEXT: br label [[COND_END:%.*]]6209// CHECK13: cond.false:6210// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46211// CHECK13-NEXT: br label [[COND_END]]6212// CHECK13: cond.end:6213// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]6214// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 46215// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46216// CHECK13-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 46217// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6218// CHECK13: omp.inner.for.cond:6219// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46220// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46221// CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]6222// CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6223// CHECK13: omp.inner.for.body:6224// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46225// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 16226// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6227// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 46228// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 46229// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i646230// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]6231// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 46232// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6233// CHECK13: omp.body.continue:6234// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6235// CHECK13: omp.inner.for.inc:6236// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46237// CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 16238// CHECK13-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 46239// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]6240// CHECK13: omp.inner.for.end:6241// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6242// CHECK13: omp.loop.exit:6243// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])6244// CHECK13-NEXT: ret void6245//6246//6247// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l1216248// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {6249// CHECK13-NEXT: entry:6250// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86251// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86252// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86253// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined, ptr [[TMP0]])6254// CHECK13-NEXT: ret void6255//6256//6257// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined6258// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {6259// CHECK13-NEXT: entry:6260// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86261// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86262// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86263// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46264// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 46265// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 46266// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 46267// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46268// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46269// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 46270// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86271// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86272// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86273// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86274// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 46275// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 46276// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46277// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46278// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86279// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 46280// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6281// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46282// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 96283// CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6284// CHECK13: cond.true:6285// CHECK13-NEXT: br label [[COND_END:%.*]]6286// CHECK13: cond.false:6287// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46288// CHECK13-NEXT: br label [[COND_END]]6289// CHECK13: cond.end:6290// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]6291// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 46292// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46293// CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 46294// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6295// CHECK13: omp.inner.for.cond:6296// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46297// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46298// CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]6299// CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6300// CHECK13: omp.inner.for.body:6301// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46302// CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i646303// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46304// CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i646305// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])6306// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6307// CHECK13: omp.inner.for.inc:6308// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46309// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46310// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]6311// CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 46312// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]6313// CHECK13: omp.inner.for.end:6314// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6315// CHECK13: omp.loop.exit:6316// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])6317// CHECK13-NEXT: ret void6318//6319//6320// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined6321// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {6322// CHECK13-NEXT: entry:6323// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86324// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86325// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 86326// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 86327// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86328// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46329// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 46330// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46331// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46332// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46333// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46334// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 46335// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86336// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86337// CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 86338// CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 86339// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86340// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86341// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46342// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 46343// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 86344// CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i326345// CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 86346// CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i326347// CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 46348// CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 46349// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46350// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46351// CHECK13-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86352// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 46353// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6354// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46355// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 96356// CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6357// CHECK13: cond.true:6358// CHECK13-NEXT: br label [[COND_END:%.*]]6359// CHECK13: cond.false:6360// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46361// CHECK13-NEXT: br label [[COND_END]]6362// CHECK13: cond.end:6363// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]6364// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 46365// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46366// CHECK13-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 46367// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6368// CHECK13: omp.inner.for.cond:6369// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46370// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46371// CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]6372// CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6373// CHECK13: omp.inner.for.body:6374// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46375// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 16376// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6377// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 46378// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 46379// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i646380// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]6381// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 46382// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6383// CHECK13: omp.body.continue:6384// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6385// CHECK13: omp.inner.for.inc:6386// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46387// CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 16388// CHECK13-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 46389// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]6390// CHECK13: omp.inner.for.end:6391// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6392// CHECK13: omp.loop.exit:6393// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])6394// CHECK13-NEXT: ret void6395//6396//6397// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l1266398// CHECK13-SAME: (i64 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {6399// CHECK13-NEXT: entry:6400// CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 86401// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86402// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 46403// CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 86404// CHECK13-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 86405// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86406// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86407// CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 46408// CHECK13-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 46409// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 46410// CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 46411// CHECK13-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 86412// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined, ptr [[TMP0]], i64 [[TMP3]])6413// CHECK13-NEXT: ret void6414//6415//6416// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined6417// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {6418// CHECK13-NEXT: entry:6419// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86420// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86421// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86422// CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 86423// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46424// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 46425// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 46426// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 46427// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46428// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46429// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 46430// CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 86431// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86432// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86433// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86434// CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 86435// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86436// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 46437// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 46438// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46439// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46440// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86441// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 46442// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6443// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46444// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 96445// CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6446// CHECK13: cond.true:6447// CHECK13-NEXT: br label [[COND_END:%.*]]6448// CHECK13: cond.false:6449// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46450// CHECK13-NEXT: br label [[COND_END]]6451// CHECK13: cond.end:6452// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]6453// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 46454// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46455// CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 46456// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6457// CHECK13: omp.inner.for.cond:6458// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46459// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46460// CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]6461// CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6462// CHECK13: omp.inner.for.body:6463// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46464// CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i646465// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46466// CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i646467// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 46468// CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 46469// CHECK13-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 86470// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]])6471// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6472// CHECK13: omp.inner.for.inc:6473// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46474// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46475// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]6476// CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 46477// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]6478// CHECK13: omp.inner.for.end:6479// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6480// CHECK13: omp.loop.exit:6481// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])6482// CHECK13-NEXT: ret void6483//6484//6485// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined6486// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {6487// CHECK13-NEXT: entry:6488// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86489// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86490// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 86491// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 86492// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86493// CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 86494// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46495// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 46496// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46497// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46498// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46499// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46500// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 46501// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86502// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86503// CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 86504// CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 86505// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86506// CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 86507// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86508// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46509// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 46510// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 86511// CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i326512// CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 86513// CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i326514// CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 46515// CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 46516// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46517// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46518// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 46519// CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86520// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 46521// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])6522// CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]6523// CHECK13: omp.dispatch.cond:6524// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46525// CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 86526// CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP7]] to i326527// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV2]]6528// CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6529// CHECK13: cond.true:6530// CHECK13-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 86531// CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i326532// CHECK13-NEXT: br label [[COND_END:%.*]]6533// CHECK13: cond.false:6534// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46535// CHECK13-NEXT: br label [[COND_END]]6536// CHECK13: cond.end:6537// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]6538// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 46539// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46540// CHECK13-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 46541// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46542// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46543// CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]6544// CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]6545// CHECK13: omp.dispatch.body:6546// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6547// CHECK13: omp.inner.for.cond:6548// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46549// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46550// CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]6551// CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6552// CHECK13: omp.inner.for.body:6553// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46554// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 16555// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6556// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 46557// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 46558// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i646559// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]6560// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 46561// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6562// CHECK13: omp.body.continue:6563// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6564// CHECK13: omp.inner.for.inc:6565// CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46566// CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 16567// CHECK13-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 46568// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]6569// CHECK13: omp.inner.for.end:6570// CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]6571// CHECK13: omp.dispatch.inc:6572// CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46573// CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46574// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]6575// CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 46576// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46577// CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46578// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]6579// CHECK13-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 46580// CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]6581// CHECK13: omp.dispatch.end:6582// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]])6583// CHECK13-NEXT: ret void6584//6585//6586// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l1316587// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {6588// CHECK13-NEXT: entry:6589// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86590// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86591// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86592// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined, ptr [[TMP0]])6593// CHECK13-NEXT: ret void6594//6595//6596// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined6597// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {6598// CHECK13-NEXT: entry:6599// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86600// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86601// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86602// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46603// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 46604// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 46605// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 46606// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46607// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46608// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 46609// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86610// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86611// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86612// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86613// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 46614// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 46615// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46616// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46617// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86618// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 46619// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6620// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46621// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 96622// CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6623// CHECK13: cond.true:6624// CHECK13-NEXT: br label [[COND_END:%.*]]6625// CHECK13: cond.false:6626// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46627// CHECK13-NEXT: br label [[COND_END]]6628// CHECK13: cond.end:6629// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]6630// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 46631// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46632// CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 46633// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6634// CHECK13: omp.inner.for.cond:6635// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46636// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46637// CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]6638// CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6639// CHECK13: omp.inner.for.body:6640// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46641// CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i646642// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46643// CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i646644// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])6645// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6646// CHECK13: omp.inner.for.inc:6647// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46648// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46649// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]6650// CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 46651// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]6652// CHECK13: omp.inner.for.end:6653// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6654// CHECK13: omp.loop.exit:6655// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])6656// CHECK13-NEXT: ret void6657//6658//6659// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined6660// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {6661// CHECK13-NEXT: entry:6662// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86663// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86664// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 86665// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 86666// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86667// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46668// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 46669// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46670// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46671// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46672// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46673// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 46674// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86675// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86676// CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 86677// CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 86678// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86679// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86680// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46681// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 46682// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 86683// CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i326684// CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 86685// CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i326686// CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 46687// CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 46688// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46689// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46690// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46691// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46692// CHECK13-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86693// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 46694// CHECK13-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)6695// CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]6696// CHECK13: omp.dispatch.cond:6697// CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])6698// CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 06699// CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]6700// CHECK13: omp.dispatch.body:6701// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46702// CHECK13-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 46703// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6704// CHECK13: omp.inner.for.cond:6705// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]6706// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]6707// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]6708// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6709// CHECK13: omp.inner.for.body:6710// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]6711// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 16712// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6713// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]6714// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]6715// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i646716// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]6717// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]]6718// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6719// CHECK13: omp.body.continue:6720// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6721// CHECK13: omp.inner.for.inc:6722// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]6723// CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 16724// CHECK13-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]6725// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]6726// CHECK13: omp.inner.for.end:6727// CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]6728// CHECK13: omp.dispatch.inc:6729// CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]6730// CHECK13: omp.dispatch.end:6731// CHECK13-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]])6732// CHECK13-NEXT: ret void6733//6734//6735// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l1366736// CHECK13-SAME: (i64 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {6737// CHECK13-NEXT: entry:6738// CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 86739// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86740// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 46741// CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 86742// CHECK13-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 86743// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86744// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86745// CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 46746// CHECK13-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 46747// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 46748// CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 46749// CHECK13-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 86750// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined, ptr [[TMP0]], i64 [[TMP3]])6751// CHECK13-NEXT: ret void6752//6753//6754// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined6755// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {6756// CHECK13-NEXT: entry:6757// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86758// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86759// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86760// CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 86761// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46762// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 46763// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 46764// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 46765// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46766// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46767// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 46768// CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 86769// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86770// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86771// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86772// CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 86773// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86774// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 46775// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 46776// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46777// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46778// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86779// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 46780// CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6781// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46782// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 96783// CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6784// CHECK13: cond.true:6785// CHECK13-NEXT: br label [[COND_END:%.*]]6786// CHECK13: cond.false:6787// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46788// CHECK13-NEXT: br label [[COND_END]]6789// CHECK13: cond.end:6790// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]6791// CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 46792// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46793// CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 46794// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6795// CHECK13: omp.inner.for.cond:6796// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46797// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46798// CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]6799// CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6800// CHECK13: omp.inner.for.body:6801// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46802// CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i646803// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46804// CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i646805// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 46806// CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 46807// CHECK13-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 86808// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]])6809// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6810// CHECK13: omp.inner.for.inc:6811// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46812// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46813// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]6814// CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 46815// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]6816// CHECK13: omp.inner.for.end:6817// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6818// CHECK13: omp.loop.exit:6819// CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])6820// CHECK13-NEXT: ret void6821//6822//6823// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined6824// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {6825// CHECK13-NEXT: entry:6826// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86827// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86828// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 86829// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 86830// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 86831// CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 86832// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46833// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 46834// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46835// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46836// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46837// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46838// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 46839// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86840// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86841// CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 86842// CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 86843// CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 86844// CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 86845// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86846// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46847// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 46848// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 86849// CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i326850// CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 86851// CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i326852// CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 46853// CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 46854// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46855// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46856// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 46857// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46858// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46859// CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86860// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 46861// CHECK13-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])6862// CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]6863// CHECK13: omp.dispatch.cond:6864// CHECK13-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])6865// CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 06866// CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]6867// CHECK13: omp.dispatch.body:6868// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46869// CHECK13-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 46870// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6871// CHECK13: omp.inner.for.cond:6872// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]6873// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]]6874// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]6875// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6876// CHECK13: omp.inner.for.body:6877// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]6878// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 16879// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6880// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]6881// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]6882// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i646883// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]6884// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]]6885// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6886// CHECK13: omp.body.continue:6887// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6888// CHECK13: omp.inner.for.inc:6889// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]6890// CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], 16891// CHECK13-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]6892// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]6893// CHECK13: omp.inner.for.end:6894// CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]6895// CHECK13: omp.dispatch.inc:6896// CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]6897// CHECK13: omp.dispatch.end:6898// CHECK13-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP7]])6899// CHECK13-NEXT: ret void6900//6901//6902// CHECK15-LABEL: define {{[^@]+}}@main6903// CHECK15-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {6904// CHECK15-NEXT: entry:6905// CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 46906// CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 46907// CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 46908// CHECK15-NEXT: [[N:%.*]] = alloca i32, align 46909// CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 46910// CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 46911// CHECK15-NEXT: [[M:%.*]] = alloca i32, align 46912// CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 46913// CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 46914// CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 46915// CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 46916// CHECK15-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 46917// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 46918// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 46919// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 46920// CHECK15-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 86921// CHECK15-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 46922// CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 46923// CHECK15-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 46924// CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 46925// CHECK15-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 46926// CHECK15-NEXT: [[_TMP8:%.*]] = alloca i32, align 46927// CHECK15-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 46928// CHECK15-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 46929// CHECK15-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 86930// CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i32, align 46931// CHECK15-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 46932// CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x ptr], align 46933// CHECK15-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x ptr], align 46934// CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x ptr], align 46935// CHECK15-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 46936// CHECK15-NEXT: [[_TMP23:%.*]] = alloca i32, align 46937// CHECK15-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 46938// CHECK15-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 46939// CHECK15-NEXT: [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 86940// CHECK15-NEXT: [[N_CASTED33:%.*]] = alloca i32, align 46941// CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [3 x ptr], align 46942// CHECK15-NEXT: [[DOTOFFLOAD_PTRS35:%.*]] = alloca [3 x ptr], align 46943// CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [3 x ptr], align 46944// CHECK15-NEXT: [[DOTOFFLOAD_SIZES37:%.*]] = alloca [3 x i64], align 46945// CHECK15-NEXT: [[_TMP38:%.*]] = alloca i32, align 46946// CHECK15-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 46947// CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 46948// CHECK15-NEXT: [[KERNEL_ARGS45:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 86949// CHECK15-NEXT: [[M_CASTED48:%.*]] = alloca i32, align 46950// CHECK15-NEXT: [[N_CASTED49:%.*]] = alloca i32, align 46951// CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [4 x ptr], align 46952// CHECK15-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [4 x ptr], align 46953// CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [4 x ptr], align 46954// CHECK15-NEXT: [[DOTOFFLOAD_SIZES53:%.*]] = alloca [4 x i64], align 46955// CHECK15-NEXT: [[_TMP54:%.*]] = alloca i32, align 46956// CHECK15-NEXT: [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 46957// CHECK15-NEXT: [[DOTCAPTURE_EXPR_56:%.*]] = alloca i32, align 46958// CHECK15-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 86959// CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 46960// CHECK15-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 46961// CHECK15-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 46962// CHECK15-NEXT: store i32 100, ptr [[N]], align 46963// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 46964// CHECK15-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()6965// CHECK15-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 46966// CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 46967// CHECK15-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 46968// CHECK15-NEXT: store i32 10, ptr [[M]], align 46969// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 46970// CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 46971// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 46972// CHECK15-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 46973// CHECK15-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i646974// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false)6975// CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 06976// CHECK15-NEXT: store i32 [[TMP3]], ptr [[TMP6]], align 46977// CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 06978// CHECK15-NEXT: store i32 [[TMP3]], ptr [[TMP7]], align 46979// CHECK15-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 06980// CHECK15-NEXT: store ptr null, ptr [[TMP8]], align 46981// CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 16982// CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 46983// CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 16984// CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP10]], align 46985// CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 16986// CHECK15-NEXT: store ptr null, ptr [[TMP11]], align 46987// CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 26988// CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 46989// CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 26990// CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 46991// CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 26992// CHECK15-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 46993// CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 26994// CHECK15-NEXT: store ptr null, ptr [[TMP15]], align 46995// CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 06996// CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 06997// CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 06998// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 46999// CHECK15-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 47000// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 47001// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 07002// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 17003// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 17004// CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 47005// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47006// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 17007// CHECK15-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i647008// CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 07009// CHECK15-NEXT: store i32 3, ptr [[TMP23]], align 47010// CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 17011// CHECK15-NEXT: store i32 3, ptr [[TMP24]], align 47012// CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 27013// CHECK15-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 47014// CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 37015// CHECK15-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 47016// CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 47017// CHECK15-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 47018// CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 57019// CHECK15-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 47020// CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 67021// CHECK15-NEXT: store ptr null, ptr [[TMP29]], align 47022// CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 77023// CHECK15-NEXT: store ptr null, ptr [[TMP30]], align 47024// CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 87025// CHECK15-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 87026// CHECK15-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 97027// CHECK15-NEXT: store i64 0, ptr [[TMP32]], align 87028// CHECK15-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 107029// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 47030// CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 117031// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 47032// CHECK15-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 127033// CHECK15-NEXT: store i32 0, ptr [[TMP35]], align 47034// CHECK15-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, ptr [[KERNEL_ARGS]])7035// CHECK15-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 07036// CHECK15-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]7037// CHECK15: omp_offload.failed:7038// CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]7039// CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]]7040// CHECK15: omp_offload.cont:7041// CHECK15-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 47042// CHECK15-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 47043// CHECK15-NEXT: [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 47044// CHECK15-NEXT: [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 47045// CHECK15-NEXT: [[TMP41:%.*]] = sext i32 [[TMP40]] to i647046// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false)7047// CHECK15-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 07048// CHECK15-NEXT: store i32 [[TMP39]], ptr [[TMP42]], align 47049// CHECK15-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 07050// CHECK15-NEXT: store i32 [[TMP39]], ptr [[TMP43]], align 47051// CHECK15-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 07052// CHECK15-NEXT: store ptr null, ptr [[TMP44]], align 47053// CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 17054// CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP45]], align 47055// CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 17056// CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP46]], align 47057// CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 17058// CHECK15-NEXT: store ptr null, ptr [[TMP47]], align 47059// CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 27060// CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 47061// CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 27062// CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP49]], align 47063// CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 27064// CHECK15-NEXT: store i64 [[TMP41]], ptr [[TMP50]], align 47065// CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 27066// CHECK15-NEXT: store ptr null, ptr [[TMP51]], align 47067// CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 07068// CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 07069// CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 07070// CHECK15-NEXT: [[TMP55:%.*]] = load i32, ptr [[N]], align 47071// CHECK15-NEXT: store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 47072// CHECK15-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 47073// CHECK15-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 07074// CHECK15-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 17075// CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 17076// CHECK15-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 47077// CHECK15-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 47078// CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP57]], 17079// CHECK15-NEXT: [[TMP58:%.*]] = zext i32 [[ADD14]] to i647080// CHECK15-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 07081// CHECK15-NEXT: store i32 3, ptr [[TMP59]], align 47082// CHECK15-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 17083// CHECK15-NEXT: store i32 3, ptr [[TMP60]], align 47084// CHECK15-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 27085// CHECK15-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 47086// CHECK15-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 37087// CHECK15-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 47088// CHECK15-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 47089// CHECK15-NEXT: store ptr [[TMP54]], ptr [[TMP63]], align 47090// CHECK15-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 57091// CHECK15-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP64]], align 47092// CHECK15-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 67093// CHECK15-NEXT: store ptr null, ptr [[TMP65]], align 47094// CHECK15-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 77095// CHECK15-NEXT: store ptr null, ptr [[TMP66]], align 47096// CHECK15-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 87097// CHECK15-NEXT: store i64 [[TMP58]], ptr [[TMP67]], align 87098// CHECK15-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 97099// CHECK15-NEXT: store i64 0, ptr [[TMP68]], align 87100// CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 107101// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 47102// CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 117103// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP70]], align 47104// CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 127105// CHECK15-NEXT: store i32 0, ptr [[TMP71]], align 47106// CHECK15-NEXT: [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, ptr [[KERNEL_ARGS15]])7107// CHECK15-NEXT: [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 07108// CHECK15-NEXT: br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]7109// CHECK15: omp_offload.failed16:7110// CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]7111// CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT17]]7112// CHECK15: omp_offload.cont17:7113// CHECK15-NEXT: [[TMP74:%.*]] = load i32, ptr [[M]], align 47114// CHECK15-NEXT: store i32 [[TMP74]], ptr [[M_CASTED]], align 47115// CHECK15-NEXT: [[TMP75:%.*]] = load i32, ptr [[M_CASTED]], align 47116// CHECK15-NEXT: [[TMP76:%.*]] = load i32, ptr [[N]], align 47117// CHECK15-NEXT: store i32 [[TMP76]], ptr [[N_CASTED18]], align 47118// CHECK15-NEXT: [[TMP77:%.*]] = load i32, ptr [[N_CASTED18]], align 47119// CHECK15-NEXT: [[TMP78:%.*]] = mul nuw i32 [[TMP0]], 47120// CHECK15-NEXT: [[TMP79:%.*]] = sext i32 [[TMP78]] to i647121// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES22]], ptr align 4 @.offload_sizes.3, i32 32, i1 false)7122// CHECK15-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 07123// CHECK15-NEXT: store i32 [[TMP75]], ptr [[TMP80]], align 47124// CHECK15-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 07125// CHECK15-NEXT: store i32 [[TMP75]], ptr [[TMP81]], align 47126// CHECK15-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 07127// CHECK15-NEXT: store ptr null, ptr [[TMP82]], align 47128// CHECK15-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 17129// CHECK15-NEXT: store i32 [[TMP77]], ptr [[TMP83]], align 47130// CHECK15-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 17131// CHECK15-NEXT: store i32 [[TMP77]], ptr [[TMP84]], align 47132// CHECK15-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 17133// CHECK15-NEXT: store ptr null, ptr [[TMP85]], align 47134// CHECK15-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 27135// CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP86]], align 47136// CHECK15-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 27137// CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP87]], align 47138// CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 27139// CHECK15-NEXT: store ptr null, ptr [[TMP88]], align 47140// CHECK15-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 37141// CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP89]], align 47142// CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 37143// CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP90]], align 47144// CHECK15-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 37145// CHECK15-NEXT: store i64 [[TMP79]], ptr [[TMP91]], align 47146// CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 37147// CHECK15-NEXT: store ptr null, ptr [[TMP92]], align 47148// CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 07149// CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 07150// CHECK15-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 07151// CHECK15-NEXT: [[TMP96:%.*]] = load i32, ptr [[N]], align 47152// CHECK15-NEXT: store i32 [[TMP96]], ptr [[DOTCAPTURE_EXPR_24]], align 47153// CHECK15-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 47154// CHECK15-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP97]], 07155// CHECK15-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 17156// CHECK15-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 17157// CHECK15-NEXT: store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 47158// CHECK15-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 47159// CHECK15-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP98]], 17160// CHECK15-NEXT: [[TMP99:%.*]] = zext i32 [[ADD29]] to i647161// CHECK15-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 07162// CHECK15-NEXT: store i32 3, ptr [[TMP100]], align 47163// CHECK15-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 17164// CHECK15-NEXT: store i32 4, ptr [[TMP101]], align 47165// CHECK15-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 27166// CHECK15-NEXT: store ptr [[TMP93]], ptr [[TMP102]], align 47167// CHECK15-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 37168// CHECK15-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 47169// CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 47170// CHECK15-NEXT: store ptr [[TMP95]], ptr [[TMP104]], align 47171// CHECK15-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 57172// CHECK15-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP105]], align 47173// CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 67174// CHECK15-NEXT: store ptr null, ptr [[TMP106]], align 47175// CHECK15-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 77176// CHECK15-NEXT: store ptr null, ptr [[TMP107]], align 47177// CHECK15-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 87178// CHECK15-NEXT: store i64 [[TMP99]], ptr [[TMP108]], align 87179// CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 97180// CHECK15-NEXT: store i64 0, ptr [[TMP109]], align 87181// CHECK15-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 107182// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP110]], align 47183// CHECK15-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 117184// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP111]], align 47185// CHECK15-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 127186// CHECK15-NEXT: store i32 0, ptr [[TMP112]], align 47187// CHECK15-NEXT: [[TMP113:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, ptr [[KERNEL_ARGS30]])7188// CHECK15-NEXT: [[TMP114:%.*]] = icmp ne i32 [[TMP113]], 07189// CHECK15-NEXT: br i1 [[TMP114]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]7190// CHECK15: omp_offload.failed31:7191// CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP75]], i32 [[TMP77]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]7192// CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT32]]7193// CHECK15: omp_offload.cont32:7194// CHECK15-NEXT: [[TMP115:%.*]] = load i32, ptr [[N]], align 47195// CHECK15-NEXT: store i32 [[TMP115]], ptr [[N_CASTED33]], align 47196// CHECK15-NEXT: [[TMP116:%.*]] = load i32, ptr [[N_CASTED33]], align 47197// CHECK15-NEXT: [[TMP117:%.*]] = mul nuw i32 [[TMP0]], 47198// CHECK15-NEXT: [[TMP118:%.*]] = sext i32 [[TMP117]] to i647199// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES37]], ptr align 4 @.offload_sizes.5, i32 24, i1 false)7200// CHECK15-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 07201// CHECK15-NEXT: store i32 [[TMP116]], ptr [[TMP119]], align 47202// CHECK15-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 07203// CHECK15-NEXT: store i32 [[TMP116]], ptr [[TMP120]], align 47204// CHECK15-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 07205// CHECK15-NEXT: store ptr null, ptr [[TMP121]], align 47206// CHECK15-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 17207// CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP122]], align 47208// CHECK15-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 17209// CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP123]], align 47210// CHECK15-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 17211// CHECK15-NEXT: store ptr null, ptr [[TMP124]], align 47212// CHECK15-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 27213// CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP125]], align 47214// CHECK15-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 27215// CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP126]], align 47216// CHECK15-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 27217// CHECK15-NEXT: store i64 [[TMP118]], ptr [[TMP127]], align 47218// CHECK15-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 27219// CHECK15-NEXT: store ptr null, ptr [[TMP128]], align 47220// CHECK15-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 07221// CHECK15-NEXT: [[TMP130:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 07222// CHECK15-NEXT: [[TMP131:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 07223// CHECK15-NEXT: [[TMP132:%.*]] = load i32, ptr [[N]], align 47224// CHECK15-NEXT: store i32 [[TMP132]], ptr [[DOTCAPTURE_EXPR_39]], align 47225// CHECK15-NEXT: [[TMP133:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_39]], align 47226// CHECK15-NEXT: [[SUB41:%.*]] = sub nsw i32 [[TMP133]], 07227// CHECK15-NEXT: [[DIV42:%.*]] = sdiv i32 [[SUB41]], 17228// CHECK15-NEXT: [[SUB43:%.*]] = sub nsw i32 [[DIV42]], 17229// CHECK15-NEXT: store i32 [[SUB43]], ptr [[DOTCAPTURE_EXPR_40]], align 47230// CHECK15-NEXT: [[TMP134:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 47231// CHECK15-NEXT: [[ADD44:%.*]] = add nsw i32 [[TMP134]], 17232// CHECK15-NEXT: [[TMP135:%.*]] = zext i32 [[ADD44]] to i647233// CHECK15-NEXT: [[TMP136:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 07234// CHECK15-NEXT: store i32 3, ptr [[TMP136]], align 47235// CHECK15-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 17236// CHECK15-NEXT: store i32 3, ptr [[TMP137]], align 47237// CHECK15-NEXT: [[TMP138:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 27238// CHECK15-NEXT: store ptr [[TMP129]], ptr [[TMP138]], align 47239// CHECK15-NEXT: [[TMP139:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 37240// CHECK15-NEXT: store ptr [[TMP130]], ptr [[TMP139]], align 47241// CHECK15-NEXT: [[TMP140:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 47242// CHECK15-NEXT: store ptr [[TMP131]], ptr [[TMP140]], align 47243// CHECK15-NEXT: [[TMP141:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 57244// CHECK15-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP141]], align 47245// CHECK15-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 67246// CHECK15-NEXT: store ptr null, ptr [[TMP142]], align 47247// CHECK15-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 77248// CHECK15-NEXT: store ptr null, ptr [[TMP143]], align 47249// CHECK15-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 87250// CHECK15-NEXT: store i64 [[TMP135]], ptr [[TMP144]], align 87251// CHECK15-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 97252// CHECK15-NEXT: store i64 0, ptr [[TMP145]], align 87253// CHECK15-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 107254// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP146]], align 47255// CHECK15-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 117256// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP147]], align 47257// CHECK15-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 127258// CHECK15-NEXT: store i32 0, ptr [[TMP148]], align 47259// CHECK15-NEXT: [[TMP149:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, ptr [[KERNEL_ARGS45]])7260// CHECK15-NEXT: [[TMP150:%.*]] = icmp ne i32 [[TMP149]], 07261// CHECK15-NEXT: br i1 [[TMP150]], label [[OMP_OFFLOAD_FAILED46:%.*]], label [[OMP_OFFLOAD_CONT47:%.*]]7262// CHECK15: omp_offload.failed46:7263// CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP116]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]7264// CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT47]]7265// CHECK15: omp_offload.cont47:7266// CHECK15-NEXT: [[TMP151:%.*]] = load i32, ptr [[M]], align 47267// CHECK15-NEXT: store i32 [[TMP151]], ptr [[M_CASTED48]], align 47268// CHECK15-NEXT: [[TMP152:%.*]] = load i32, ptr [[M_CASTED48]], align 47269// CHECK15-NEXT: [[TMP153:%.*]] = load i32, ptr [[N]], align 47270// CHECK15-NEXT: store i32 [[TMP153]], ptr [[N_CASTED49]], align 47271// CHECK15-NEXT: [[TMP154:%.*]] = load i32, ptr [[N_CASTED49]], align 47272// CHECK15-NEXT: [[TMP155:%.*]] = mul nuw i32 [[TMP0]], 47273// CHECK15-NEXT: [[TMP156:%.*]] = sext i32 [[TMP155]] to i647274// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES53]], ptr align 4 @.offload_sizes.7, i32 32, i1 false)7275// CHECK15-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 07276// CHECK15-NEXT: store i32 [[TMP152]], ptr [[TMP157]], align 47277// CHECK15-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 07278// CHECK15-NEXT: store i32 [[TMP152]], ptr [[TMP158]], align 47279// CHECK15-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 07280// CHECK15-NEXT: store ptr null, ptr [[TMP159]], align 47281// CHECK15-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 17282// CHECK15-NEXT: store i32 [[TMP154]], ptr [[TMP160]], align 47283// CHECK15-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 17284// CHECK15-NEXT: store i32 [[TMP154]], ptr [[TMP161]], align 47285// CHECK15-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 17286// CHECK15-NEXT: store ptr null, ptr [[TMP162]], align 47287// CHECK15-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 27288// CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP163]], align 47289// CHECK15-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 27290// CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP164]], align 47291// CHECK15-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 27292// CHECK15-NEXT: store ptr null, ptr [[TMP165]], align 47293// CHECK15-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 37294// CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP166]], align 47295// CHECK15-NEXT: [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 37296// CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP167]], align 47297// CHECK15-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 37298// CHECK15-NEXT: store i64 [[TMP156]], ptr [[TMP168]], align 47299// CHECK15-NEXT: [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 37300// CHECK15-NEXT: store ptr null, ptr [[TMP169]], align 47301// CHECK15-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 07302// CHECK15-NEXT: [[TMP171:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 07303// CHECK15-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 07304// CHECK15-NEXT: [[TMP173:%.*]] = load i32, ptr [[N]], align 47305// CHECK15-NEXT: store i32 [[TMP173]], ptr [[DOTCAPTURE_EXPR_55]], align 47306// CHECK15-NEXT: [[TMP174:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_55]], align 47307// CHECK15-NEXT: [[SUB57:%.*]] = sub nsw i32 [[TMP174]], 07308// CHECK15-NEXT: [[DIV58:%.*]] = sdiv i32 [[SUB57]], 17309// CHECK15-NEXT: [[SUB59:%.*]] = sub nsw i32 [[DIV58]], 17310// CHECK15-NEXT: store i32 [[SUB59]], ptr [[DOTCAPTURE_EXPR_56]], align 47311// CHECK15-NEXT: [[TMP175:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_56]], align 47312// CHECK15-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP175]], 17313// CHECK15-NEXT: [[TMP176:%.*]] = zext i32 [[ADD60]] to i647314// CHECK15-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 07315// CHECK15-NEXT: store i32 3, ptr [[TMP177]], align 47316// CHECK15-NEXT: [[TMP178:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 17317// CHECK15-NEXT: store i32 4, ptr [[TMP178]], align 47318// CHECK15-NEXT: [[TMP179:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 27319// CHECK15-NEXT: store ptr [[TMP170]], ptr [[TMP179]], align 47320// CHECK15-NEXT: [[TMP180:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 37321// CHECK15-NEXT: store ptr [[TMP171]], ptr [[TMP180]], align 47322// CHECK15-NEXT: [[TMP181:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 47323// CHECK15-NEXT: store ptr [[TMP172]], ptr [[TMP181]], align 47324// CHECK15-NEXT: [[TMP182:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 57325// CHECK15-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP182]], align 47326// CHECK15-NEXT: [[TMP183:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 67327// CHECK15-NEXT: store ptr null, ptr [[TMP183]], align 47328// CHECK15-NEXT: [[TMP184:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 77329// CHECK15-NEXT: store ptr null, ptr [[TMP184]], align 47330// CHECK15-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 87331// CHECK15-NEXT: store i64 [[TMP176]], ptr [[TMP185]], align 87332// CHECK15-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 97333// CHECK15-NEXT: store i64 0, ptr [[TMP186]], align 87334// CHECK15-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 107335// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP187]], align 47336// CHECK15-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 117337// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP188]], align 47338// CHECK15-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 127339// CHECK15-NEXT: store i32 0, ptr [[TMP189]], align 47340// CHECK15-NEXT: [[TMP190:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, ptr [[KERNEL_ARGS61]])7341// CHECK15-NEXT: [[TMP191:%.*]] = icmp ne i32 [[TMP190]], 07342// CHECK15-NEXT: br i1 [[TMP191]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]7343// CHECK15: omp_offload.failed62:7344// CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP152]], i32 [[TMP154]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]7345// CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT63]]7346// CHECK15: omp_offload.cont63:7347// CHECK15-NEXT: [[TMP192:%.*]] = load i32, ptr [[ARGC_ADDR]], align 47348// CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP192]])7349// CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 47350// CHECK15-NEXT: [[TMP193:%.*]] = load ptr, ptr [[SAVED_STACK]], align 47351// CHECK15-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP193]])7352// CHECK15-NEXT: [[TMP194:%.*]] = load i32, ptr [[RETVAL]], align 47353// CHECK15-NEXT: ret i32 [[TMP194]]7354//7355//7356// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1487357// CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {7358// CHECK15-NEXT: entry:7359// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 47360// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 47361// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 47362// CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 47363// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 47364// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 47365// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 47366// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 47367// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])7368// CHECK15-NEXT: ret void7369//7370//7371// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined7372// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {7373// CHECK15-NEXT: entry:7374// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47375// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47376// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 47377// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 47378// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 47379// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47380// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 47381// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 47382// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 47383// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 47384// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 47385// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 47386// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47387// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47388// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 47389// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47390// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47391// CHECK15-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 47392// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 47393// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 47394// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 47395// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 47396// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 47397// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 47398// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 47399// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 47400// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 07401// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 17402// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 17403// CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 47404// CHECK15-NEXT: store i32 0, ptr [[I]], align 47405// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 47406// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]7407// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]7408// CHECK15: omp.precond.then:7409// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 47410// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47411// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 47412// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47413// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47414// CHECK15-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47415// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 47416// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7417// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47418// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47419// CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]7420// CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7421// CHECK15: cond.true:7422// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47423// CHECK15-NEXT: br label [[COND_END:%.*]]7424// CHECK15: cond.false:7425// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47426// CHECK15-NEXT: br label [[COND_END]]7427// CHECK15: cond.end:7428// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]7429// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 47430// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 47431// CHECK15-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 47432// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7433// CHECK15: omp.inner.for.cond:7434// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47435// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47436// CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]7437// CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7438// CHECK15: omp.inner.for.body:7439// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 47440// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47441// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])7442// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7443// CHECK15: omp.inner.for.inc:7444// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47445// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47446// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]7447// CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 47448// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]7449// CHECK15: omp.inner.for.end:7450// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7451// CHECK15: omp.loop.exit:7452// CHECK15-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47453// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 47454// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])7455// CHECK15-NEXT: br label [[OMP_PRECOND_END]]7456// CHECK15: omp.precond.end:7457// CHECK15-NEXT: ret void7458//7459//7460// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined7461// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {7462// CHECK15-NEXT: entry:7463// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47464// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47465// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 47466// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 47467// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 47468// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 47469// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 47470// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47471// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 47472// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 47473// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 47474// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 47475// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47476// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47477// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47478// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47479// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 47480// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47481// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47482// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 47483// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 47484// CHECK15-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 47485// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 47486// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 47487// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 47488// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 47489// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 47490// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 47491// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 47492// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 47493// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 07494// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 17495// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 17496// CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 47497// CHECK15-NEXT: store i32 0, ptr [[I]], align 47498// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 47499// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]7500// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]7501// CHECK15: omp.precond.then:7502// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47503// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47504// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 47505// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 47506// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 47507// CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 47508// CHECK15-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 47509// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47510// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47511// CHECK15-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47512// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 47513// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7514// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47515// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47516// CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]7517// CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7518// CHECK15: cond.true:7519// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47520// CHECK15-NEXT: br label [[COND_END:%.*]]7521// CHECK15: cond.false:7522// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47523// CHECK15-NEXT: br label [[COND_END]]7524// CHECK15: cond.end:7525// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]7526// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47527// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47528// CHECK15-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 47529// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7530// CHECK15: omp.inner.for.cond:7531// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47532// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47533// CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]7534// CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7535// CHECK15: omp.inner.for.body:7536// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47537// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 17538// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7539// CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 47540// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[I3]], align 47541// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]]7542// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 47543// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7544// CHECK15: omp.body.continue:7545// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7546// CHECK15: omp.inner.for.inc:7547// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47548// CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 17549// CHECK15-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 47550// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]7551// CHECK15: omp.inner.for.end:7552// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7553// CHECK15: omp.loop.exit:7554// CHECK15-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47555// CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 47556// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])7557// CHECK15-NEXT: br label [[OMP_PRECOND_END]]7558// CHECK15: omp.precond.end:7559// CHECK15-NEXT: ret void7560//7561//7562// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1537563// CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {7564// CHECK15-NEXT: entry:7565// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 47566// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 47567// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 47568// CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 47569// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 47570// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 47571// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 47572// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 47573// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])7574// CHECK15-NEXT: ret void7575//7576//7577// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined7578// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {7579// CHECK15-NEXT: entry:7580// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47581// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47582// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 47583// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 47584// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 47585// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47586// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 47587// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 47588// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 47589// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 47590// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 47591// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 47592// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47593// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47594// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 47595// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47596// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47597// CHECK15-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 47598// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 47599// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 47600// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 47601// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 47602// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 47603// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 47604// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 47605// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 47606// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 07607// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 17608// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 17609// CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 47610// CHECK15-NEXT: store i32 0, ptr [[I]], align 47611// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 47612// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]7613// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]7614// CHECK15: omp.precond.then:7615// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 47616// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47617// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 47618// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47619// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47620// CHECK15-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47621// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 47622// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7623// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47624// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47625// CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]7626// CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7627// CHECK15: cond.true:7628// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47629// CHECK15-NEXT: br label [[COND_END:%.*]]7630// CHECK15: cond.false:7631// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47632// CHECK15-NEXT: br label [[COND_END]]7633// CHECK15: cond.end:7634// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]7635// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 47636// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 47637// CHECK15-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 47638// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7639// CHECK15: omp.inner.for.cond:7640// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47641// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47642// CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]7643// CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7644// CHECK15: omp.inner.for.body:7645// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 47646// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47647// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])7648// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7649// CHECK15: omp.inner.for.inc:7650// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47651// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47652// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]7653// CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 47654// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]7655// CHECK15: omp.inner.for.end:7656// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7657// CHECK15: omp.loop.exit:7658// CHECK15-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47659// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 47660// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])7661// CHECK15-NEXT: br label [[OMP_PRECOND_END]]7662// CHECK15: omp.precond.end:7663// CHECK15-NEXT: ret void7664//7665//7666// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined7667// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {7668// CHECK15-NEXT: entry:7669// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47670// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47671// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 47672// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 47673// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 47674// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 47675// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 47676// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47677// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 47678// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 47679// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 47680// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 47681// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47682// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47683// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47684// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47685// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 47686// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47687// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47688// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 47689// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 47690// CHECK15-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 47691// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 47692// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 47693// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 47694// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 47695// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 47696// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 47697// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 47698// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 47699// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 07700// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 17701// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 17702// CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 47703// CHECK15-NEXT: store i32 0, ptr [[I]], align 47704// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 47705// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]7706// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]7707// CHECK15: omp.precond.then:7708// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47709// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47710// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 47711// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 47712// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 47713// CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 47714// CHECK15-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 47715// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47716// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47717// CHECK15-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47718// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 47719// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7720// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47721// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47722// CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]7723// CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7724// CHECK15: cond.true:7725// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47726// CHECK15-NEXT: br label [[COND_END:%.*]]7727// CHECK15: cond.false:7728// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47729// CHECK15-NEXT: br label [[COND_END]]7730// CHECK15: cond.end:7731// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]7732// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47733// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47734// CHECK15-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 47735// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7736// CHECK15: omp.inner.for.cond:7737// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47738// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47739// CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]7740// CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7741// CHECK15: omp.inner.for.body:7742// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47743// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 17744// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7745// CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 47746// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[I3]], align 47747// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]]7748// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 47749// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7750// CHECK15: omp.body.continue:7751// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7752// CHECK15: omp.inner.for.inc:7753// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47754// CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 17755// CHECK15-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 47756// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]7757// CHECK15: omp.inner.for.end:7758// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7759// CHECK15: omp.loop.exit:7760// CHECK15-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47761// CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 47762// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])7763// CHECK15-NEXT: br label [[OMP_PRECOND_END]]7764// CHECK15: omp.precond.end:7765// CHECK15-NEXT: ret void7766//7767//7768// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1587769// CHECK15-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {7770// CHECK15-NEXT: entry:7771// CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 47772// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 47773// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 47774// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 47775// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 47776// CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 47777// CHECK15-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 47778// CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 47779// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 47780// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 47781// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 47782// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 47783// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 47784// CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 47785// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 47786// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 47787// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 47788// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP4]])7789// CHECK15-NEXT: ret void7790//7791//7792// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined7793// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {7794// CHECK15-NEXT: entry:7795// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47796// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47797// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 47798// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 47799// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 47800// CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 47801// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47802// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 47803// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 47804// CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 47805// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 47806// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 47807// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 47808// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47809// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47810// CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 47811// CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 47812// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47813// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47814// CHECK15-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 47815// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 47816// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 47817// CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 47818// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 47819// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 47820// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 47821// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 47822// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 47823// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47824// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 07825// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 17826// CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 17827// CHECK15-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 47828// CHECK15-NEXT: store i32 0, ptr [[I]], align 47829// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47830// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]7831// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]7832// CHECK15: omp.precond.then:7833// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 47834// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 47835// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 47836// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47837// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47838// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 47839// CHECK15-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47840// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 47841// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])7842// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47843// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 47844// CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]7845// CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7846// CHECK15: cond.true:7847// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 47848// CHECK15-NEXT: br label [[COND_END:%.*]]7849// CHECK15: cond.false:7850// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47851// CHECK15-NEXT: br label [[COND_END]]7852// CHECK15: cond.end:7853// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]7854// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 47855// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 47856// CHECK15-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 47857// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7858// CHECK15: omp.inner.for.cond:7859// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47860// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 47861// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 17862// CHECK15-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]7863// CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7864// CHECK15: omp.inner.for.body:7865// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 47866// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47867// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 47868// CHECK15-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 47869// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 47870// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]], i32 [[TMP20]])7871// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7872// CHECK15: omp.inner.for.inc:7873// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47874// CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47875// CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]7876// CHECK15-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 47877// CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 47878// CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47879// CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]7880// CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 47881// CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47882// CHECK15-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47883// CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]7884// CHECK15-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 47885// CHECK15-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47886// CHECK15-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 47887// CHECK15-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]7888// CHECK15-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]7889// CHECK15: cond.true11:7890// CHECK15-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 47891// CHECK15-NEXT: br label [[COND_END13:%.*]]7892// CHECK15: cond.false12:7893// CHECK15-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47894// CHECK15-NEXT: br label [[COND_END13]]7895// CHECK15: cond.end13:7896// CHECK15-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]7897// CHECK15-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 47898// CHECK15-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 47899// CHECK15-NEXT: store i32 [[TMP31]], ptr [[DOTOMP_IV]], align 47900// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]7901// CHECK15: omp.inner.for.end:7902// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7903// CHECK15: omp.loop.exit:7904// CHECK15-NEXT: [[TMP32:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47905// CHECK15-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 47906// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP33]])7907// CHECK15-NEXT: br label [[OMP_PRECOND_END]]7908// CHECK15: omp.precond.end:7909// CHECK15-NEXT: ret void7910//7911//7912// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined7913// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {7914// CHECK15-NEXT: entry:7915// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47916// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47917// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 47918// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 47919// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 47920// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 47921// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 47922// CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 47923// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47924// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 47925// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 47926// CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 47927// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 47928// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47929// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47930// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47931// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47932// CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 47933// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47934// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47935// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 47936// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 47937// CHECK15-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 47938// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 47939// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 47940// CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 47941// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 47942// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 47943// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 47944// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 47945// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 47946// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47947// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 07948// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 17949// CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 17950// CHECK15-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 47951// CHECK15-NEXT: store i32 0, ptr [[I]], align 47952// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47953// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]7954// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]7955// CHECK15: omp.precond.then:7956// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47957// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 47958// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 47959// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 47960// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 47961// CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 47962// CHECK15-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 47963// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47964// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47965// CHECK15-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47966// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 47967// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7968// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47969// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 47970// CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]7971// CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7972// CHECK15: cond.true:7973// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 47974// CHECK15-NEXT: br label [[COND_END:%.*]]7975// CHECK15: cond.false:7976// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47977// CHECK15-NEXT: br label [[COND_END]]7978// CHECK15: cond.end:7979// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]7980// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47981// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47982// CHECK15-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 47983// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7984// CHECK15: omp.inner.for.cond:7985// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47986// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47987// CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]7988// CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7989// CHECK15: omp.inner.for.body:7990// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47991// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 17992// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7993// CHECK15-NEXT: store i32 [[ADD]], ptr [[I4]], align 47994// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 47995// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]]7996// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 47997// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7998// CHECK15: omp.body.continue:7999// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8000// CHECK15: omp.inner.for.inc:8001// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48002// CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 18003// CHECK15-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 48004// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]8005// CHECK15: omp.inner.for.end:8006// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8007// CHECK15: omp.loop.exit:8008// CHECK15-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48009// CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 48010// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])8011// CHECK15-NEXT: br label [[OMP_PRECOND_END]]8012// CHECK15: omp.precond.end:8013// CHECK15-NEXT: ret void8014//8015//8016// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1638017// CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {8018// CHECK15-NEXT: entry:8019// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 48020// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 48021// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 48022// CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 48023// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 48024// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 48025// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 48026// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 48027// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])8028// CHECK15-NEXT: ret void8029//8030//8031// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined8032// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {8033// CHECK15-NEXT: entry:8034// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 48035// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 48036// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 48037// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 48038// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 48039// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48040// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 48041// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 48042// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 48043// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 48044// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 48045// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 48046// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48047// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48048// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 48049// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 48050// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 48051// CHECK15-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 48052// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 48053// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 48054// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 48055// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 48056// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 48057// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 48058// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 48059// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 48060// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 08061// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 18062// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 18063// CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 48064// CHECK15-NEXT: store i32 0, ptr [[I]], align 48065// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 48066// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]8067// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]8068// CHECK15: omp.precond.then:8069// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 48070// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 48071// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 48072// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48073// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48074// CHECK15-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48075// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 48076// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)8077// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48078// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 48079// CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]8080// CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]8081// CHECK15: cond.true:8082// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 48083// CHECK15-NEXT: br label [[COND_END:%.*]]8084// CHECK15: cond.false:8085// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48086// CHECK15-NEXT: br label [[COND_END]]8087// CHECK15: cond.end:8088// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]8089// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 48090// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 48091// CHECK15-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 48092// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8093// CHECK15: omp.inner.for.cond:8094// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48095// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48096// CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]8097// CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8098// CHECK15: omp.inner.for.body:8099// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 48100// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48101// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])8102// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8103// CHECK15: omp.inner.for.inc:8104// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48105// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 48106// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]8107// CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 48108// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]8109// CHECK15: omp.inner.for.end:8110// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8111// CHECK15: omp.loop.exit:8112// CHECK15-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48113// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 48114// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])8115// CHECK15-NEXT: br label [[OMP_PRECOND_END]]8116// CHECK15: omp.precond.end:8117// CHECK15-NEXT: ret void8118//8119//8120// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined8121// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {8122// CHECK15-NEXT: entry:8123// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 48124// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 48125// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 48126// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 48127// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 48128// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 48129// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 48130// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48131// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 48132// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 48133// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 48134// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 48135// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 48136// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 48137// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48138// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48139// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 48140// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 48141// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 48142// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 48143// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 48144// CHECK15-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 48145// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 48146// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 48147// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 48148// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 48149// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 48150// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 48151// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 48152// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 48153// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 08154// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 18155// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 18156// CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 48157// CHECK15-NEXT: store i32 0, ptr [[I]], align 48158// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 48159// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]8160// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]8161// CHECK15: omp.precond.then:8162// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 48163// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 48164// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 48165// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 48166// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 48167// CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 48168// CHECK15-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 48169// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48170// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48171// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48172// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48173// CHECK15-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48174// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 48175// CHECK15-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)8176// CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]8177// CHECK15: omp.dispatch.cond:8178// CHECK15-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48179// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 48180// CHECK15-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])8181// CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 08182// CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]8183// CHECK15: omp.dispatch.body:8184// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48185// CHECK15-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 48186// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8187// CHECK15: omp.inner.for.cond:8188// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]8189// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]8190// CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]8191// CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8192// CHECK15: omp.inner.for.body:8193// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]8194// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 18195// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]8196// CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]8197// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]8198// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP20]]8199// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]8200// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]8201// CHECK15: omp.body.continue:8202// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8203// CHECK15: omp.inner.for.inc:8204// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]8205// CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 18206// CHECK15-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]8207// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]8208// CHECK15: omp.inner.for.end:8209// CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]8210// CHECK15: omp.dispatch.inc:8211// CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]8212// CHECK15: omp.dispatch.end:8213// CHECK15-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48214// CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 48215// CHECK15-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP23]])8216// CHECK15-NEXT: br label [[OMP_PRECOND_END]]8217// CHECK15: omp.precond.end:8218// CHECK15-NEXT: ret void8219//8220//8221// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1688222// CHECK15-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {8223// CHECK15-NEXT: entry:8224// CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 48225// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 48226// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 48227// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 48228// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 48229// CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 48230// CHECK15-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 48231// CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 48232// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 48233// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 48234// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 48235// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 48236// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 48237// CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 48238// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 48239// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 48240// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 48241// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP4]])8242// CHECK15-NEXT: ret void8243//8244//8245// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined8246// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {8247// CHECK15-NEXT: entry:8248// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 48249// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 48250// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 48251// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 48252// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 48253// CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 48254// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48255// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 48256// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 48257// CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 48258// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 48259// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 48260// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 48261// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48262// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48263// CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 48264// CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 48265// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 48266// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 48267// CHECK15-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 48268// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 48269// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 48270// CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 48271// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 48272// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 48273// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 48274// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 48275// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 48276// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 48277// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 08278// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 18279// CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 18280// CHECK15-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 48281// CHECK15-NEXT: store i32 0, ptr [[I]], align 48282// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 48283// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]8284// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]8285// CHECK15: omp.precond.then:8286// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 48287// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 48288// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 48289// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48290// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48291// CHECK15-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48292// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 48293// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)8294// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48295// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 48296// CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]8297// CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]8298// CHECK15: cond.true:8299// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 48300// CHECK15-NEXT: br label [[COND_END:%.*]]8301// CHECK15: cond.false:8302// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48303// CHECK15-NEXT: br label [[COND_END]]8304// CHECK15: cond.end:8305// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]8306// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 48307// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 48308// CHECK15-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 48309// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8310// CHECK15: omp.inner.for.cond:8311// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48312// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48313// CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]8314// CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8315// CHECK15: omp.inner.for.body:8316// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 48317// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48318// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 48319// CHECK15-NEXT: store i32 [[TMP18]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 48320// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 48321// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]], i32 [[TMP19]])8322// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8323// CHECK15: omp.inner.for.inc:8324// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48325// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 48326// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]8327// CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 48328// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]8329// CHECK15: omp.inner.for.end:8330// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8331// CHECK15: omp.loop.exit:8332// CHECK15-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48333// CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 48334// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])8335// CHECK15-NEXT: br label [[OMP_PRECOND_END]]8336// CHECK15: omp.precond.end:8337// CHECK15-NEXT: ret void8338//8339//8340// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined8341// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {8342// CHECK15-NEXT: entry:8343// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 48344// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 48345// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 48346// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 48347// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 48348// CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 48349// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 48350// CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 48351// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48352// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 48353// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 48354// CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 48355// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 48356// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 48357// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 48358// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48359// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48360// CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 48361// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 48362// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 48363// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 48364// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 48365// CHECK15-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 48366// CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 48367// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 48368// CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 48369// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 48370// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 48371// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 48372// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 48373// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 48374// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 48375// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 08376// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 18377// CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 18378// CHECK15-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 48379// CHECK15-NEXT: store i32 0, ptr [[I]], align 48380// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 48381// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]8382// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]8383// CHECK15: omp.precond.then:8384// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 48385// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 48386// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 48387// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 48388// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 48389// CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 48390// CHECK15-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 48391// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48392// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48393// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 48394// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48395// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48396// CHECK15-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48397// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 48398// CHECK15-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])8399// CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]8400// CHECK15: omp.dispatch.cond:8401// CHECK15-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48402// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 48403// CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])8404// CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 08405// CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]8406// CHECK15: omp.dispatch.body:8407// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48408// CHECK15-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 48409// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8410// CHECK15: omp.inner.for.cond:8411// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]8412// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]8413// CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]8414// CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8415// CHECK15: omp.inner.for.body:8416// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]8417// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 18418// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]8419// CHECK15-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]8420// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]8421// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP21]]8422// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]]8423// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]8424// CHECK15: omp.body.continue:8425// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8426// CHECK15: omp.inner.for.inc:8427// CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]8428// CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 18429// CHECK15-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]8430// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]8431// CHECK15: omp.inner.for.end:8432// CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]8433// CHECK15: omp.dispatch.inc:8434// CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]8435// CHECK15: omp.dispatch.end:8436// CHECK15-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48437// CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 48438// CHECK15-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP24]])8439// CHECK15-NEXT: br label [[OMP_PRECOND_END]]8440// CHECK15: omp.precond.end:8441// CHECK15-NEXT: ret void8442//8443//8444// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_8445// CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {8446// CHECK15-NEXT: entry:8447// CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 48448// CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 48449// CHECK15-NEXT: [[M:%.*]] = alloca i32, align 48450// CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 48451// CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 48452// CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 48453// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 48454// CHECK15-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 88455// CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 48456// CHECK15-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 48457// CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 48458// CHECK15-NEXT: [[_TMP4:%.*]] = alloca i32, align 48459// CHECK15-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 88460// CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i32, align 48461// CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 48462// CHECK15-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 48463// CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 48464// CHECK15-NEXT: [[_TMP11:%.*]] = alloca i32, align 48465// CHECK15-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 88466// CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 48467// CHECK15-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 48468// CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 48469// CHECK15-NEXT: [[_TMP18:%.*]] = alloca i32, align 48470// CHECK15-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 88471// CHECK15-NEXT: [[M_CASTED22:%.*]] = alloca i32, align 48472// CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [2 x ptr], align 48473// CHECK15-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [2 x ptr], align 48474// CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [2 x ptr], align 48475// CHECK15-NEXT: [[_TMP26:%.*]] = alloca i32, align 48476// CHECK15-NEXT: [[KERNEL_ARGS27:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 88477// CHECK15-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 48478// CHECK15-NEXT: store i32 10, ptr [[M]], align 48479// CHECK15-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 08480// CHECK15-NEXT: store ptr [[A]], ptr [[TMP0]], align 48481// CHECK15-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 08482// CHECK15-NEXT: store ptr [[A]], ptr [[TMP1]], align 48483// CHECK15-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 08484// CHECK15-NEXT: store ptr null, ptr [[TMP2]], align 48485// CHECK15-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 08486// CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 08487// CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 08488// CHECK15-NEXT: store i32 3, ptr [[TMP5]], align 48489// CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 18490// CHECK15-NEXT: store i32 1, ptr [[TMP6]], align 48491// CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 28492// CHECK15-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 48493// CHECK15-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 38494// CHECK15-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 48495// CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 48496// CHECK15-NEXT: store ptr @.offload_sizes.9, ptr [[TMP9]], align 48497// CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 58498// CHECK15-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP10]], align 48499// CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 68500// CHECK15-NEXT: store ptr null, ptr [[TMP11]], align 48501// CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 78502// CHECK15-NEXT: store ptr null, ptr [[TMP12]], align 48503// CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 88504// CHECK15-NEXT: store i64 10, ptr [[TMP13]], align 88505// CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 98506// CHECK15-NEXT: store i64 0, ptr [[TMP14]], align 88507// CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 108508// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 48509// CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 118510// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 48511// CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 128512// CHECK15-NEXT: store i32 0, ptr [[TMP17]], align 48513// CHECK15-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS]])8514// CHECK15-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 08515// CHECK15-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]8516// CHECK15: omp_offload.failed:8517// CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]]8518// CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]]8519// CHECK15: omp_offload.cont:8520// CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 08521// CHECK15-NEXT: store ptr [[A]], ptr [[TMP20]], align 48522// CHECK15-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 08523// CHECK15-NEXT: store ptr [[A]], ptr [[TMP21]], align 48524// CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 08525// CHECK15-NEXT: store ptr null, ptr [[TMP22]], align 48526// CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 08527// CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 08528// CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 08529// CHECK15-NEXT: store i32 3, ptr [[TMP25]], align 48530// CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 18531// CHECK15-NEXT: store i32 1, ptr [[TMP26]], align 48532// CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 28533// CHECK15-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 48534// CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 38535// CHECK15-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 48536// CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 48537// CHECK15-NEXT: store ptr @.offload_sizes.11, ptr [[TMP29]], align 48538// CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 58539// CHECK15-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP30]], align 48540// CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 68541// CHECK15-NEXT: store ptr null, ptr [[TMP31]], align 48542// CHECK15-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 78543// CHECK15-NEXT: store ptr null, ptr [[TMP32]], align 48544// CHECK15-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 88545// CHECK15-NEXT: store i64 10, ptr [[TMP33]], align 88546// CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 98547// CHECK15-NEXT: store i64 0, ptr [[TMP34]], align 88548// CHECK15-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 108549// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 48550// CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 118551// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 48552// CHECK15-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 128553// CHECK15-NEXT: store i32 0, ptr [[TMP37]], align 48554// CHECK15-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, ptr [[KERNEL_ARGS5]])8555// CHECK15-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 08556// CHECK15-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]8557// CHECK15: omp_offload.failed6:8558// CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121(ptr [[A]]) #[[ATTR3]]8559// CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT7]]8560// CHECK15: omp_offload.cont7:8561// CHECK15-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 48562// CHECK15-NEXT: store i32 [[TMP40]], ptr [[M_CASTED]], align 48563// CHECK15-NEXT: [[TMP41:%.*]] = load i32, ptr [[M_CASTED]], align 48564// CHECK15-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 08565// CHECK15-NEXT: store i32 [[TMP41]], ptr [[TMP42]], align 48566// CHECK15-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 08567// CHECK15-NEXT: store i32 [[TMP41]], ptr [[TMP43]], align 48568// CHECK15-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 08569// CHECK15-NEXT: store ptr null, ptr [[TMP44]], align 48570// CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 18571// CHECK15-NEXT: store ptr [[A]], ptr [[TMP45]], align 48572// CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 18573// CHECK15-NEXT: store ptr [[A]], ptr [[TMP46]], align 48574// CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 18575// CHECK15-NEXT: store ptr null, ptr [[TMP47]], align 48576// CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 08577// CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 08578// CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 08579// CHECK15-NEXT: store i32 3, ptr [[TMP50]], align 48580// CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 18581// CHECK15-NEXT: store i32 2, ptr [[TMP51]], align 48582// CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 28583// CHECK15-NEXT: store ptr [[TMP48]], ptr [[TMP52]], align 48584// CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 38585// CHECK15-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 48586// CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 48587// CHECK15-NEXT: store ptr @.offload_sizes.13, ptr [[TMP54]], align 48588// CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 58589// CHECK15-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP55]], align 48590// CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 68591// CHECK15-NEXT: store ptr null, ptr [[TMP56]], align 48592// CHECK15-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 78593// CHECK15-NEXT: store ptr null, ptr [[TMP57]], align 48594// CHECK15-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 88595// CHECK15-NEXT: store i64 10, ptr [[TMP58]], align 88596// CHECK15-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 98597// CHECK15-NEXT: store i64 0, ptr [[TMP59]], align 88598// CHECK15-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 108599// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP60]], align 48600// CHECK15-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 118601// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 48602// CHECK15-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 128603// CHECK15-NEXT: store i32 0, ptr [[TMP62]], align 48604// CHECK15-NEXT: [[TMP63:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, ptr [[KERNEL_ARGS12]])8605// CHECK15-NEXT: [[TMP64:%.*]] = icmp ne i32 [[TMP63]], 08606// CHECK15-NEXT: br i1 [[TMP64]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]8607// CHECK15: omp_offload.failed13:8608// CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP41]], ptr [[A]]) #[[ATTR3]]8609// CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT14]]8610// CHECK15: omp_offload.cont14:8611// CHECK15-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 08612// CHECK15-NEXT: store ptr [[A]], ptr [[TMP65]], align 48613// CHECK15-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 08614// CHECK15-NEXT: store ptr [[A]], ptr [[TMP66]], align 48615// CHECK15-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 08616// CHECK15-NEXT: store ptr null, ptr [[TMP67]], align 48617// CHECK15-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 08618// CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 08619// CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 08620// CHECK15-NEXT: store i32 3, ptr [[TMP70]], align 48621// CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 18622// CHECK15-NEXT: store i32 1, ptr [[TMP71]], align 48623// CHECK15-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 28624// CHECK15-NEXT: store ptr [[TMP68]], ptr [[TMP72]], align 48625// CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 38626// CHECK15-NEXT: store ptr [[TMP69]], ptr [[TMP73]], align 48627// CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 48628// CHECK15-NEXT: store ptr @.offload_sizes.15, ptr [[TMP74]], align 48629// CHECK15-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 58630// CHECK15-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP75]], align 48631// CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 68632// CHECK15-NEXT: store ptr null, ptr [[TMP76]], align 48633// CHECK15-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 78634// CHECK15-NEXT: store ptr null, ptr [[TMP77]], align 48635// CHECK15-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 88636// CHECK15-NEXT: store i64 10, ptr [[TMP78]], align 88637// CHECK15-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 98638// CHECK15-NEXT: store i64 0, ptr [[TMP79]], align 88639// CHECK15-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 108640// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP80]], align 48641// CHECK15-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 118642// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP81]], align 48643// CHECK15-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 128644// CHECK15-NEXT: store i32 0, ptr [[TMP82]], align 48645// CHECK15-NEXT: [[TMP83:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, ptr [[KERNEL_ARGS19]])8646// CHECK15-NEXT: [[TMP84:%.*]] = icmp ne i32 [[TMP83]], 08647// CHECK15-NEXT: br i1 [[TMP84]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]8648// CHECK15: omp_offload.failed20:8649// CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131(ptr [[A]]) #[[ATTR3]]8650// CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT21]]8651// CHECK15: omp_offload.cont21:8652// CHECK15-NEXT: [[TMP85:%.*]] = load i32, ptr [[M]], align 48653// CHECK15-NEXT: store i32 [[TMP85]], ptr [[M_CASTED22]], align 48654// CHECK15-NEXT: [[TMP86:%.*]] = load i32, ptr [[M_CASTED22]], align 48655// CHECK15-NEXT: [[TMP87:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 08656// CHECK15-NEXT: store i32 [[TMP86]], ptr [[TMP87]], align 48657// CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 08658// CHECK15-NEXT: store i32 [[TMP86]], ptr [[TMP88]], align 48659// CHECK15-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 08660// CHECK15-NEXT: store ptr null, ptr [[TMP89]], align 48661// CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 18662// CHECK15-NEXT: store ptr [[A]], ptr [[TMP90]], align 48663// CHECK15-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 18664// CHECK15-NEXT: store ptr [[A]], ptr [[TMP91]], align 48665// CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 18666// CHECK15-NEXT: store ptr null, ptr [[TMP92]], align 48667// CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 08668// CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 08669// CHECK15-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 08670// CHECK15-NEXT: store i32 3, ptr [[TMP95]], align 48671// CHECK15-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 18672// CHECK15-NEXT: store i32 2, ptr [[TMP96]], align 48673// CHECK15-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 28674// CHECK15-NEXT: store ptr [[TMP93]], ptr [[TMP97]], align 48675// CHECK15-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 38676// CHECK15-NEXT: store ptr [[TMP94]], ptr [[TMP98]], align 48677// CHECK15-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 48678// CHECK15-NEXT: store ptr @.offload_sizes.17, ptr [[TMP99]], align 48679// CHECK15-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 58680// CHECK15-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP100]], align 48681// CHECK15-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 68682// CHECK15-NEXT: store ptr null, ptr [[TMP101]], align 48683// CHECK15-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 78684// CHECK15-NEXT: store ptr null, ptr [[TMP102]], align 48685// CHECK15-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 88686// CHECK15-NEXT: store i64 10, ptr [[TMP103]], align 88687// CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 98688// CHECK15-NEXT: store i64 0, ptr [[TMP104]], align 88689// CHECK15-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 108690// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP105]], align 48691// CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 118692// CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP106]], align 48693// CHECK15-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 128694// CHECK15-NEXT: store i32 0, ptr [[TMP107]], align 48695// CHECK15-NEXT: [[TMP108:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, ptr [[KERNEL_ARGS27]])8696// CHECK15-NEXT: [[TMP109:%.*]] = icmp ne i32 [[TMP108]], 08697// CHECK15-NEXT: br i1 [[TMP109]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]8698// CHECK15: omp_offload.failed28:8699// CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP86]], ptr [[A]]) #[[ATTR3]]8700// CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT29]]8701// CHECK15: omp_offload.cont29:8702// CHECK15-NEXT: ret i32 08703//8704//8705// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l1168706// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {8707// CHECK15-NEXT: entry:8708// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 48709// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 48710// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 48711// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]])8712// CHECK15-NEXT: ret void8713//8714//8715// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined8716// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {8717// CHECK15-NEXT: entry:8718// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 48719// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 48720// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 48721// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48722// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 48723// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 48724// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 48725// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48726// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48727// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 48728// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 48729// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 48730// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 48731// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 48732// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 48733// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 48734// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48735// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48736// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48737// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 48738// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)8739// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48740// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 98741// CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]8742// CHECK15: cond.true:8743// CHECK15-NEXT: br label [[COND_END:%.*]]8744// CHECK15: cond.false:8745// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48746// CHECK15-NEXT: br label [[COND_END]]8747// CHECK15: cond.end:8748// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]8749// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 48750// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 48751// CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 48752// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8753// CHECK15: omp.inner.for.cond:8754// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48755// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48756// CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]8757// CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8758// CHECK15: omp.inner.for.body:8759// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 48760// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48761// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])8762// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8763// CHECK15: omp.inner.for.inc:8764// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48765// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 48766// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]8767// CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 48768// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]8769// CHECK15: omp.inner.for.end:8770// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8771// CHECK15: omp.loop.exit:8772// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])8773// CHECK15-NEXT: ret void8774//8775//8776// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined8777// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {8778// CHECK15-NEXT: entry:8779// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 48780// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 48781// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 48782// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 48783// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 48784// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48785// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 48786// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 48787// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 48788// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48789// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48790// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 48791// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 48792// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 48793// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 48794// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 48795// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 48796// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 48797// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 48798// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 48799// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 48800// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 48801// CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 48802// CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 48803// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48804// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48805// CHECK15-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48806// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 48807// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)8808// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48809// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 98810// CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]8811// CHECK15: cond.true:8812// CHECK15-NEXT: br label [[COND_END:%.*]]8813// CHECK15: cond.false:8814// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48815// CHECK15-NEXT: br label [[COND_END]]8816// CHECK15: cond.end:8817// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]8818// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 48819// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48820// CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 48821// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8822// CHECK15: omp.inner.for.cond:8823// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48824// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48825// CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]8826// CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8827// CHECK15: omp.inner.for.body:8828// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48829// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 18830// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]8831// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 48832// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 48833// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]8834// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 48835// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]8836// CHECK15: omp.body.continue:8837// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8838// CHECK15: omp.inner.for.inc:8839// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48840// CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 18841// CHECK15-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 48842// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]8843// CHECK15: omp.inner.for.end:8844// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8845// CHECK15: omp.loop.exit:8846// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])8847// CHECK15-NEXT: ret void8848//8849//8850// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l1218851// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {8852// CHECK15-NEXT: entry:8853// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 48854// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 48855// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 48856// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined, ptr [[TMP0]])8857// CHECK15-NEXT: ret void8858//8859//8860// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined8861// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {8862// CHECK15-NEXT: entry:8863// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 48864// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 48865// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 48866// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48867// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 48868// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 48869// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 48870// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48871// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48872// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 48873// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 48874// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 48875// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 48876// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 48877// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 48878// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 48879// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48880// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48881// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48882// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 48883// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)8884// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48885// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 98886// CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]8887// CHECK15: cond.true:8888// CHECK15-NEXT: br label [[COND_END:%.*]]8889// CHECK15: cond.false:8890// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48891// CHECK15-NEXT: br label [[COND_END]]8892// CHECK15: cond.end:8893// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]8894// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 48895// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 48896// CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 48897// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8898// CHECK15: omp.inner.for.cond:8899// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48900// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48901// CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]8902// CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8903// CHECK15: omp.inner.for.body:8904// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 48905// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 48906// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])8907// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8908// CHECK15: omp.inner.for.inc:8909// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48910// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 48911// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]8912// CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 48913// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]8914// CHECK15: omp.inner.for.end:8915// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8916// CHECK15: omp.loop.exit:8917// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])8918// CHECK15-NEXT: ret void8919//8920//8921// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined8922// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {8923// CHECK15-NEXT: entry:8924// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 48925// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 48926// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 48927// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 48928// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 48929// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48930// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 48931// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 48932// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 48933// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48934// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48935// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 48936// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 48937// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 48938// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 48939// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 48940// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 48941// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 48942// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 48943// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 48944// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 48945// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 48946// CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 48947// CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 48948// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48949// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48950// CHECK15-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 48951// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 48952// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)8953// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48954// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 98955// CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]8956// CHECK15: cond.true:8957// CHECK15-NEXT: br label [[COND_END:%.*]]8958// CHECK15: cond.false:8959// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48960// CHECK15-NEXT: br label [[COND_END]]8961// CHECK15: cond.end:8962// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]8963// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 48964// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48965// CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 48966// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8967// CHECK15: omp.inner.for.cond:8968// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48969// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48970// CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]8971// CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8972// CHECK15: omp.inner.for.body:8973// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48974// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 18975// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]8976// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 48977// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 48978// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]8979// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 48980// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]8981// CHECK15: omp.body.continue:8982// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8983// CHECK15: omp.inner.for.inc:8984// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48985// CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 18986// CHECK15-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 48987// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]8988// CHECK15: omp.inner.for.end:8989// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8990// CHECK15: omp.loop.exit:8991// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])8992// CHECK15-NEXT: ret void8993//8994//8995// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l1268996// CHECK15-SAME: (i32 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {8997// CHECK15-NEXT: entry:8998// CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 48999// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 49000// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 49001// CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 49002// CHECK15-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 49003// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 49004// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 49005// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 49006// CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 49007// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 49008// CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 49009// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 49010// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined, ptr [[TMP0]], i32 [[TMP3]])9011// CHECK15-NEXT: ret void9012//9013//9014// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined9015// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {9016// CHECK15-NEXT: entry:9017// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 49018// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 49019// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 49020// CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 49021// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 49022// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 49023// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 49024// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 49025// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 49026// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 49027// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 49028// CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 49029// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 49030// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 49031// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 49032// CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 49033// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 49034// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 49035// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 49036// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 49037// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 49038// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 49039// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 49040// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)9041// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49042// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99043// CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]9044// CHECK15: cond.true:9045// CHECK15-NEXT: br label [[COND_END:%.*]]9046// CHECK15: cond.false:9047// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49048// CHECK15-NEXT: br label [[COND_END]]9049// CHECK15: cond.end:9050// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]9051// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 49052// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 49053// CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 49054// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]9055// CHECK15: omp.inner.for.cond:9056// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49057// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49058// CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]9059// CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]9060// CHECK15: omp.inner.for.body:9061// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 49062// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49063// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 49064// CHECK15-NEXT: store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 49065// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 49066// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]])9067// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]9068// CHECK15: omp.inner.for.inc:9069// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49070// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 49071// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]9072// CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 49073// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]9074// CHECK15: omp.inner.for.end:9075// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]9076// CHECK15: omp.loop.exit:9077// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])9078// CHECK15-NEXT: ret void9079//9080//9081// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined9082// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {9083// CHECK15-NEXT: entry:9084// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 49085// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 49086// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 49087// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 49088// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 49089// CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 49090// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 49091// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 49092// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 49093// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 49094// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 49095// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 49096// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 49097// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 49098// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 49099// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 49100// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 49101// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 49102// CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 49103// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 49104// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 49105// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 49106// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 49107// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 49108// CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 49109// CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 49110// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 49111// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 49112// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 49113// CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 49114// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 49115// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])9116// CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]9117// CHECK15: omp.dispatch.cond:9118// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49119// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 49120// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]9121// CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]9122// CHECK15: cond.true:9123// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 49124// CHECK15-NEXT: br label [[COND_END:%.*]]9125// CHECK15: cond.false:9126// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49127// CHECK15-NEXT: br label [[COND_END]]9128// CHECK15: cond.end:9129// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]9130// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 49131// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 49132// CHECK15-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 49133// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49134// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49135// CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]9136// CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]9137// CHECK15: omp.dispatch.body:9138// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]9139// CHECK15: omp.inner.for.cond:9140// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49141// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49142// CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]9143// CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]9144// CHECK15: omp.inner.for.body:9145// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49146// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 19147// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]9148// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 49149// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 49150// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP16]]9151// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 49152// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]9153// CHECK15: omp.body.continue:9154// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]9155// CHECK15: omp.inner.for.inc:9156// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49157// CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 19158// CHECK15-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 49159// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]9160// CHECK15: omp.inner.for.end:9161// CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]9162// CHECK15: omp.dispatch.inc:9163// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 49164// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 49165// CHECK15-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]9166// CHECK15-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 49167// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49168// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 49169// CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]9170// CHECK15-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 49171// CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]9172// CHECK15: omp.dispatch.end:9173// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]])9174// CHECK15-NEXT: ret void9175//9176//9177// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l1319178// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {9179// CHECK15-NEXT: entry:9180// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 49181// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 49182// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 49183// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined, ptr [[TMP0]])9184// CHECK15-NEXT: ret void9185//9186//9187// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined9188// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {9189// CHECK15-NEXT: entry:9190// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 49191// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 49192// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 49193// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 49194// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 49195// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 49196// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 49197// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 49198// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 49199// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 49200// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 49201// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 49202// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 49203// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 49204// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 49205// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 49206// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 49207// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 49208// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 49209// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 49210// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)9211// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49212// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99213// CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]9214// CHECK15: cond.true:9215// CHECK15-NEXT: br label [[COND_END:%.*]]9216// CHECK15: cond.false:9217// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49218// CHECK15-NEXT: br label [[COND_END]]9219// CHECK15: cond.end:9220// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]9221// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 49222// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 49223// CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 49224// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]9225// CHECK15: omp.inner.for.cond:9226// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49227// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49228// CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]9229// CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]9230// CHECK15: omp.inner.for.body:9231// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 49232// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49233// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])9234// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]9235// CHECK15: omp.inner.for.inc:9236// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49237// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 49238// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]9239// CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 49240// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]9241// CHECK15: omp.inner.for.end:9242// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]9243// CHECK15: omp.loop.exit:9244// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])9245// CHECK15-NEXT: ret void9246//9247//9248// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined9249// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {9250// CHECK15-NEXT: entry:9251// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 49252// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 49253// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 49254// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 49255// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 49256// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 49257// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 49258// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 49259// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 49260// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 49261// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 49262// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 49263// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 49264// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 49265// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 49266// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 49267// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 49268// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 49269// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 49270// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 49271// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 49272// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 49273// CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 49274// CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 49275// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 49276// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 49277// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 49278// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49279// CHECK15-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 49280// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 49281// CHECK15-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)9282// CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]9283// CHECK15: omp.dispatch.cond:9284// CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])9285// CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 09286// CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]9287// CHECK15: omp.dispatch.body:9288// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 49289// CHECK15-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 49290// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]9291// CHECK15: omp.inner.for.cond:9292// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]9293// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]9294// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]9295// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]9296// CHECK15: omp.inner.for.body:9297// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]9298// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 19299// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]9300// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]9301// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]9302// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP12]]9303// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]]9304// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]9305// CHECK15: omp.body.continue:9306// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]9307// CHECK15: omp.inner.for.inc:9308// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]9309// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 19310// CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]9311// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]9312// CHECK15: omp.inner.for.end:9313// CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]9314// CHECK15: omp.dispatch.inc:9315// CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]9316// CHECK15: omp.dispatch.end:9317// CHECK15-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]])9318// CHECK15-NEXT: ret void9319//9320//9321// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l1369322// CHECK15-SAME: (i32 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {9323// CHECK15-NEXT: entry:9324// CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 49325// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 49326// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 49327// CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 49328// CHECK15-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 49329// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 49330// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 49331// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 49332// CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 49333// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 49334// CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 49335// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 49336// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined, ptr [[TMP0]], i32 [[TMP3]])9337// CHECK15-NEXT: ret void9338//9339//9340// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined9341// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {9342// CHECK15-NEXT: entry:9343// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 49344// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 49345// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 49346// CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 49347// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 49348// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 49349// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 49350// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 49351// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 49352// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 49353// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 49354// CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 49355// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 49356// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 49357// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 49358// CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 49359// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 49360// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 49361// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 49362// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 49363// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 49364// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 49365// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 49366// CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)9367// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49368// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99369// CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]9370// CHECK15: cond.true:9371// CHECK15-NEXT: br label [[COND_END:%.*]]9372// CHECK15: cond.false:9373// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49374// CHECK15-NEXT: br label [[COND_END]]9375// CHECK15: cond.end:9376// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]9377// CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 49378// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 49379// CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 49380// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]9381// CHECK15: omp.inner.for.cond:9382// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49383// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49384// CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]9385// CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]9386// CHECK15: omp.inner.for.body:9387// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 49388// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49389// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 49390// CHECK15-NEXT: store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 49391// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 49392// CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]])9393// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]9394// CHECK15: omp.inner.for.inc:9395// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49396// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 49397// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]9398// CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 49399// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]9400// CHECK15: omp.inner.for.end:9401// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]9402// CHECK15: omp.loop.exit:9403// CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])9404// CHECK15-NEXT: ret void9405//9406//9407// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined9408// CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {9409// CHECK15-NEXT: entry:9410// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 49411// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 49412// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 49413// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 49414// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 49415// CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 49416// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 49417// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 49418// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 49419// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 49420// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 49421// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 49422// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 49423// CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 49424// CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 49425// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 49426// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 49427// CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 49428// CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 49429// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 49430// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 49431// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 49432// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 49433// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 49434// CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 49435// CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 49436// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 49437// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 49438// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 49439// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 49440// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49441// CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 49442// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 49443// CHECK15-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])9444// CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]9445// CHECK15: omp.dispatch.cond:9446// CHECK15-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])9447// CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 09448// CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]9449// CHECK15: omp.dispatch.body:9450// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 49451// CHECK15-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 49452// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]9453// CHECK15: omp.inner.for.cond:9454// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]]9455// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]]9456// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]9457// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]9458// CHECK15: omp.inner.for.body:9459// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]9460// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 19461// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]9462// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]9463// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]9464// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP13]]9465// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]]9466// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]9467// CHECK15: omp.body.continue:9468// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]9469// CHECK15: omp.inner.for.inc:9470// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]9471// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 19472// CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]9473// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]9474// CHECK15: omp.inner.for.end:9475// CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]9476// CHECK15: omp.dispatch.inc:9477// CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]9478// CHECK15: omp.dispatch.end:9479// CHECK15-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP7]])9480// CHECK15-NEXT: ret void9481//9482//9483// CHECK17-LABEL: define {{[^@]+}}@main9484// CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {9485// CHECK17-NEXT: entry:9486// CHECK17-NEXT: [[RETVAL:%.*]] = alloca i32, align 49487// CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 49488// CHECK17-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 89489// CHECK17-NEXT: [[N:%.*]] = alloca i32, align 49490// CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 89491// CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 89492// CHECK17-NEXT: [[M:%.*]] = alloca i32, align 49493// CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 89494// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 89495// CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 89496// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 89497// CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 89498// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 49499// CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 49500// CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 49501// CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 89502// CHECK17-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 89503// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 89504// CHECK17-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 89505// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 89506// CHECK17-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 89507// CHECK17-NEXT: [[_TMP8:%.*]] = alloca i32, align 49508// CHECK17-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 49509// CHECK17-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 49510// CHECK17-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 89511// CHECK17-NEXT: [[M_CASTED:%.*]] = alloca i64, align 89512// CHECK17-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 89513// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x ptr], align 89514// CHECK17-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x ptr], align 89515// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x ptr], align 89516// CHECK17-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 89517// CHECK17-NEXT: [[_TMP23:%.*]] = alloca i32, align 49518// CHECK17-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 49519// CHECK17-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 49520// CHECK17-NEXT: [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 89521// CHECK17-NEXT: [[N_CASTED33:%.*]] = alloca i64, align 89522// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [3 x ptr], align 89523// CHECK17-NEXT: [[DOTOFFLOAD_PTRS35:%.*]] = alloca [3 x ptr], align 89524// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [3 x ptr], align 89525// CHECK17-NEXT: [[DOTOFFLOAD_SIZES37:%.*]] = alloca [3 x i64], align 89526// CHECK17-NEXT: [[_TMP38:%.*]] = alloca i32, align 49527// CHECK17-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 49528// CHECK17-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 49529// CHECK17-NEXT: [[KERNEL_ARGS45:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 89530// CHECK17-NEXT: [[M_CASTED48:%.*]] = alloca i64, align 89531// CHECK17-NEXT: [[N_CASTED49:%.*]] = alloca i64, align 89532// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [4 x ptr], align 89533// CHECK17-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [4 x ptr], align 89534// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [4 x ptr], align 89535// CHECK17-NEXT: [[DOTOFFLOAD_SIZES53:%.*]] = alloca [4 x i64], align 89536// CHECK17-NEXT: [[_TMP54:%.*]] = alloca i32, align 49537// CHECK17-NEXT: [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 49538// CHECK17-NEXT: [[DOTCAPTURE_EXPR_56:%.*]] = alloca i32, align 49539// CHECK17-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 89540// CHECK17-NEXT: store i32 0, ptr [[RETVAL]], align 49541// CHECK17-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 49542// CHECK17-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 89543// CHECK17-NEXT: store i32 100, ptr [[N]], align 49544// CHECK17-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 49545// CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i649546// CHECK17-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()9547// CHECK17-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 89548// CHECK17-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 49549// CHECK17-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 89550// CHECK17-NEXT: store i32 10, ptr [[M]], align 49551// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 49552// CHECK17-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 49553// CHECK17-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 89554// CHECK17-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 49555// CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false)9556// CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 09557// CHECK17-NEXT: store i64 [[TMP4]], ptr [[TMP6]], align 89558// CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 09559// CHECK17-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 89560// CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 09561// CHECK17-NEXT: store ptr null, ptr [[TMP8]], align 89562// CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 19563// CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 89564// CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 19565// CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP10]], align 89566// CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 19567// CHECK17-NEXT: store ptr null, ptr [[TMP11]], align 89568// CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 29569// CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 89570// CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 29571// CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 89572// CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 29573// CHECK17-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 89574// CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 29575// CHECK17-NEXT: store ptr null, ptr [[TMP15]], align 89576// CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 09577// CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 09578// CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 09579// CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 49580// CHECK17-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 49581// CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 49582// CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 09583// CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 19584// CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 19585// CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 49586// CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 49587// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 19588// CHECK17-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i649589// CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 09590// CHECK17-NEXT: store i32 3, ptr [[TMP23]], align 49591// CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 19592// CHECK17-NEXT: store i32 3, ptr [[TMP24]], align 49593// CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 29594// CHECK17-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 89595// CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 39596// CHECK17-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 89597// CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 49598// CHECK17-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 89599// CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 59600// CHECK17-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 89601// CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 69602// CHECK17-NEXT: store ptr null, ptr [[TMP29]], align 89603// CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 79604// CHECK17-NEXT: store ptr null, ptr [[TMP30]], align 89605// CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 89606// CHECK17-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 89607// CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 99608// CHECK17-NEXT: store i64 0, ptr [[TMP32]], align 89609// CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 109610// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 49611// CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 119612// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 49613// CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 129614// CHECK17-NEXT: store i32 0, ptr [[TMP35]], align 49615// CHECK17-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, ptr [[KERNEL_ARGS]])9616// CHECK17-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 09617// CHECK17-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]9618// CHECK17: omp_offload.failed:9619// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]9620// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]9621// CHECK17: omp_offload.cont:9622// CHECK17-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 49623// CHECK17-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 49624// CHECK17-NEXT: [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 89625// CHECK17-NEXT: [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 49626// CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false)9627// CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 09628// CHECK17-NEXT: store i64 [[TMP39]], ptr [[TMP41]], align 89629// CHECK17-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 09630// CHECK17-NEXT: store i64 [[TMP39]], ptr [[TMP42]], align 89631// CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 09632// CHECK17-NEXT: store ptr null, ptr [[TMP43]], align 89633// CHECK17-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 19634// CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP44]], align 89635// CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 19636// CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP45]], align 89637// CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 19638// CHECK17-NEXT: store ptr null, ptr [[TMP46]], align 89639// CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 29640// CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP47]], align 89641// CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 29642// CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 89643// CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 29644// CHECK17-NEXT: store i64 [[TMP40]], ptr [[TMP49]], align 89645// CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 29646// CHECK17-NEXT: store ptr null, ptr [[TMP50]], align 89647// CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 09648// CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 09649// CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 09650// CHECK17-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 49651// CHECK17-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 49652// CHECK17-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 49653// CHECK17-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 09654// CHECK17-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 19655// CHECK17-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 19656// CHECK17-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 49657// CHECK17-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 49658// CHECK17-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP56]], 19659// CHECK17-NEXT: [[TMP57:%.*]] = zext i32 [[ADD14]] to i649660// CHECK17-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 09661// CHECK17-NEXT: store i32 3, ptr [[TMP58]], align 49662// CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 19663// CHECK17-NEXT: store i32 3, ptr [[TMP59]], align 49664// CHECK17-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 29665// CHECK17-NEXT: store ptr [[TMP51]], ptr [[TMP60]], align 89666// CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 39667// CHECK17-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 89668// CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 49669// CHECK17-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 89670// CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 59671// CHECK17-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP63]], align 89672// CHECK17-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 69673// CHECK17-NEXT: store ptr null, ptr [[TMP64]], align 89674// CHECK17-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 79675// CHECK17-NEXT: store ptr null, ptr [[TMP65]], align 89676// CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 89677// CHECK17-NEXT: store i64 [[TMP57]], ptr [[TMP66]], align 89678// CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 99679// CHECK17-NEXT: store i64 0, ptr [[TMP67]], align 89680// CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 109681// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP68]], align 49682// CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 119683// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 49684// CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 129685// CHECK17-NEXT: store i32 0, ptr [[TMP70]], align 49686// CHECK17-NEXT: [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, ptr [[KERNEL_ARGS15]])9687// CHECK17-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 09688// CHECK17-NEXT: br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]9689// CHECK17: omp_offload.failed16:9690// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]9691// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT17]]9692// CHECK17: omp_offload.cont17:9693// CHECK17-NEXT: [[TMP73:%.*]] = load i32, ptr [[M]], align 49694// CHECK17-NEXT: store i32 [[TMP73]], ptr [[M_CASTED]], align 49695// CHECK17-NEXT: [[TMP74:%.*]] = load i64, ptr [[M_CASTED]], align 89696// CHECK17-NEXT: [[TMP75:%.*]] = load i32, ptr [[N]], align 49697// CHECK17-NEXT: store i32 [[TMP75]], ptr [[N_CASTED18]], align 49698// CHECK17-NEXT: [[TMP76:%.*]] = load i64, ptr [[N_CASTED18]], align 89699// CHECK17-NEXT: [[TMP77:%.*]] = mul nuw i64 [[TMP1]], 49700// CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES22]], ptr align 8 @.offload_sizes.3, i64 32, i1 false)9701// CHECK17-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 09702// CHECK17-NEXT: store i64 [[TMP74]], ptr [[TMP78]], align 89703// CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 09704// CHECK17-NEXT: store i64 [[TMP74]], ptr [[TMP79]], align 89705// CHECK17-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 09706// CHECK17-NEXT: store ptr null, ptr [[TMP80]], align 89707// CHECK17-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 19708// CHECK17-NEXT: store i64 [[TMP76]], ptr [[TMP81]], align 89709// CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 19710// CHECK17-NEXT: store i64 [[TMP76]], ptr [[TMP82]], align 89711// CHECK17-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 19712// CHECK17-NEXT: store ptr null, ptr [[TMP83]], align 89713// CHECK17-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 29714// CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP84]], align 89715// CHECK17-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 29716// CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP85]], align 89717// CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 29718// CHECK17-NEXT: store ptr null, ptr [[TMP86]], align 89719// CHECK17-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 39720// CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP87]], align 89721// CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 39722// CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP88]], align 89723// CHECK17-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 39724// CHECK17-NEXT: store i64 [[TMP77]], ptr [[TMP89]], align 89725// CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 39726// CHECK17-NEXT: store ptr null, ptr [[TMP90]], align 89727// CHECK17-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 09728// CHECK17-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 09729// CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 09730// CHECK17-NEXT: [[TMP94:%.*]] = load i32, ptr [[N]], align 49731// CHECK17-NEXT: store i32 [[TMP94]], ptr [[DOTCAPTURE_EXPR_24]], align 49732// CHECK17-NEXT: [[TMP95:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 49733// CHECK17-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP95]], 09734// CHECK17-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 19735// CHECK17-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 19736// CHECK17-NEXT: store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 49737// CHECK17-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 49738// CHECK17-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP96]], 19739// CHECK17-NEXT: [[TMP97:%.*]] = zext i32 [[ADD29]] to i649740// CHECK17-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 09741// CHECK17-NEXT: store i32 3, ptr [[TMP98]], align 49742// CHECK17-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 19743// CHECK17-NEXT: store i32 4, ptr [[TMP99]], align 49744// CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 29745// CHECK17-NEXT: store ptr [[TMP91]], ptr [[TMP100]], align 89746// CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 39747// CHECK17-NEXT: store ptr [[TMP92]], ptr [[TMP101]], align 89748// CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 49749// CHECK17-NEXT: store ptr [[TMP93]], ptr [[TMP102]], align 89750// CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 59751// CHECK17-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP103]], align 89752// CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 69753// CHECK17-NEXT: store ptr null, ptr [[TMP104]], align 89754// CHECK17-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 79755// CHECK17-NEXT: store ptr null, ptr [[TMP105]], align 89756// CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 89757// CHECK17-NEXT: store i64 [[TMP97]], ptr [[TMP106]], align 89758// CHECK17-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 99759// CHECK17-NEXT: store i64 0, ptr [[TMP107]], align 89760// CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 109761// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 49762// CHECK17-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 119763// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP109]], align 49764// CHECK17-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 129765// CHECK17-NEXT: store i32 0, ptr [[TMP110]], align 49766// CHECK17-NEXT: [[TMP111:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, ptr [[KERNEL_ARGS30]])9767// CHECK17-NEXT: [[TMP112:%.*]] = icmp ne i32 [[TMP111]], 09768// CHECK17-NEXT: br i1 [[TMP112]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]9769// CHECK17: omp_offload.failed31:9770// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP74]], i64 [[TMP76]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]9771// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT32]]9772// CHECK17: omp_offload.cont32:9773// CHECK17-NEXT: [[TMP113:%.*]] = load i32, ptr [[N]], align 49774// CHECK17-NEXT: store i32 [[TMP113]], ptr [[N_CASTED33]], align 49775// CHECK17-NEXT: [[TMP114:%.*]] = load i64, ptr [[N_CASTED33]], align 89776// CHECK17-NEXT: [[TMP115:%.*]] = mul nuw i64 [[TMP1]], 49777// CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES37]], ptr align 8 @.offload_sizes.5, i64 24, i1 false)9778// CHECK17-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 09779// CHECK17-NEXT: store i64 [[TMP114]], ptr [[TMP116]], align 89780// CHECK17-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 09781// CHECK17-NEXT: store i64 [[TMP114]], ptr [[TMP117]], align 89782// CHECK17-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 09783// CHECK17-NEXT: store ptr null, ptr [[TMP118]], align 89784// CHECK17-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 19785// CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP119]], align 89786// CHECK17-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 19787// CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP120]], align 89788// CHECK17-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 19789// CHECK17-NEXT: store ptr null, ptr [[TMP121]], align 89790// CHECK17-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 29791// CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP122]], align 89792// CHECK17-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 29793// CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP123]], align 89794// CHECK17-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 29795// CHECK17-NEXT: store i64 [[TMP115]], ptr [[TMP124]], align 89796// CHECK17-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 29797// CHECK17-NEXT: store ptr null, ptr [[TMP125]], align 89798// CHECK17-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 09799// CHECK17-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 09800// CHECK17-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 09801// CHECK17-NEXT: [[TMP129:%.*]] = load i32, ptr [[N]], align 49802// CHECK17-NEXT: store i32 [[TMP129]], ptr [[DOTCAPTURE_EXPR_39]], align 49803// CHECK17-NEXT: [[TMP130:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_39]], align 49804// CHECK17-NEXT: [[SUB41:%.*]] = sub nsw i32 [[TMP130]], 09805// CHECK17-NEXT: [[DIV42:%.*]] = sdiv i32 [[SUB41]], 19806// CHECK17-NEXT: [[SUB43:%.*]] = sub nsw i32 [[DIV42]], 19807// CHECK17-NEXT: store i32 [[SUB43]], ptr [[DOTCAPTURE_EXPR_40]], align 49808// CHECK17-NEXT: [[TMP131:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 49809// CHECK17-NEXT: [[ADD44:%.*]] = add nsw i32 [[TMP131]], 19810// CHECK17-NEXT: [[TMP132:%.*]] = zext i32 [[ADD44]] to i649811// CHECK17-NEXT: [[TMP133:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 09812// CHECK17-NEXT: store i32 3, ptr [[TMP133]], align 49813// CHECK17-NEXT: [[TMP134:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 19814// CHECK17-NEXT: store i32 3, ptr [[TMP134]], align 49815// CHECK17-NEXT: [[TMP135:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 29816// CHECK17-NEXT: store ptr [[TMP126]], ptr [[TMP135]], align 89817// CHECK17-NEXT: [[TMP136:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 39818// CHECK17-NEXT: store ptr [[TMP127]], ptr [[TMP136]], align 89819// CHECK17-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 49820// CHECK17-NEXT: store ptr [[TMP128]], ptr [[TMP137]], align 89821// CHECK17-NEXT: [[TMP138:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 59822// CHECK17-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP138]], align 89823// CHECK17-NEXT: [[TMP139:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 69824// CHECK17-NEXT: store ptr null, ptr [[TMP139]], align 89825// CHECK17-NEXT: [[TMP140:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 79826// CHECK17-NEXT: store ptr null, ptr [[TMP140]], align 89827// CHECK17-NEXT: [[TMP141:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 89828// CHECK17-NEXT: store i64 [[TMP132]], ptr [[TMP141]], align 89829// CHECK17-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 99830// CHECK17-NEXT: store i64 0, ptr [[TMP142]], align 89831// CHECK17-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 109832// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP143]], align 49833// CHECK17-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 119834// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP144]], align 49835// CHECK17-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 129836// CHECK17-NEXT: store i32 0, ptr [[TMP145]], align 49837// CHECK17-NEXT: [[TMP146:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, ptr [[KERNEL_ARGS45]])9838// CHECK17-NEXT: [[TMP147:%.*]] = icmp ne i32 [[TMP146]], 09839// CHECK17-NEXT: br i1 [[TMP147]], label [[OMP_OFFLOAD_FAILED46:%.*]], label [[OMP_OFFLOAD_CONT47:%.*]]9840// CHECK17: omp_offload.failed46:9841// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP114]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]9842// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT47]]9843// CHECK17: omp_offload.cont47:9844// CHECK17-NEXT: [[TMP148:%.*]] = load i32, ptr [[M]], align 49845// CHECK17-NEXT: store i32 [[TMP148]], ptr [[M_CASTED48]], align 49846// CHECK17-NEXT: [[TMP149:%.*]] = load i64, ptr [[M_CASTED48]], align 89847// CHECK17-NEXT: [[TMP150:%.*]] = load i32, ptr [[N]], align 49848// CHECK17-NEXT: store i32 [[TMP150]], ptr [[N_CASTED49]], align 49849// CHECK17-NEXT: [[TMP151:%.*]] = load i64, ptr [[N_CASTED49]], align 89850// CHECK17-NEXT: [[TMP152:%.*]] = mul nuw i64 [[TMP1]], 49851// CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES53]], ptr align 8 @.offload_sizes.7, i64 32, i1 false)9852// CHECK17-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 09853// CHECK17-NEXT: store i64 [[TMP149]], ptr [[TMP153]], align 89854// CHECK17-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 09855// CHECK17-NEXT: store i64 [[TMP149]], ptr [[TMP154]], align 89856// CHECK17-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 09857// CHECK17-NEXT: store ptr null, ptr [[TMP155]], align 89858// CHECK17-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 19859// CHECK17-NEXT: store i64 [[TMP151]], ptr [[TMP156]], align 89860// CHECK17-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 19861// CHECK17-NEXT: store i64 [[TMP151]], ptr [[TMP157]], align 89862// CHECK17-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 19863// CHECK17-NEXT: store ptr null, ptr [[TMP158]], align 89864// CHECK17-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 29865// CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP159]], align 89866// CHECK17-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 29867// CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP160]], align 89868// CHECK17-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 29869// CHECK17-NEXT: store ptr null, ptr [[TMP161]], align 89870// CHECK17-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 39871// CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP162]], align 89872// CHECK17-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 39873// CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP163]], align 89874// CHECK17-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 39875// CHECK17-NEXT: store i64 [[TMP152]], ptr [[TMP164]], align 89876// CHECK17-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 39877// CHECK17-NEXT: store ptr null, ptr [[TMP165]], align 89878// CHECK17-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 09879// CHECK17-NEXT: [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 09880// CHECK17-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 09881// CHECK17-NEXT: [[TMP169:%.*]] = load i32, ptr [[N]], align 49882// CHECK17-NEXT: store i32 [[TMP169]], ptr [[DOTCAPTURE_EXPR_55]], align 49883// CHECK17-NEXT: [[TMP170:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_55]], align 49884// CHECK17-NEXT: [[SUB57:%.*]] = sub nsw i32 [[TMP170]], 09885// CHECK17-NEXT: [[DIV58:%.*]] = sdiv i32 [[SUB57]], 19886// CHECK17-NEXT: [[SUB59:%.*]] = sub nsw i32 [[DIV58]], 19887// CHECK17-NEXT: store i32 [[SUB59]], ptr [[DOTCAPTURE_EXPR_56]], align 49888// CHECK17-NEXT: [[TMP171:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_56]], align 49889// CHECK17-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP171]], 19890// CHECK17-NEXT: [[TMP172:%.*]] = zext i32 [[ADD60]] to i649891// CHECK17-NEXT: [[TMP173:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 09892// CHECK17-NEXT: store i32 3, ptr [[TMP173]], align 49893// CHECK17-NEXT: [[TMP174:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 19894// CHECK17-NEXT: store i32 4, ptr [[TMP174]], align 49895// CHECK17-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 29896// CHECK17-NEXT: store ptr [[TMP166]], ptr [[TMP175]], align 89897// CHECK17-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 39898// CHECK17-NEXT: store ptr [[TMP167]], ptr [[TMP176]], align 89899// CHECK17-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 49900// CHECK17-NEXT: store ptr [[TMP168]], ptr [[TMP177]], align 89901// CHECK17-NEXT: [[TMP178:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 59902// CHECK17-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP178]], align 89903// CHECK17-NEXT: [[TMP179:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 69904// CHECK17-NEXT: store ptr null, ptr [[TMP179]], align 89905// CHECK17-NEXT: [[TMP180:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 79906// CHECK17-NEXT: store ptr null, ptr [[TMP180]], align 89907// CHECK17-NEXT: [[TMP181:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 89908// CHECK17-NEXT: store i64 [[TMP172]], ptr [[TMP181]], align 89909// CHECK17-NEXT: [[TMP182:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 99910// CHECK17-NEXT: store i64 0, ptr [[TMP182]], align 89911// CHECK17-NEXT: [[TMP183:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 109912// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP183]], align 49913// CHECK17-NEXT: [[TMP184:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 119914// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP184]], align 49915// CHECK17-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 129916// CHECK17-NEXT: store i32 0, ptr [[TMP185]], align 49917// CHECK17-NEXT: [[TMP186:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, ptr [[KERNEL_ARGS61]])9918// CHECK17-NEXT: [[TMP187:%.*]] = icmp ne i32 [[TMP186]], 09919// CHECK17-NEXT: br i1 [[TMP187]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]9920// CHECK17: omp_offload.failed62:9921// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP149]], i64 [[TMP151]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]9922// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT63]]9923// CHECK17: omp_offload.cont63:9924// CHECK17-NEXT: [[TMP188:%.*]] = load i32, ptr [[ARGC_ADDR]], align 49925// CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP188]])9926// CHECK17-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 49927// CHECK17-NEXT: [[TMP189:%.*]] = load ptr, ptr [[SAVED_STACK]], align 89928// CHECK17-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP189]])9929// CHECK17-NEXT: [[TMP190:%.*]] = load i32, ptr [[RETVAL]], align 49930// CHECK17-NEXT: ret i32 [[TMP190]]9931//9932//9933// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1489934// CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {9935// CHECK17-NEXT: entry:9936// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 89937// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 89938// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 89939// CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 89940// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 89941// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 89942// CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 89943// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 89944// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])9945// CHECK17-NEXT: ret void9946//9947//9948// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined9949// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {9950// CHECK17-NEXT: entry:9951// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 89952// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 89953// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 89954// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 89955// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 89956// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 49957// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 49958// CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 49959// CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 49960// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 49961// CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 49962// CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 49963// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 49964// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 49965// CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 49966// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 89967// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 89968// CHECK17-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 89969// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 89970// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 89971// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 89972// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 89973// CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 89974// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 49975// CHECK17-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 49976// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 49977// CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 09978// CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 19979// CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 19980// CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 49981// CHECK17-NEXT: store i32 0, ptr [[I]], align 49982// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 49983// CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]9984// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]9985// CHECK17: omp.precond.then:9986// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 49987// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 49988// CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 49989// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 49990// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 49991// CHECK17-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 89992// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 49993// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)9994// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 49995// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 49996// CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]9997// CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]9998// CHECK17: cond.true:9999// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410000// CHECK17-NEXT: br label [[COND_END:%.*]]10001// CHECK17: cond.false:10002// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410003// CHECK17-NEXT: br label [[COND_END]]10004// CHECK17: cond.end:10005// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]10006// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 410007// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 410008// CHECK17-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 410009// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]10010// CHECK17: omp.inner.for.cond:10011// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410012// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410013// CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]10014// CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]10015// CHECK17: omp.inner.for.body:10016// CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 410017// CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i6410018// CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410019// CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i6410020// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])10021// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]10022// CHECK17: omp.inner.for.inc:10023// CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410024// CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 410025// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]10026// CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 410027// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]10028// CHECK17: omp.inner.for.end:10029// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]10030// CHECK17: omp.loop.exit:10031// CHECK17-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810032// CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 410033// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])10034// CHECK17-NEXT: br label [[OMP_PRECOND_END]]10035// CHECK17: omp.precond.end:10036// CHECK17-NEXT: ret void10037//10038//10039// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined10040// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {10041// CHECK17-NEXT: entry:10042// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 810043// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 810044// CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 810045// CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 810046// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 810047// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810048// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810049// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 410050// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 410051// CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 410052// CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 410053// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 410054// CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 410055// CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 410056// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 410057// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 410058// CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 410059// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 810060// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 810061// CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 810062// CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 810063// CHECK17-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 810064// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810065// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810066// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 810067// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 810068// CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 810069// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 410070// CHECK17-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 410071// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 410072// CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 010073// CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 110074// CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 110075// CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 410076// CHECK17-NEXT: store i32 0, ptr [[I]], align 410077// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 410078// CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]10079// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]10080// CHECK17: omp.precond.then:10081// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 410082// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410083// CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 410084// CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 810085// CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i3210086// CHECK17-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 810087// CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i3210088// CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 410089// CHECK17-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 410090// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 410091// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 410092// CHECK17-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810093// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 410094// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)10095// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 410096// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410097// CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]10098// CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]10099// CHECK17: cond.true:10100// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410101// CHECK17-NEXT: br label [[COND_END:%.*]]10102// CHECK17: cond.false:10103// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 410104// CHECK17-NEXT: br label [[COND_END]]10105// CHECK17: cond.end:10106// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]10107// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 410108// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 410109// CHECK17-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 410110// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]10111// CHECK17: omp.inner.for.cond:10112// CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410113// CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 410114// CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]10115// CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]10116// CHECK17: omp.inner.for.body:10117// CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410118// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 110119// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]10120// CHECK17-NEXT: store i32 [[ADD]], ptr [[I4]], align 410121// CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 410122// CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i6410123// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]10124// CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 410125// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]10126// CHECK17: omp.body.continue:10127// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]10128// CHECK17: omp.inner.for.inc:10129// CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410130// CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 110131// CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 410132// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]10133// CHECK17: omp.inner.for.end:10134// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]10135// CHECK17: omp.loop.exit:10136// CHECK17-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810137// CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 410138// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])10139// CHECK17-NEXT: br label [[OMP_PRECOND_END]]10140// CHECK17: omp.precond.end:10141// CHECK17-NEXT: ret void10142//10143//10144// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l15310145// CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {10146// CHECK17-NEXT: entry:10147// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 810148// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810149// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810150// CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 810151// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810152// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810153// CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 810154// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 810155// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])10156// CHECK17-NEXT: ret void10157//10158//10159// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined10160// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {10161// CHECK17-NEXT: entry:10162// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 810163// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 810164// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 810165// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810166// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810167// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 410168// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 410169// CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 410170// CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 410171// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 410172// CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 410173// CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 410174// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 410175// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 410176// CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 410177// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 810178// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 810179// CHECK17-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 810180// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810181// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810182// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 810183// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 810184// CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 810185// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 410186// CHECK17-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 410187// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 410188// CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 010189// CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 110190// CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 110191// CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 410192// CHECK17-NEXT: store i32 0, ptr [[I]], align 410193// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 410194// CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]10195// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]10196// CHECK17: omp.precond.then:10197// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 410198// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410199// CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 410200// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 410201// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 410202// CHECK17-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810203// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 410204// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)10205// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410206// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410207// CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]10208// CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]10209// CHECK17: cond.true:10210// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410211// CHECK17-NEXT: br label [[COND_END:%.*]]10212// CHECK17: cond.false:10213// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410214// CHECK17-NEXT: br label [[COND_END]]10215// CHECK17: cond.end:10216// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]10217// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 410218// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 410219// CHECK17-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 410220// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]10221// CHECK17: omp.inner.for.cond:10222// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410223// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410224// CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]10225// CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]10226// CHECK17: omp.inner.for.body:10227// CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 410228// CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i6410229// CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410230// CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i6410231// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])10232// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]10233// CHECK17: omp.inner.for.inc:10234// CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410235// CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 410236// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]10237// CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 410238// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]10239// CHECK17: omp.inner.for.end:10240// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]10241// CHECK17: omp.loop.exit:10242// CHECK17-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810243// CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 410244// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])10245// CHECK17-NEXT: br label [[OMP_PRECOND_END]]10246// CHECK17: omp.precond.end:10247// CHECK17-NEXT: ret void10248//10249//10250// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined10251// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {10252// CHECK17-NEXT: entry:10253// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 810254// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 810255// CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 810256// CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 810257// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 810258// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810259// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810260// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 410261// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 410262// CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 410263// CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 410264// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 410265// CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 410266// CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 410267// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 410268// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 410269// CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 410270// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 810271// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 810272// CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 810273// CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 810274// CHECK17-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 810275// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810276// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810277// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 810278// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 810279// CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 810280// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 410281// CHECK17-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 410282// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 410283// CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 010284// CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 110285// CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 110286// CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 410287// CHECK17-NEXT: store i32 0, ptr [[I]], align 410288// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 410289// CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]10290// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]10291// CHECK17: omp.precond.then:10292// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 410293// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410294// CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 410295// CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 810296// CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i3210297// CHECK17-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 810298// CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i3210299// CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 410300// CHECK17-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 410301// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 410302// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 410303// CHECK17-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810304// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 410305// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)10306// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 410307// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410308// CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]10309// CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]10310// CHECK17: cond.true:10311// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410312// CHECK17-NEXT: br label [[COND_END:%.*]]10313// CHECK17: cond.false:10314// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 410315// CHECK17-NEXT: br label [[COND_END]]10316// CHECK17: cond.end:10317// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]10318// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 410319// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 410320// CHECK17-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 410321// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]10322// CHECK17: omp.inner.for.cond:10323// CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410324// CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 410325// CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]10326// CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]10327// CHECK17: omp.inner.for.body:10328// CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410329// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 110330// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]10331// CHECK17-NEXT: store i32 [[ADD]], ptr [[I4]], align 410332// CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 410333// CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i6410334// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]10335// CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 410336// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]10337// CHECK17: omp.body.continue:10338// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]10339// CHECK17: omp.inner.for.inc:10340// CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410341// CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 110342// CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 410343// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]10344// CHECK17: omp.inner.for.end:10345// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]10346// CHECK17: omp.loop.exit:10347// CHECK17-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810348// CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 410349// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])10350// CHECK17-NEXT: br label [[OMP_PRECOND_END]]10351// CHECK17: omp.precond.end:10352// CHECK17-NEXT: ret void10353//10354//10355// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l15810356// CHECK17-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {10357// CHECK17-NEXT: entry:10358// CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 810359// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 810360// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810361// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810362// CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 410363// CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 810364// CHECK17-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 810365// CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 810366// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810367// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810368// CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 810369// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 810370// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 410371// CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 410372// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 410373// CHECK17-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 410374// CHECK17-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 810375// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP4]])10376// CHECK17-NEXT: ret void10377//10378//10379// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined10380// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {10381// CHECK17-NEXT: entry:10382// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 810383// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 810384// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 810385// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810386// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810387// CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 810388// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 410389// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 410390// CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 410391// CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 410392// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 410393// CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 410394// CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 410395// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 410396// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 410397// CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 410398// CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 810399// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 810400// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 810401// CHECK17-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 810402// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810403// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810404// CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 810405// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 810406// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 810407// CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 810408// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 410409// CHECK17-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 410410// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410411// CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 010412// CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 110413// CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 110414// CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 410415// CHECK17-NEXT: store i32 0, ptr [[I]], align 410416// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410417// CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]10418// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]10419// CHECK17: omp.precond.then:10420// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 410421// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410422// CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 410423// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 410424// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 410425// CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 410426// CHECK17-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810427// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 410428// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])10429// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410430// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410431// CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]10432// CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]10433// CHECK17: cond.true:10434// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410435// CHECK17-NEXT: br label [[COND_END:%.*]]10436// CHECK17: cond.false:10437// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410438// CHECK17-NEXT: br label [[COND_END]]10439// CHECK17: cond.end:10440// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]10441// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 410442// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 410443// CHECK17-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 410444// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]10445// CHECK17: omp.inner.for.cond:10446// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410447// CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410448// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 110449// CHECK17-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]10450// CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]10451// CHECK17: omp.inner.for.body:10452// CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 410453// CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i6410454// CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410455// CHECK17-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i6410456// CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 410457// CHECK17-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 410458// CHECK17-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 810459// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]], i64 [[TMP22]])10460// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]10461// CHECK17: omp.inner.for.inc:10462// CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410463// CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 410464// CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]10465// CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 410466// CHECK17-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 410467// CHECK17-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 410468// CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]10469// CHECK17-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 410470// CHECK17-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410471// CHECK17-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 410472// CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]10473// CHECK17-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 410474// CHECK17-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410475// CHECK17-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410476// CHECK17-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]10477// CHECK17-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]10478// CHECK17: cond.true11:10479// CHECK17-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410480// CHECK17-NEXT: br label [[COND_END13:%.*]]10481// CHECK17: cond.false12:10482// CHECK17-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410483// CHECK17-NEXT: br label [[COND_END13]]10484// CHECK17: cond.end13:10485// CHECK17-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE11]] ], [ [[TMP32]], [[COND_FALSE12]] ]10486// CHECK17-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 410487// CHECK17-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 410488// CHECK17-NEXT: store i32 [[TMP33]], ptr [[DOTOMP_IV]], align 410489// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]10490// CHECK17: omp.inner.for.end:10491// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]10492// CHECK17: omp.loop.exit:10493// CHECK17-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810494// CHECK17-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 410495// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP35]])10496// CHECK17-NEXT: br label [[OMP_PRECOND_END]]10497// CHECK17: omp.precond.end:10498// CHECK17-NEXT: ret void10499//10500//10501// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined10502// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {10503// CHECK17-NEXT: entry:10504// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 810505// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 810506// CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 810507// CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 810508// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 810509// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810510// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810511// CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 810512// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 410513// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 410514// CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 410515// CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 410516// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 410517// CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 410518// CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 410519// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 410520// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 410521// CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 410522// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 810523// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 810524// CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 810525// CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 810526// CHECK17-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 810527// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810528// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810529// CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 810530// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 810531// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 810532// CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 810533// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 410534// CHECK17-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 410535// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410536// CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 010537// CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 110538// CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 110539// CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 410540// CHECK17-NEXT: store i32 0, ptr [[I]], align 410541// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410542// CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]10543// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]10544// CHECK17: omp.precond.then:10545// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 410546// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410547// CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 410548// CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 810549// CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i3210550// CHECK17-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 810551// CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i3210552// CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 410553// CHECK17-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 410554// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 410555// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 410556// CHECK17-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810557// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 410558// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)10559// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 410560// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410561// CHECK17-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]10562// CHECK17-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]10563// CHECK17: cond.true:10564// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410565// CHECK17-NEXT: br label [[COND_END:%.*]]10566// CHECK17: cond.false:10567// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 410568// CHECK17-NEXT: br label [[COND_END]]10569// CHECK17: cond.end:10570// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]10571// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 410572// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 410573// CHECK17-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 410574// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]10575// CHECK17: omp.inner.for.cond:10576// CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410577// CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 410578// CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]10579// CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]10580// CHECK17: omp.inner.for.body:10581// CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410582// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 110583// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]10584// CHECK17-NEXT: store i32 [[ADD]], ptr [[I5]], align 410585// CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[I5]], align 410586// CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i6410587// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]10588// CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 410589// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]10590// CHECK17: omp.body.continue:10591// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]10592// CHECK17: omp.inner.for.inc:10593// CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410594// CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 110595// CHECK17-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 410596// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]10597// CHECK17: omp.inner.for.end:10598// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]10599// CHECK17: omp.loop.exit:10600// CHECK17-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810601// CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 410602// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])10603// CHECK17-NEXT: br label [[OMP_PRECOND_END]]10604// CHECK17: omp.precond.end:10605// CHECK17-NEXT: ret void10606//10607//10608// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l16310609// CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {10610// CHECK17-NEXT: entry:10611// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 810612// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810613// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810614// CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 810615// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810616// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810617// CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 810618// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 810619// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])10620// CHECK17-NEXT: ret void10621//10622//10623// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined10624// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {10625// CHECK17-NEXT: entry:10626// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 810627// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 810628// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 810629// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810630// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810631// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 410632// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 410633// CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 410634// CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 410635// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 410636// CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 410637// CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 410638// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 410639// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 410640// CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 410641// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 810642// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 810643// CHECK17-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 810644// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810645// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810646// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 810647// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 810648// CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 810649// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 410650// CHECK17-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 410651// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 410652// CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 010653// CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 110654// CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 110655// CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 410656// CHECK17-NEXT: store i32 0, ptr [[I]], align 410657// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 410658// CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]10659// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]10660// CHECK17: omp.precond.then:10661// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 410662// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410663// CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 410664// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 410665// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 410666// CHECK17-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810667// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 410668// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)10669// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410670// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410671// CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]10672// CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]10673// CHECK17: cond.true:10674// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410675// CHECK17-NEXT: br label [[COND_END:%.*]]10676// CHECK17: cond.false:10677// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410678// CHECK17-NEXT: br label [[COND_END]]10679// CHECK17: cond.end:10680// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]10681// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 410682// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 410683// CHECK17-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 410684// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]10685// CHECK17: omp.inner.for.cond:10686// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410687// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410688// CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]10689// CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]10690// CHECK17: omp.inner.for.body:10691// CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 410692// CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i6410693// CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410694// CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i6410695// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])10696// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]10697// CHECK17: omp.inner.for.inc:10698// CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410699// CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 410700// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]10701// CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 410702// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]10703// CHECK17: omp.inner.for.end:10704// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]10705// CHECK17: omp.loop.exit:10706// CHECK17-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810707// CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 410708// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])10709// CHECK17-NEXT: br label [[OMP_PRECOND_END]]10710// CHECK17: omp.precond.end:10711// CHECK17-NEXT: ret void10712//10713//10714// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined10715// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {10716// CHECK17-NEXT: entry:10717// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 810718// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 810719// CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 810720// CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 810721// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 810722// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810723// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810724// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 410725// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 410726// CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 410727// CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 410728// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 410729// CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 410730// CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 410731// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 410732// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 410733// CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 410734// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 810735// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 810736// CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 810737// CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 810738// CHECK17-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 810739// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810740// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810741// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 810742// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 810743// CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 810744// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 410745// CHECK17-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 410746// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 410747// CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 010748// CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 110749// CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 110750// CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 410751// CHECK17-NEXT: store i32 0, ptr [[I]], align 410752// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 410753// CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]10754// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]10755// CHECK17: omp.precond.then:10756// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 410757// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410758// CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 410759// CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 810760// CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i3210761// CHECK17-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 810762// CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i3210763// CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 410764// CHECK17-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 410765// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 410766// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 410767// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 410768// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 410769// CHECK17-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810770// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 410771// CHECK17-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)10772// CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]10773// CHECK17: omp.dispatch.cond:10774// CHECK17-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810775// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 410776// CHECK17-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])10777// CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 010778// CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]10779// CHECK17: omp.dispatch.body:10780// CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 410781// CHECK17-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 410782// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]10783// CHECK17: omp.inner.for.cond:10784// CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]10785// CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]10786// CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]10787// CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]10788// CHECK17: omp.inner.for.body:10789// CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]10790// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 110791// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]10792// CHECK17-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]]10793// CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]]10794// CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i6410795// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]10796// CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]10797// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]10798// CHECK17: omp.body.continue:10799// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]10800// CHECK17: omp.inner.for.inc:10801// CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]10802// CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 110803// CHECK17-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]10804// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]10805// CHECK17: omp.inner.for.end:10806// CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]10807// CHECK17: omp.dispatch.inc:10808// CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]10809// CHECK17: omp.dispatch.end:10810// CHECK17-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810811// CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 410812// CHECK17-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP23]])10813// CHECK17-NEXT: br label [[OMP_PRECOND_END]]10814// CHECK17: omp.precond.end:10815// CHECK17-NEXT: ret void10816//10817//10818// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l16810819// CHECK17-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {10820// CHECK17-NEXT: entry:10821// CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 810822// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 810823// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810824// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810825// CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 410826// CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 810827// CHECK17-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 810828// CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 810829// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810830// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810831// CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 810832// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 810833// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 410834// CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 410835// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 410836// CHECK17-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 410837// CHECK17-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 810838// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP4]])10839// CHECK17-NEXT: ret void10840//10841//10842// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined10843// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {10844// CHECK17-NEXT: entry:10845// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 810846// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 810847// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 810848// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810849// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810850// CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 810851// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 410852// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 410853// CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 410854// CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 410855// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 410856// CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 410857// CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 410858// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 410859// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 410860// CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 410861// CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 810862// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 810863// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 810864// CHECK17-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 810865// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810866// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810867// CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 810868// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 810869// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 810870// CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 810871// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 410872// CHECK17-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 410873// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410874// CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 010875// CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 110876// CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 110877// CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 410878// CHECK17-NEXT: store i32 0, ptr [[I]], align 410879// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410880// CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]10881// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]10882// CHECK17: omp.precond.then:10883// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 410884// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410885// CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 410886// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 410887// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 410888// CHECK17-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810889// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 410890// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)10891// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410892// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410893// CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]10894// CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]10895// CHECK17: cond.true:10896// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410897// CHECK17-NEXT: br label [[COND_END:%.*]]10898// CHECK17: cond.false:10899// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410900// CHECK17-NEXT: br label [[COND_END]]10901// CHECK17: cond.end:10902// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]10903// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 410904// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 410905// CHECK17-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 410906// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]10907// CHECK17: omp.inner.for.cond:10908// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410909// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410910// CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]10911// CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]10912// CHECK17: omp.inner.for.body:10913// CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 410914// CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i6410915// CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 410916// CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i6410917// CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 410918// CHECK17-NEXT: store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 410919// CHECK17-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 810920// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]], i64 [[TMP21]])10921// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]10922// CHECK17: omp.inner.for.inc:10923// CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 410924// CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 410925// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]10926// CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 410927// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]10928// CHECK17: omp.inner.for.end:10929// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]10930// CHECK17: omp.loop.exit:10931// CHECK17-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810932// CHECK17-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 410933// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP25]])10934// CHECK17-NEXT: br label [[OMP_PRECOND_END]]10935// CHECK17: omp.precond.end:10936// CHECK17-NEXT: ret void10937//10938//10939// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined10940// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {10941// CHECK17-NEXT: entry:10942// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 810943// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 810944// CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 810945// CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 810946// CHECK17-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 810947// CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 810948// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 810949// CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 810950// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 410951// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 410952// CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 410953// CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 410954// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 410955// CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 410956// CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 410957// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 410958// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 410959// CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 410960// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 810961// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 810962// CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 810963// CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 810964// CHECK17-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 810965// CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 810966// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 810967// CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 810968// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 810969// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 810970// CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 810971// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 410972// CHECK17-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 410973// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410974// CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 010975// CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 110976// CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 110977// CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 410978// CHECK17-NEXT: store i32 0, ptr [[I]], align 410979// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 410980// CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]10981// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]10982// CHECK17: omp.precond.then:10983// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 410984// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 410985// CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 410986// CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 810987// CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i3210988// CHECK17-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 810989// CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i3210990// CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 410991// CHECK17-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 410992// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 410993// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 410994// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 410995// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 410996// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 410997// CHECK17-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 810998// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 410999// CHECK17-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])11000// CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]11001// CHECK17: omp.dispatch.cond:11002// CHECK17-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 811003// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 411004// CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])11005// CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 011006// CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]11007// CHECK17: omp.dispatch.body:11008// CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 411009// CHECK17-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 411010// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]11011// CHECK17: omp.inner.for.cond:11012// CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]11013// CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]11014// CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]11015// CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]11016// CHECK17: omp.inner.for.body:11017// CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]11018// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 111019// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]11020// CHECK17-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]]11021// CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]]11022// CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i6411023// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]11024// CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]11025// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]11026// CHECK17: omp.body.continue:11027// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]11028// CHECK17: omp.inner.for.inc:11029// CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]11030// CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], 111031// CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]11032// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]11033// CHECK17: omp.inner.for.end:11034// CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]11035// CHECK17: omp.dispatch.inc:11036// CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]11037// CHECK17: omp.dispatch.end:11038// CHECK17-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 811039// CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 411040// CHECK17-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP24]])11041// CHECK17-NEXT: br label [[OMP_PRECOND_END]]11042// CHECK17: omp.precond.end:11043// CHECK17-NEXT: ret void11044//11045//11046// CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_11047// CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {11048// CHECK17-NEXT: entry:11049// CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 411050// CHECK17-NEXT: [[A:%.*]] = alloca [10 x i32], align 411051// CHECK17-NEXT: [[M:%.*]] = alloca i32, align 411052// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 811053// CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 811054// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 811055// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 411056// CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 811057// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 811058// CHECK17-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 811059// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 811060// CHECK17-NEXT: [[_TMP4:%.*]] = alloca i32, align 411061// CHECK17-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 811062// CHECK17-NEXT: [[M_CASTED:%.*]] = alloca i64, align 811063// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 811064// CHECK17-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 811065// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 811066// CHECK17-NEXT: [[_TMP11:%.*]] = alloca i32, align 411067// CHECK17-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 811068// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 811069// CHECK17-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 811070// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 811071// CHECK17-NEXT: [[_TMP18:%.*]] = alloca i32, align 411072// CHECK17-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 811073// CHECK17-NEXT: [[M_CASTED22:%.*]] = alloca i64, align 811074// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [2 x ptr], align 811075// CHECK17-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [2 x ptr], align 811076// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [2 x ptr], align 811077// CHECK17-NEXT: [[_TMP26:%.*]] = alloca i32, align 411078// CHECK17-NEXT: [[KERNEL_ARGS27:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 811079// CHECK17-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 411080// CHECK17-NEXT: store i32 10, ptr [[M]], align 411081// CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 011082// CHECK17-NEXT: store ptr [[A]], ptr [[TMP0]], align 811083// CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 011084// CHECK17-NEXT: store ptr [[A]], ptr [[TMP1]], align 811085// CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 011086// CHECK17-NEXT: store ptr null, ptr [[TMP2]], align 811087// CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 011088// CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 011089// CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 011090// CHECK17-NEXT: store i32 3, ptr [[TMP5]], align 411091// CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111092// CHECK17-NEXT: store i32 1, ptr [[TMP6]], align 411093// CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 211094// CHECK17-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 811095// CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 311096// CHECK17-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 811097// CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 411098// CHECK17-NEXT: store ptr @.offload_sizes.9, ptr [[TMP9]], align 811099// CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 511100// CHECK17-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP10]], align 811101// CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 611102// CHECK17-NEXT: store ptr null, ptr [[TMP11]], align 811103// CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 711104// CHECK17-NEXT: store ptr null, ptr [[TMP12]], align 811105// CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 811106// CHECK17-NEXT: store i64 10, ptr [[TMP13]], align 811107// CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 911108// CHECK17-NEXT: store i64 0, ptr [[TMP14]], align 811109// CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1011110// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 411111// CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1111112// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 411113// CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1211114// CHECK17-NEXT: store i32 0, ptr [[TMP17]], align 411115// CHECK17-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS]])11116// CHECK17-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 011117// CHECK17-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]11118// CHECK17: omp_offload.failed:11119// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]]11120// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]11121// CHECK17: omp_offload.cont:11122// CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 011123// CHECK17-NEXT: store ptr [[A]], ptr [[TMP20]], align 811124// CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 011125// CHECK17-NEXT: store ptr [[A]], ptr [[TMP21]], align 811126// CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 011127// CHECK17-NEXT: store ptr null, ptr [[TMP22]], align 811128// CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 011129// CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 011130// CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 011131// CHECK17-NEXT: store i32 3, ptr [[TMP25]], align 411132// CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 111133// CHECK17-NEXT: store i32 1, ptr [[TMP26]], align 411134// CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 211135// CHECK17-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 811136// CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 311137// CHECK17-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 811138// CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 411139// CHECK17-NEXT: store ptr @.offload_sizes.11, ptr [[TMP29]], align 811140// CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 511141// CHECK17-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP30]], align 811142// CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 611143// CHECK17-NEXT: store ptr null, ptr [[TMP31]], align 811144// CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 711145// CHECK17-NEXT: store ptr null, ptr [[TMP32]], align 811146// CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 811147// CHECK17-NEXT: store i64 10, ptr [[TMP33]], align 811148// CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 911149// CHECK17-NEXT: store i64 0, ptr [[TMP34]], align 811150// CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1011151// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 411152// CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1111153// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 411154// CHECK17-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1211155// CHECK17-NEXT: store i32 0, ptr [[TMP37]], align 411156// CHECK17-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, ptr [[KERNEL_ARGS5]])11157// CHECK17-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 011158// CHECK17-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]11159// CHECK17: omp_offload.failed6:11160// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121(ptr [[A]]) #[[ATTR3]]11161// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT7]]11162// CHECK17: omp_offload.cont7:11163// CHECK17-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 411164// CHECK17-NEXT: store i32 [[TMP40]], ptr [[M_CASTED]], align 411165// CHECK17-NEXT: [[TMP41:%.*]] = load i64, ptr [[M_CASTED]], align 811166// CHECK17-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 011167// CHECK17-NEXT: store i64 [[TMP41]], ptr [[TMP42]], align 811168// CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 011169// CHECK17-NEXT: store i64 [[TMP41]], ptr [[TMP43]], align 811170// CHECK17-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 011171// CHECK17-NEXT: store ptr null, ptr [[TMP44]], align 811172// CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 111173// CHECK17-NEXT: store ptr [[A]], ptr [[TMP45]], align 811174// CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 111175// CHECK17-NEXT: store ptr [[A]], ptr [[TMP46]], align 811176// CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 111177// CHECK17-NEXT: store ptr null, ptr [[TMP47]], align 811178// CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 011179// CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 011180// CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 011181// CHECK17-NEXT: store i32 3, ptr [[TMP50]], align 411182// CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 111183// CHECK17-NEXT: store i32 2, ptr [[TMP51]], align 411184// CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 211185// CHECK17-NEXT: store ptr [[TMP48]], ptr [[TMP52]], align 811186// CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 311187// CHECK17-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 811188// CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 411189// CHECK17-NEXT: store ptr @.offload_sizes.13, ptr [[TMP54]], align 811190// CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 511191// CHECK17-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP55]], align 811192// CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 611193// CHECK17-NEXT: store ptr null, ptr [[TMP56]], align 811194// CHECK17-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 711195// CHECK17-NEXT: store ptr null, ptr [[TMP57]], align 811196// CHECK17-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 811197// CHECK17-NEXT: store i64 10, ptr [[TMP58]], align 811198// CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 911199// CHECK17-NEXT: store i64 0, ptr [[TMP59]], align 811200// CHECK17-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1011201// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP60]], align 411202// CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1111203// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 411204// CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1211205// CHECK17-NEXT: store i32 0, ptr [[TMP62]], align 411206// CHECK17-NEXT: [[TMP63:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, ptr [[KERNEL_ARGS12]])11207// CHECK17-NEXT: [[TMP64:%.*]] = icmp ne i32 [[TMP63]], 011208// CHECK17-NEXT: br i1 [[TMP64]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]11209// CHECK17: omp_offload.failed13:11210// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP41]], ptr [[A]]) #[[ATTR3]]11211// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT14]]11212// CHECK17: omp_offload.cont14:11213// CHECK17-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 011214// CHECK17-NEXT: store ptr [[A]], ptr [[TMP65]], align 811215// CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 011216// CHECK17-NEXT: store ptr [[A]], ptr [[TMP66]], align 811217// CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 011218// CHECK17-NEXT: store ptr null, ptr [[TMP67]], align 811219// CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 011220// CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 011221// CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 011222// CHECK17-NEXT: store i32 3, ptr [[TMP70]], align 411223// CHECK17-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 111224// CHECK17-NEXT: store i32 1, ptr [[TMP71]], align 411225// CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 211226// CHECK17-NEXT: store ptr [[TMP68]], ptr [[TMP72]], align 811227// CHECK17-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 311228// CHECK17-NEXT: store ptr [[TMP69]], ptr [[TMP73]], align 811229// CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 411230// CHECK17-NEXT: store ptr @.offload_sizes.15, ptr [[TMP74]], align 811231// CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 511232// CHECK17-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP75]], align 811233// CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 611234// CHECK17-NEXT: store ptr null, ptr [[TMP76]], align 811235// CHECK17-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 711236// CHECK17-NEXT: store ptr null, ptr [[TMP77]], align 811237// CHECK17-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 811238// CHECK17-NEXT: store i64 10, ptr [[TMP78]], align 811239// CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 911240// CHECK17-NEXT: store i64 0, ptr [[TMP79]], align 811241// CHECK17-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1011242// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP80]], align 411243// CHECK17-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1111244// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP81]], align 411245// CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1211246// CHECK17-NEXT: store i32 0, ptr [[TMP82]], align 411247// CHECK17-NEXT: [[TMP83:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, ptr [[KERNEL_ARGS19]])11248// CHECK17-NEXT: [[TMP84:%.*]] = icmp ne i32 [[TMP83]], 011249// CHECK17-NEXT: br i1 [[TMP84]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]11250// CHECK17: omp_offload.failed20:11251// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131(ptr [[A]]) #[[ATTR3]]11252// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT21]]11253// CHECK17: omp_offload.cont21:11254// CHECK17-NEXT: [[TMP85:%.*]] = load i32, ptr [[M]], align 411255// CHECK17-NEXT: store i32 [[TMP85]], ptr [[M_CASTED22]], align 411256// CHECK17-NEXT: [[TMP86:%.*]] = load i64, ptr [[M_CASTED22]], align 811257// CHECK17-NEXT: [[TMP87:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 011258// CHECK17-NEXT: store i64 [[TMP86]], ptr [[TMP87]], align 811259// CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 011260// CHECK17-NEXT: store i64 [[TMP86]], ptr [[TMP88]], align 811261// CHECK17-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 011262// CHECK17-NEXT: store ptr null, ptr [[TMP89]], align 811263// CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 111264// CHECK17-NEXT: store ptr [[A]], ptr [[TMP90]], align 811265// CHECK17-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 111266// CHECK17-NEXT: store ptr [[A]], ptr [[TMP91]], align 811267// CHECK17-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 111268// CHECK17-NEXT: store ptr null, ptr [[TMP92]], align 811269// CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 011270// CHECK17-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 011271// CHECK17-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 011272// CHECK17-NEXT: store i32 3, ptr [[TMP95]], align 411273// CHECK17-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 111274// CHECK17-NEXT: store i32 2, ptr [[TMP96]], align 411275// CHECK17-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 211276// CHECK17-NEXT: store ptr [[TMP93]], ptr [[TMP97]], align 811277// CHECK17-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 311278// CHECK17-NEXT: store ptr [[TMP94]], ptr [[TMP98]], align 811279// CHECK17-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 411280// CHECK17-NEXT: store ptr @.offload_sizes.17, ptr [[TMP99]], align 811281// CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 511282// CHECK17-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP100]], align 811283// CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 611284// CHECK17-NEXT: store ptr null, ptr [[TMP101]], align 811285// CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 711286// CHECK17-NEXT: store ptr null, ptr [[TMP102]], align 811287// CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 811288// CHECK17-NEXT: store i64 10, ptr [[TMP103]], align 811289// CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 911290// CHECK17-NEXT: store i64 0, ptr [[TMP104]], align 811291// CHECK17-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 1011292// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP105]], align 411293// CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 1111294// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP106]], align 411295// CHECK17-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 1211296// CHECK17-NEXT: store i32 0, ptr [[TMP107]], align 411297// CHECK17-NEXT: [[TMP108:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, ptr [[KERNEL_ARGS27]])11298// CHECK17-NEXT: [[TMP109:%.*]] = icmp ne i32 [[TMP108]], 011299// CHECK17-NEXT: br i1 [[TMP109]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]11300// CHECK17: omp_offload.failed28:11301// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP86]], ptr [[A]]) #[[ATTR3]]11302// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT29]]11303// CHECK17: omp_offload.cont29:11304// CHECK17-NEXT: ret i32 011305//11306//11307// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l11611308// CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {11309// CHECK17-NEXT: entry:11310// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811311// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811312// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811313// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]])11314// CHECK17-NEXT: ret void11315//11316//11317// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined11318// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {11319// CHECK17-NEXT: entry:11320// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 811321// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 811322// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811323// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 411324// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 411325// CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 411326// CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 411327// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 411328// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 411329// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 411330// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 811331// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 811332// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811333// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811334// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 411335// CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 411336// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 411337// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 411338// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 811339// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 411340// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)11341// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411342// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 911343// CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]11344// CHECK17: cond.true:11345// CHECK17-NEXT: br label [[COND_END:%.*]]11346// CHECK17: cond.false:11347// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411348// CHECK17-NEXT: br label [[COND_END]]11349// CHECK17: cond.end:11350// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]11351// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 411352// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 411353// CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 411354// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]11355// CHECK17: omp.inner.for.cond:11356// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411357// CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411358// CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]11359// CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]11360// CHECK17: omp.inner.for.body:11361// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 411362// CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i6411363// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411364// CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i6411365// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])11366// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]11367// CHECK17: omp.inner.for.inc:11368// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411369// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 411370// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]11371// CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 411372// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]11373// CHECK17: omp.inner.for.end:11374// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]11375// CHECK17: omp.loop.exit:11376// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])11377// CHECK17-NEXT: ret void11378//11379//11380// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined11381// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {11382// CHECK17-NEXT: entry:11383// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 811384// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 811385// CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 811386// CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 811387// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811388// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 411389// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 411390// CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 411391// CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 411392// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 411393// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 411394// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 411395// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 811396// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 811397// CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 811398// CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 811399// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811400// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811401// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 411402// CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 411403// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 811404// CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i3211405// CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 811406// CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i3211407// CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 411408// CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 411409// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 411410// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 411411// CHECK17-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 811412// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 411413// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)11414// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 411415// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 911416// CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]11417// CHECK17: cond.true:11418// CHECK17-NEXT: br label [[COND_END:%.*]]11419// CHECK17: cond.false:11420// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 411421// CHECK17-NEXT: br label [[COND_END]]11422// CHECK17: cond.end:11423// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]11424// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 411425// CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 411426// CHECK17-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 411427// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]11428// CHECK17: omp.inner.for.cond:11429// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411430// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 411431// CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]11432// CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]11433// CHECK17: omp.inner.for.body:11434// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411435// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 111436// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]11437// CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 411438// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 411439// CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i6411440// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]11441// CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 411442// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]11443// CHECK17: omp.body.continue:11444// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]11445// CHECK17: omp.inner.for.inc:11446// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411447// CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 111448// CHECK17-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 411449// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]11450// CHECK17: omp.inner.for.end:11451// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]11452// CHECK17: omp.loop.exit:11453// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])11454// CHECK17-NEXT: ret void11455//11456//11457// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l12111458// CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {11459// CHECK17-NEXT: entry:11460// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811461// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811462// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811463// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined, ptr [[TMP0]])11464// CHECK17-NEXT: ret void11465//11466//11467// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined11468// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {11469// CHECK17-NEXT: entry:11470// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 811471// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 811472// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811473// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 411474// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 411475// CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 411476// CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 411477// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 411478// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 411479// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 411480// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 811481// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 811482// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811483// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811484// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 411485// CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 411486// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 411487// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 411488// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 811489// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 411490// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)11491// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411492// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 911493// CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]11494// CHECK17: cond.true:11495// CHECK17-NEXT: br label [[COND_END:%.*]]11496// CHECK17: cond.false:11497// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411498// CHECK17-NEXT: br label [[COND_END]]11499// CHECK17: cond.end:11500// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]11501// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 411502// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 411503// CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 411504// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]11505// CHECK17: omp.inner.for.cond:11506// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411507// CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411508// CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]11509// CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]11510// CHECK17: omp.inner.for.body:11511// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 411512// CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i6411513// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411514// CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i6411515// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])11516// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]11517// CHECK17: omp.inner.for.inc:11518// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411519// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 411520// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]11521// CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 411522// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]11523// CHECK17: omp.inner.for.end:11524// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]11525// CHECK17: omp.loop.exit:11526// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])11527// CHECK17-NEXT: ret void11528//11529//11530// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined11531// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {11532// CHECK17-NEXT: entry:11533// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 811534// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 811535// CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 811536// CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 811537// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811538// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 411539// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 411540// CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 411541// CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 411542// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 411543// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 411544// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 411545// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 811546// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 811547// CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 811548// CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 811549// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811550// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811551// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 411552// CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 411553// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 811554// CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i3211555// CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 811556// CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i3211557// CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 411558// CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 411559// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 411560// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 411561// CHECK17-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 811562// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 411563// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)11564// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 411565// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 911566// CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]11567// CHECK17: cond.true:11568// CHECK17-NEXT: br label [[COND_END:%.*]]11569// CHECK17: cond.false:11570// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 411571// CHECK17-NEXT: br label [[COND_END]]11572// CHECK17: cond.end:11573// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]11574// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 411575// CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 411576// CHECK17-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 411577// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]11578// CHECK17: omp.inner.for.cond:11579// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411580// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 411581// CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]11582// CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]11583// CHECK17: omp.inner.for.body:11584// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411585// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 111586// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]11587// CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 411588// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 411589// CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i6411590// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]11591// CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 411592// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]11593// CHECK17: omp.body.continue:11594// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]11595// CHECK17: omp.inner.for.inc:11596// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411597// CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 111598// CHECK17-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 411599// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]11600// CHECK17: omp.inner.for.end:11601// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]11602// CHECK17: omp.loop.exit:11603// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])11604// CHECK17-NEXT: ret void11605//11606//11607// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l12611608// CHECK17-SAME: (i64 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {11609// CHECK17-NEXT: entry:11610// CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 811611// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811612// CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 411613// CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 811614// CHECK17-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 811615// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811616// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811617// CHECK17-NEXT: [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 411618// CHECK17-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 411619// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 411620// CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 411621// CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 811622// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined, ptr [[TMP0]], i64 [[TMP3]])11623// CHECK17-NEXT: ret void11624//11625//11626// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined11627// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {11628// CHECK17-NEXT: entry:11629// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 811630// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 811631// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811632// CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 811633// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 411634// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 411635// CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 411636// CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 411637// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 411638// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 411639// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 411640// CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 811641// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 811642// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 811643// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811644// CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 811645// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811646// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 411647// CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 411648// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 411649// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 411650// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 811651// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 411652// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)11653// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411654// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 911655// CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]11656// CHECK17: cond.true:11657// CHECK17-NEXT: br label [[COND_END:%.*]]11658// CHECK17: cond.false:11659// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411660// CHECK17-NEXT: br label [[COND_END]]11661// CHECK17: cond.end:11662// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]11663// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 411664// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 411665// CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 411666// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]11667// CHECK17: omp.inner.for.cond:11668// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411669// CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411670// CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]11671// CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]11672// CHECK17: omp.inner.for.body:11673// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 411674// CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i6411675// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411676// CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i6411677// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 411678// CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 411679// CHECK17-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 811680// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]])11681// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]11682// CHECK17: omp.inner.for.inc:11683// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411684// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 411685// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]11686// CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 411687// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]11688// CHECK17: omp.inner.for.end:11689// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]11690// CHECK17: omp.loop.exit:11691// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])11692// CHECK17-NEXT: ret void11693//11694//11695// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined11696// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {11697// CHECK17-NEXT: entry:11698// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 811699// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 811700// CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 811701// CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 811702// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811703// CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 811704// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 411705// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 411706// CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 411707// CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 411708// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 411709// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 411710// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 411711// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 811712// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 811713// CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 811714// CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 811715// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811716// CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 811717// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811718// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 411719// CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 411720// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 811721// CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i3211722// CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 811723// CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i3211724// CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 411725// CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 411726// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 411727// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 411728// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 411729// CHECK17-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 811730// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 411731// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])11732// CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]11733// CHECK17: omp.dispatch.cond:11734// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 411735// CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 811736// CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP7]] to i3211737// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV2]]11738// CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]11739// CHECK17: cond.true:11740// CHECK17-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 811741// CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i3211742// CHECK17-NEXT: br label [[COND_END:%.*]]11743// CHECK17: cond.false:11744// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 411745// CHECK17-NEXT: br label [[COND_END]]11746// CHECK17: cond.end:11747// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]11748// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 411749// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 411750// CHECK17-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 411751// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411752// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 411753// CHECK17-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]11754// CHECK17-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]11755// CHECK17: omp.dispatch.body:11756// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]11757// CHECK17: omp.inner.for.cond:11758// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411759// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 411760// CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]11761// CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]11762// CHECK17: omp.inner.for.body:11763// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411764// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 111765// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]11766// CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 411767// CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 411768// CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i6411769// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]11770// CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 411771// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]11772// CHECK17: omp.body.continue:11773// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]11774// CHECK17: omp.inner.for.inc:11775// CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411776// CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 111777// CHECK17-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 411778// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]11779// CHECK17: omp.inner.for.end:11780// CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]11781// CHECK17: omp.dispatch.inc:11782// CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 411783// CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 411784// CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]11785// CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 411786// CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 411787// CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 411788// CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]11789// CHECK17-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 411790// CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]11791// CHECK17: omp.dispatch.end:11792// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]])11793// CHECK17-NEXT: ret void11794//11795//11796// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l13111797// CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {11798// CHECK17-NEXT: entry:11799// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811800// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811801// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811802// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined, ptr [[TMP0]])11803// CHECK17-NEXT: ret void11804//11805//11806// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined11807// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {11808// CHECK17-NEXT: entry:11809// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 811810// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 811811// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811812// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 411813// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 411814// CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 411815// CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 411816// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 411817// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 411818// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 411819// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 811820// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 811821// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811822// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811823// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 411824// CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 411825// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 411826// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 411827// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 811828// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 411829// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)11830// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411831// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 911832// CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]11833// CHECK17: cond.true:11834// CHECK17-NEXT: br label [[COND_END:%.*]]11835// CHECK17: cond.false:11836// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411837// CHECK17-NEXT: br label [[COND_END]]11838// CHECK17: cond.end:11839// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]11840// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 411841// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 411842// CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 411843// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]11844// CHECK17: omp.inner.for.cond:11845// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411846// CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411847// CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]11848// CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]11849// CHECK17: omp.inner.for.body:11850// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 411851// CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i6411852// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411853// CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i6411854// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])11855// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]11856// CHECK17: omp.inner.for.inc:11857// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 411858// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 411859// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]11860// CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 411861// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]11862// CHECK17: omp.inner.for.end:11863// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]11864// CHECK17: omp.loop.exit:11865// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])11866// CHECK17-NEXT: ret void11867//11868//11869// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined11870// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {11871// CHECK17-NEXT: entry:11872// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 811873// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 811874// CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 811875// CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 811876// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811877// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 411878// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 411879// CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 411880// CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 411881// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 411882// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 411883// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 411884// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 811885// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 811886// CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 811887// CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 811888// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811889// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811890// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 411891// CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 411892// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 811893// CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i3211894// CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 811895// CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i3211896// CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 411897// CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 411898// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 411899// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 411900// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 411901// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 411902// CHECK17-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 811903// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 411904// CHECK17-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)11905// CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]11906// CHECK17: omp.dispatch.cond:11907// CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])11908// CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 011909// CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]11910// CHECK17: omp.dispatch.body:11911// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 411912// CHECK17-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 411913// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]11914// CHECK17: omp.inner.for.cond:11915// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]11916// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]11917// CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]11918// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]11919// CHECK17: omp.inner.for.body:11920// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]11921// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 111922// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]11923// CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]11924// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]11925// CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i6411926// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]11927// CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]]11928// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]11929// CHECK17: omp.body.continue:11930// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]11931// CHECK17: omp.inner.for.inc:11932// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]11933// CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 111934// CHECK17-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]11935// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]11936// CHECK17: omp.inner.for.end:11937// CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]11938// CHECK17: omp.dispatch.inc:11939// CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]11940// CHECK17: omp.dispatch.end:11941// CHECK17-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]])11942// CHECK17-NEXT: ret void11943//11944//11945// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l13611946// CHECK17-SAME: (i64 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {11947// CHECK17-NEXT: entry:11948// CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 811949// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811950// CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 411951// CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 811952// CHECK17-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 811953// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811954// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811955// CHECK17-NEXT: [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 411956// CHECK17-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 411957// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 411958// CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 411959// CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 811960// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined, ptr [[TMP0]], i64 [[TMP3]])11961// CHECK17-NEXT: ret void11962//11963//11964// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined11965// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {11966// CHECK17-NEXT: entry:11967// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 811968// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 811969// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 811970// CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 811971// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 411972// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 411973// CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 411974// CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 411975// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 411976// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 411977// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 411978// CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 811979// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 811980// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 811981// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 811982// CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 811983// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 811984// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 411985// CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 411986// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 411987// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 411988// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 811989// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 411990// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)11991// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411992// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 911993// CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]11994// CHECK17: cond.true:11995// CHECK17-NEXT: br label [[COND_END:%.*]]11996// CHECK17: cond.false:11997// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 411998// CHECK17-NEXT: br label [[COND_END]]11999// CHECK17: cond.end:12000// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]12001// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 412002// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 412003// CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 412004// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]12005// CHECK17: omp.inner.for.cond:12006// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 412007// CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 412008// CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]12009// CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]12010// CHECK17: omp.inner.for.body:12011// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 412012// CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i6412013// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 412014// CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i6412015// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 412016// CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 412017// CHECK17-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 812018// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]])12019// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]12020// CHECK17: omp.inner.for.inc:12021// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 412022// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 412023// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]12024// CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 412025// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]12026// CHECK17: omp.inner.for.end:12027// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]12028// CHECK17: omp.loop.exit:12029// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])12030// CHECK17-NEXT: ret void12031//12032//12033// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined12034// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {12035// CHECK17-NEXT: entry:12036// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 812037// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 812038// CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 812039// CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 812040// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 812041// CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 812042// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 412043// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 412044// CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 412045// CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 412046// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 412047// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 412048// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 412049// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 812050// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 812051// CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 812052// CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 812053// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 812054// CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 812055// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 812056// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 412057// CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 412058// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 812059// CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i3212060// CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 812061// CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i3212062// CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 412063// CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 412064// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 412065// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 412066// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 412067// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 412068// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 412069// CHECK17-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 812070// CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 412071// CHECK17-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])12072// CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]12073// CHECK17: omp.dispatch.cond:12074// CHECK17-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])12075// CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 012076// CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]12077// CHECK17: omp.dispatch.body:12078// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 412079// CHECK17-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 412080// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]12081// CHECK17: omp.inner.for.cond:12082// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]12083// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]]12084// CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]12085// CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]12086// CHECK17: omp.inner.for.body:12087// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]12088// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 112089// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]12090// CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]12091// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]12092// CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i6412093// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]12094// CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]]12095// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]12096// CHECK17: omp.body.continue:12097// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]12098// CHECK17: omp.inner.for.inc:12099// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]12100// CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], 112101// CHECK17-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]12102// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]12103// CHECK17: omp.inner.for.end:12104// CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]12105// CHECK17: omp.dispatch.inc:12106// CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]12107// CHECK17: omp.dispatch.end:12108// CHECK17-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP7]])12109// CHECK17-NEXT: ret void12110//12111//12112// CHECK19-LABEL: define {{[^@]+}}@main12113// CHECK19-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {12114// CHECK19-NEXT: entry:12115// CHECK19-NEXT: [[RETVAL:%.*]] = alloca i32, align 412116// CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 412117// CHECK19-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 412118// CHECK19-NEXT: [[N:%.*]] = alloca i32, align 412119// CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 412120// CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 412121// CHECK19-NEXT: [[M:%.*]] = alloca i32, align 412122// CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 412123// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 412124// CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 412125// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 412126// CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 412127// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 412128// CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 412129// CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 412130// CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 812131// CHECK19-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 412132// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 412133// CHECK19-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 412134// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 412135// CHECK19-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 412136// CHECK19-NEXT: [[_TMP8:%.*]] = alloca i32, align 412137// CHECK19-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 412138// CHECK19-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 412139// CHECK19-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 812140// CHECK19-NEXT: [[M_CASTED:%.*]] = alloca i32, align 412141// CHECK19-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 412142// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x ptr], align 412143// CHECK19-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x ptr], align 412144// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x ptr], align 412145// CHECK19-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 412146// CHECK19-NEXT: [[_TMP23:%.*]] = alloca i32, align 412147// CHECK19-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 412148// CHECK19-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 412149// CHECK19-NEXT: [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 812150// CHECK19-NEXT: [[N_CASTED33:%.*]] = alloca i32, align 412151// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [3 x ptr], align 412152// CHECK19-NEXT: [[DOTOFFLOAD_PTRS35:%.*]] = alloca [3 x ptr], align 412153// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [3 x ptr], align 412154// CHECK19-NEXT: [[DOTOFFLOAD_SIZES37:%.*]] = alloca [3 x i64], align 412155// CHECK19-NEXT: [[_TMP38:%.*]] = alloca i32, align 412156// CHECK19-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 412157// CHECK19-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 412158// CHECK19-NEXT: [[KERNEL_ARGS45:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 812159// CHECK19-NEXT: [[M_CASTED48:%.*]] = alloca i32, align 412160// CHECK19-NEXT: [[N_CASTED49:%.*]] = alloca i32, align 412161// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [4 x ptr], align 412162// CHECK19-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [4 x ptr], align 412163// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [4 x ptr], align 412164// CHECK19-NEXT: [[DOTOFFLOAD_SIZES53:%.*]] = alloca [4 x i64], align 412165// CHECK19-NEXT: [[_TMP54:%.*]] = alloca i32, align 412166// CHECK19-NEXT: [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 412167// CHECK19-NEXT: [[DOTCAPTURE_EXPR_56:%.*]] = alloca i32, align 412168// CHECK19-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 812169// CHECK19-NEXT: store i32 0, ptr [[RETVAL]], align 412170// CHECK19-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 412171// CHECK19-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 412172// CHECK19-NEXT: store i32 100, ptr [[N]], align 412173// CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 412174// CHECK19-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()12175// CHECK19-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 412176// CHECK19-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 412177// CHECK19-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 412178// CHECK19-NEXT: store i32 10, ptr [[M]], align 412179// CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 412180// CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 412181// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 412182// CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 412183// CHECK19-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i6412184// CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false)12185// CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 012186// CHECK19-NEXT: store i32 [[TMP3]], ptr [[TMP6]], align 412187// CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 012188// CHECK19-NEXT: store i32 [[TMP3]], ptr [[TMP7]], align 412189// CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 012190// CHECK19-NEXT: store ptr null, ptr [[TMP8]], align 412191// CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 112192// CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 412193// CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 112194// CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP10]], align 412195// CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 112196// CHECK19-NEXT: store ptr null, ptr [[TMP11]], align 412197// CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 212198// CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 412199// CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 212200// CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 412201// CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 212202// CHECK19-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 412203// CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 212204// CHECK19-NEXT: store ptr null, ptr [[TMP15]], align 412205// CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 012206// CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 012207// CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 012208// CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 412209// CHECK19-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 412210// CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 412211// CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 012212// CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 112213// CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 112214// CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 412215// CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412216// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 112217// CHECK19-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i6412218// CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 012219// CHECK19-NEXT: store i32 3, ptr [[TMP23]], align 412220// CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112221// CHECK19-NEXT: store i32 3, ptr [[TMP24]], align 412222// CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 212223// CHECK19-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 412224// CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 312225// CHECK19-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 412226// CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 412227// CHECK19-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 412228// CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 512229// CHECK19-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 412230// CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 612231// CHECK19-NEXT: store ptr null, ptr [[TMP29]], align 412232// CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 712233// CHECK19-NEXT: store ptr null, ptr [[TMP30]], align 412234// CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 812235// CHECK19-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 812236// CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 912237// CHECK19-NEXT: store i64 0, ptr [[TMP32]], align 812238// CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1012239// CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 412240// CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1112241// CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 412242// CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1212243// CHECK19-NEXT: store i32 0, ptr [[TMP35]], align 412244// CHECK19-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, ptr [[KERNEL_ARGS]])12245// CHECK19-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 012246// CHECK19-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]12247// CHECK19: omp_offload.failed:12248// CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]12249// CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]12250// CHECK19: omp_offload.cont:12251// CHECK19-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 412252// CHECK19-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 412253// CHECK19-NEXT: [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 412254// CHECK19-NEXT: [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 412255// CHECK19-NEXT: [[TMP41:%.*]] = sext i32 [[TMP40]] to i6412256// CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false)12257// CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 012258// CHECK19-NEXT: store i32 [[TMP39]], ptr [[TMP42]], align 412259// CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 012260// CHECK19-NEXT: store i32 [[TMP39]], ptr [[TMP43]], align 412261// CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 012262// CHECK19-NEXT: store ptr null, ptr [[TMP44]], align 412263// CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 112264// CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP45]], align 412265// CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 112266// CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP46]], align 412267// CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 112268// CHECK19-NEXT: store ptr null, ptr [[TMP47]], align 412269// CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 212270// CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 412271// CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 212272// CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP49]], align 412273// CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 212274// CHECK19-NEXT: store i64 [[TMP41]], ptr [[TMP50]], align 412275// CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 212276// CHECK19-NEXT: store ptr null, ptr [[TMP51]], align 412277// CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 012278// CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 012279// CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 012280// CHECK19-NEXT: [[TMP55:%.*]] = load i32, ptr [[N]], align 412281// CHECK19-NEXT: store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 412282// CHECK19-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 412283// CHECK19-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 012284// CHECK19-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 112285// CHECK19-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 112286// CHECK19-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 412287// CHECK19-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 412288// CHECK19-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP57]], 112289// CHECK19-NEXT: [[TMP58:%.*]] = zext i32 [[ADD14]] to i6412290// CHECK19-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 012291// CHECK19-NEXT: store i32 3, ptr [[TMP59]], align 412292// CHECK19-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 112293// CHECK19-NEXT: store i32 3, ptr [[TMP60]], align 412294// CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 212295// CHECK19-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 412296// CHECK19-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 312297// CHECK19-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 412298// CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 412299// CHECK19-NEXT: store ptr [[TMP54]], ptr [[TMP63]], align 412300// CHECK19-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 512301// CHECK19-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP64]], align 412302// CHECK19-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 612303// CHECK19-NEXT: store ptr null, ptr [[TMP65]], align 412304// CHECK19-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 712305// CHECK19-NEXT: store ptr null, ptr [[TMP66]], align 412306// CHECK19-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 812307// CHECK19-NEXT: store i64 [[TMP58]], ptr [[TMP67]], align 812308// CHECK19-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 912309// CHECK19-NEXT: store i64 0, ptr [[TMP68]], align 812310// CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1012311// CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 412312// CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1112313// CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP70]], align 412314// CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1212315// CHECK19-NEXT: store i32 0, ptr [[TMP71]], align 412316// CHECK19-NEXT: [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, ptr [[KERNEL_ARGS15]])12317// CHECK19-NEXT: [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 012318// CHECK19-NEXT: br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]12319// CHECK19: omp_offload.failed16:12320// CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]12321// CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT17]]12322// CHECK19: omp_offload.cont17:12323// CHECK19-NEXT: [[TMP74:%.*]] = load i32, ptr [[M]], align 412324// CHECK19-NEXT: store i32 [[TMP74]], ptr [[M_CASTED]], align 412325// CHECK19-NEXT: [[TMP75:%.*]] = load i32, ptr [[M_CASTED]], align 412326// CHECK19-NEXT: [[TMP76:%.*]] = load i32, ptr [[N]], align 412327// CHECK19-NEXT: store i32 [[TMP76]], ptr [[N_CASTED18]], align 412328// CHECK19-NEXT: [[TMP77:%.*]] = load i32, ptr [[N_CASTED18]], align 412329// CHECK19-NEXT: [[TMP78:%.*]] = mul nuw i32 [[TMP0]], 412330// CHECK19-NEXT: [[TMP79:%.*]] = sext i32 [[TMP78]] to i6412331// CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES22]], ptr align 4 @.offload_sizes.3, i32 32, i1 false)12332// CHECK19-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 012333// CHECK19-NEXT: store i32 [[TMP75]], ptr [[TMP80]], align 412334// CHECK19-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 012335// CHECK19-NEXT: store i32 [[TMP75]], ptr [[TMP81]], align 412336// CHECK19-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 012337// CHECK19-NEXT: store ptr null, ptr [[TMP82]], align 412338// CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 112339// CHECK19-NEXT: store i32 [[TMP77]], ptr [[TMP83]], align 412340// CHECK19-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 112341// CHECK19-NEXT: store i32 [[TMP77]], ptr [[TMP84]], align 412342// CHECK19-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 112343// CHECK19-NEXT: store ptr null, ptr [[TMP85]], align 412344// CHECK19-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 212345// CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP86]], align 412346// CHECK19-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 212347// CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP87]], align 412348// CHECK19-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 212349// CHECK19-NEXT: store ptr null, ptr [[TMP88]], align 412350// CHECK19-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 312351// CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP89]], align 412352// CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 312353// CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP90]], align 412354// CHECK19-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 312355// CHECK19-NEXT: store i64 [[TMP79]], ptr [[TMP91]], align 412356// CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 312357// CHECK19-NEXT: store ptr null, ptr [[TMP92]], align 412358// CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 012359// CHECK19-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 012360// CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 012361// CHECK19-NEXT: [[TMP96:%.*]] = load i32, ptr [[N]], align 412362// CHECK19-NEXT: store i32 [[TMP96]], ptr [[DOTCAPTURE_EXPR_24]], align 412363// CHECK19-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 412364// CHECK19-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP97]], 012365// CHECK19-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 112366// CHECK19-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 112367// CHECK19-NEXT: store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 412368// CHECK19-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 412369// CHECK19-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP98]], 112370// CHECK19-NEXT: [[TMP99:%.*]] = zext i32 [[ADD29]] to i6412371// CHECK19-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 012372// CHECK19-NEXT: store i32 3, ptr [[TMP100]], align 412373// CHECK19-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 112374// CHECK19-NEXT: store i32 4, ptr [[TMP101]], align 412375// CHECK19-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 212376// CHECK19-NEXT: store ptr [[TMP93]], ptr [[TMP102]], align 412377// CHECK19-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 312378// CHECK19-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 412379// CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 412380// CHECK19-NEXT: store ptr [[TMP95]], ptr [[TMP104]], align 412381// CHECK19-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 512382// CHECK19-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP105]], align 412383// CHECK19-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 612384// CHECK19-NEXT: store ptr null, ptr [[TMP106]], align 412385// CHECK19-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 712386// CHECK19-NEXT: store ptr null, ptr [[TMP107]], align 412387// CHECK19-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 812388// CHECK19-NEXT: store i64 [[TMP99]], ptr [[TMP108]], align 812389// CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 912390// CHECK19-NEXT: store i64 0, ptr [[TMP109]], align 812391// CHECK19-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 1012392// CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP110]], align 412393// CHECK19-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 1112394// CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP111]], align 412395// CHECK19-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 1212396// CHECK19-NEXT: store i32 0, ptr [[TMP112]], align 412397// CHECK19-NEXT: [[TMP113:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, ptr [[KERNEL_ARGS30]])12398// CHECK19-NEXT: [[TMP114:%.*]] = icmp ne i32 [[TMP113]], 012399// CHECK19-NEXT: br i1 [[TMP114]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]12400// CHECK19: omp_offload.failed31:12401// CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP75]], i32 [[TMP77]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]12402// CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT32]]12403// CHECK19: omp_offload.cont32:12404// CHECK19-NEXT: [[TMP115:%.*]] = load i32, ptr [[N]], align 412405// CHECK19-NEXT: store i32 [[TMP115]], ptr [[N_CASTED33]], align 412406// CHECK19-NEXT: [[TMP116:%.*]] = load i32, ptr [[N_CASTED33]], align 412407// CHECK19-NEXT: [[TMP117:%.*]] = mul nuw i32 [[TMP0]], 412408// CHECK19-NEXT: [[TMP118:%.*]] = sext i32 [[TMP117]] to i6412409// CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES37]], ptr align 4 @.offload_sizes.5, i32 24, i1 false)12410// CHECK19-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 012411// CHECK19-NEXT: store i32 [[TMP116]], ptr [[TMP119]], align 412412// CHECK19-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 012413// CHECK19-NEXT: store i32 [[TMP116]], ptr [[TMP120]], align 412414// CHECK19-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 012415// CHECK19-NEXT: store ptr null, ptr [[TMP121]], align 412416// CHECK19-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 112417// CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP122]], align 412418// CHECK19-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 112419// CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP123]], align 412420// CHECK19-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 112421// CHECK19-NEXT: store ptr null, ptr [[TMP124]], align 412422// CHECK19-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 212423// CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP125]], align 412424// CHECK19-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 212425// CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP126]], align 412426// CHECK19-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 212427// CHECK19-NEXT: store i64 [[TMP118]], ptr [[TMP127]], align 412428// CHECK19-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 212429// CHECK19-NEXT: store ptr null, ptr [[TMP128]], align 412430// CHECK19-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 012431// CHECK19-NEXT: [[TMP130:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 012432// CHECK19-NEXT: [[TMP131:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 012433// CHECK19-NEXT: [[TMP132:%.*]] = load i32, ptr [[N]], align 412434// CHECK19-NEXT: store i32 [[TMP132]], ptr [[DOTCAPTURE_EXPR_39]], align 412435// CHECK19-NEXT: [[TMP133:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_39]], align 412436// CHECK19-NEXT: [[SUB41:%.*]] = sub nsw i32 [[TMP133]], 012437// CHECK19-NEXT: [[DIV42:%.*]] = sdiv i32 [[SUB41]], 112438// CHECK19-NEXT: [[SUB43:%.*]] = sub nsw i32 [[DIV42]], 112439// CHECK19-NEXT: store i32 [[SUB43]], ptr [[DOTCAPTURE_EXPR_40]], align 412440// CHECK19-NEXT: [[TMP134:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 412441// CHECK19-NEXT: [[ADD44:%.*]] = add nsw i32 [[TMP134]], 112442// CHECK19-NEXT: [[TMP135:%.*]] = zext i32 [[ADD44]] to i6412443// CHECK19-NEXT: [[TMP136:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 012444// CHECK19-NEXT: store i32 3, ptr [[TMP136]], align 412445// CHECK19-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 112446// CHECK19-NEXT: store i32 3, ptr [[TMP137]], align 412447// CHECK19-NEXT: [[TMP138:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 212448// CHECK19-NEXT: store ptr [[TMP129]], ptr [[TMP138]], align 412449// CHECK19-NEXT: [[TMP139:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 312450// CHECK19-NEXT: store ptr [[TMP130]], ptr [[TMP139]], align 412451// CHECK19-NEXT: [[TMP140:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 412452// CHECK19-NEXT: store ptr [[TMP131]], ptr [[TMP140]], align 412453// CHECK19-NEXT: [[TMP141:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 512454// CHECK19-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP141]], align 412455// CHECK19-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 612456// CHECK19-NEXT: store ptr null, ptr [[TMP142]], align 412457// CHECK19-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 712458// CHECK19-NEXT: store ptr null, ptr [[TMP143]], align 412459// CHECK19-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 812460// CHECK19-NEXT: store i64 [[TMP135]], ptr [[TMP144]], align 812461// CHECK19-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 912462// CHECK19-NEXT: store i64 0, ptr [[TMP145]], align 812463// CHECK19-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 1012464// CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP146]], align 412465// CHECK19-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 1112466// CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP147]], align 412467// CHECK19-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 1212468// CHECK19-NEXT: store i32 0, ptr [[TMP148]], align 412469// CHECK19-NEXT: [[TMP149:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, ptr [[KERNEL_ARGS45]])12470// CHECK19-NEXT: [[TMP150:%.*]] = icmp ne i32 [[TMP149]], 012471// CHECK19-NEXT: br i1 [[TMP150]], label [[OMP_OFFLOAD_FAILED46:%.*]], label [[OMP_OFFLOAD_CONT47:%.*]]12472// CHECK19: omp_offload.failed46:12473// CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP116]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]12474// CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT47]]12475// CHECK19: omp_offload.cont47:12476// CHECK19-NEXT: [[TMP151:%.*]] = load i32, ptr [[M]], align 412477// CHECK19-NEXT: store i32 [[TMP151]], ptr [[M_CASTED48]], align 412478// CHECK19-NEXT: [[TMP152:%.*]] = load i32, ptr [[M_CASTED48]], align 412479// CHECK19-NEXT: [[TMP153:%.*]] = load i32, ptr [[N]], align 412480// CHECK19-NEXT: store i32 [[TMP153]], ptr [[N_CASTED49]], align 412481// CHECK19-NEXT: [[TMP154:%.*]] = load i32, ptr [[N_CASTED49]], align 412482// CHECK19-NEXT: [[TMP155:%.*]] = mul nuw i32 [[TMP0]], 412483// CHECK19-NEXT: [[TMP156:%.*]] = sext i32 [[TMP155]] to i6412484// CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES53]], ptr align 4 @.offload_sizes.7, i32 32, i1 false)12485// CHECK19-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 012486// CHECK19-NEXT: store i32 [[TMP152]], ptr [[TMP157]], align 412487// CHECK19-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 012488// CHECK19-NEXT: store i32 [[TMP152]], ptr [[TMP158]], align 412489// CHECK19-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 012490// CHECK19-NEXT: store ptr null, ptr [[TMP159]], align 412491// CHECK19-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 112492// CHECK19-NEXT: store i32 [[TMP154]], ptr [[TMP160]], align 412493// CHECK19-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 112494// CHECK19-NEXT: store i32 [[TMP154]], ptr [[TMP161]], align 412495// CHECK19-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 112496// CHECK19-NEXT: store ptr null, ptr [[TMP162]], align 412497// CHECK19-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 212498// CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP163]], align 412499// CHECK19-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 212500// CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP164]], align 412501// CHECK19-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 212502// CHECK19-NEXT: store ptr null, ptr [[TMP165]], align 412503// CHECK19-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 312504// CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP166]], align 412505// CHECK19-NEXT: [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 312506// CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP167]], align 412507// CHECK19-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 312508// CHECK19-NEXT: store i64 [[TMP156]], ptr [[TMP168]], align 412509// CHECK19-NEXT: [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 312510// CHECK19-NEXT: store ptr null, ptr [[TMP169]], align 412511// CHECK19-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 012512// CHECK19-NEXT: [[TMP171:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 012513// CHECK19-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 012514// CHECK19-NEXT: [[TMP173:%.*]] = load i32, ptr [[N]], align 412515// CHECK19-NEXT: store i32 [[TMP173]], ptr [[DOTCAPTURE_EXPR_55]], align 412516// CHECK19-NEXT: [[TMP174:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_55]], align 412517// CHECK19-NEXT: [[SUB57:%.*]] = sub nsw i32 [[TMP174]], 012518// CHECK19-NEXT: [[DIV58:%.*]] = sdiv i32 [[SUB57]], 112519// CHECK19-NEXT: [[SUB59:%.*]] = sub nsw i32 [[DIV58]], 112520// CHECK19-NEXT: store i32 [[SUB59]], ptr [[DOTCAPTURE_EXPR_56]], align 412521// CHECK19-NEXT: [[TMP175:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_56]], align 412522// CHECK19-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP175]], 112523// CHECK19-NEXT: [[TMP176:%.*]] = zext i32 [[ADD60]] to i6412524// CHECK19-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 012525// CHECK19-NEXT: store i32 3, ptr [[TMP177]], align 412526// CHECK19-NEXT: [[TMP178:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 112527// CHECK19-NEXT: store i32 4, ptr [[TMP178]], align 412528// CHECK19-NEXT: [[TMP179:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 212529// CHECK19-NEXT: store ptr [[TMP170]], ptr [[TMP179]], align 412530// CHECK19-NEXT: [[TMP180:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 312531// CHECK19-NEXT: store ptr [[TMP171]], ptr [[TMP180]], align 412532// CHECK19-NEXT: [[TMP181:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 412533// CHECK19-NEXT: store ptr [[TMP172]], ptr [[TMP181]], align 412534// CHECK19-NEXT: [[TMP182:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 512535// CHECK19-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP182]], align 412536// CHECK19-NEXT: [[TMP183:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 612537// CHECK19-NEXT: store ptr null, ptr [[TMP183]], align 412538// CHECK19-NEXT: [[TMP184:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 712539// CHECK19-NEXT: store ptr null, ptr [[TMP184]], align 412540// CHECK19-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 812541// CHECK19-NEXT: store i64 [[TMP176]], ptr [[TMP185]], align 812542// CHECK19-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 912543// CHECK19-NEXT: store i64 0, ptr [[TMP186]], align 812544// CHECK19-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 1012545// CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP187]], align 412546// CHECK19-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 1112547// CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP188]], align 412548// CHECK19-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 1212549// CHECK19-NEXT: store i32 0, ptr [[TMP189]], align 412550// CHECK19-NEXT: [[TMP190:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, ptr [[KERNEL_ARGS61]])12551// CHECK19-NEXT: [[TMP191:%.*]] = icmp ne i32 [[TMP190]], 012552// CHECK19-NEXT: br i1 [[TMP191]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]12553// CHECK19: omp_offload.failed62:12554// CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP152]], i32 [[TMP154]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]12555// CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT63]]12556// CHECK19: omp_offload.cont63:12557// CHECK19-NEXT: [[TMP192:%.*]] = load i32, ptr [[ARGC_ADDR]], align 412558// CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP192]])12559// CHECK19-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 412560// CHECK19-NEXT: [[TMP193:%.*]] = load ptr, ptr [[SAVED_STACK]], align 412561// CHECK19-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP193]])12562// CHECK19-NEXT: [[TMP194:%.*]] = load i32, ptr [[RETVAL]], align 412563// CHECK19-NEXT: ret i32 [[TMP194]]12564//12565//12566// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14812567// CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {12568// CHECK19-NEXT: entry:12569// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 412570// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 412571// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 412572// CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 412573// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 412574// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 412575// CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 412576// CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 412577// CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])12578// CHECK19-NEXT: ret void12579//12580//12581// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined12582// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {12583// CHECK19-NEXT: entry:12584// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 412585// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 412586// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 412587// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 412588// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 412589// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 412590// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 412591// CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 412592// CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 412593// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 412594// CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 412595// CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 412596// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 412597// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 412598// CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 412599// CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 412600// CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 412601// CHECK19-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 412602// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 412603// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 412604// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 412605// CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 412606// CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 412607// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 412608// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 412609// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 412610// CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 012611// CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 112612// CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 112613// CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 412614// CHECK19-NEXT: store i32 0, ptr [[I]], align 412615// CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 412616// CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]12617// CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]12618// CHECK19: omp.precond.then:12619// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 412620// CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412621// CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 412622// CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 412623// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 412624// CHECK19-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 412625// CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 412626// CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)12627// CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 412628// CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412629// CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]12630// CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]12631// CHECK19: cond.true:12632// CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412633// CHECK19-NEXT: br label [[COND_END:%.*]]12634// CHECK19: cond.false:12635// CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 412636// CHECK19-NEXT: br label [[COND_END]]12637// CHECK19: cond.end:12638// CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]12639// CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 412640// CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 412641// CHECK19-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 412642// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]12643// CHECK19: omp.inner.for.cond:12644// CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 412645// CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 412646// CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]12647// CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]12648// CHECK19: omp.inner.for.body:12649// CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 412650// CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 412651// CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])12652// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]12653// CHECK19: omp.inner.for.inc:12654// CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 412655// CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 412656// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]12657// CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 412658// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]12659// CHECK19: omp.inner.for.end:12660// CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]12661// CHECK19: omp.loop.exit:12662// CHECK19-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 412663// CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 412664// CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])12665// CHECK19-NEXT: br label [[OMP_PRECOND_END]]12666// CHECK19: omp.precond.end:12667// CHECK19-NEXT: ret void12668//12669//12670// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined12671// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {12672// CHECK19-NEXT: entry:12673// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 412674// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 412675// CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 412676// CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 412677// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 412678// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 412679// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 412680// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 412681// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 412682// CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 412683// CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 412684// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 412685// CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 412686// CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 412687// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 412688// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 412689// CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 412690// CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 412691// CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 412692// CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 412693// CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 412694// CHECK19-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 412695// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 412696// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 412697// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 412698// CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 412699// CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 412700// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 412701// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 412702// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 412703// CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 012704// CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 112705// CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 112706// CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 412707// CHECK19-NEXT: store i32 0, ptr [[I]], align 412708// CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 412709// CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]12710// CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]12711// CHECK19: omp.precond.then:12712// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 412713// CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412714// CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 412715// CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 412716// CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 412717// CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 412718// CHECK19-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 412719// CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 412720// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 412721// CHECK19-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 412722// CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 412723// CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)12724// CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 412725// CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412726// CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]12727// CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]12728// CHECK19: cond.true:12729// CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412730// CHECK19-NEXT: br label [[COND_END:%.*]]12731// CHECK19: cond.false:12732// CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 412733// CHECK19-NEXT: br label [[COND_END]]12734// CHECK19: cond.end:12735// CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]12736// CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 412737// CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 412738// CHECK19-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 412739// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]12740// CHECK19: omp.inner.for.cond:12741// CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 412742// CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 412743// CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]12744// CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]12745// CHECK19: omp.inner.for.body:12746// CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 412747// CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 112748// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]12749// CHECK19-NEXT: store i32 [[ADD]], ptr [[I3]], align 412750// CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[I3]], align 412751// CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]]12752// CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 412753// CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]12754// CHECK19: omp.body.continue:12755// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]12756// CHECK19: omp.inner.for.inc:12757// CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 412758// CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 112759// CHECK19-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 412760// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]12761// CHECK19: omp.inner.for.end:12762// CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]12763// CHECK19: omp.loop.exit:12764// CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 412765// CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 412766// CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])12767// CHECK19-NEXT: br label [[OMP_PRECOND_END]]12768// CHECK19: omp.precond.end:12769// CHECK19-NEXT: ret void12770//12771//12772// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l15312773// CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {12774// CHECK19-NEXT: entry:12775// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 412776// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 412777// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 412778// CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 412779// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 412780// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 412781// CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 412782// CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 412783// CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])12784// CHECK19-NEXT: ret void12785//12786//12787// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined12788// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {12789// CHECK19-NEXT: entry:12790// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 412791// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 412792// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 412793// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 412794// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 412795// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 412796// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 412797// CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 412798// CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 412799// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 412800// CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 412801// CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 412802// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 412803// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 412804// CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 412805// CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 412806// CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 412807// CHECK19-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 412808// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 412809// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 412810// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 412811// CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 412812// CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 412813// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 412814// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 412815// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 412816// CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 012817// CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 112818// CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 112819// CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 412820// CHECK19-NEXT: store i32 0, ptr [[I]], align 412821// CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 412822// CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]12823// CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]12824// CHECK19: omp.precond.then:12825// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 412826// CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412827// CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 412828// CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 412829// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 412830// CHECK19-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 412831// CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 412832// CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)12833// CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 412834// CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412835// CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]12836// CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]12837// CHECK19: cond.true:12838// CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412839// CHECK19-NEXT: br label [[COND_END:%.*]]12840// CHECK19: cond.false:12841// CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 412842// CHECK19-NEXT: br label [[COND_END]]12843// CHECK19: cond.end:12844// CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]12845// CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 412846// CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 412847// CHECK19-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 412848// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]12849// CHECK19: omp.inner.for.cond:12850// CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 412851// CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 412852// CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]12853// CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]12854// CHECK19: omp.inner.for.body:12855// CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 412856// CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 412857// CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])12858// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]12859// CHECK19: omp.inner.for.inc:12860// CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 412861// CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 412862// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]12863// CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 412864// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]12865// CHECK19: omp.inner.for.end:12866// CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]12867// CHECK19: omp.loop.exit:12868// CHECK19-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 412869// CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 412870// CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])12871// CHECK19-NEXT: br label [[OMP_PRECOND_END]]12872// CHECK19: omp.precond.end:12873// CHECK19-NEXT: ret void12874//12875//12876// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined12877// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {12878// CHECK19-NEXT: entry:12879// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 412880// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 412881// CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 412882// CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 412883// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 412884// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 412885// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 412886// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 412887// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 412888// CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 412889// CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 412890// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 412891// CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 412892// CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 412893// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 412894// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 412895// CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 412896// CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 412897// CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 412898// CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 412899// CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 412900// CHECK19-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 412901// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 412902// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 412903// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 412904// CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 412905// CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 412906// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 412907// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 412908// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 412909// CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 012910// CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 112911// CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 112912// CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 412913// CHECK19-NEXT: store i32 0, ptr [[I]], align 412914// CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 412915// CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]12916// CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]12917// CHECK19: omp.precond.then:12918// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 412919// CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412920// CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 412921// CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 412922// CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 412923// CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 412924// CHECK19-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 412925// CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 412926// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 412927// CHECK19-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 412928// CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 412929// CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)12930// CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 412931// CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412932// CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]12933// CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]12934// CHECK19: cond.true:12935// CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 412936// CHECK19-NEXT: br label [[COND_END:%.*]]12937// CHECK19: cond.false:12938// CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 412939// CHECK19-NEXT: br label [[COND_END]]12940// CHECK19: cond.end:12941// CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]12942// CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 412943// CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 412944// CHECK19-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 412945// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]12946// CHECK19: omp.inner.for.cond:12947// CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 412948// CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 412949// CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]12950// CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]12951// CHECK19: omp.inner.for.body:12952// CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 412953// CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 112954// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]12955// CHECK19-NEXT: store i32 [[ADD]], ptr [[I3]], align 412956// CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[I3]], align 412957// CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]]12958// CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 412959// CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]12960// CHECK19: omp.body.continue:12961// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]12962// CHECK19: omp.inner.for.inc:12963// CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 412964// CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 112965// CHECK19-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 412966// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]12967// CHECK19: omp.inner.for.end:12968// CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]12969// CHECK19: omp.loop.exit:12970// CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 412971// CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 412972// CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])12973// CHECK19-NEXT: br label [[OMP_PRECOND_END]]12974// CHECK19: omp.precond.end:12975// CHECK19-NEXT: ret void12976//12977//12978// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l15812979// CHECK19-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {12980// CHECK19-NEXT: entry:12981// CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 412982// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 412983// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 412984// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 412985// CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 412986// CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 412987// CHECK19-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 412988// CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 412989// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 412990// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 412991// CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 412992// CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 412993// CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 412994// CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 412995// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 412996// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 412997// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 412998// CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP4]])12999// CHECK19-NEXT: ret void13000//13001//13002// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined13003// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {13004// CHECK19-NEXT: entry:13005// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 413006// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 413007// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 413008// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 413009// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 413010// CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 413011// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 413012// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 413013// CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 413014// CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 413015// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 413016// CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 413017// CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 413018// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 413019// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 413020// CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 413021// CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 413022// CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 413023// CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 413024// CHECK19-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 413025// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 413026// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 413027// CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 413028// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 413029// CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 413030// CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 413031// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 413032// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 413033// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 413034// CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 013035// CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 113036// CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 113037// CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 413038// CHECK19-NEXT: store i32 0, ptr [[I]], align 413039// CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 413040// CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]13041// CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]13042// CHECK19: omp.precond.then:13043// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 413044// CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413045// CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 413046// CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 413047// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 413048// CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 413049// CHECK19-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413050// CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 413051// CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])13052// CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413053// CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413054// CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]13055// CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]13056// CHECK19: cond.true:13057// CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413058// CHECK19-NEXT: br label [[COND_END:%.*]]13059// CHECK19: cond.false:13060// CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413061// CHECK19-NEXT: br label [[COND_END]]13062// CHECK19: cond.end:13063// CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]13064// CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 413065// CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 413066// CHECK19-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 413067// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]13068// CHECK19: omp.inner.for.cond:13069// CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 413070// CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413071// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 113072// CHECK19-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]13073// CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]13074// CHECK19: omp.inner.for.body:13075// CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 413076// CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413077// CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 413078// CHECK19-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 413079// CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 413080// CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]], i32 [[TMP20]])13081// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]13082// CHECK19: omp.inner.for.inc:13083// CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 413084// CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 413085// CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]13086// CHECK19-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 413087// CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 413088// CHECK19-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 413089// CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]13090// CHECK19-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 413091// CHECK19-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413092// CHECK19-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 413093// CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]13094// CHECK19-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 413095// CHECK19-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413096// CHECK19-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413097// CHECK19-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]13098// CHECK19-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]13099// CHECK19: cond.true11:13100// CHECK19-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413101// CHECK19-NEXT: br label [[COND_END13:%.*]]13102// CHECK19: cond.false12:13103// CHECK19-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413104// CHECK19-NEXT: br label [[COND_END13]]13105// CHECK19: cond.end13:13106// CHECK19-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]13107// CHECK19-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 413108// CHECK19-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 413109// CHECK19-NEXT: store i32 [[TMP31]], ptr [[DOTOMP_IV]], align 413110// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]13111// CHECK19: omp.inner.for.end:13112// CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]13113// CHECK19: omp.loop.exit:13114// CHECK19-NEXT: [[TMP32:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413115// CHECK19-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 413116// CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP33]])13117// CHECK19-NEXT: br label [[OMP_PRECOND_END]]13118// CHECK19: omp.precond.end:13119// CHECK19-NEXT: ret void13120//13121//13122// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined13123// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {13124// CHECK19-NEXT: entry:13125// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 413126// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 413127// CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 413128// CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 413129// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 413130// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 413131// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 413132// CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 413133// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 413134// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 413135// CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 413136// CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 413137// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 413138// CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 413139// CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 413140// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 413141// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 413142// CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 413143// CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 413144// CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 413145// CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 413146// CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 413147// CHECK19-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 413148// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 413149// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 413150// CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 413151// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 413152// CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 413153// CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 413154// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 413155// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 413156// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 413157// CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 013158// CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 113159// CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 113160// CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 413161// CHECK19-NEXT: store i32 0, ptr [[I]], align 413162// CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 413163// CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]13164// CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]13165// CHECK19: omp.precond.then:13166// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 413167// CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413168// CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 413169// CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 413170// CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 413171// CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 413172// CHECK19-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 413173// CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 413174// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 413175// CHECK19-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413176// CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 413177// CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)13178// CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 413179// CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413180// CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]13181// CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]13182// CHECK19: cond.true:13183// CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413184// CHECK19-NEXT: br label [[COND_END:%.*]]13185// CHECK19: cond.false:13186// CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 413187// CHECK19-NEXT: br label [[COND_END]]13188// CHECK19: cond.end:13189// CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]13190// CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 413191// CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 413192// CHECK19-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 413193// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]13194// CHECK19: omp.inner.for.cond:13195// CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 413196// CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 413197// CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]13198// CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]13199// CHECK19: omp.inner.for.body:13200// CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 413201// CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 113202// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]13203// CHECK19-NEXT: store i32 [[ADD]], ptr [[I4]], align 413204// CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 413205// CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]]13206// CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 413207// CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]13208// CHECK19: omp.body.continue:13209// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]13210// CHECK19: omp.inner.for.inc:13211// CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 413212// CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 113213// CHECK19-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 413214// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]13215// CHECK19: omp.inner.for.end:13216// CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]13217// CHECK19: omp.loop.exit:13218// CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413219// CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 413220// CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])13221// CHECK19-NEXT: br label [[OMP_PRECOND_END]]13222// CHECK19: omp.precond.end:13223// CHECK19-NEXT: ret void13224//13225//13226// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l16313227// CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {13228// CHECK19-NEXT: entry:13229// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 413230// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 413231// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 413232// CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 413233// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 413234// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 413235// CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 413236// CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 413237// CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])13238// CHECK19-NEXT: ret void13239//13240//13241// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined13242// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {13243// CHECK19-NEXT: entry:13244// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 413245// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 413246// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 413247// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 413248// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 413249// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 413250// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 413251// CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 413252// CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 413253// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 413254// CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 413255// CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 413256// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 413257// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 413258// CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 413259// CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 413260// CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 413261// CHECK19-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 413262// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 413263// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 413264// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 413265// CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 413266// CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 413267// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 413268// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 413269// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 413270// CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 013271// CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 113272// CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 113273// CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 413274// CHECK19-NEXT: store i32 0, ptr [[I]], align 413275// CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 413276// CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]13277// CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]13278// CHECK19: omp.precond.then:13279// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 413280// CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 413281// CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 413282// CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 413283// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 413284// CHECK19-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413285// CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 413286// CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)13287// CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413288// CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 413289// CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]13290// CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]13291// CHECK19: cond.true:13292// CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 413293// CHECK19-NEXT: br label [[COND_END:%.*]]13294// CHECK19: cond.false:13295// CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413296// CHECK19-NEXT: br label [[COND_END]]13297// CHECK19: cond.end:13298// CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]13299// CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 413300// CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 413301// CHECK19-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 413302// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]13303// CHECK19: omp.inner.for.cond:13304// CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 413305// CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413306// CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]13307// CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]13308// CHECK19: omp.inner.for.body:13309// CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 413310// CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413311// CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])13312// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]13313// CHECK19: omp.inner.for.inc:13314// CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 413315// CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 413316// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]13317// CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 413318// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]13319// CHECK19: omp.inner.for.end:13320// CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]13321// CHECK19: omp.loop.exit:13322// CHECK19-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413323// CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 413324// CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])13325// CHECK19-NEXT: br label [[OMP_PRECOND_END]]13326// CHECK19: omp.precond.end:13327// CHECK19-NEXT: ret void13328//13329//13330// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined13331// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {13332// CHECK19-NEXT: entry:13333// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 413334// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 413335// CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 413336// CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 413337// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 413338// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 413339// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 413340// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 413341// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 413342// CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 413343// CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 413344// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 413345// CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 413346// CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 413347// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 413348// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 413349// CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 413350// CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 413351// CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 413352// CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 413353// CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 413354// CHECK19-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 413355// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 413356// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 413357// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 413358// CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 413359// CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 413360// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 413361// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 413362// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 413363// CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 013364// CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 113365// CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 113366// CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 413367// CHECK19-NEXT: store i32 0, ptr [[I]], align 413368// CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 413369// CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]13370// CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]13371// CHECK19: omp.precond.then:13372// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 413373// CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 413374// CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 413375// CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 413376// CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 413377// CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 413378// CHECK19-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 413379// CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 413380// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 413381// CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 413382// CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 413383// CHECK19-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413384// CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 413385// CHECK19-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)13386// CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]13387// CHECK19: omp.dispatch.cond:13388// CHECK19-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413389// CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 413390// CHECK19-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])13391// CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 013392// CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]13393// CHECK19: omp.dispatch.body:13394// CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 413395// CHECK19-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 413396// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]13397// CHECK19: omp.inner.for.cond:13398// CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]13399// CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]13400// CHECK19-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]13401// CHECK19-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]13402// CHECK19: omp.inner.for.body:13403// CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]13404// CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 113405// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]13406// CHECK19-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]13407// CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]13408// CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP20]]13409// CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]13410// CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]13411// CHECK19: omp.body.continue:13412// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]13413// CHECK19: omp.inner.for.inc:13414// CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]13415// CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 113416// CHECK19-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]13417// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]13418// CHECK19: omp.inner.for.end:13419// CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]13420// CHECK19: omp.dispatch.inc:13421// CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]13422// CHECK19: omp.dispatch.end:13423// CHECK19-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413424// CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 413425// CHECK19-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP23]])13426// CHECK19-NEXT: br label [[OMP_PRECOND_END]]13427// CHECK19: omp.precond.end:13428// CHECK19-NEXT: ret void13429//13430//13431// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l16813432// CHECK19-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {13433// CHECK19-NEXT: entry:13434// CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 413435// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 413436// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 413437// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 413438// CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 413439// CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 413440// CHECK19-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 413441// CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 413442// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 413443// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 413444// CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 413445// CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 413446// CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 413447// CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 413448// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 413449// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 413450// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 413451// CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP4]])13452// CHECK19-NEXT: ret void13453//13454//13455// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined13456// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {13457// CHECK19-NEXT: entry:13458// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 413459// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 413460// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 413461// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 413462// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 413463// CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 413464// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 413465// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 413466// CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 413467// CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 413468// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 413469// CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 413470// CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 413471// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 413472// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 413473// CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 413474// CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 413475// CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 413476// CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 413477// CHECK19-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 413478// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 413479// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 413480// CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 413481// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 413482// CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 413483// CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 413484// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 413485// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 413486// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 413487// CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 013488// CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 113489// CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 113490// CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 413491// CHECK19-NEXT: store i32 0, ptr [[I]], align 413492// CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 413493// CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]13494// CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]13495// CHECK19: omp.precond.then:13496// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 413497// CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413498// CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 413499// CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 413500// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 413501// CHECK19-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413502// CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 413503// CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)13504// CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413505// CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413506// CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]13507// CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]13508// CHECK19: cond.true:13509// CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413510// CHECK19-NEXT: br label [[COND_END:%.*]]13511// CHECK19: cond.false:13512// CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413513// CHECK19-NEXT: br label [[COND_END]]13514// CHECK19: cond.end:13515// CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]13516// CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 413517// CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 413518// CHECK19-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 413519// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]13520// CHECK19: omp.inner.for.cond:13521// CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 413522// CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413523// CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]13524// CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]13525// CHECK19: omp.inner.for.body:13526// CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 413527// CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 413528// CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 413529// CHECK19-NEXT: store i32 [[TMP18]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 413530// CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 413531// CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]], i32 [[TMP19]])13532// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]13533// CHECK19: omp.inner.for.inc:13534// CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 413535// CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 413536// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]13537// CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 413538// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]13539// CHECK19: omp.inner.for.end:13540// CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]13541// CHECK19: omp.loop.exit:13542// CHECK19-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413543// CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 413544// CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])13545// CHECK19-NEXT: br label [[OMP_PRECOND_END]]13546// CHECK19: omp.precond.end:13547// CHECK19-NEXT: ret void13548//13549//13550// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined13551// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {13552// CHECK19-NEXT: entry:13553// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 413554// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 413555// CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 413556// CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 413557// CHECK19-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 413558// CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 413559// CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 413560// CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 413561// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 413562// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 413563// CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 413564// CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 413565// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 413566// CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 413567// CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 413568// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 413569// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 413570// CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 413571// CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 413572// CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 413573// CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 413574// CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 413575// CHECK19-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 413576// CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 413577// CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 413578// CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 413579// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 413580// CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 413581// CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 413582// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 413583// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 413584// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 413585// CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 013586// CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 113587// CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 113588// CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 413589// CHECK19-NEXT: store i32 0, ptr [[I]], align 413590// CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 413591// CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]13592// CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]13593// CHECK19: omp.precond.then:13594// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 413595// CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 413596// CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 413597// CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 413598// CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 413599// CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 413600// CHECK19-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 413601// CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 413602// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 413603// CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 413604// CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 413605// CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 413606// CHECK19-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413607// CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 413608// CHECK19-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])13609// CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]13610// CHECK19: omp.dispatch.cond:13611// CHECK19-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413612// CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 413613// CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])13614// CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 013615// CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]13616// CHECK19: omp.dispatch.body:13617// CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 413618// CHECK19-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 413619// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]13620// CHECK19: omp.inner.for.cond:13621// CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]13622// CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]13623// CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]13624// CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]13625// CHECK19: omp.inner.for.body:13626// CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]13627// CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 113628// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]13629// CHECK19-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]13630// CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]13631// CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP21]]13632// CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]]13633// CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]13634// CHECK19: omp.body.continue:13635// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]13636// CHECK19: omp.inner.for.inc:13637// CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]13638// CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 113639// CHECK19-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]13640// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]13641// CHECK19: omp.inner.for.end:13642// CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]13643// CHECK19: omp.dispatch.inc:13644// CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]13645// CHECK19: omp.dispatch.end:13646// CHECK19-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 413647// CHECK19-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 413648// CHECK19-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP24]])13649// CHECK19-NEXT: br label [[OMP_PRECOND_END]]13650// CHECK19: omp.precond.end:13651// CHECK19-NEXT: ret void13652//13653//13654// CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_13655// CHECK19-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {13656// CHECK19-NEXT: entry:13657// CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 413658// CHECK19-NEXT: [[A:%.*]] = alloca [10 x i32], align 413659// CHECK19-NEXT: [[M:%.*]] = alloca i32, align 413660// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 413661// CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 413662// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 413663// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 413664// CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 813665// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 413666// CHECK19-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 413667// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 413668// CHECK19-NEXT: [[_TMP4:%.*]] = alloca i32, align 413669// CHECK19-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 813670// CHECK19-NEXT: [[M_CASTED:%.*]] = alloca i32, align 413671// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 413672// CHECK19-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 413673// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 413674// CHECK19-NEXT: [[_TMP11:%.*]] = alloca i32, align 413675// CHECK19-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 813676// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 413677// CHECK19-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 413678// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 413679// CHECK19-NEXT: [[_TMP18:%.*]] = alloca i32, align 413680// CHECK19-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 813681// CHECK19-NEXT: [[M_CASTED22:%.*]] = alloca i32, align 413682// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [2 x ptr], align 413683// CHECK19-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [2 x ptr], align 413684// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [2 x ptr], align 413685// CHECK19-NEXT: [[_TMP26:%.*]] = alloca i32, align 413686// CHECK19-NEXT: [[KERNEL_ARGS27:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 813687// CHECK19-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 413688// CHECK19-NEXT: store i32 10, ptr [[M]], align 413689// CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 013690// CHECK19-NEXT: store ptr [[A]], ptr [[TMP0]], align 413691// CHECK19-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 013692// CHECK19-NEXT: store ptr [[A]], ptr [[TMP1]], align 413693// CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 013694// CHECK19-NEXT: store ptr null, ptr [[TMP2]], align 413695// CHECK19-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 013696// CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 013697// CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 013698// CHECK19-NEXT: store i32 3, ptr [[TMP5]], align 413699// CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 113700// CHECK19-NEXT: store i32 1, ptr [[TMP6]], align 413701// CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 213702// CFile truncated to the first 1 MiB.