4863 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// expected-no-diagnostics3#ifndef HEADER4#define HEADER5// Test host codegen.6// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s8// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK310// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK312 13// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK514// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s15// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK516// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK717// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK719#ifdef CK120 21int a[100];22 23int teams_argument_global(int n){24 int te = n / 128;25 int th = 128;26 // discard n_addr27 28 29 #pragma omp target30 #pragma omp teams distribute parallel for simd num_teams(te), thread_limit(th) simdlen(64)31 for(int i = 0; i < n; i++) {32 a[i] = 0;33 }34 35 int i;36 #pragma omp target37 {{{38 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i)39 for(i = 0; i < n; i++) {40 a[i] = 0;41 }42 }}}43 // outlined target regions44 45 46 47 48 return a[0];49}50 51 52#endif // CK153 54// Test host codegen.55// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK956// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s57// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK958// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1159// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s60// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1161 62// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1363// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s64// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1365// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1566// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s67// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1568#ifdef CK269 70int teams_local_arg(void) {71 int n = 100;72 int a[n], i;73 74 #pragma omp target75 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i)76 for(i = 0; i < n; i++) {77 a[i] = 0;78 }79 80 // outlined target region81 82 83 return a[0];84}85 86 87#endif // CK288 89// Test host codegen.90// RUN: %clang_cc1 -DCK3 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1791// RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s92// RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1793// RUN: %clang_cc1 -DCK3 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1994// RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s95// RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1996 97// RUN: %clang_cc1 -DCK3 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK2198// RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s99// RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK21100// RUN: %clang_cc1 -DCK3 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23101// RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s102// RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK23103#ifdef CK3104 105 106template <typename T, int X, long long Y>107struct SS{108 T a[X];109 float b;110 int foo(void) {111 int i;112 #pragma omp target113 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i)114 for(i = 0; i < X; i++) {115 a[i] = (T)0;116 }117 118 // outlined target region119 120 121 return a[0];122 }123};124 125int teams_template_struct(void) {126 SS<int, 123, 456> V;127 return V.foo();128 129}130 131#endif // CK3132 133// Test host codegen.134// RUN: %clang_cc1 -DCK4 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK25135// RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s136// RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK25137// RUN: %clang_cc1 -DCK4 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK27138// RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s139// RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK27140 141// RUN: %clang_cc1 -DCK4 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK29142// RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s143// RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK29144// RUN: %clang_cc1 -DCK4 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK31145// RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s146// RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK31147 148#ifdef CK4149 150template <typename T, int n>151int tmain(T argc) {152 T a[n];153 int te = n/128;154 int th = 128;155#pragma omp target156#pragma omp teams distribute parallel for simd num_teams(te) thread_limit(th) simdlen(64)157 for(int i = 0; i < n; i++) {158 a[i] = (T)0;159 }160 return 0;161}162 163int main (int argc, char **argv) {164 int n = 100;165 int a[n], i;166#pragma omp target167#pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i)168 for(i = 0; i < n; i++) {169 a[i] = 0;170 }171 return tmain<int, 10>(argc);172}173 174 175 176 177 178 179 180 181#endif // CK4182#endif183 184// CHECK1-LABEL: define {{[^@]+}}@_Z21teams_argument_globali185// CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {186// CHECK1-NEXT: entry:187// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4188// CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4189// CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4190// CHECK1-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8191// CHECK1-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8192// CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8193// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8194// CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8195// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8196// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4197// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4198// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4199// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8200// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4201// CHECK1-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8202// CHECK1-NEXT: [[N_CASTED4:%.*]] = alloca i64, align 8203// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x ptr], align 8204// CHECK1-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x ptr], align 8205// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x ptr], align 8206// CHECK1-NEXT: [[_TMP8:%.*]] = alloca i32, align 4207// CHECK1-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4208// CHECK1-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4209// CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8210// CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4211// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4212// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128213// CHECK1-NEXT: store i32 [[DIV]], ptr [[TE]], align 4214// CHECK1-NEXT: store i32 128, ptr [[TH]], align 4215// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TE]], align 4216// CHECK1-NEXT: store i32 [[TMP1]], ptr [[TE_CASTED]], align 4217// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[TE_CASTED]], align 8218// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH]], align 4219// CHECK1-NEXT: store i32 [[TMP3]], ptr [[TH_CASTED]], align 4220// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[TH_CASTED]], align 8221// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_ADDR]], align 4222// CHECK1-NEXT: store i32 [[TMP5]], ptr [[N_CASTED]], align 4223// CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[N_CASTED]], align 8224// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0225// CHECK1-NEXT: store i64 [[TMP2]], ptr [[TMP7]], align 8226// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0227// CHECK1-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8228// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0229// CHECK1-NEXT: store ptr null, ptr [[TMP9]], align 8230// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1231// CHECK1-NEXT: store i64 [[TMP4]], ptr [[TMP10]], align 8232// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1233// CHECK1-NEXT: store i64 [[TMP4]], ptr [[TMP11]], align 8234// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1235// CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8236// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2237// CHECK1-NEXT: store i64 [[TMP6]], ptr [[TMP13]], align 8238// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2239// CHECK1-NEXT: store i64 [[TMP6]], ptr [[TMP14]], align 8240// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2241// CHECK1-NEXT: store ptr null, ptr [[TMP15]], align 8242// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3243// CHECK1-NEXT: store ptr @a, ptr [[TMP16]], align 8244// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3245// CHECK1-NEXT: store ptr @a, ptr [[TMP17]], align 8246// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3247// CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8248// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0249// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0250// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[TE]], align 4251// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[TH]], align 4252// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[N_ADDR]], align 4253// CHECK1-NEXT: store i32 [[TMP23]], ptr [[DOTCAPTURE_EXPR_]], align 4254// CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4255// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP24]], 0256// CHECK1-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1257// CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1258// CHECK1-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4259// CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4260// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], 1261// CHECK1-NEXT: [[TMP26:%.*]] = zext i32 [[ADD]] to i64262// CHECK1-NEXT: [[TMP27:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP21]], 0263// CHECK1-NEXT: [[TMP28:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP22]], 0264// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0265// CHECK1-NEXT: store i32 3, ptr [[TMP29]], align 4266// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1267// CHECK1-NEXT: store i32 4, ptr [[TMP30]], align 4268// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2269// CHECK1-NEXT: store ptr [[TMP19]], ptr [[TMP31]], align 8270// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3271// CHECK1-NEXT: store ptr [[TMP20]], ptr [[TMP32]], align 8272// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4273// CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP33]], align 8274// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5275// CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP34]], align 8276// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6277// CHECK1-NEXT: store ptr null, ptr [[TMP35]], align 8278// CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7279// CHECK1-NEXT: store ptr null, ptr [[TMP36]], align 8280// CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8281// CHECK1-NEXT: store i64 [[TMP26]], ptr [[TMP37]], align 8282// CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9283// CHECK1-NEXT: store i64 0, ptr [[TMP38]], align 8284// CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10285// CHECK1-NEXT: store [3 x i32] [[TMP27]], ptr [[TMP39]], align 4286// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11287// CHECK1-NEXT: store [3 x i32] [[TMP28]], ptr [[TMP40]], align 4288// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12289// CHECK1-NEXT: store i32 0, ptr [[TMP41]], align 4290// CHECK1-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 [[TMP21]], i32 [[TMP22]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, ptr [[KERNEL_ARGS]])291// CHECK1-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0292// CHECK1-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]293// CHECK1: omp_offload.failed:294// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], ptr @a) #[[ATTR2:[0-9]+]]295// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]296// CHECK1: omp_offload.cont:297// CHECK1-NEXT: [[TMP44:%.*]] = load i32, ptr [[I]], align 4298// CHECK1-NEXT: store i32 [[TMP44]], ptr [[I_CASTED]], align 4299// CHECK1-NEXT: [[TMP45:%.*]] = load i64, ptr [[I_CASTED]], align 8300// CHECK1-NEXT: [[TMP46:%.*]] = load i32, ptr [[N_ADDR]], align 4301// CHECK1-NEXT: store i32 [[TMP46]], ptr [[N_CASTED4]], align 4302// CHECK1-NEXT: [[TMP47:%.*]] = load i64, ptr [[N_CASTED4]], align 8303// CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0304// CHECK1-NEXT: store ptr @a, ptr [[TMP48]], align 8305// CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 0306// CHECK1-NEXT: store ptr @a, ptr [[TMP49]], align 8307// CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0308// CHECK1-NEXT: store ptr null, ptr [[TMP50]], align 8309// CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1310// CHECK1-NEXT: store i64 [[TMP45]], ptr [[TMP51]], align 8311// CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 1312// CHECK1-NEXT: store i64 [[TMP45]], ptr [[TMP52]], align 8313// CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1314// CHECK1-NEXT: store ptr null, ptr [[TMP53]], align 8315// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2316// CHECK1-NEXT: store i64 [[TMP47]], ptr [[TMP54]], align 8317// CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 2318// CHECK1-NEXT: store i64 [[TMP47]], ptr [[TMP55]], align 8319// CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2320// CHECK1-NEXT: store ptr null, ptr [[TMP56]], align 8321// CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0322// CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 0323// CHECK1-NEXT: [[TMP59:%.*]] = load i32, ptr [[N_ADDR]], align 4324// CHECK1-NEXT: store i32 [[TMP59]], ptr [[DOTCAPTURE_EXPR_9]], align 4325// CHECK1-NEXT: [[TMP60:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4326// CHECK1-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP60]], 0327// CHECK1-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1328// CHECK1-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1329// CHECK1-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4330// CHECK1-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4331// CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP61]], 1332// CHECK1-NEXT: [[TMP62:%.*]] = zext i32 [[ADD14]] to i64333// CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0334// CHECK1-NEXT: store i32 3, ptr [[TMP63]], align 4335// CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1336// CHECK1-NEXT: store i32 3, ptr [[TMP64]], align 4337// CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2338// CHECK1-NEXT: store ptr [[TMP57]], ptr [[TMP65]], align 8339// CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3340// CHECK1-NEXT: store ptr [[TMP58]], ptr [[TMP66]], align 8341// CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4342// CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP67]], align 8343// CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5344// CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP68]], align 8345// CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6346// CHECK1-NEXT: store ptr null, ptr [[TMP69]], align 8347// CHECK1-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7348// CHECK1-NEXT: store ptr null, ptr [[TMP70]], align 8349// CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8350// CHECK1-NEXT: store i64 [[TMP62]], ptr [[TMP71]], align 8351// CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9352// CHECK1-NEXT: store i64 0, ptr [[TMP72]], align 8353// CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10354// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP73]], align 4355// CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11356// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP74]], align 4357// CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12358// CHECK1-NEXT: store i32 0, ptr [[TMP75]], align 4359// CHECK1-NEXT: [[TMP76:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, ptr [[KERNEL_ARGS15]])360// CHECK1-NEXT: [[TMP77:%.*]] = icmp ne i32 [[TMP76]], 0361// CHECK1-NEXT: br i1 [[TMP77]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]362// CHECK1: omp_offload.failed16:363// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36(ptr @a, i64 [[TMP45]], i64 [[TMP47]]) #[[ATTR2]]364// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]]365// CHECK1: omp_offload.cont17:366// CHECK1-NEXT: [[TMP78:%.*]] = load i32, ptr @a, align 4367// CHECK1-NEXT: ret i32 [[TMP78]]368//369//370// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29371// CHECK1-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] {372// CHECK1-NEXT: entry:373// CHECK1-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8374// CHECK1-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8375// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8376// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8377// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])378// CHECK1-NEXT: store i64 [[TE]], ptr [[TE_ADDR]], align 8379// CHECK1-NEXT: store i64 [[TH]], ptr [[TH_ADDR]], align 8380// CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8381// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8382// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8383// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TE_ADDR]], align 4384// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH_ADDR]], align 4385// CHECK1-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])386// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined, ptr [[N_ADDR]], ptr [[TMP1]])387// CHECK1-NEXT: ret void388//389//390// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined391// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {392// CHECK1-NEXT: entry:393// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8394// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8395// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8396// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8397// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4398// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4399// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4400// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4401// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4402// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4403// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4404// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4405// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4406// CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4407// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8408// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8409// CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8410// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8411// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8412// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8413// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4414// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4415// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4416// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0417// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1418// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1419// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4420// CHECK1-NEXT: store i32 0, ptr [[I]], align 4421// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4422// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]423// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]424// CHECK1: omp.precond.then:425// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4426// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4427// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4428// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4429// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4430// CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8431// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4432// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)433// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4434// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4435// CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]436// CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]437// CHECK1: cond.true:438// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4439// CHECK1-NEXT: br label [[COND_END:%.*]]440// CHECK1: cond.false:441// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4442// CHECK1-NEXT: br label [[COND_END]]443// CHECK1: cond.end:444// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]445// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4446// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4447// CHECK1-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4448// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]449// CHECK1: omp.inner.for.cond:450// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]451// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]452// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]453// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]454// CHECK1: omp.inner.for.body:455// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP5]]456// CHECK1-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64457// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]458// CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64459// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP5]]460// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]461// CHECK1: omp.inner.for.inc:462// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]463// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP5]]464// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]465// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]466// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]467// CHECK1: omp.inner.for.end:468// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]469// CHECK1: omp.loop.exit:470// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8471// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4472// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])473// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4474// CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0475// CHECK1-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]476// CHECK1: .omp.final.then:477// CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4478// CHECK1-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0479// CHECK1-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1480// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1481// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]482// CHECK1-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4483// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]484// CHECK1: .omp.final.done:485// CHECK1-NEXT: br label [[OMP_PRECOND_END]]486// CHECK1: omp.precond.end:487// CHECK1-NEXT: ret void488//489//490// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined.omp_outlined491// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {492// CHECK1-NEXT: entry:493// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8494// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8495// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8496// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8497// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8498// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8499// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4500// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4501// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4502// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4503// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4504// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4505// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4506// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4507// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4508// CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4509// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8510// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8511// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8512// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8513// CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8514// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8515// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8516// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8517// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4518// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4519// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4520// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0521// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1522// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1523// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4524// CHECK1-NEXT: store i32 0, ptr [[I]], align 4525// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4526// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]527// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]528// CHECK1: omp.precond.then:529// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4530// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4531// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4532// CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8533// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32534// CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8535// CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32536// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4537// CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4538// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4539// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4540// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8541// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4542// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)543// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4544// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4545// CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]546// CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]547// CHECK1: cond.true:548// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4549// CHECK1-NEXT: br label [[COND_END:%.*]]550// CHECK1: cond.false:551// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4552// CHECK1-NEXT: br label [[COND_END]]553// CHECK1: cond.end:554// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]555// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4556// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4557// CHECK1-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4558// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]559// CHECK1: omp.inner.for.cond:560// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]561// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]562// CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]563// CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]564// CHECK1: omp.inner.for.body:565// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]566// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1567// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]568// CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP10]]569// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP10]]570// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64571// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]]572// CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]573// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]574// CHECK1: omp.body.continue:575// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]576// CHECK1: omp.inner.for.inc:577// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]578// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1579// CHECK1-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]580// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]581// CHECK1: omp.inner.for.end:582// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]583// CHECK1: omp.loop.exit:584// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8585// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4586// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]])587// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4588// CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0589// CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]590// CHECK1: .omp.final.then:591// CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4592// CHECK1-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0593// CHECK1-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1594// CHECK1-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1595// CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]596// CHECK1-NEXT: store i32 [[ADD11]], ptr [[I4]], align 4597// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]598// CHECK1: .omp.final.done:599// CHECK1-NEXT: br label [[OMP_PRECOND_END]]600// CHECK1: omp.precond.end:601// CHECK1-NEXT: ret void602//603//604// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36605// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]]) #[[ATTR1]] {606// CHECK1-NEXT: entry:607// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8608// CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8609// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8610// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8611// CHECK1-NEXT: store i64 [[I]], ptr [[I_ADDR]], align 8612// CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8613// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8614// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined, ptr [[I_ADDR]], ptr [[N_ADDR]], ptr [[TMP0]])615// CHECK1-NEXT: ret void616//617//618// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined619// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {620// CHECK1-NEXT: entry:621// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8622// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8623// CHECK1-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8624// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8625// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8626// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4627// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4628// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4629// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4630// CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4631// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4632// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4633// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4634// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4635// CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4636// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8637// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8638// CHECK1-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8639// CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8640// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8641// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8642// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8643// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8644// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 4645// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4646// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4647// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0648// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1649// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1650// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4651// CHECK1-NEXT: store i32 0, ptr [[I3]], align 4652// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4653// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]654// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]655// CHECK1: omp.precond.then:656// CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP2]], i64 0, i64 0657// CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 16) ]658// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4659// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4660// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4661// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4662// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4663// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8664// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4665// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)666// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4667// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4668// CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]669// CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]670// CHECK1: cond.true:671// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4672// CHECK1-NEXT: br label [[COND_END:%.*]]673// CHECK1: cond.false:674// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4675// CHECK1-NEXT: br label [[COND_END]]676// CHECK1: cond.end:677// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]678// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4679// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4680// CHECK1-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4681// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]682// CHECK1: omp.inner.for.cond:683// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4684// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4685// CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]686// CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]687// CHECK1: omp.inner.for.body:688// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4689// CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64690// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4691// CHECK1-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64692// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[I4]], ptr [[TMP1]], ptr [[TMP2]])693// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]694// CHECK1: omp.inner.for.inc:695// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4696// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4697// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]698// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4699// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]700// CHECK1: omp.inner.for.end:701// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]702// CHECK1: omp.loop.exit:703// CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8704// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4705// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])706// CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4707// CHECK1-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0708// CHECK1-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]709// CHECK1: .omp.final.then:710// CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4711// CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0712// CHECK1-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1713// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1714// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]715// CHECK1-NEXT: store i32 [[ADD9]], ptr [[TMP0]], align 4716// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]717// CHECK1: .omp.final.done:718// CHECK1-NEXT: br label [[OMP_PRECOND_END]]719// CHECK1: omp.precond.end:720// CHECK1-NEXT: ret void721//722//723// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined.omp_outlined724// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {725// CHECK1-NEXT: entry:726// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8727// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8728// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8729// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8730// CHECK1-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8731// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8732// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8733// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4734// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4735// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4736// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4737// CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4738// CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4739// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4740// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4741// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4742// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4743// CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4744// CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4745// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8746// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8747// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8748// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8749// CHECK1-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8750// CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8751// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8752// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8753// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8754// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8755// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 4756// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4757// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4758// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0759// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1760// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1761// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4762// CHECK1-NEXT: store i32 0, ptr [[I3]], align 4763// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4764// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]765// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]766// CHECK1: omp.precond.then:767// CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP2]], i64 0, i64 0768// CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 16) ]769// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP0]], align 4770// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START]], align 4771// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4772// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4773// CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4774// CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8775// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32776// CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8777// CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP9]] to i32778// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4779// CHECK1-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4780// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4781// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4782// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8783// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4784// CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4:[0-9]+]], i32 [[TMP11]])785// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8786// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4787// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)788// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4789// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4790// CHECK1-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]]791// CHECK1-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]792// CHECK1: cond.true:793// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4794// CHECK1-NEXT: br label [[COND_END:%.*]]795// CHECK1: cond.false:796// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4797// CHECK1-NEXT: br label [[COND_END]]798// CHECK1: cond.end:799// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]800// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4801// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4802// CHECK1-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV]], align 4803// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]804// CHECK1: omp.inner.for.cond:805// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4806// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4807// CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]808// CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]809// CHECK1: omp.inner.for.body:810// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4811// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1812// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]813// CHECK1-NEXT: store i32 [[ADD]], ptr [[I5]], align 4814// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[I5]], align 4815// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64816// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP2]], i64 0, i64 [[IDXPROM]]817// CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4818// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]819// CHECK1: omp.body.continue:820// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]821// CHECK1: omp.inner.for.inc:822// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4823// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP23]], 1824// CHECK1-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4825// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]826// CHECK1: omp.inner.for.end:827// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]828// CHECK1: omp.loop.exit:829// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8830// CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4831// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP25]])832// CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4833// CHECK1-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0834// CHECK1-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]835// CHECK1: .omp.final.then:836// CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4837// CHECK1-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP28]], 0838// CHECK1-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1839// CHECK1-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1840// CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]841// CHECK1-NEXT: store i32 [[ADD13]], ptr [[TMP0]], align 4842// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]843// CHECK1: .omp.final.done:844// CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4845// CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0846// CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]847// CHECK1: .omp.linear.pu:848// CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]849// CHECK1: .omp.linear.pu.done:850// CHECK1-NEXT: br label [[OMP_PRECOND_END]]851// CHECK1: omp.precond.end:852// CHECK1-NEXT: ret void853//854//855// CHECK3-LABEL: define {{[^@]+}}@_Z21teams_argument_globali856// CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] {857// CHECK3-NEXT: entry:858// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4859// CHECK3-NEXT: [[TE:%.*]] = alloca i32, align 4860// CHECK3-NEXT: [[TH:%.*]] = alloca i32, align 4861// CHECK3-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4862// CHECK3-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4863// CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4864// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4865// CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4866// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4867// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4868// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4869// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4870// CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8871// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4872// CHECK3-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4873// CHECK3-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4874// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x ptr], align 4875// CHECK3-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x ptr], align 4876// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x ptr], align 4877// CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32, align 4878// CHECK3-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4879// CHECK3-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4880// CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8881// CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4882// CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4883// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128884// CHECK3-NEXT: store i32 [[DIV]], ptr [[TE]], align 4885// CHECK3-NEXT: store i32 128, ptr [[TH]], align 4886// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TE]], align 4887// CHECK3-NEXT: store i32 [[TMP1]], ptr [[TE_CASTED]], align 4888// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TE_CASTED]], align 4889// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH]], align 4890// CHECK3-NEXT: store i32 [[TMP3]], ptr [[TH_CASTED]], align 4891// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TH_CASTED]], align 4892// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_ADDR]], align 4893// CHECK3-NEXT: store i32 [[TMP5]], ptr [[N_CASTED]], align 4894// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[N_CASTED]], align 4895// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0896// CHECK3-NEXT: store i32 [[TMP2]], ptr [[TMP7]], align 4897// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0898// CHECK3-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 4899// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0900// CHECK3-NEXT: store ptr null, ptr [[TMP9]], align 4901// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1902// CHECK3-NEXT: store i32 [[TMP4]], ptr [[TMP10]], align 4903// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1904// CHECK3-NEXT: store i32 [[TMP4]], ptr [[TMP11]], align 4905// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1906// CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4907// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2908// CHECK3-NEXT: store i32 [[TMP6]], ptr [[TMP13]], align 4909// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2910// CHECK3-NEXT: store i32 [[TMP6]], ptr [[TMP14]], align 4911// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2912// CHECK3-NEXT: store ptr null, ptr [[TMP15]], align 4913// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3914// CHECK3-NEXT: store ptr @a, ptr [[TMP16]], align 4915// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3916// CHECK3-NEXT: store ptr @a, ptr [[TMP17]], align 4917// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3918// CHECK3-NEXT: store ptr null, ptr [[TMP18]], align 4919// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0920// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0921// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[TE]], align 4922// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[TH]], align 4923// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[N_ADDR]], align 4924// CHECK3-NEXT: store i32 [[TMP23]], ptr [[DOTCAPTURE_EXPR_]], align 4925// CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4926// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP24]], 0927// CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1928// CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1929// CHECK3-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4930// CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4931// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], 1932// CHECK3-NEXT: [[TMP26:%.*]] = zext i32 [[ADD]] to i64933// CHECK3-NEXT: [[TMP27:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP21]], 0934// CHECK3-NEXT: [[TMP28:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP22]], 0935// CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0936// CHECK3-NEXT: store i32 3, ptr [[TMP29]], align 4937// CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1938// CHECK3-NEXT: store i32 4, ptr [[TMP30]], align 4939// CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2940// CHECK3-NEXT: store ptr [[TMP19]], ptr [[TMP31]], align 4941// CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3942// CHECK3-NEXT: store ptr [[TMP20]], ptr [[TMP32]], align 4943// CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4944// CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP33]], align 4945// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5946// CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP34]], align 4947// CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6948// CHECK3-NEXT: store ptr null, ptr [[TMP35]], align 4949// CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7950// CHECK3-NEXT: store ptr null, ptr [[TMP36]], align 4951// CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8952// CHECK3-NEXT: store i64 [[TMP26]], ptr [[TMP37]], align 8953// CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9954// CHECK3-NEXT: store i64 0, ptr [[TMP38]], align 8955// CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10956// CHECK3-NEXT: store [3 x i32] [[TMP27]], ptr [[TMP39]], align 4957// CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11958// CHECK3-NEXT: store [3 x i32] [[TMP28]], ptr [[TMP40]], align 4959// CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12960// CHECK3-NEXT: store i32 0, ptr [[TMP41]], align 4961// CHECK3-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 [[TMP21]], i32 [[TMP22]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, ptr [[KERNEL_ARGS]])962// CHECK3-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0963// CHECK3-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]964// CHECK3: omp_offload.failed:965// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], ptr @a) #[[ATTR2:[0-9]+]]966// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]967// CHECK3: omp_offload.cont:968// CHECK3-NEXT: [[TMP44:%.*]] = load i32, ptr [[I]], align 4969// CHECK3-NEXT: store i32 [[TMP44]], ptr [[I_CASTED]], align 4970// CHECK3-NEXT: [[TMP45:%.*]] = load i32, ptr [[I_CASTED]], align 4971// CHECK3-NEXT: [[TMP46:%.*]] = load i32, ptr [[N_ADDR]], align 4972// CHECK3-NEXT: store i32 [[TMP46]], ptr [[N_CASTED4]], align 4973// CHECK3-NEXT: [[TMP47:%.*]] = load i32, ptr [[N_CASTED4]], align 4974// CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0975// CHECK3-NEXT: store ptr @a, ptr [[TMP48]], align 4976// CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 0977// CHECK3-NEXT: store ptr @a, ptr [[TMP49]], align 4978// CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0979// CHECK3-NEXT: store ptr null, ptr [[TMP50]], align 4980// CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1981// CHECK3-NEXT: store i32 [[TMP45]], ptr [[TMP51]], align 4982// CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 1983// CHECK3-NEXT: store i32 [[TMP45]], ptr [[TMP52]], align 4984// CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1985// CHECK3-NEXT: store ptr null, ptr [[TMP53]], align 4986// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2987// CHECK3-NEXT: store i32 [[TMP47]], ptr [[TMP54]], align 4988// CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 2989// CHECK3-NEXT: store i32 [[TMP47]], ptr [[TMP55]], align 4990// CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 2991// CHECK3-NEXT: store ptr null, ptr [[TMP56]], align 4992// CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0993// CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 0994// CHECK3-NEXT: [[TMP59:%.*]] = load i32, ptr [[N_ADDR]], align 4995// CHECK3-NEXT: store i32 [[TMP59]], ptr [[DOTCAPTURE_EXPR_9]], align 4996// CHECK3-NEXT: [[TMP60:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4997// CHECK3-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP60]], 0998// CHECK3-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1999// CHECK3-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 11000// CHECK3-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 41001// CHECK3-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 41002// CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP61]], 11003// CHECK3-NEXT: [[TMP62:%.*]] = zext i32 [[ADD14]] to i641004// CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 01005// CHECK3-NEXT: store i32 3, ptr [[TMP63]], align 41006// CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11007// CHECK3-NEXT: store i32 3, ptr [[TMP64]], align 41008// CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 21009// CHECK3-NEXT: store ptr [[TMP57]], ptr [[TMP65]], align 41010// CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 31011// CHECK3-NEXT: store ptr [[TMP58]], ptr [[TMP66]], align 41012// CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 41013// CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP67]], align 41014// CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 51015// CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP68]], align 41016// CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 61017// CHECK3-NEXT: store ptr null, ptr [[TMP69]], align 41018// CHECK3-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 71019// CHECK3-NEXT: store ptr null, ptr [[TMP70]], align 41020// CHECK3-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 81021// CHECK3-NEXT: store i64 [[TMP62]], ptr [[TMP71]], align 81022// CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 91023// CHECK3-NEXT: store i64 0, ptr [[TMP72]], align 81024// CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 101025// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP73]], align 41026// CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 111027// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP74]], align 41028// CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 121029// CHECK3-NEXT: store i32 0, ptr [[TMP75]], align 41030// CHECK3-NEXT: [[TMP76:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, ptr [[KERNEL_ARGS15]])1031// CHECK3-NEXT: [[TMP77:%.*]] = icmp ne i32 [[TMP76]], 01032// CHECK3-NEXT: br i1 [[TMP77]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]1033// CHECK3: omp_offload.failed16:1034// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36(ptr @a, i32 [[TMP45]], i32 [[TMP47]]) #[[ATTR2]]1035// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]]1036// CHECK3: omp_offload.cont17:1037// CHECK3-NEXT: [[TMP78:%.*]] = load i32, ptr @a, align 41038// CHECK3-NEXT: ret i32 [[TMP78]]1039//1040//1041// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l291042// CHECK3-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] {1043// CHECK3-NEXT: entry:1044// CHECK3-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 41045// CHECK3-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 41046// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 41047// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 41048// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])1049// CHECK3-NEXT: store i32 [[TE]], ptr [[TE_ADDR]], align 41050// CHECK3-NEXT: store i32 [[TH]], ptr [[TH_ADDR]], align 41051// CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 41052// CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 41053// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 41054// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TE_ADDR]], align 41055// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH_ADDR]], align 41056// CHECK3-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])1057// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined, ptr [[N_ADDR]], ptr [[TMP1]])1058// CHECK3-NEXT: ret void1059//1060//1061// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined1062// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {1063// CHECK3-NEXT: entry:1064// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41065// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41066// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 41067// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 41068// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41069// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41070// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41071// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41072// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41073// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41074// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41075// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41076// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41077// CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 41078// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41079// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41080// CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 41081// CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 41082// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 41083// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 41084// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 41085// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 41086// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41087// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 01088// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11089// CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11090// CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41091// CHECK3-NEXT: store i32 0, ptr [[I]], align 41092// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41093// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]1094// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1095// CHECK3: omp.precond.then:1096// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41097// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41098// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 41099// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41100// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41101// CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41102// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41103// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1104// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41105// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41106// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]1107// CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1108// CHECK3: cond.true:1109// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41110// CHECK3-NEXT: br label [[COND_END:%.*]]1111// CHECK3: cond.false:1112// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41113// CHECK3-NEXT: br label [[COND_END]]1114// CHECK3: cond.end:1115// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]1116// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41117// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41118// CHECK3-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 41119// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1120// CHECK3: omp.inner.for.cond:1121// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]1122// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]]1123// CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]1124// CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1125// CHECK3: omp.inner.for.body:1126// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP6]]1127// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]]1128// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], ptr [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP6]]1129// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1130// CHECK3: omp.inner.for.inc:1131// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]1132// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP6]]1133// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]1134// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]1135// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]1136// CHECK3: omp.inner.for.end:1137// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1138// CHECK3: omp.loop.exit:1139// CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41140// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41141// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])1142// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41143// CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01144// CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1145// CHECK3: .omp.final.then:1146// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41147// CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP23]], 01148// CHECK3-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 11149// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 11150// CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]1151// CHECK3-NEXT: store i32 [[ADD8]], ptr [[I3]], align 41152// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]1153// CHECK3: .omp.final.done:1154// CHECK3-NEXT: br label [[OMP_PRECOND_END]]1155// CHECK3: omp.precond.end:1156// CHECK3-NEXT: ret void1157//1158//1159// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined.omp_outlined1160// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {1161// CHECK3-NEXT: entry:1162// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41163// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41164// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 41165// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 41166// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 41167// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 41168// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41169// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41170// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41171// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41172// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41173// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41174// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41175// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41176// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41177// CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 41178// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41179// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41180// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 41181// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 41182// CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 41183// CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 41184// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 41185// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 41186// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 41187// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 41188// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41189// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 01190// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11191// CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11192// CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41193// CHECK3-NEXT: store i32 0, ptr [[I]], align 41194// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41195// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]1196// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1197// CHECK3: omp.precond.then:1198// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41199// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41200// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 41201// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 41202// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41203// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 41204// CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 41205// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41206// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41207// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41208// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 41209// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1210// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41211// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41212// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]1213// CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1214// CHECK3: cond.true:1215// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41216// CHECK3-NEXT: br label [[COND_END:%.*]]1217// CHECK3: cond.false:1218// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41219// CHECK3-NEXT: br label [[COND_END]]1220// CHECK3: cond.end:1221// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]1222// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41223// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41224// CHECK3-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 41225// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1226// CHECK3: omp.inner.for.cond:1227// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]1228// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]1229// CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]1230// CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1231// CHECK3: omp.inner.for.body:1232// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]1233// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 11234// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1235// CHECK3-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP11]]1236// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP11]]1237// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP1]], i32 0, i32 [[TMP18]]1238// CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]1239// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1240// CHECK3: omp.body.continue:1241// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1242// CHECK3: omp.inner.for.inc:1243// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]1244// CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 11245// CHECK3-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]1246// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]1247// CHECK3: omp.inner.for.end:1248// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1249// CHECK3: omp.loop.exit:1250// CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41251// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 41252// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]])1253// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41254// CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 01255// CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1256// CHECK3: .omp.final.then:1257// CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41258// CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 01259// CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 11260// CHECK3-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 11261// CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]1262// CHECK3-NEXT: store i32 [[ADD10]], ptr [[I3]], align 41263// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]1264// CHECK3: .omp.final.done:1265// CHECK3-NEXT: br label [[OMP_PRECOND_END]]1266// CHECK3: omp.precond.end:1267// CHECK3-NEXT: ret void1268//1269//1270// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l361271// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]]) #[[ATTR1]] {1272// CHECK3-NEXT: entry:1273// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 41274// CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 41275// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 41276// CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 41277// CHECK3-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 41278// CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 41279// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41280// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined, ptr [[I_ADDR]], ptr [[N_ADDR]], ptr [[TMP0]])1281// CHECK3-NEXT: ret void1282//1283//1284// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined1285// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {1286// CHECK3-NEXT: entry:1287// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41288// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41289// CHECK3-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 41290// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 41291// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 41292// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41293// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41294// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41295// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41296// CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 41297// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41298// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41299// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41300// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41301// CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 41302// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41303// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41304// CHECK3-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 41305// CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 41306// CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 41307// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 41308// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 41309// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 41310// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 41311// CHECK3-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 41312// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41313// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 01314// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11315// CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11316// CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41317// CHECK3-NEXT: store i32 0, ptr [[I3]], align 41318// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41319// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]1320// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1321// CHECK3: omp.precond.then:1322// CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP2]], i32 0, i32 01323// CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 16) ]1324// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41325// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41326// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 41327// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41328// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41329// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41330// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41331// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1332// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41333// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41334// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]1335// CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1336// CHECK3: cond.true:1337// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41338// CHECK3-NEXT: br label [[COND_END:%.*]]1339// CHECK3: cond.false:1340// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41341// CHECK3-NEXT: br label [[COND_END]]1342// CHECK3: cond.end:1343// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]1344// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41345// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41346// CHECK3-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 41347// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1348// CHECK3: omp.inner.for.cond:1349// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41350// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41351// CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]1352// CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1353// CHECK3: omp.inner.for.body:1354// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41355// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41356// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[I4]], ptr [[TMP1]], ptr [[TMP2]])1357// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1358// CHECK3: omp.inner.for.inc:1359// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41360// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41361// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]1362// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41363// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]1364// CHECK3: omp.inner.for.end:1365// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1366// CHECK3: omp.loop.exit:1367// CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41368// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 41369// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])1370// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41371// CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 01372// CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1373// CHECK3: .omp.final.then:1374// CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41375// CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 01376// CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 11377// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 11378// CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]1379// CHECK3-NEXT: store i32 [[ADD9]], ptr [[TMP0]], align 41380// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]1381// CHECK3: .omp.final.done:1382// CHECK3-NEXT: br label [[OMP_PRECOND_END]]1383// CHECK3: omp.precond.end:1384// CHECK3-NEXT: ret void1385//1386//1387// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined.omp_outlined1388// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {1389// CHECK3-NEXT: entry:1390// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41391// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41392// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 41393// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 41394// CHECK3-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 41395// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 41396// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 41397// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41398// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41399// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41400// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41401// CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 41402// CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 41403// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41404// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41405// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41406// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41407// CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 41408// CHECK3-NEXT: [[I5:%.*]] = alloca i32, align 41409// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41410// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41411// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 41412// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 41413// CHECK3-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 41414// CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 41415// CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 41416// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 41417// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 41418// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 41419// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 41420// CHECK3-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 41421// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41422// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 01423// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11424// CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11425// CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41426// CHECK3-NEXT: store i32 0, ptr [[I3]], align 41427// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41428// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]1429// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1430// CHECK3: omp.precond.then:1431// CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP2]], i32 0, i32 01432// CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 16) ]1433// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP0]], align 41434// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START]], align 41435// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41436// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41437// CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 41438// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 41439// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41440// CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 41441// CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 41442// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41443// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41444// CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41445// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 41446// CHECK3-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4:[0-9]+]], i32 [[TMP11]])1447// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41448// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 41449// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1450// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41451// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41452// CHECK3-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]]1453// CHECK3-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1454// CHECK3: cond.true:1455// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41456// CHECK3-NEXT: br label [[COND_END:%.*]]1457// CHECK3: cond.false:1458// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41459// CHECK3-NEXT: br label [[COND_END]]1460// CHECK3: cond.end:1461// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]1462// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41463// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41464// CHECK3-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV]], align 41465// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1466// CHECK3: omp.inner.for.cond:1467// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41468// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41469// CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]1470// CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1471// CHECK3: omp.inner.for.body:1472// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41473// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 11474// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1475// CHECK3-NEXT: store i32 [[ADD]], ptr [[I4]], align 41476// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[I4]], align 41477// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP2]], i32 0, i32 [[TMP22]]1478// CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 41479// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1480// CHECK3: omp.body.continue:1481// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1482// CHECK3: omp.inner.for.inc:1483// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41484// CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], 11485// CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 41486// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]1487// CHECK3: omp.inner.for.end:1488// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1489// CHECK3: omp.loop.exit:1490// CHECK3-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41491// CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 41492// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP25]])1493// CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41494// CHECK3-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 01495// CHECK3-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1496// CHECK3: .omp.final.then:1497// CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41498// CHECK3-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP28]], 01499// CHECK3-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 11500// CHECK3-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 11501// CHECK3-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]1502// CHECK3-NEXT: store i32 [[ADD12]], ptr [[TMP0]], align 41503// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]1504// CHECK3: .omp.final.done:1505// CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41506// CHECK3-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 01507// CHECK3-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]1508// CHECK3: .omp.linear.pu:1509// CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]1510// CHECK3: .omp.linear.pu.done:1511// CHECK3-NEXT: br label [[OMP_PRECOND_END]]1512// CHECK3: omp.precond.end:1513// CHECK3-NEXT: ret void1514//1515//1516// CHECK5-LABEL: define {{[^@]+}}@_Z21teams_argument_globali1517// CHECK5-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {1518// CHECK5-NEXT: entry:1519// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 41520// CHECK5-NEXT: [[TE:%.*]] = alloca i32, align 41521// CHECK5-NEXT: [[TH:%.*]] = alloca i32, align 41522// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 41523// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41524// CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41525// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41526// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41527// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 41528// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41529// CHECK5-NEXT: [[I4:%.*]] = alloca i32, align 41530// CHECK5-NEXT: [[I11:%.*]] = alloca i32, align 41531// CHECK5-NEXT: [[_TMP12:%.*]] = alloca i32, align 41532// CHECK5-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 41533// CHECK5-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 41534// CHECK5-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 41535// CHECK5-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 41536// CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 41537// CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 41538// CHECK5-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 41539// CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 41540// CHECK5-NEXT: [[I25:%.*]] = alloca i32, align 41541// CHECK5-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 41542// CHECK5-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 41543// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 1281544// CHECK5-NEXT: store i32 [[DIV]], ptr [[TE]], align 41545// CHECK5-NEXT: store i32 128, ptr [[TH]], align 41546// CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 41547// CHECK5-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 41548// CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41549// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 01550// CHECK5-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 11551// CHECK5-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 11552// CHECK5-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 41553// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41554// CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41555// CHECK5-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_UB]], align 41556// CHECK5-NEXT: store i32 0, ptr [[I]], align 41557// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41558// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]1559// CHECK5-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]1560// CHECK5: simd.if.then:1561// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41562// CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41563// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1564// CHECK5: omp.inner.for.cond:1565// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]1566// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]1567// CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1568// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1569// CHECK5: omp.inner.for.body:1570// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]1571// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 11572// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1573// CHECK5-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP2]]1574// CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP2]]1575// CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i641576// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr @a, i64 0, i64 [[IDXPROM]]1577// CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]1578// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1579// CHECK5: omp.body.continue:1580// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1581// CHECK5: omp.inner.for.inc:1582// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]1583// CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 11584// CHECK5-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]1585// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]1586// CHECK5: omp.inner.for.end:1587// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41588// CHECK5-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP11]], 01589// CHECK5-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 11590// CHECK5-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 11591// CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]1592// CHECK5-NEXT: store i32 [[ADD10]], ptr [[I4]], align 41593// CHECK5-NEXT: br label [[SIMD_IF_END]]1594// CHECK5: simd.if.end:1595// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[N_ADDR]], align 41596// CHECK5-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR_13]], align 41597// CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 41598// CHECK5-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP13]], 01599// CHECK5-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 11600// CHECK5-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 11601// CHECK5-NEXT: store i32 [[SUB17]], ptr [[DOTCAPTURE_EXPR_14]], align 41602// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB18]], align 41603// CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_14]], align 41604// CHECK5-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_UB19]], align 41605// CHECK5-NEXT: store i32 0, ptr [[I20]], align 41606// CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 41607// CHECK5-NEXT: [[CMP21:%.*]] = icmp slt i32 0, [[TMP15]]1608// CHECK5-NEXT: br i1 [[CMP21]], label [[SIMD_IF_THEN22:%.*]], label [[SIMD_IF_END41:%.*]]1609// CHECK5: simd.if.then22:1610// CHECK5-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB18]], align 41611// CHECK5-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV23]], align 41612// CHECK5-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr @a, i64 16) ]1613// CHECK5-NEXT: [[TMP17:%.*]] = load i32, ptr [[I11]], align 41614// CHECK5-NEXT: store i32 [[TMP17]], ptr [[DOTLINEAR_START]], align 41615// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]]1616// CHECK5: omp.inner.for.cond26:1617// CHECK5-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 41618// CHECK5-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB19]], align 41619// CHECK5-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]1620// CHECK5-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END36:%.*]]1621// CHECK5: omp.inner.for.body28:1622// CHECK5-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 41623// CHECK5-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 11624// CHECK5-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]]1625// CHECK5-NEXT: store i32 [[ADD30]], ptr [[I24]], align 41626// CHECK5-NEXT: [[TMP21:%.*]] = load i32, ptr [[I24]], align 41627// CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP21]] to i641628// CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [100 x i32], ptr @a, i64 0, i64 [[IDXPROM31]]1629// CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX32]], align 41630// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]]1631// CHECK5: omp.body.continue33:1632// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]]1633// CHECK5: omp.inner.for.inc34:1634// CHECK5-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 41635// CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP22]], 11636// CHECK5-NEXT: store i32 [[ADD35]], ptr [[DOTOMP_IV23]], align 41637// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP7:![0-9]+]]1638// CHECK5: omp.inner.for.end36:1639// CHECK5-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 41640// CHECK5-NEXT: [[SUB37:%.*]] = sub nsw i32 [[TMP23]], 01641// CHECK5-NEXT: [[DIV38:%.*]] = sdiv i32 [[SUB37]], 11642// CHECK5-NEXT: [[MUL39:%.*]] = mul nsw i32 [[DIV38]], 11643// CHECK5-NEXT: [[ADD40:%.*]] = add nsw i32 0, [[MUL39]]1644// CHECK5-NEXT: store i32 [[ADD40]], ptr [[I11]], align 41645// CHECK5-NEXT: br label [[SIMD_IF_END41]]1646// CHECK5: simd.if.end41:1647// CHECK5-NEXT: [[TMP24:%.*]] = load i32, ptr @a, align 41648// CHECK5-NEXT: ret i32 [[TMP24]]1649//1650//1651// CHECK7-LABEL: define {{[^@]+}}@_Z21teams_argument_globali1652// CHECK7-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] {1653// CHECK7-NEXT: entry:1654// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 41655// CHECK7-NEXT: [[TE:%.*]] = alloca i32, align 41656// CHECK7-NEXT: [[TH:%.*]] = alloca i32, align 41657// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 41658// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41659// CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41660// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41661// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41662// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 41663// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41664// CHECK7-NEXT: [[I4:%.*]] = alloca i32, align 41665// CHECK7-NEXT: [[I11:%.*]] = alloca i32, align 41666// CHECK7-NEXT: [[_TMP12:%.*]] = alloca i32, align 41667// CHECK7-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 41668// CHECK7-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 41669// CHECK7-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 41670// CHECK7-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 41671// CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 41672// CHECK7-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 41673// CHECK7-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 41674// CHECK7-NEXT: [[I24:%.*]] = alloca i32, align 41675// CHECK7-NEXT: [[I25:%.*]] = alloca i32, align 41676// CHECK7-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 41677// CHECK7-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 41678// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 1281679// CHECK7-NEXT: store i32 [[DIV]], ptr [[TE]], align 41680// CHECK7-NEXT: store i32 128, ptr [[TH]], align 41681// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 41682// CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 41683// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41684// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 01685// CHECK7-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 11686// CHECK7-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 11687// CHECK7-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 41688// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41689// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41690// CHECK7-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_UB]], align 41691// CHECK7-NEXT: store i32 0, ptr [[I]], align 41692// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41693// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]1694// CHECK7-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]1695// CHECK7: simd.if.then:1696// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41697// CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41698// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1699// CHECK7: omp.inner.for.cond:1700// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]1701// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]1702// CHECK7-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1703// CHECK7-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1704// CHECK7: omp.inner.for.body:1705// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]1706// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 11707// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1708// CHECK7-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP3]]1709// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP3]]1710// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr @a, i32 0, i32 [[TMP9]]1711// CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]1712// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1713// CHECK7: omp.body.continue:1714// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1715// CHECK7: omp.inner.for.inc:1716// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]1717// CHECK7-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 11718// CHECK7-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]1719// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]1720// CHECK7: omp.inner.for.end:1721// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41722// CHECK7-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP11]], 01723// CHECK7-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 11724// CHECK7-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 11725// CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]1726// CHECK7-NEXT: store i32 [[ADD10]], ptr [[I4]], align 41727// CHECK7-NEXT: br label [[SIMD_IF_END]]1728// CHECK7: simd.if.end:1729// CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[N_ADDR]], align 41730// CHECK7-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR_13]], align 41731// CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 41732// CHECK7-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP13]], 01733// CHECK7-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 11734// CHECK7-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 11735// CHECK7-NEXT: store i32 [[SUB17]], ptr [[DOTCAPTURE_EXPR_14]], align 41736// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB18]], align 41737// CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_14]], align 41738// CHECK7-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_UB19]], align 41739// CHECK7-NEXT: store i32 0, ptr [[I20]], align 41740// CHECK7-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 41741// CHECK7-NEXT: [[CMP21:%.*]] = icmp slt i32 0, [[TMP15]]1742// CHECK7-NEXT: br i1 [[CMP21]], label [[SIMD_IF_THEN22:%.*]], label [[SIMD_IF_END40:%.*]]1743// CHECK7: simd.if.then22:1744// CHECK7-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB18]], align 41745// CHECK7-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV23]], align 41746// CHECK7-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr @a, i32 16) ]1747// CHECK7-NEXT: [[TMP17:%.*]] = load i32, ptr [[I11]], align 41748// CHECK7-NEXT: store i32 [[TMP17]], ptr [[DOTLINEAR_START]], align 41749// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]]1750// CHECK7: omp.inner.for.cond26:1751// CHECK7-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 41752// CHECK7-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB19]], align 41753// CHECK7-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]1754// CHECK7-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END35:%.*]]1755// CHECK7: omp.inner.for.body28:1756// CHECK7-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 41757// CHECK7-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 11758// CHECK7-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]]1759// CHECK7-NEXT: store i32 [[ADD30]], ptr [[I24]], align 41760// CHECK7-NEXT: [[TMP21:%.*]] = load i32, ptr [[I24]], align 41761// CHECK7-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [100 x i32], ptr @a, i32 0, i32 [[TMP21]]1762// CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX31]], align 41763// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE32:%.*]]1764// CHECK7: omp.body.continue32:1765// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC33:%.*]]1766// CHECK7: omp.inner.for.inc33:1767// CHECK7-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 41768// CHECK7-NEXT: [[ADD34:%.*]] = add nsw i32 [[TMP22]], 11769// CHECK7-NEXT: store i32 [[ADD34]], ptr [[DOTOMP_IV23]], align 41770// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP8:![0-9]+]]1771// CHECK7: omp.inner.for.end35:1772// CHECK7-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 41773// CHECK7-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP23]], 01774// CHECK7-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 11775// CHECK7-NEXT: [[MUL38:%.*]] = mul nsw i32 [[DIV37]], 11776// CHECK7-NEXT: [[ADD39:%.*]] = add nsw i32 0, [[MUL38]]1777// CHECK7-NEXT: store i32 [[ADD39]], ptr [[I11]], align 41778// CHECK7-NEXT: br label [[SIMD_IF_END40]]1779// CHECK7: simd.if.end40:1780// CHECK7-NEXT: [[TMP24:%.*]] = load i32, ptr @a, align 41781// CHECK7-NEXT: ret i32 [[TMP24]]1782//1783//1784// CHECK9-LABEL: define {{[^@]+}}@_Z15teams_local_argv1785// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {1786// CHECK9-NEXT: entry:1787// CHECK9-NEXT: [[N:%.*]] = alloca i32, align 41788// CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 81789// CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 81790// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 41791// CHECK9-NEXT: [[I_CASTED:%.*]] = alloca i64, align 81792// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 81793// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 81794// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 81795// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 81796// CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 81797// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 41798// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41799// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41800// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81801// CHECK9-NEXT: store i32 100, ptr [[N]], align 41802// CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 41803// CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i641804// CHECK9-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()1805// CHECK9-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 81806// CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 41807// CHECK9-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 81808// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[I]], align 41809// CHECK9-NEXT: store i32 [[TMP3]], ptr [[I_CASTED]], align 41810// CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[I_CASTED]], align 81811// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[N]], align 41812// CHECK9-NEXT: store i32 [[TMP5]], ptr [[N_CASTED]], align 41813// CHECK9-NEXT: [[TMP6:%.*]] = load i64, ptr [[N_CASTED]], align 81814// CHECK9-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 41815// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 32, i1 false)1816// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01817// CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP8]], align 81818// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01819// CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 81820// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 01821// CHECK9-NEXT: store ptr null, ptr [[TMP10]], align 81822// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11823// CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP11]], align 81824// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11825// CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 81826// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 11827// CHECK9-NEXT: store i64 [[TMP7]], ptr [[TMP13]], align 81828// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 11829// CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 81830// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21831// CHECK9-NEXT: store i64 [[TMP4]], ptr [[TMP15]], align 81832// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21833// CHECK9-NEXT: store i64 [[TMP4]], ptr [[TMP16]], align 81834// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 21835// CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 81836// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31837// CHECK9-NEXT: store i64 [[TMP6]], ptr [[TMP18]], align 81838// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31839// CHECK9-NEXT: store i64 [[TMP6]], ptr [[TMP19]], align 81840// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 31841// CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 81842// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01843// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01844// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 01845// CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[N]], align 41846// CHECK9-NEXT: store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_]], align 41847// CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41848// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP25]], 01849// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11850// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11851// CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41852// CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41853// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], 11854// CHECK9-NEXT: [[TMP27:%.*]] = zext i32 [[ADD]] to i641855// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01856// CHECK9-NEXT: store i32 3, ptr [[TMP28]], align 41857// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11858// CHECK9-NEXT: store i32 4, ptr [[TMP29]], align 41859// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21860// CHECK9-NEXT: store ptr [[TMP21]], ptr [[TMP30]], align 81861// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31862// CHECK9-NEXT: store ptr [[TMP22]], ptr [[TMP31]], align 81863// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41864// CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP32]], align 81865// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51866// CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP33]], align 81867// CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61868// CHECK9-NEXT: store ptr null, ptr [[TMP34]], align 81869// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71870// CHECK9-NEXT: store ptr null, ptr [[TMP35]], align 81871// CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81872// CHECK9-NEXT: store i64 [[TMP27]], ptr [[TMP36]], align 81873// CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91874// CHECK9-NEXT: store i64 0, ptr [[TMP37]], align 81875// CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101876// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP38]], align 41877// CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111878// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 41879// CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121880// CHECK9-NEXT: store i32 0, ptr [[TMP40]], align 41881// CHECK9-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.region_id, ptr [[KERNEL_ARGS]])1882// CHECK9-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 01883// CHECK9-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1884// CHECK9: omp_offload.failed:1885// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i64 [[TMP1]], ptr [[VLA]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]1886// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]1887// CHECK9: omp_offload.cont:1888// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 01889// CHECK9-NEXT: [[TMP43:%.*]] = load i32, ptr [[ARRAYIDX]], align 41890// CHECK9-NEXT: [[TMP44:%.*]] = load ptr, ptr [[SAVED_STACK]], align 81891// CHECK9-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP44]])1892// CHECK9-NEXT: ret i32 [[TMP43]]1893//1894//1895// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l741896// CHECK9-SAME: (i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] {1897// CHECK9-NEXT: entry:1898// CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 81899// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81900// CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 81901// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 81902// CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 81903// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81904// CHECK9-NEXT: store i64 [[I]], ptr [[I_ADDR]], align 81905// CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 81906// CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 81907// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81908// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined, ptr [[I_ADDR]], ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])1909// CHECK9-NEXT: ret void1910//1911//1912// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined1913// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1914// CHECK9-NEXT: entry:1915// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81916// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81917// CHECK9-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 81918// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 81919// CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 81920// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81921// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41922// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 41923// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41924// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41925// CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 41926// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41927// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41928// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41929// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41930// CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 41931// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81932// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81933// CHECK9-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 81934// CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 81935// CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 81936// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81937// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 81938// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 81939// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 81940// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 81941// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 41942// CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 41943// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41944// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 01945// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11946// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11947// CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41948// CHECK9-NEXT: store i32 0, ptr [[I3]], align 41949// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41950// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]1951// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1952// CHECK9: omp.precond.then:1953// CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i64 16) ]1954// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41955// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41956// CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 41957// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41958// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41959// CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81960// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 41961// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1962// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41963// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41964// CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]1965// CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1966// CHECK9: cond.true:1967// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41968// CHECK9-NEXT: br label [[COND_END:%.*]]1969// CHECK9: cond.false:1970// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41971// CHECK9-NEXT: br label [[COND_END]]1972// CHECK9: cond.end:1973// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]1974// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41975// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41976// CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 41977// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1978// CHECK9: omp.inner.for.cond:1979// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41980// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41981// CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]1982// CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1983// CHECK9: omp.inner.for.body:1984// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41985// CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i641986// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41987// CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i641988// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[I4]], ptr [[TMP1]], i64 [[TMP2]], ptr [[TMP3]])1989// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1990// CHECK9: omp.inner.for.inc:1991// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41992// CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41993// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]1994// CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41995// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]1996// CHECK9: omp.inner.for.end:1997// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1998// CHECK9: omp.loop.exit:1999// CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82000// CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 42001// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])2002// CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42003// CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 02004// CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2005// CHECK9: .omp.final.then:2006// CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42007// CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 02008// CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 12009// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 12010// CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]2011// CHECK9-NEXT: store i32 [[ADD9]], ptr [[TMP0]], align 42012// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]2013// CHECK9: .omp.final.done:2014// CHECK9-NEXT: br label [[OMP_PRECOND_END]]2015// CHECK9: omp.precond.end:2016// CHECK9-NEXT: ret void2017//2018//2019// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined.omp_outlined2020// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {2021// CHECK9-NEXT: entry:2022// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82023// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82024// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 82025// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 82026// CHECK9-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 82027// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 82028// CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 82029// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 82030// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42031// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 42032// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42033// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42034// CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 42035// CHECK9-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 42036// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42037// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42038// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42039// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42040// CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 42041// CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 42042// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82043// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82044// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 82045// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 82046// CHECK9-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 82047// CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 82048// CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 82049// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 82050// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 82051// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 82052// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 82053// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 82054// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 42055// CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 42056// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42057// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 02058// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12059// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12060// CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42061// CHECK9-NEXT: store i32 0, ptr [[I3]], align 42062// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42063// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]2064// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2065// CHECK9: omp.precond.then:2066// CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i64 16) ]2067// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP0]], align 42068// CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 42069// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42070// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42071// CHECK9-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 42072// CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 82073// CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i322074// CHECK9-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82075// CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP10]] to i322076// CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 42077// CHECK9-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 42078// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42079// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42080// CHECK9-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82081// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 42082// CHECK9-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP12]])2083// CHECK9-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82084// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 42085// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2086// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42087// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42088// CHECK9-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]]2089// CHECK9-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2090// CHECK9: cond.true:2091// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42092// CHECK9-NEXT: br label [[COND_END:%.*]]2093// CHECK9: cond.false:2094// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42095// CHECK9-NEXT: br label [[COND_END]]2096// CHECK9: cond.end:2097// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]2098// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42099// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42100// CHECK9-NEXT: store i32 [[TMP19]], ptr [[DOTOMP_IV]], align 42101// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2102// CHECK9: omp.inner.for.cond:2103// CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42104// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42105// CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]2106// CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2107// CHECK9: omp.inner.for.body:2108// CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42109// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 12110// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2111// CHECK9-NEXT: store i32 [[ADD]], ptr [[I5]], align 42112// CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[I5]], align 42113// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i642114// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]]2115// CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 42116// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2117// CHECK9: omp.body.continue:2118// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2119// CHECK9: omp.inner.for.inc:2120// CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42121// CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], 12122// CHECK9-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 42123// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]2124// CHECK9: omp.inner.for.end:2125// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2126// CHECK9: omp.loop.exit:2127// CHECK9-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82128// CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 42129// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP26]])2130// CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42131// CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 02132// CHECK9-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2133// CHECK9: .omp.final.then:2134// CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42135// CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 02136// CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 12137// CHECK9-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 12138// CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]2139// CHECK9-NEXT: store i32 [[ADD13]], ptr [[TMP0]], align 42140// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]2141// CHECK9: .omp.final.done:2142// CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42143// CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 02144// CHECK9-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]2145// CHECK9: .omp.linear.pu:2146// CHECK9-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]2147// CHECK9: .omp.linear.pu.done:2148// CHECK9-NEXT: br label [[OMP_PRECOND_END]]2149// CHECK9: omp.precond.end:2150// CHECK9-NEXT: ret void2151//2152//2153// CHECK11-LABEL: define {{[^@]+}}@_Z15teams_local_argv2154// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {2155// CHECK11-NEXT: entry:2156// CHECK11-NEXT: [[N:%.*]] = alloca i32, align 42157// CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 42158// CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 42159// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 42160// CHECK11-NEXT: [[I_CASTED:%.*]] = alloca i32, align 42161// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 42162// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 42163// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 42164// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 42165// CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 42166// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 42167// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42168// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42169// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82170// CHECK11-NEXT: store i32 100, ptr [[N]], align 42171// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 42172// CHECK11-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()2173// CHECK11-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 42174// CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 42175// CHECK11-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 42176// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 42177// CHECK11-NEXT: store i32 [[TMP2]], ptr [[I_CASTED]], align 42178// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[I_CASTED]], align 42179// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[N]], align 42180// CHECK11-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 42181// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 42182// CHECK11-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 42183// CHECK11-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i642184// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 32, i1 false)2185// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02186// CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP8]], align 42187// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02188// CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 42189// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 02190// CHECK11-NEXT: store ptr null, ptr [[TMP10]], align 42191// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 12192// CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP11]], align 42193// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 12194// CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 42195// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 12196// CHECK11-NEXT: store i64 [[TMP7]], ptr [[TMP13]], align 42197// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 12198// CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 42199// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 22200// CHECK11-NEXT: store i32 [[TMP3]], ptr [[TMP15]], align 42201// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 22202// CHECK11-NEXT: store i32 [[TMP3]], ptr [[TMP16]], align 42203// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 22204// CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 42205// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 32206// CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP18]], align 42207// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 32208// CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP19]], align 42209// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 32210// CHECK11-NEXT: store ptr null, ptr [[TMP20]], align 42211// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02212// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02213// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 02214// CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[N]], align 42215// CHECK11-NEXT: store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_]], align 42216// CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42217// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP25]], 02218// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12219// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12220// CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42221// CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42222// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], 12223// CHECK11-NEXT: [[TMP27:%.*]] = zext i32 [[ADD]] to i642224// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02225// CHECK11-NEXT: store i32 3, ptr [[TMP28]], align 42226// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12227// CHECK11-NEXT: store i32 4, ptr [[TMP29]], align 42228// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22229// CHECK11-NEXT: store ptr [[TMP21]], ptr [[TMP30]], align 42230// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32231// CHECK11-NEXT: store ptr [[TMP22]], ptr [[TMP31]], align 42232// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42233// CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP32]], align 42234// CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52235// CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP33]], align 42236// CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62237// CHECK11-NEXT: store ptr null, ptr [[TMP34]], align 42238// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72239// CHECK11-NEXT: store ptr null, ptr [[TMP35]], align 42240// CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82241// CHECK11-NEXT: store i64 [[TMP27]], ptr [[TMP36]], align 82242// CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92243// CHECK11-NEXT: store i64 0, ptr [[TMP37]], align 82244// CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102245// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP38]], align 42246// CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112247// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 42248// CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122249// CHECK11-NEXT: store i32 0, ptr [[TMP40]], align 42250// CHECK11-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.region_id, ptr [[KERNEL_ARGS]])2251// CHECK11-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 02252// CHECK11-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2253// CHECK11: omp_offload.failed:2254// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i32 [[TMP0]], ptr [[VLA]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]2255// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]2256// CHECK11: omp_offload.cont:2257// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 02258// CHECK11-NEXT: [[TMP43:%.*]] = load i32, ptr [[ARRAYIDX]], align 42259// CHECK11-NEXT: [[TMP44:%.*]] = load ptr, ptr [[SAVED_STACK]], align 42260// CHECK11-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP44]])2261// CHECK11-NEXT: ret i32 [[TMP43]]2262//2263//2264// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l742265// CHECK11-SAME: (i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] {2266// CHECK11-NEXT: entry:2267// CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 42268// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 42269// CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 42270// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 42271// CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 42272// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 42273// CHECK11-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 42274// CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 42275// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 42276// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 42277// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined, ptr [[I_ADDR]], ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])2278// CHECK11-NEXT: ret void2279//2280//2281// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined2282// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {2283// CHECK11-NEXT: entry:2284// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42285// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42286// CHECK11-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 42287// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 42288// CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 42289// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 42290// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42291// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 42292// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42293// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42294// CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 42295// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42296// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42297// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42298// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42299// CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 42300// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42301// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42302// CHECK11-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 42303// CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 42304// CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 42305// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 42306// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 42307// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 42308// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 42309// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 42310// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 42311// CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 42312// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42313// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 02314// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12315// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12316// CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42317// CHECK11-NEXT: store i32 0, ptr [[I3]], align 42318// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42319// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]2320// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2321// CHECK11: omp.precond.then:2322// CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i32 16) ]2323// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42324// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42325// CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 42326// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42327// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42328// CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42329// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 42330// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2331// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42332// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42333// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]2334// CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2335// CHECK11: cond.true:2336// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42337// CHECK11-NEXT: br label [[COND_END:%.*]]2338// CHECK11: cond.false:2339// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42340// CHECK11-NEXT: br label [[COND_END]]2341// CHECK11: cond.end:2342// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]2343// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42344// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42345// CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 42346// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2347// CHECK11: omp.inner.for.cond:2348// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42349// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42350// CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]2351// CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2352// CHECK11: omp.inner.for.body:2353// CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42354// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42355// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[I4]], ptr [[TMP1]], i32 [[TMP2]], ptr [[TMP3]])2356// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2357// CHECK11: omp.inner.for.inc:2358// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42359// CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42360// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]2361// CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 42362// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]2363// CHECK11: omp.inner.for.end:2364// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2365// CHECK11: omp.loop.exit:2366// CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42367// CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 42368// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])2369// CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42370// CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 02371// CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2372// CHECK11: .omp.final.then:2373// CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42374// CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 02375// CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 12376// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 12377// CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]2378// CHECK11-NEXT: store i32 [[ADD9]], ptr [[TMP0]], align 42379// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]2380// CHECK11: .omp.final.done:2381// CHECK11-NEXT: br label [[OMP_PRECOND_END]]2382// CHECK11: omp.precond.end:2383// CHECK11-NEXT: ret void2384//2385//2386// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined.omp_outlined2387// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {2388// CHECK11-NEXT: entry:2389// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42390// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42391// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 42392// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 42393// CHECK11-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 42394// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 42395// CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 42396// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 42397// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42398// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 42399// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42400// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42401// CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 42402// CHECK11-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 42403// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42404// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42405// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42406// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42407// CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 42408// CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 42409// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42410// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42411// CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 42412// CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 42413// CHECK11-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 42414// CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 42415// CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 42416// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 42417// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 42418// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 42419// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 42420// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 42421// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 42422// CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 42423// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42424// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 02425// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12426// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12427// CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42428// CHECK11-NEXT: store i32 0, ptr [[I3]], align 42429// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42430// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]2431// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2432// CHECK11: omp.precond.then:2433// CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i32 16) ]2434// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP0]], align 42435// CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 42436// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42437// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42438// CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 42439// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 42440// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 42441// CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_LB]], align 42442// CHECK11-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_UB]], align 42443// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42444// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42445// CHECK11-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42446// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 42447// CHECK11-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP12]])2448// CHECK11-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42449// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 42450// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2451// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42452// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42453// CHECK11-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]]2454// CHECK11-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2455// CHECK11: cond.true:2456// CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42457// CHECK11-NEXT: br label [[COND_END:%.*]]2458// CHECK11: cond.false:2459// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42460// CHECK11-NEXT: br label [[COND_END]]2461// CHECK11: cond.end:2462// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]2463// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42464// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42465// CHECK11-NEXT: store i32 [[TMP19]], ptr [[DOTOMP_IV]], align 42466// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2467// CHECK11: omp.inner.for.cond:2468// CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42469// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42470// CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]2471// CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2472// CHECK11: omp.inner.for.body:2473// CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42474// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 12475// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2476// CHECK11-NEXT: store i32 [[ADD]], ptr [[I4]], align 42477// CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[I4]], align 42478// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 [[TMP23]]2479// CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 42480// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2481// CHECK11: omp.body.continue:2482// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2483// CHECK11: omp.inner.for.inc:2484// CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42485// CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 12486// CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 42487// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]2488// CHECK11: omp.inner.for.end:2489// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2490// CHECK11: omp.loop.exit:2491// CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42492// CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 42493// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP26]])2494// CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42495// CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 02496// CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2497// CHECK11: .omp.final.then:2498// CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42499// CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP29]], 02500// CHECK11-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 12501// CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 12502// CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]2503// CHECK11-NEXT: store i32 [[ADD12]], ptr [[TMP0]], align 42504// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]2505// CHECK11: .omp.final.done:2506// CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42507// CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 02508// CHECK11-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]2509// CHECK11: .omp.linear.pu:2510// CHECK11-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]2511// CHECK11: .omp.linear.pu.done:2512// CHECK11-NEXT: br label [[OMP_PRECOND_END]]2513// CHECK11: omp.precond.end:2514// CHECK11-NEXT: ret void2515//2516//2517// CHECK13-LABEL: define {{[^@]+}}@_Z15teams_local_argv2518// CHECK13-SAME: () #[[ATTR0:[0-9]+]] {2519// CHECK13-NEXT: entry:2520// CHECK13-NEXT: [[N:%.*]] = alloca i32, align 42521// CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 82522// CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 82523// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 42524// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 42525// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42526// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42527// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42528// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42529// CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 42530// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42531// CHECK13-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 42532// CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 42533// CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 42534// CHECK13-NEXT: store i32 100, ptr [[N]], align 42535// CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 42536// CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i642537// CHECK13-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()2538// CHECK13-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 82539// CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 42540// CHECK13-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 82541// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 42542// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 42543// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42544// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 02545// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12546// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12547// CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42548// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42549// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42550// CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 42551// CHECK13-NEXT: store i32 0, ptr [[I3]], align 42552// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42553// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]2554// CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]2555// CHECK13: simd.if.then:2556// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42557// CHECK13-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 42558// CHECK13-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[VLA]], i64 16) ]2559// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 42560// CHECK13-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START]], align 42561// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2562// CHECK13: omp.inner.for.cond:2563// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42564// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42565// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]2566// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2567// CHECK13: omp.inner.for.body:2568// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42569// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 12570// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2571// CHECK13-NEXT: store i32 [[ADD]], ptr [[I4]], align 42572// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[I4]], align 42573// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i642574// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM]]2575// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 42576// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2577// CHECK13: omp.body.continue:2578// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2579// CHECK13: omp.inner.for.inc:2580// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42581// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 12582// CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 42583// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]2584// CHECK13: omp.inner.for.end:2585// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42586// CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP14]], 02587// CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 12588// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 12589// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]2590// CHECK13-NEXT: store i32 [[ADD11]], ptr [[I]], align 42591// CHECK13-NEXT: br label [[SIMD_IF_END]]2592// CHECK13: simd.if.end:2593// CHECK13-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 02594// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX12]], align 42595// CHECK13-NEXT: [[TMP16:%.*]] = load ptr, ptr [[SAVED_STACK]], align 82596// CHECK13-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP16]])2597// CHECK13-NEXT: ret i32 [[TMP15]]2598//2599//2600// CHECK15-LABEL: define {{[^@]+}}@_Z15teams_local_argv2601// CHECK15-SAME: () #[[ATTR0:[0-9]+]] {2602// CHECK15-NEXT: entry:2603// CHECK15-NEXT: [[N:%.*]] = alloca i32, align 42604// CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 42605// CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 42606// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 42607// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 42608// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42609// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42610// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42611// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42612// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 42613// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42614// CHECK15-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 42615// CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 42616// CHECK15-NEXT: [[I5:%.*]] = alloca i32, align 42617// CHECK15-NEXT: store i32 100, ptr [[N]], align 42618// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 42619// CHECK15-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()2620// CHECK15-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 42621// CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 42622// CHECK15-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 42623// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 42624// CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 42625// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42626// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 02627// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12628// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12629// CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42630// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42631// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42632// CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 42633// CHECK15-NEXT: store i32 0, ptr [[I3]], align 42634// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42635// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]2636// CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]2637// CHECK15: simd.if.then:2638// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42639// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 42640// CHECK15-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[VLA]], i32 16) ]2641// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 42642// CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 42643// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2644// CHECK15: omp.inner.for.cond:2645// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42646// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42647// CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]2648// CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2649// CHECK15: omp.inner.for.body:2650// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42651// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 12652// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2653// CHECK15-NEXT: store i32 [[ADD]], ptr [[I4]], align 42654// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I4]], align 42655// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP11]]2656// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 42657// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2658// CHECK15: omp.body.continue:2659// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2660// CHECK15: omp.inner.for.inc:2661// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42662// CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 12663// CHECK15-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 42664// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]2665// CHECK15: omp.inner.for.end:2666// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42667// CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP13]], 02668// CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 12669// CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 12670// CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]2671// CHECK15-NEXT: store i32 [[ADD11]], ptr [[I]], align 42672// CHECK15-NEXT: br label [[SIMD_IF_END]]2673// CHECK15: simd.if.end:2674// CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 02675// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[ARRAYIDX12]], align 42676// CHECK15-NEXT: [[TMP15:%.*]] = load ptr, ptr [[SAVED_STACK]], align 42677// CHECK15-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP15]])2678// CHECK15-NEXT: ret i32 [[TMP14]]2679//2680//2681// CHECK17-LABEL: define {{[^@]+}}@_Z21teams_template_structv2682// CHECK17-SAME: () #[[ATTR0:[0-9]+]] {2683// CHECK17-NEXT: entry:2684// CHECK17-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 42685// CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])2686// CHECK17-NEXT: ret i32 [[CALL]]2687//2688//2689// CHECK17-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv2690// CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {2691// CHECK17-NEXT: entry:2692// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82693// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 42694// CHECK17-NEXT: [[I_CASTED:%.*]] = alloca i64, align 82695// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 82696// CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 82697// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x ptr], align 82698// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 42699// CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82700// CHECK17-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82701// CHECK17-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82702// CHECK17-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 42703// CHECK17-NEXT: store i32 [[TMP0]], ptr [[I_CASTED]], align 42704// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[I_CASTED]], align 82705// CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 02706// CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02707// CHECK17-NEXT: store ptr [[THIS1]], ptr [[TMP2]], align 82708// CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02709// CHECK17-NEXT: store ptr [[A]], ptr [[TMP3]], align 82710// CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 02711// CHECK17-NEXT: store ptr null, ptr [[TMP4]], align 82712// CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 12713// CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP5]], align 82714// CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 12715// CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP6]], align 82716// CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 12717// CHECK17-NEXT: store ptr null, ptr [[TMP7]], align 82718// CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02719// CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02720// CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02721// CHECK17-NEXT: store i32 3, ptr [[TMP10]], align 42722// CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12723// CHECK17-NEXT: store i32 2, ptr [[TMP11]], align 42724// CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22725// CHECK17-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 82726// CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32727// CHECK17-NEXT: store ptr [[TMP9]], ptr [[TMP13]], align 82728// CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42729// CHECK17-NEXT: store ptr @.offload_sizes, ptr [[TMP14]], align 82730// CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52731// CHECK17-NEXT: store ptr @.offload_maptypes, ptr [[TMP15]], align 82732// CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62733// CHECK17-NEXT: store ptr null, ptr [[TMP16]], align 82734// CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72735// CHECK17-NEXT: store ptr null, ptr [[TMP17]], align 82736// CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82737// CHECK17-NEXT: store i64 123, ptr [[TMP18]], align 82738// CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92739// CHECK17-NEXT: store i64 0, ptr [[TMP19]], align 82740// CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102741// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 42742// CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112743// CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP21]], align 42744// CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122745// CHECK17-NEXT: store i32 0, ptr [[TMP22]], align 42746// CHECK17-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.region_id, ptr [[KERNEL_ARGS]])2747// CHECK17-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 02748// CHECK17-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2749// CHECK17: omp_offload.failed:2750// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(ptr [[THIS1]], i64 [[TMP1]]) #[[ATTR3:[0-9]+]]2751// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]2752// CHECK17: omp_offload.cont:2753// CHECK17-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 02754// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A2]], i64 0, i64 02755// CHECK17-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX]], align 42756// CHECK17-NEXT: ret i32 [[TMP25]]2757//2758//2759// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l1122760// CHECK17-SAME: (ptr noundef [[THIS:%.*]], i64 noundef [[I:%.*]]) #[[ATTR1:[0-9]+]] {2761// CHECK17-NEXT: entry:2762// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82763// CHECK17-NEXT: [[I_ADDR:%.*]] = alloca i64, align 82764// CHECK17-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82765// CHECK17-NEXT: store i64 [[I]], ptr [[I_ADDR]], align 82766// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82767// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined, ptr [[I_ADDR]], ptr [[TMP0]])2768// CHECK17-NEXT: ret void2769//2770//2771// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined2772// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2773// CHECK17-NEXT: entry:2774// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82775// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82776// CHECK17-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 82777// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82778// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42779// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 42780// CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42781// CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42782// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42783// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42784// CHECK17-NEXT: [[I1:%.*]] = alloca i32, align 42785// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82786// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82787// CHECK17-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 82788// CHECK17-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82789// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 82790// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82791// CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP1]], i32 0, i32 02792// CHECK17-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 02793// CHECK17-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 16) ]2794// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42795// CHECK17-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 42796// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42797// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42798// CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82799// CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 42800// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2801// CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42802// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1222803// CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2804// CHECK17: cond.true:2805// CHECK17-NEXT: br label [[COND_END:%.*]]2806// CHECK17: cond.false:2807// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42808// CHECK17-NEXT: br label [[COND_END]]2809// CHECK17: cond.end:2810// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]2811// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42812// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42813// CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 42814// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2815// CHECK17: omp.inner.for.cond:2816// CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42817// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42818// CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]2819// CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2820// CHECK17: omp.inner.for.body:2821// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42822// CHECK17-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i642823// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42824// CHECK17-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i642825// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined.omp_outlined, i64 [[TMP10]], i64 [[TMP12]], ptr [[I1]], ptr [[TMP1]])2826// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2827// CHECK17: omp.inner.for.inc:2828// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42829// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42830// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]2831// CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 42832// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]2833// CHECK17: omp.inner.for.end:2834// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2835// CHECK17: omp.loop.exit:2836// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])2837// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42838// CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 02839// CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2840// CHECK17: .omp.final.then:2841// CHECK17-NEXT: store i32 123, ptr [[TMP0]], align 42842// CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]2843// CHECK17: .omp.final.done:2844// CHECK17-NEXT: ret void2845//2846//2847// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined.omp_outlined2848// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {2849// CHECK17-NEXT: entry:2850// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82851// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82852// CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 82853// CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 82854// CHECK17-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 82855// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82856// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42857// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 42858// CHECK17-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 42859// CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42860// CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42861// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42862// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42863// CHECK17-NEXT: [[I2:%.*]] = alloca i32, align 42864// CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 42865// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82866// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82867// CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 82868// CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 82869// CHECK17-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 82870// CHECK17-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82871// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 82872// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82873// CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP1]], i32 0, i32 02874// CHECK17-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 02875// CHECK17-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 16) ]2876// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 42877// CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTLINEAR_START]], align 42878// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42879// CHECK17-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 42880// CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 82881// CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP3]] to i322882// CHECK17-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82883// CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP4]] to i322884// CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 42885// CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 42886// CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42887// CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42888// CHECK17-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82889// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 42890// CHECK17-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP6]])2891// CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP6]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2892// CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42893// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1222894// CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2895// CHECK17: cond.true:2896// CHECK17-NEXT: br label [[COND_END:%.*]]2897// CHECK17: cond.false:2898// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42899// CHECK17-NEXT: br label [[COND_END]]2900// CHECK17: cond.end:2901// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]2902// CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42903// CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42904// CHECK17-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 42905// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2906// CHECK17: omp.inner.for.cond:2907// CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42908// CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42909// CHECK17-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]2910// CHECK17-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2911// CHECK17: omp.inner.for.body:2912// CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42913// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 12914// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2915// CHECK17-NEXT: store i32 [[ADD]], ptr [[I2]], align 42916// CHECK17-NEXT: [[A5:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP1]], i32 0, i32 02917// CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[I2]], align 42918// CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i642919// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A5]], i64 0, i64 [[IDXPROM]]2920// CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 42921// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2922// CHECK17: omp.body.continue:2923// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2924// CHECK17: omp.inner.for.inc:2925// CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42926// CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 12927// CHECK17-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 42928// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]2929// CHECK17: omp.inner.for.end:2930// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2931// CHECK17: omp.loop.exit:2932// CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP6]])2933// CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42934// CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 02935// CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2936// CHECK17: .omp.final.then:2937// CHECK17-NEXT: store i32 123, ptr [[TMP0]], align 42938// CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]2939// CHECK17: .omp.final.done:2940// CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42941// CHECK17-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 02942// CHECK17-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]2943// CHECK17: .omp.linear.pu:2944// CHECK17-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]2945// CHECK17: .omp.linear.pu.done:2946// CHECK17-NEXT: ret void2947//2948//2949// CHECK19-LABEL: define {{[^@]+}}@_Z21teams_template_structv2950// CHECK19-SAME: () #[[ATTR0:[0-9]+]] {2951// CHECK19-NEXT: entry:2952// CHECK19-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 42953// CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])2954// CHECK19-NEXT: ret i32 [[CALL]]2955//2956//2957// CHECK19-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv2958// CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {2959// CHECK19-NEXT: entry:2960// CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42961// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 42962// CHECK19-NEXT: [[I_CASTED:%.*]] = alloca i32, align 42963// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 42964// CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 42965// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x ptr], align 42966// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 42967// CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82968// CHECK19-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42969// CHECK19-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42970// CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 42971// CHECK19-NEXT: store i32 [[TMP0]], ptr [[I_CASTED]], align 42972// CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[I_CASTED]], align 42973// CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 02974// CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02975// CHECK19-NEXT: store ptr [[THIS1]], ptr [[TMP2]], align 42976// CHECK19-NEXT: [[TMP3:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02977// CHECK19-NEXT: store ptr [[A]], ptr [[TMP3]], align 42978// CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 02979// CHECK19-NEXT: store ptr null, ptr [[TMP4]], align 42980// CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 12981// CHECK19-NEXT: store i32 [[TMP1]], ptr [[TMP5]], align 42982// CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 12983// CHECK19-NEXT: store i32 [[TMP1]], ptr [[TMP6]], align 42984// CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 12985// CHECK19-NEXT: store ptr null, ptr [[TMP7]], align 42986// CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02987// CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02988// CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02989// CHECK19-NEXT: store i32 3, ptr [[TMP10]], align 42990// CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12991// CHECK19-NEXT: store i32 2, ptr [[TMP11]], align 42992// CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22993// CHECK19-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 42994// CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32995// CHECK19-NEXT: store ptr [[TMP9]], ptr [[TMP13]], align 42996// CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42997// CHECK19-NEXT: store ptr @.offload_sizes, ptr [[TMP14]], align 42998// CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52999// CHECK19-NEXT: store ptr @.offload_maptypes, ptr [[TMP15]], align 43000// CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 63001// CHECK19-NEXT: store ptr null, ptr [[TMP16]], align 43002// CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 73003// CHECK19-NEXT: store ptr null, ptr [[TMP17]], align 43004// CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 83005// CHECK19-NEXT: store i64 123, ptr [[TMP18]], align 83006// CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 93007// CHECK19-NEXT: store i64 0, ptr [[TMP19]], align 83008// CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 103009// CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 43010// CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 113011// CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP21]], align 43012// CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 123013// CHECK19-NEXT: store i32 0, ptr [[TMP22]], align 43014// CHECK19-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.region_id, ptr [[KERNEL_ARGS]])3015// CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 03016// CHECK19-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]3017// CHECK19: omp_offload.failed:3018// CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(ptr [[THIS1]], i32 [[TMP1]]) #[[ATTR3:[0-9]+]]3019// CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]3020// CHECK19: omp_offload.cont:3021// CHECK19-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 03022// CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A2]], i32 0, i32 03023// CHECK19-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX]], align 43024// CHECK19-NEXT: ret i32 [[TMP25]]3025//3026//3027// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l1123028// CHECK19-SAME: (ptr noundef [[THIS:%.*]], i32 noundef [[I:%.*]]) #[[ATTR1:[0-9]+]] {3029// CHECK19-NEXT: entry:3030// CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43031// CHECK19-NEXT: [[I_ADDR:%.*]] = alloca i32, align 43032// CHECK19-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43033// CHECK19-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 43034// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43035// CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined, ptr [[I_ADDR]], ptr [[TMP0]])3036// CHECK19-NEXT: ret void3037//3038//3039// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined3040// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3041// CHECK19-NEXT: entry:3042// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43043// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43044// CHECK19-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 43045// CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43046// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43047// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 43048// CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 43049// CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 43050// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43051// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43052// CHECK19-NEXT: [[I1:%.*]] = alloca i32, align 43053// CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43054// CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43055// CHECK19-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 43056// CHECK19-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43057// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 43058// CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43059// CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP1]], i32 0, i32 03060// CHECK19-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 03061// CHECK19-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 16) ]3062// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 43063// CHECK19-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 43064// CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43065// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43066// CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43067// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 43068// CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3069// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43070// CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1223071// CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3072// CHECK19: cond.true:3073// CHECK19-NEXT: br label [[COND_END:%.*]]3074// CHECK19: cond.false:3075// CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43076// CHECK19-NEXT: br label [[COND_END]]3077// CHECK19: cond.end:3078// CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3079// CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43080// CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43081// CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43082// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3083// CHECK19: omp.inner.for.cond:3084// CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43085// CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43086// CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3087// CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3088// CHECK19: omp.inner.for.body:3089// CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43090// CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43091// CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined.omp_outlined, i32 [[TMP9]], i32 [[TMP10]], ptr [[I1]], ptr [[TMP1]])3092// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3093// CHECK19: omp.inner.for.inc:3094// CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43095// CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43096// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]3097// CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 43098// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]3099// CHECK19: omp.inner.for.end:3100// CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3101// CHECK19: omp.loop.exit:3102// CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])3103// CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43104// CHECK19-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 03105// CHECK19-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3106// CHECK19: .omp.final.then:3107// CHECK19-NEXT: store i32 123, ptr [[TMP0]], align 43108// CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]3109// CHECK19: .omp.final.done:3110// CHECK19-NEXT: ret void3111//3112//3113// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined.omp_outlined3114// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {3115// CHECK19-NEXT: entry:3116// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43117// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43118// CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 43119// CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 43120// CHECK19-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 43121// CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43122// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43123// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 43124// CHECK19-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 43125// CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43126// CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43127// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43128// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43129// CHECK19-NEXT: [[I1:%.*]] = alloca i32, align 43130// CHECK19-NEXT: [[I2:%.*]] = alloca i32, align 43131// CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43132// CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43133// CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 43134// CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 43135// CHECK19-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 43136// CHECK19-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43137// CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 43138// CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43139// CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP1]], i32 0, i32 03140// CHECK19-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 03141// CHECK19-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 16) ]3142// CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 43143// CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTLINEAR_START]], align 43144// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43145// CHECK19-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 43146// CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 43147// CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 43148// CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_LB]], align 43149// CHECK19-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 43150// CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43151// CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43152// CHECK19-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43153// CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 43154// CHECK19-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP6]])3155// CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP6]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3156// CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43157// CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1223158// CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3159// CHECK19: cond.true:3160// CHECK19-NEXT: br label [[COND_END:%.*]]3161// CHECK19: cond.false:3162// CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43163// CHECK19-NEXT: br label [[COND_END]]3164// CHECK19: cond.end:3165// CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]3166// CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43167// CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43168// CHECK19-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 43169// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3170// CHECK19: omp.inner.for.cond:3171// CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43172// CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43173// CHECK19-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]3174// CHECK19-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3175// CHECK19: omp.inner.for.body:3176// CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43177// CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 13178// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3179// CHECK19-NEXT: store i32 [[ADD]], ptr [[I1]], align 43180// CHECK19-NEXT: [[A4:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP1]], i32 0, i32 03181// CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[I1]], align 43182// CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A4]], i32 0, i32 [[TMP13]]3183// CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 43184// CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3185// CHECK19: omp.body.continue:3186// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3187// CHECK19: omp.inner.for.inc:3188// CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43189// CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 13190// CHECK19-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 43191// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]3192// CHECK19: omp.inner.for.end:3193// CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3194// CHECK19: omp.loop.exit:3195// CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP6]])3196// CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43197// CHECK19-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 03198// CHECK19-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3199// CHECK19: .omp.final.then:3200// CHECK19-NEXT: store i32 123, ptr [[TMP0]], align 43201// CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]3202// CHECK19: .omp.final.done:3203// CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43204// CHECK19-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 03205// CHECK19-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]3206// CHECK19: .omp.linear.pu:3207// CHECK19-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]3208// CHECK19: .omp.linear.pu.done:3209// CHECK19-NEXT: ret void3210//3211//3212// CHECK21-LABEL: define {{[^@]+}}@_Z21teams_template_structv3213// CHECK21-SAME: () #[[ATTR0:[0-9]+]] {3214// CHECK21-NEXT: entry:3215// CHECK21-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 43216// CHECK21-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])3217// CHECK21-NEXT: ret i32 [[CALL]]3218//3219//3220// CHECK21-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv3221// CHECK21-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {3222// CHECK21-NEXT: entry:3223// CHECK21-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 83224// CHECK21-NEXT: [[I:%.*]] = alloca i32, align 43225// CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 43226// CHECK21-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43227// CHECK21-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43228// CHECK21-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43229// CHECK21-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 43230// CHECK21-NEXT: [[I2:%.*]] = alloca i32, align 43231// CHECK21-NEXT: [[I3:%.*]] = alloca i32, align 43232// CHECK21-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 83233// CHECK21-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83234// CHECK21-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43235// CHECK21-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 43236// CHECK21-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43237// CHECK21-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 43238// CHECK21-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 03239// CHECK21-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 03240// CHECK21-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 16) ]3241// CHECK21-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 43242// CHECK21-NEXT: store i32 [[TMP1]], ptr [[DOTLINEAR_START]], align 43243// CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3244// CHECK21: omp.inner.for.cond:3245// CHECK21-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43246// CHECK21-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43247// CHECK21-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]3248// CHECK21-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3249// CHECK21: omp.inner.for.body:3250// CHECK21-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43251// CHECK21-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 13252// CHECK21-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3253// CHECK21-NEXT: store i32 [[ADD]], ptr [[I2]], align 43254// CHECK21-NEXT: [[A4:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 03255// CHECK21-NEXT: [[TMP5:%.*]] = load i32, ptr [[I2]], align 43256// CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i643257// CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A4]], i64 0, i64 [[IDXPROM]]3258// CHECK21-NEXT: store i32 0, ptr [[ARRAYIDX]], align 43259// CHECK21-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3260// CHECK21: omp.body.continue:3261// CHECK21-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3262// CHECK21: omp.inner.for.inc:3263// CHECK21-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43264// CHECK21-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 13265// CHECK21-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 43266// CHECK21-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]3267// CHECK21: omp.inner.for.end:3268// CHECK21-NEXT: store i32 123, ptr [[I]], align 43269// CHECK21-NEXT: [[A6:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 03270// CHECK21-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], ptr [[A6]], i64 0, i64 03271// CHECK21-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX7]], align 43272// CHECK21-NEXT: ret i32 [[TMP7]]3273//3274//3275// CHECK23-LABEL: define {{[^@]+}}@_Z21teams_template_structv3276// CHECK23-SAME: () #[[ATTR0:[0-9]+]] {3277// CHECK23-NEXT: entry:3278// CHECK23-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 43279// CHECK23-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])3280// CHECK23-NEXT: ret i32 [[CALL]]3281//3282//3283// CHECK23-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv3284// CHECK23-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {3285// CHECK23-NEXT: entry:3286// CHECK23-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 43287// CHECK23-NEXT: [[I:%.*]] = alloca i32, align 43288// CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 43289// CHECK23-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43290// CHECK23-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43291// CHECK23-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43292// CHECK23-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 43293// CHECK23-NEXT: [[I2:%.*]] = alloca i32, align 43294// CHECK23-NEXT: [[I3:%.*]] = alloca i32, align 43295// CHECK23-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 43296// CHECK23-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43297// CHECK23-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43298// CHECK23-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 43299// CHECK23-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43300// CHECK23-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 43301// CHECK23-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 03302// CHECK23-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 03303// CHECK23-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 16) ]3304// CHECK23-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 43305// CHECK23-NEXT: store i32 [[TMP1]], ptr [[DOTLINEAR_START]], align 43306// CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3307// CHECK23: omp.inner.for.cond:3308// CHECK23-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43309// CHECK23-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43310// CHECK23-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]3311// CHECK23-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3312// CHECK23: omp.inner.for.body:3313// CHECK23-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43314// CHECK23-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 13315// CHECK23-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3316// CHECK23-NEXT: store i32 [[ADD]], ptr [[I2]], align 43317// CHECK23-NEXT: [[A4:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 03318// CHECK23-NEXT: [[TMP5:%.*]] = load i32, ptr [[I2]], align 43319// CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A4]], i32 0, i32 [[TMP5]]3320// CHECK23-NEXT: store i32 0, ptr [[ARRAYIDX]], align 43321// CHECK23-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3322// CHECK23: omp.body.continue:3323// CHECK23-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3324// CHECK23: omp.inner.for.inc:3325// CHECK23-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43326// CHECK23-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 13327// CHECK23-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 43328// CHECK23-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]3329// CHECK23: omp.inner.for.end:3330// CHECK23-NEXT: store i32 123, ptr [[I]], align 43331// CHECK23-NEXT: [[A6:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 03332// CHECK23-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], ptr [[A6]], i32 0, i32 03333// CHECK23-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX7]], align 43334// CHECK23-NEXT: ret i32 [[TMP7]]3335//3336//3337// CHECK25-LABEL: define {{[^@]+}}@main3338// CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {3339// CHECK25-NEXT: entry:3340// CHECK25-NEXT: [[RETVAL:%.*]] = alloca i32, align 43341// CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 43342// CHECK25-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 83343// CHECK25-NEXT: [[N:%.*]] = alloca i32, align 43344// CHECK25-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 83345// CHECK25-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 83346// CHECK25-NEXT: [[I:%.*]] = alloca i32, align 43347// CHECK25-NEXT: [[I_CASTED:%.*]] = alloca i64, align 83348// CHECK25-NEXT: [[N_CASTED:%.*]] = alloca i64, align 83349// CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 83350// CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 83351// CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 83352// CHECK25-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 83353// CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 43354// CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 43355// CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 43356// CHECK25-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 83357// CHECK25-NEXT: store i32 0, ptr [[RETVAL]], align 43358// CHECK25-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43359// CHECK25-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 83360// CHECK25-NEXT: store i32 100, ptr [[N]], align 43361// CHECK25-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 43362// CHECK25-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i643363// CHECK25-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()3364// CHECK25-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 83365// CHECK25-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 43366// CHECK25-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 83367// CHECK25-NEXT: [[TMP3:%.*]] = load i32, ptr [[I]], align 43368// CHECK25-NEXT: store i32 [[TMP3]], ptr [[I_CASTED]], align 43369// CHECK25-NEXT: [[TMP4:%.*]] = load i64, ptr [[I_CASTED]], align 83370// CHECK25-NEXT: [[TMP5:%.*]] = load i32, ptr [[N]], align 43371// CHECK25-NEXT: store i32 [[TMP5]], ptr [[N_CASTED]], align 43372// CHECK25-NEXT: [[TMP6:%.*]] = load i64, ptr [[N_CASTED]], align 83373// CHECK25-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 43374// CHECK25-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 32, i1 false)3375// CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03376// CHECK25-NEXT: store i64 [[TMP1]], ptr [[TMP8]], align 83377// CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03378// CHECK25-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 83379// CHECK25-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 03380// CHECK25-NEXT: store ptr null, ptr [[TMP10]], align 83381// CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 13382// CHECK25-NEXT: store ptr [[VLA]], ptr [[TMP11]], align 83383// CHECK25-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 13384// CHECK25-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 83385// CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 13386// CHECK25-NEXT: store i64 [[TMP7]], ptr [[TMP13]], align 83387// CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 13388// CHECK25-NEXT: store ptr null, ptr [[TMP14]], align 83389// CHECK25-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 23390// CHECK25-NEXT: store i64 [[TMP4]], ptr [[TMP15]], align 83391// CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 23392// CHECK25-NEXT: store i64 [[TMP4]], ptr [[TMP16]], align 83393// CHECK25-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 23394// CHECK25-NEXT: store ptr null, ptr [[TMP17]], align 83395// CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 33396// CHECK25-NEXT: store i64 [[TMP6]], ptr [[TMP18]], align 83397// CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 33398// CHECK25-NEXT: store i64 [[TMP6]], ptr [[TMP19]], align 83399// CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 33400// CHECK25-NEXT: store ptr null, ptr [[TMP20]], align 83401// CHECK25-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03402// CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03403// CHECK25-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 03404// CHECK25-NEXT: [[TMP24:%.*]] = load i32, ptr [[N]], align 43405// CHECK25-NEXT: store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_]], align 43406// CHECK25-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43407// CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP25]], 03408// CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 13409// CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 13410// CHECK25-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 43411// CHECK25-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43412// CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], 13413// CHECK25-NEXT: [[TMP27:%.*]] = zext i32 [[ADD]] to i643414// CHECK25-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 03415// CHECK25-NEXT: store i32 3, ptr [[TMP28]], align 43416// CHECK25-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 13417// CHECK25-NEXT: store i32 4, ptr [[TMP29]], align 43418// CHECK25-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 23419// CHECK25-NEXT: store ptr [[TMP21]], ptr [[TMP30]], align 83420// CHECK25-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 33421// CHECK25-NEXT: store ptr [[TMP22]], ptr [[TMP31]], align 83422// CHECK25-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 43423// CHECK25-NEXT: store ptr [[TMP23]], ptr [[TMP32]], align 83424// CHECK25-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 53425// CHECK25-NEXT: store ptr @.offload_maptypes, ptr [[TMP33]], align 83426// CHECK25-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 63427// CHECK25-NEXT: store ptr null, ptr [[TMP34]], align 83428// CHECK25-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 73429// CHECK25-NEXT: store ptr null, ptr [[TMP35]], align 83430// CHECK25-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 83431// CHECK25-NEXT: store i64 [[TMP27]], ptr [[TMP36]], align 83432// CHECK25-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 93433// CHECK25-NEXT: store i64 0, ptr [[TMP37]], align 83434// CHECK25-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 103435// CHECK25-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP38]], align 43436// CHECK25-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 113437// CHECK25-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 43438// CHECK25-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 123439// CHECK25-NEXT: store i32 0, ptr [[TMP40]], align 43440// CHECK25-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.region_id, ptr [[KERNEL_ARGS]])3441// CHECK25-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 03442// CHECK25-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]3443// CHECK25: omp_offload.failed:3444// CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i64 [[TMP1]], ptr [[VLA]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]3445// CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]]3446// CHECK25: omp_offload.cont:3447// CHECK25-NEXT: [[TMP43:%.*]] = load i32, ptr [[ARGC_ADDR]], align 43448// CHECK25-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP43]])3449// CHECK25-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 43450// CHECK25-NEXT: [[TMP44:%.*]] = load ptr, ptr [[SAVED_STACK]], align 83451// CHECK25-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP44]])3452// CHECK25-NEXT: [[TMP45:%.*]] = load i32, ptr [[RETVAL]], align 43453// CHECK25-NEXT: ret i32 [[TMP45]]3454//3455//3456// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1663457// CHECK25-SAME: (i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] {3458// CHECK25-NEXT: entry:3459// CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 83460// CHECK25-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 83461// CHECK25-NEXT: [[I_ADDR:%.*]] = alloca i64, align 83462// CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 83463// CHECK25-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 83464// CHECK25-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 83465// CHECK25-NEXT: store i64 [[I]], ptr [[I_ADDR]], align 83466// CHECK25-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 83467// CHECK25-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 83468// CHECK25-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 83469// CHECK25-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined, ptr [[I_ADDR]], ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])3470// CHECK25-NEXT: ret void3471//3472//3473// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined3474// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {3475// CHECK25-NEXT: entry:3476// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83477// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83478// CHECK25-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 83479// CHECK25-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 83480// CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 83481// CHECK25-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 83482// CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43483// CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 43484// CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 43485// CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 43486// CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 43487// CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 43488// CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 43489// CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43490// CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43491// CHECK25-NEXT: [[I4:%.*]] = alloca i32, align 43492// CHECK25-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83493// CHECK25-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83494// CHECK25-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 83495// CHECK25-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 83496// CHECK25-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 83497// CHECK25-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 83498// CHECK25-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 83499// CHECK25-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 83500// CHECK25-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 83501// CHECK25-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 83502// CHECK25-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 43503// CHECK25-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 43504// CHECK25-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43505// CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 03506// CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 13507// CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 13508// CHECK25-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 43509// CHECK25-NEXT: store i32 0, ptr [[I3]], align 43510// CHECK25-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43511// CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]3512// CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]3513// CHECK25: omp.precond.then:3514// CHECK25-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i64 16) ]3515// CHECK25-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 43516// CHECK25-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43517// CHECK25-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 43518// CHECK25-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43519// CHECK25-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43520// CHECK25-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83521// CHECK25-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 43522// CHECK25-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3523// CHECK25-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43524// CHECK25-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43525// CHECK25-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]3526// CHECK25-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3527// CHECK25: cond.true:3528// CHECK25-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43529// CHECK25-NEXT: br label [[COND_END:%.*]]3530// CHECK25: cond.false:3531// CHECK25-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43532// CHECK25-NEXT: br label [[COND_END]]3533// CHECK25: cond.end:3534// CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]3535// CHECK25-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43536// CHECK25-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43537// CHECK25-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 43538// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3539// CHECK25: omp.inner.for.cond:3540// CHECK25-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43541// CHECK25-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43542// CHECK25-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]3543// CHECK25-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3544// CHECK25: omp.inner.for.body:3545// CHECK25-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43546// CHECK25-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i643547// CHECK25-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43548// CHECK25-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i643549// CHECK25-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[I4]], ptr [[TMP1]], i64 [[TMP2]], ptr [[TMP3]])3550// CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3551// CHECK25: omp.inner.for.inc:3552// CHECK25-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43553// CHECK25-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43554// CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]3555// CHECK25-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 43556// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]3557// CHECK25: omp.inner.for.end:3558// CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3559// CHECK25: omp.loop.exit:3560// CHECK25-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83561// CHECK25-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 43562// CHECK25-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])3563// CHECK25-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43564// CHECK25-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 03565// CHECK25-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3566// CHECK25: .omp.final.then:3567// CHECK25-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43568// CHECK25-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 03569// CHECK25-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 13570// CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 13571// CHECK25-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]3572// CHECK25-NEXT: store i32 [[ADD9]], ptr [[TMP0]], align 43573// CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]]3574// CHECK25: .omp.final.done:3575// CHECK25-NEXT: br label [[OMP_PRECOND_END]]3576// CHECK25: omp.precond.end:3577// CHECK25-NEXT: ret void3578//3579//3580// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp_outlined3581// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {3582// CHECK25-NEXT: entry:3583// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83584// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83585// CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 83586// CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 83587// CHECK25-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 83588// CHECK25-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 83589// CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 83590// CHECK25-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 83591// CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43592// CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 43593// CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 43594// CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 43595// CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 43596// CHECK25-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 43597// CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43598// CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43599// CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43600// CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43601// CHECK25-NEXT: [[I5:%.*]] = alloca i32, align 43602// CHECK25-NEXT: [[I6:%.*]] = alloca i32, align 43603// CHECK25-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83604// CHECK25-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83605// CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 83606// CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 83607// CHECK25-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 83608// CHECK25-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 83609// CHECK25-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 83610// CHECK25-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 83611// CHECK25-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 83612// CHECK25-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 83613// CHECK25-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 83614// CHECK25-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 83615// CHECK25-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 43616// CHECK25-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 43617// CHECK25-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43618// CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 03619// CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 13620// CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 13621// CHECK25-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 43622// CHECK25-NEXT: store i32 0, ptr [[I3]], align 43623// CHECK25-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43624// CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]3625// CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]3626// CHECK25: omp.precond.then:3627// CHECK25-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i64 16) ]3628// CHECK25-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP0]], align 43629// CHECK25-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 43630// CHECK25-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43631// CHECK25-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43632// CHECK25-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 43633// CHECK25-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 83634// CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i323635// CHECK25-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 83636// CHECK25-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP10]] to i323637// CHECK25-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 43638// CHECK25-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 43639// CHECK25-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43640// CHECK25-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43641// CHECK25-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83642// CHECK25-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 43643// CHECK25-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP12]])3644// CHECK25-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83645// CHECK25-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 43646// CHECK25-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3647// CHECK25-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43648// CHECK25-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43649// CHECK25-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]]3650// CHECK25-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3651// CHECK25: cond.true:3652// CHECK25-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43653// CHECK25-NEXT: br label [[COND_END:%.*]]3654// CHECK25: cond.false:3655// CHECK25-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43656// CHECK25-NEXT: br label [[COND_END]]3657// CHECK25: cond.end:3658// CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]3659// CHECK25-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43660// CHECK25-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43661// CHECK25-NEXT: store i32 [[TMP19]], ptr [[DOTOMP_IV]], align 43662// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3663// CHECK25: omp.inner.for.cond:3664// CHECK25-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43665// CHECK25-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43666// CHECK25-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]3667// CHECK25-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3668// CHECK25: omp.inner.for.body:3669// CHECK25-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43670// CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 13671// CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3672// CHECK25-NEXT: store i32 [[ADD]], ptr [[I5]], align 43673// CHECK25-NEXT: [[TMP23:%.*]] = load i32, ptr [[I5]], align 43674// CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i643675// CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]]3676// CHECK25-NEXT: store i32 0, ptr [[ARRAYIDX]], align 43677// CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3678// CHECK25: omp.body.continue:3679// CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3680// CHECK25: omp.inner.for.inc:3681// CHECK25-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43682// CHECK25-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], 13683// CHECK25-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 43684// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]3685// CHECK25: omp.inner.for.end:3686// CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3687// CHECK25: omp.loop.exit:3688// CHECK25-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83689// CHECK25-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 43690// CHECK25-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP26]])3691// CHECK25-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43692// CHECK25-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 03693// CHECK25-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3694// CHECK25: .omp.final.then:3695// CHECK25-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43696// CHECK25-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 03697// CHECK25-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 13698// CHECK25-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 13699// CHECK25-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]3700// CHECK25-NEXT: store i32 [[ADD13]], ptr [[TMP0]], align 43701// CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]]3702// CHECK25: .omp.final.done:3703// CHECK25-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43704// CHECK25-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 03705// CHECK25-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]3706// CHECK25: .omp.linear.pu:3707// CHECK25-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]3708// CHECK25: .omp.linear.pu.done:3709// CHECK25-NEXT: br label [[OMP_PRECOND_END]]3710// CHECK25: omp.precond.end:3711// CHECK25-NEXT: ret void3712//3713//3714// CHECK25-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_3715// CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR7:[0-9]+]] comdat {3716// CHECK25-NEXT: entry:3717// CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 43718// CHECK25-NEXT: [[A:%.*]] = alloca [10 x i32], align 43719// CHECK25-NEXT: [[TE:%.*]] = alloca i32, align 43720// CHECK25-NEXT: [[TH:%.*]] = alloca i32, align 43721// CHECK25-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 83722// CHECK25-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 83723// CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 83724// CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 83725// CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 83726// CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 43727// CHECK25-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 83728// CHECK25-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43729// CHECK25-NEXT: store i32 0, ptr [[TE]], align 43730// CHECK25-NEXT: store i32 128, ptr [[TH]], align 43731// CHECK25-NEXT: [[TMP0:%.*]] = load i32, ptr [[TE]], align 43732// CHECK25-NEXT: store i32 [[TMP0]], ptr [[TE_CASTED]], align 43733// CHECK25-NEXT: [[TMP1:%.*]] = load i64, ptr [[TE_CASTED]], align 83734// CHECK25-NEXT: [[TMP2:%.*]] = load i32, ptr [[TH]], align 43735// CHECK25-NEXT: store i32 [[TMP2]], ptr [[TH_CASTED]], align 43736// CHECK25-NEXT: [[TMP3:%.*]] = load i64, ptr [[TH_CASTED]], align 83737// CHECK25-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03738// CHECK25-NEXT: store i64 [[TMP1]], ptr [[TMP4]], align 83739// CHECK25-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03740// CHECK25-NEXT: store i64 [[TMP1]], ptr [[TMP5]], align 83741// CHECK25-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 03742// CHECK25-NEXT: store ptr null, ptr [[TMP6]], align 83743// CHECK25-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 13744// CHECK25-NEXT: store i64 [[TMP3]], ptr [[TMP7]], align 83745// CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 13746// CHECK25-NEXT: store i64 [[TMP3]], ptr [[TMP8]], align 83747// CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 13748// CHECK25-NEXT: store ptr null, ptr [[TMP9]], align 83749// CHECK25-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 23750// CHECK25-NEXT: store ptr [[A]], ptr [[TMP10]], align 83751// CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 23752// CHECK25-NEXT: store ptr [[A]], ptr [[TMP11]], align 83753// CHECK25-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 23754// CHECK25-NEXT: store ptr null, ptr [[TMP12]], align 83755// CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03756// CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03757// CHECK25-NEXT: [[TMP15:%.*]] = load i32, ptr [[TE]], align 43758// CHECK25-NEXT: [[TMP16:%.*]] = load i32, ptr [[TH]], align 43759// CHECK25-NEXT: [[TMP17:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP15]], 03760// CHECK25-NEXT: [[TMP18:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP16]], 03761// CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 03762// CHECK25-NEXT: store i32 3, ptr [[TMP19]], align 43763// CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 13764// CHECK25-NEXT: store i32 3, ptr [[TMP20]], align 43765// CHECK25-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 23766// CHECK25-NEXT: store ptr [[TMP13]], ptr [[TMP21]], align 83767// CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 33768// CHECK25-NEXT: store ptr [[TMP14]], ptr [[TMP22]], align 83769// CHECK25-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 43770// CHECK25-NEXT: store ptr @.offload_sizes.1, ptr [[TMP23]], align 83771// CHECK25-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 53772// CHECK25-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP24]], align 83773// CHECK25-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 63774// CHECK25-NEXT: store ptr null, ptr [[TMP25]], align 83775// CHECK25-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 73776// CHECK25-NEXT: store ptr null, ptr [[TMP26]], align 83777// CHECK25-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 83778// CHECK25-NEXT: store i64 10, ptr [[TMP27]], align 83779// CHECK25-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 93780// CHECK25-NEXT: store i64 0, ptr [[TMP28]], align 83781// CHECK25-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 103782// CHECK25-NEXT: store [3 x i32] [[TMP17]], ptr [[TMP29]], align 43783// CHECK25-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 113784// CHECK25-NEXT: store [3 x i32] [[TMP18]], ptr [[TMP30]], align 43785// CHECK25-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 123786// CHECK25-NEXT: store i32 0, ptr [[TMP31]], align 43787// CHECK25-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4]], i64 -1, i32 [[TMP15]], i32 [[TMP16]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.region_id, ptr [[KERNEL_ARGS]])3788// CHECK25-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 03789// CHECK25-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]3790// CHECK25: omp_offload.failed:3791// CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i64 [[TMP1]], i64 [[TMP3]], ptr [[A]]) #[[ATTR4]]3792// CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]]3793// CHECK25: omp_offload.cont:3794// CHECK25-NEXT: ret i32 03795//3796//3797// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l1553798// CHECK25-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3799// CHECK25-NEXT: entry:3800// CHECK25-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 83801// CHECK25-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 83802// CHECK25-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 83803// CHECK25-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB4]])3804// CHECK25-NEXT: store i64 [[TE]], ptr [[TE_ADDR]], align 83805// CHECK25-NEXT: store i64 [[TH]], ptr [[TH_ADDR]], align 83806// CHECK25-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 83807// CHECK25-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 83808// CHECK25-NEXT: [[TMP2:%.*]] = load i32, ptr [[TE_ADDR]], align 43809// CHECK25-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH_ADDR]], align 43810// CHECK25-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])3811// CHECK25-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined, ptr [[TMP1]])3812// CHECK25-NEXT: ret void3813//3814//3815// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined3816// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3817// CHECK25-NEXT: entry:3818// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83819// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83820// CHECK25-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 83821// CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43822// CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 43823// CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 43824// CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 43825// CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43826// CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43827// CHECK25-NEXT: [[I:%.*]] = alloca i32, align 43828// CHECK25-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83829// CHECK25-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83830// CHECK25-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 83831// CHECK25-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 83832// CHECK25-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 43833// CHECK25-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 43834// CHECK25-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43835// CHECK25-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43836// CHECK25-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83837// CHECK25-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43838// CHECK25-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3839// CHECK25-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43840// CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 93841// CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3842// CHECK25: cond.true:3843// CHECK25-NEXT: br label [[COND_END:%.*]]3844// CHECK25: cond.false:3845// CHECK25-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43846// CHECK25-NEXT: br label [[COND_END]]3847// CHECK25: cond.end:3848// CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3849// CHECK25-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43850// CHECK25-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43851// CHECK25-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43852// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3853// CHECK25: omp.inner.for.cond:3854// CHECK25-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]3855// CHECK25-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]3856// CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3857// CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3858// CHECK25: omp.inner.for.body:3859// CHECK25-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]3860// CHECK25-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i643861// CHECK25-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]3862// CHECK25-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i643863// CHECK25-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP11]]3864// CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3865// CHECK25: omp.inner.for.inc:3866// CHECK25-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]3867// CHECK25-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]3868// CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]3869// CHECK25-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]3870// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]3871// CHECK25: omp.inner.for.end:3872// CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3873// CHECK25: omp.loop.exit:3874// CHECK25-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3875// CHECK25-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43876// CHECK25-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 03877// CHECK25-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3878// CHECK25: .omp.final.then:3879// CHECK25-NEXT: store i32 10, ptr [[I]], align 43880// CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]]3881// CHECK25: .omp.final.done:3882// CHECK25-NEXT: ret void3883//3884//3885// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined.omp_outlined3886// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3887// CHECK25-NEXT: entry:3888// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83889// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83890// CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 83891// CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 83892// CHECK25-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 83893// CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43894// CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 43895// CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43896// CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43897// CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43898// CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43899// CHECK25-NEXT: [[I:%.*]] = alloca i32, align 43900// CHECK25-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83901// CHECK25-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83902// CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 83903// CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 83904// CHECK25-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 83905// CHECK25-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 83906// CHECK25-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43907// CHECK25-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 43908// CHECK25-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 83909// CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i323910// CHECK25-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 83911// CHECK25-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i323912// CHECK25-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 43913// CHECK25-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 43914// CHECK25-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43915// CHECK25-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43916// CHECK25-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83917// CHECK25-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 43918// CHECK25-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3919// CHECK25-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43920// CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 93921// CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3922// CHECK25: cond.true:3923// CHECK25-NEXT: br label [[COND_END:%.*]]3924// CHECK25: cond.false:3925// CHECK25-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43926// CHECK25-NEXT: br label [[COND_END]]3927// CHECK25: cond.end:3928// CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]3929// CHECK25-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43930// CHECK25-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43931// CHECK25-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 43932// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3933// CHECK25: omp.inner.for.cond:3934// CHECK25-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]3935// CHECK25-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]3936// CHECK25-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]3937// CHECK25-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3938// CHECK25: omp.inner.for.body:3939// CHECK25-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]3940// CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 13941// CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3942// CHECK25-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]3943// CHECK25-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]3944// CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i643945// CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]3946// CHECK25-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]3947// CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3948// CHECK25: omp.body.continue:3949// CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3950// CHECK25: omp.inner.for.inc:3951// CHECK25-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]3952// CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 13953// CHECK25-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]3954// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]3955// CHECK25: omp.inner.for.end:3956// CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3957// CHECK25: omp.loop.exit:3958// CHECK25-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])3959// CHECK25-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43960// CHECK25-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 03961// CHECK25-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3962// CHECK25: .omp.final.then:3963// CHECK25-NEXT: store i32 10, ptr [[I]], align 43964// CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]]3965// CHECK25: .omp.final.done:3966// CHECK25-NEXT: ret void3967//3968//3969// CHECK27-LABEL: define {{[^@]+}}@main3970// CHECK27-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {3971// CHECK27-NEXT: entry:3972// CHECK27-NEXT: [[RETVAL:%.*]] = alloca i32, align 43973// CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 43974// CHECK27-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 43975// CHECK27-NEXT: [[N:%.*]] = alloca i32, align 43976// CHECK27-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 43977// CHECK27-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 43978// CHECK27-NEXT: [[I:%.*]] = alloca i32, align 43979// CHECK27-NEXT: [[I_CASTED:%.*]] = alloca i32, align 43980// CHECK27-NEXT: [[N_CASTED:%.*]] = alloca i32, align 43981// CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 43982// CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 43983// CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 43984// CHECK27-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 43985// CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 43986// CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 43987// CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 43988// CHECK27-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 83989// CHECK27-NEXT: store i32 0, ptr [[RETVAL]], align 43990// CHECK27-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43991// CHECK27-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 43992// CHECK27-NEXT: store i32 100, ptr [[N]], align 43993// CHECK27-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 43994// CHECK27-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()3995// CHECK27-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 43996// CHECK27-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 43997// CHECK27-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 43998// CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 43999// CHECK27-NEXT: store i32 [[TMP2]], ptr [[I_CASTED]], align 44000// CHECK27-NEXT: [[TMP3:%.*]] = load i32, ptr [[I_CASTED]], align 44001// CHECK27-NEXT: [[TMP4:%.*]] = load i32, ptr [[N]], align 44002// CHECK27-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 44003// CHECK27-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 44004// CHECK27-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 44005// CHECK27-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i644006// CHECK27-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 32, i1 false)4007// CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 04008// CHECK27-NEXT: store i32 [[TMP0]], ptr [[TMP8]], align 44009// CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 04010// CHECK27-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 44011// CHECK27-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 04012// CHECK27-NEXT: store ptr null, ptr [[TMP10]], align 44013// CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 14014// CHECK27-NEXT: store ptr [[VLA]], ptr [[TMP11]], align 44015// CHECK27-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 14016// CHECK27-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 44017// CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 14018// CHECK27-NEXT: store i64 [[TMP7]], ptr [[TMP13]], align 44019// CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 14020// CHECK27-NEXT: store ptr null, ptr [[TMP14]], align 44021// CHECK27-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 24022// CHECK27-NEXT: store i32 [[TMP3]], ptr [[TMP15]], align 44023// CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 24024// CHECK27-NEXT: store i32 [[TMP3]], ptr [[TMP16]], align 44025// CHECK27-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 24026// CHECK27-NEXT: store ptr null, ptr [[TMP17]], align 44027// CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 34028// CHECK27-NEXT: store i32 [[TMP5]], ptr [[TMP18]], align 44029// CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 34030// CHECK27-NEXT: store i32 [[TMP5]], ptr [[TMP19]], align 44031// CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 34032// CHECK27-NEXT: store ptr null, ptr [[TMP20]], align 44033// CHECK27-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 04034// CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 04035// CHECK27-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 04036// CHECK27-NEXT: [[TMP24:%.*]] = load i32, ptr [[N]], align 44037// CHECK27-NEXT: store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_]], align 44038// CHECK27-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44039// CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP25]], 04040// CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 14041// CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 14042// CHECK27-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 44043// CHECK27-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44044// CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], 14045// CHECK27-NEXT: [[TMP27:%.*]] = zext i32 [[ADD]] to i644046// CHECK27-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 04047// CHECK27-NEXT: store i32 3, ptr [[TMP28]], align 44048// CHECK27-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 14049// CHECK27-NEXT: store i32 4, ptr [[TMP29]], align 44050// CHECK27-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 24051// CHECK27-NEXT: store ptr [[TMP21]], ptr [[TMP30]], align 44052// CHECK27-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 34053// CHECK27-NEXT: store ptr [[TMP22]], ptr [[TMP31]], align 44054// CHECK27-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 44055// CHECK27-NEXT: store ptr [[TMP23]], ptr [[TMP32]], align 44056// CHECK27-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 54057// CHECK27-NEXT: store ptr @.offload_maptypes, ptr [[TMP33]], align 44058// CHECK27-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 64059// CHECK27-NEXT: store ptr null, ptr [[TMP34]], align 44060// CHECK27-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 74061// CHECK27-NEXT: store ptr null, ptr [[TMP35]], align 44062// CHECK27-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 84063// CHECK27-NEXT: store i64 [[TMP27]], ptr [[TMP36]], align 84064// CHECK27-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 94065// CHECK27-NEXT: store i64 0, ptr [[TMP37]], align 84066// CHECK27-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 104067// CHECK27-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP38]], align 44068// CHECK27-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 114069// CHECK27-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 44070// CHECK27-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 124071// CHECK27-NEXT: store i32 0, ptr [[TMP40]], align 44072// CHECK27-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.region_id, ptr [[KERNEL_ARGS]])4073// CHECK27-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 04074// CHECK27-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]4075// CHECK27: omp_offload.failed:4076// CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i32 [[TMP0]], ptr [[VLA]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]4077// CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]]4078// CHECK27: omp_offload.cont:4079// CHECK27-NEXT: [[TMP43:%.*]] = load i32, ptr [[ARGC_ADDR]], align 44080// CHECK27-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP43]])4081// CHECK27-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 44082// CHECK27-NEXT: [[TMP44:%.*]] = load ptr, ptr [[SAVED_STACK]], align 44083// CHECK27-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP44]])4084// CHECK27-NEXT: [[TMP45:%.*]] = load i32, ptr [[RETVAL]], align 44085// CHECK27-NEXT: ret i32 [[TMP45]]4086//4087//4088// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1664089// CHECK27-SAME: (i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] {4090// CHECK27-NEXT: entry:4091// CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 44092// CHECK27-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 44093// CHECK27-NEXT: [[I_ADDR:%.*]] = alloca i32, align 44094// CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 44095// CHECK27-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 44096// CHECK27-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 44097// CHECK27-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 44098// CHECK27-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 44099// CHECK27-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 44100// CHECK27-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 44101// CHECK27-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined, ptr [[I_ADDR]], ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])4102// CHECK27-NEXT: ret void4103//4104//4105// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined4106// CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {4107// CHECK27-NEXT: entry:4108// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 44109// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 44110// CHECK27-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 44111// CHECK27-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 44112// CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 44113// CHECK27-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 44114// CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44115// CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 44116// CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 44117// CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 44118// CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 44119// CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 44120// CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 44121// CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44122// CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44123// CHECK27-NEXT: [[I4:%.*]] = alloca i32, align 44124// CHECK27-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44125// CHECK27-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44126// CHECK27-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 44127// CHECK27-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 44128// CHECK27-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 44129// CHECK27-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 44130// CHECK27-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 44131// CHECK27-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 44132// CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 44133// CHECK27-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 44134// CHECK27-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 44135// CHECK27-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 44136// CHECK27-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44137// CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 04138// CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 14139// CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 14140// CHECK27-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 44141// CHECK27-NEXT: store i32 0, ptr [[I3]], align 44142// CHECK27-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44143// CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]4144// CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]4145// CHECK27: omp.precond.then:4146// CHECK27-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i32 16) ]4147// CHECK27-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 44148// CHECK27-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44149// CHECK27-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 44150// CHECK27-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44151// CHECK27-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44152// CHECK27-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44153// CHECK27-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 44154// CHECK27-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4155// CHECK27-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44156// CHECK27-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44157// CHECK27-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]4158// CHECK27-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4159// CHECK27: cond.true:4160// CHECK27-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44161// CHECK27-NEXT: br label [[COND_END:%.*]]4162// CHECK27: cond.false:4163// CHECK27-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44164// CHECK27-NEXT: br label [[COND_END]]4165// CHECK27: cond.end:4166// CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]4167// CHECK27-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 44168// CHECK27-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44169// CHECK27-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 44170// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4171// CHECK27: omp.inner.for.cond:4172// CHECK27-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44173// CHECK27-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44174// CHECK27-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]4175// CHECK27-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4176// CHECK27: omp.inner.for.body:4177// CHECK27-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44178// CHECK27-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44179// CHECK27-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[I4]], ptr [[TMP1]], i32 [[TMP2]], ptr [[TMP3]])4180// CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4181// CHECK27: omp.inner.for.inc:4182// CHECK27-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44183// CHECK27-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 44184// CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]4185// CHECK27-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 44186// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]4187// CHECK27: omp.inner.for.end:4188// CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4189// CHECK27: omp.loop.exit:4190// CHECK27-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44191// CHECK27-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 44192// CHECK27-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])4193// CHECK27-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44194// CHECK27-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 04195// CHECK27-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4196// CHECK27: .omp.final.then:4197// CHECK27-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44198// CHECK27-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 04199// CHECK27-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 14200// CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 14201// CHECK27-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]4202// CHECK27-NEXT: store i32 [[ADD9]], ptr [[TMP0]], align 44203// CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]]4204// CHECK27: .omp.final.done:4205// CHECK27-NEXT: br label [[OMP_PRECOND_END]]4206// CHECK27: omp.precond.end:4207// CHECK27-NEXT: ret void4208//4209//4210// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp_outlined4211// CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {4212// CHECK27-NEXT: entry:4213// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 44214// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 44215// CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 44216// CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 44217// CHECK27-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 44218// CHECK27-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 44219// CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 44220// CHECK27-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 44221// CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44222// CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 44223// CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 44224// CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 44225// CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 44226// CHECK27-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 44227// CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44228// CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44229// CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44230// CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44231// CHECK27-NEXT: [[I4:%.*]] = alloca i32, align 44232// CHECK27-NEXT: [[I5:%.*]] = alloca i32, align 44233// CHECK27-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44234// CHECK27-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44235// CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 44236// CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 44237// CHECK27-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 44238// CHECK27-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 44239// CHECK27-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 44240// CHECK27-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 44241// CHECK27-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 44242// CHECK27-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 44243// CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 44244// CHECK27-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 44245// CHECK27-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 44246// CHECK27-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 44247// CHECK27-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44248// CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 04249// CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 14250// CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 14251// CHECK27-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 44252// CHECK27-NEXT: store i32 0, ptr [[I3]], align 44253// CHECK27-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44254// CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]4255// CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]4256// CHECK27: omp.precond.then:4257// CHECK27-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i32 16) ]4258// CHECK27-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP0]], align 44259// CHECK27-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 44260// CHECK27-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44261// CHECK27-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44262// CHECK27-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 44263// CHECK27-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 44264// CHECK27-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 44265// CHECK27-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_LB]], align 44266// CHECK27-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_UB]], align 44267// CHECK27-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44268// CHECK27-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44269// CHECK27-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44270// CHECK27-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 44271// CHECK27-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP12]])4272// CHECK27-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44273// CHECK27-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 44274// CHECK27-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4275// CHECK27-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44276// CHECK27-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44277// CHECK27-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]]4278// CHECK27-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4279// CHECK27: cond.true:4280// CHECK27-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44281// CHECK27-NEXT: br label [[COND_END:%.*]]4282// CHECK27: cond.false:4283// CHECK27-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44284// CHECK27-NEXT: br label [[COND_END]]4285// CHECK27: cond.end:4286// CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]4287// CHECK27-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 44288// CHECK27-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44289// CHECK27-NEXT: store i32 [[TMP19]], ptr [[DOTOMP_IV]], align 44290// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4291// CHECK27: omp.inner.for.cond:4292// CHECK27-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44293// CHECK27-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44294// CHECK27-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]4295// CHECK27-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4296// CHECK27: omp.inner.for.body:4297// CHECK27-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44298// CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 14299// CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4300// CHECK27-NEXT: store i32 [[ADD]], ptr [[I4]], align 44301// CHECK27-NEXT: [[TMP23:%.*]] = load i32, ptr [[I4]], align 44302// CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 [[TMP23]]4303// CHECK27-NEXT: store i32 0, ptr [[ARRAYIDX]], align 44304// CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4305// CHECK27: omp.body.continue:4306// CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4307// CHECK27: omp.inner.for.inc:4308// CHECK27-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44309// CHECK27-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 14310// CHECK27-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 44311// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]4312// CHECK27: omp.inner.for.end:4313// CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4314// CHECK27: omp.loop.exit:4315// CHECK27-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44316// CHECK27-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 44317// CHECK27-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP26]])4318// CHECK27-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44319// CHECK27-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 04320// CHECK27-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4321// CHECK27: .omp.final.then:4322// CHECK27-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44323// CHECK27-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP29]], 04324// CHECK27-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 14325// CHECK27-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 14326// CHECK27-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]4327// CHECK27-NEXT: store i32 [[ADD12]], ptr [[TMP0]], align 44328// CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]]4329// CHECK27: .omp.final.done:4330// CHECK27-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44331// CHECK27-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 04332// CHECK27-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]4333// CHECK27: .omp.linear.pu:4334// CHECK27-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]4335// CHECK27: .omp.linear.pu.done:4336// CHECK27-NEXT: br label [[OMP_PRECOND_END]]4337// CHECK27: omp.precond.end:4338// CHECK27-NEXT: ret void4339//4340//4341// CHECK27-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_4342// CHECK27-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR7:[0-9]+]] comdat {4343// CHECK27-NEXT: entry:4344// CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 44345// CHECK27-NEXT: [[A:%.*]] = alloca [10 x i32], align 44346// CHECK27-NEXT: [[TE:%.*]] = alloca i32, align 44347// CHECK27-NEXT: [[TH:%.*]] = alloca i32, align 44348// CHECK27-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 44349// CHECK27-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 44350// CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 44351// CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 44352// CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 44353// CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 44354// CHECK27-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 84355// CHECK27-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 44356// CHECK27-NEXT: store i32 0, ptr [[TE]], align 44357// CHECK27-NEXT: store i32 128, ptr [[TH]], align 44358// CHECK27-NEXT: [[TMP0:%.*]] = load i32, ptr [[TE]], align 44359// CHECK27-NEXT: store i32 [[TMP0]], ptr [[TE_CASTED]], align 44360// CHECK27-NEXT: [[TMP1:%.*]] = load i32, ptr [[TE_CASTED]], align 44361// CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[TH]], align 44362// CHECK27-NEXT: store i32 [[TMP2]], ptr [[TH_CASTED]], align 44363// CHECK27-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH_CASTED]], align 44364// CHECK27-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 04365// CHECK27-NEXT: store i32 [[TMP1]], ptr [[TMP4]], align 44366// CHECK27-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 04367// CHECK27-NEXT: store i32 [[TMP1]], ptr [[TMP5]], align 44368// CHECK27-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 04369// CHECK27-NEXT: store ptr null, ptr [[TMP6]], align 44370// CHECK27-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 14371// CHECK27-NEXT: store i32 [[TMP3]], ptr [[TMP7]], align 44372// CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 14373// CHECK27-NEXT: store i32 [[TMP3]], ptr [[TMP8]], align 44374// CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 14375// CHECK27-NEXT: store ptr null, ptr [[TMP9]], align 44376// CHECK27-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 24377// CHECK27-NEXT: store ptr [[A]], ptr [[TMP10]], align 44378// CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 24379// CHECK27-NEXT: store ptr [[A]], ptr [[TMP11]], align 44380// CHECK27-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 24381// CHECK27-NEXT: store ptr null, ptr [[TMP12]], align 44382// CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 04383// CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 04384// CHECK27-NEXT: [[TMP15:%.*]] = load i32, ptr [[TE]], align 44385// CHECK27-NEXT: [[TMP16:%.*]] = load i32, ptr [[TH]], align 44386// CHECK27-NEXT: [[TMP17:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP15]], 04387// CHECK27-NEXT: [[TMP18:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP16]], 04388// CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 04389// CHECK27-NEXT: store i32 3, ptr [[TMP19]], align 44390// CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 14391// CHECK27-NEXT: store i32 3, ptr [[TMP20]], align 44392// CHECK27-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 24393// CHECK27-NEXT: store ptr [[TMP13]], ptr [[TMP21]], align 44394// CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 34395// CHECK27-NEXT: store ptr [[TMP14]], ptr [[TMP22]], align 44396// CHECK27-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 44397// CHECK27-NEXT: store ptr @.offload_sizes.1, ptr [[TMP23]], align 44398// CHECK27-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 54399// CHECK27-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP24]], align 44400// CHECK27-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 64401// CHECK27-NEXT: store ptr null, ptr [[TMP25]], align 44402// CHECK27-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 74403// CHECK27-NEXT: store ptr null, ptr [[TMP26]], align 44404// CHECK27-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 84405// CHECK27-NEXT: store i64 10, ptr [[TMP27]], align 84406// CHECK27-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 94407// CHECK27-NEXT: store i64 0, ptr [[TMP28]], align 84408// CHECK27-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 104409// CHECK27-NEXT: store [3 x i32] [[TMP17]], ptr [[TMP29]], align 44410// CHECK27-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 114411// CHECK27-NEXT: store [3 x i32] [[TMP18]], ptr [[TMP30]], align 44412// CHECK27-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 124413// CHECK27-NEXT: store i32 0, ptr [[TMP31]], align 44414// CHECK27-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4]], i64 -1, i32 [[TMP15]], i32 [[TMP16]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.region_id, ptr [[KERNEL_ARGS]])4415// CHECK27-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 04416// CHECK27-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]4417// CHECK27: omp_offload.failed:4418// CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i32 [[TMP1]], i32 [[TMP3]], ptr [[A]]) #[[ATTR4]]4419// CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]]4420// CHECK27: omp_offload.cont:4421// CHECK27-NEXT: ret i32 04422//4423//4424// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l1554425// CHECK27-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {4426// CHECK27-NEXT: entry:4427// CHECK27-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 44428// CHECK27-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 44429// CHECK27-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 44430// CHECK27-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB4]])4431// CHECK27-NEXT: store i32 [[TE]], ptr [[TE_ADDR]], align 44432// CHECK27-NEXT: store i32 [[TH]], ptr [[TH_ADDR]], align 44433// CHECK27-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 44434// CHECK27-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 44435// CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[TE_ADDR]], align 44436// CHECK27-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH_ADDR]], align 44437// CHECK27-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])4438// CHECK27-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined, ptr [[TMP1]])4439// CHECK27-NEXT: ret void4440//4441//4442// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined4443// CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {4444// CHECK27-NEXT: entry:4445// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 44446// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 44447// CHECK27-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 44448// CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44449// CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 44450// CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 44451// CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 44452// CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44453// CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44454// CHECK27-NEXT: [[I:%.*]] = alloca i32, align 44455// CHECK27-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44456// CHECK27-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44457// CHECK27-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 44458// CHECK27-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 44459// CHECK27-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 44460// CHECK27-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 44461// CHECK27-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44462// CHECK27-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44463// CHECK27-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44464// CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 44465// CHECK27-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4466// CHECK27-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44467// CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 94468// CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4469// CHECK27: cond.true:4470// CHECK27-NEXT: br label [[COND_END:%.*]]4471// CHECK27: cond.false:4472// CHECK27-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44473// CHECK27-NEXT: br label [[COND_END]]4474// CHECK27: cond.end:4475// CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]4476// CHECK27-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 44477// CHECK27-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44478// CHECK27-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 44479// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4480// CHECK27: omp.inner.for.cond:4481// CHECK27-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]4482// CHECK27-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP12]]4483// CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]4484// CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4485// CHECK27: omp.inner.for.body:4486// CHECK27-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP12]]4487// CHECK27-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP12]]4488// CHECK27-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP12]]4489// CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4490// CHECK27: omp.inner.for.inc:4491// CHECK27-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]4492// CHECK27-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP12]]4493// CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]4494// CHECK27-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]4495// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]4496// CHECK27: omp.inner.for.end:4497// CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4498// CHECK27: omp.loop.exit:4499// CHECK27-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])4500// CHECK27-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44501// CHECK27-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 04502// CHECK27-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4503// CHECK27: .omp.final.then:4504// CHECK27-NEXT: store i32 10, ptr [[I]], align 44505// CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]]4506// CHECK27: .omp.final.done:4507// CHECK27-NEXT: ret void4508//4509//4510// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined.omp_outlined4511// CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {4512// CHECK27-NEXT: entry:4513// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 44514// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 44515// CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 44516// CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 44517// CHECK27-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 44518// CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44519// CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 44520// CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44521// CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44522// CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44523// CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44524// CHECK27-NEXT: [[I:%.*]] = alloca i32, align 44525// CHECK27-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44526// CHECK27-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44527// CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 44528// CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 44529// CHECK27-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 44530// CHECK27-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 44531// CHECK27-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44532// CHECK27-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 44533// CHECK27-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 44534// CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 44535// CHECK27-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 44536// CHECK27-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 44537// CHECK27-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44538// CHECK27-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44539// CHECK27-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44540// CHECK27-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 44541// CHECK27-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4542// CHECK27-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44543// CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 94544// CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4545// CHECK27: cond.true:4546// CHECK27-NEXT: br label [[COND_END:%.*]]4547// CHECK27: cond.false:4548// CHECK27-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44549// CHECK27-NEXT: br label [[COND_END]]4550// CHECK27: cond.end:4551// CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]4552// CHECK27-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 44553// CHECK27-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44554// CHECK27-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 44555// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4556// CHECK27: omp.inner.for.cond:4557// CHECK27-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]4558// CHECK27-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]4559// CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]4560// CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4561// CHECK27: omp.inner.for.body:4562// CHECK27-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]4563// CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 14564// CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4565// CHECK27-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]4566// CHECK27-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]4567// CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]4568// CHECK27-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]4569// CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4570// CHECK27: omp.body.continue:4571// CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4572// CHECK27: omp.inner.for.inc:4573// CHECK27-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]4574// CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 14575// CHECK27-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]4576// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]4577// CHECK27: omp.inner.for.end:4578// CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4579// CHECK27: omp.loop.exit:4580// CHECK27-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])4581// CHECK27-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44582// CHECK27-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 04583// CHECK27-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4584// CHECK27: .omp.final.then:4585// CHECK27-NEXT: store i32 10, ptr [[I]], align 44586// CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]]4587// CHECK27: .omp.final.done:4588// CHECK27-NEXT: ret void4589//4590//4591// CHECK29-LABEL: define {{[^@]+}}@main4592// CHECK29-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {4593// CHECK29-NEXT: entry:4594// CHECK29-NEXT: [[RETVAL:%.*]] = alloca i32, align 44595// CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 44596// CHECK29-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 84597// CHECK29-NEXT: [[N:%.*]] = alloca i32, align 44598// CHECK29-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 84599// CHECK29-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 84600// CHECK29-NEXT: [[I:%.*]] = alloca i32, align 44601// CHECK29-NEXT: [[TMP:%.*]] = alloca i32, align 44602// CHECK29-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 44603// CHECK29-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 44604// CHECK29-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44605// CHECK29-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44606// CHECK29-NEXT: [[I3:%.*]] = alloca i32, align 44607// CHECK29-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44608// CHECK29-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 44609// CHECK29-NEXT: [[I4:%.*]] = alloca i32, align 44610// CHECK29-NEXT: [[I5:%.*]] = alloca i32, align 44611// CHECK29-NEXT: store i32 0, ptr [[RETVAL]], align 44612// CHECK29-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 44613// CHECK29-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 84614// CHECK29-NEXT: store i32 100, ptr [[N]], align 44615// CHECK29-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 44616// CHECK29-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i644617// CHECK29-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()4618// CHECK29-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 84619// CHECK29-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 44620// CHECK29-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 84621// CHECK29-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 44622// CHECK29-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 44623// CHECK29-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44624// CHECK29-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 04625// CHECK29-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 14626// CHECK29-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 14627// CHECK29-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 44628// CHECK29-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44629// CHECK29-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44630// CHECK29-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 44631// CHECK29-NEXT: store i32 0, ptr [[I3]], align 44632// CHECK29-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44633// CHECK29-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]4634// CHECK29-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]4635// CHECK29: simd.if.then:4636// CHECK29-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44637// CHECK29-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 44638// CHECK29-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[VLA]], i64 16) ]4639// CHECK29-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 44640// CHECK29-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START]], align 44641// CHECK29-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4642// CHECK29: omp.inner.for.cond:4643// CHECK29-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44644// CHECK29-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44645// CHECK29-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]4646// CHECK29-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4647// CHECK29: omp.inner.for.body:4648// CHECK29-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44649// CHECK29-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 14650// CHECK29-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4651// CHECK29-NEXT: store i32 [[ADD]], ptr [[I4]], align 44652// CHECK29-NEXT: [[TMP12:%.*]] = load i32, ptr [[I4]], align 44653// CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i644654// CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM]]4655// CHECK29-NEXT: store i32 0, ptr [[ARRAYIDX]], align 44656// CHECK29-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4657// CHECK29: omp.body.continue:4658// CHECK29-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4659// CHECK29: omp.inner.for.inc:4660// CHECK29-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44661// CHECK29-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 14662// CHECK29-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 44663// CHECK29-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]4664// CHECK29: omp.inner.for.end:4665// CHECK29-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44666// CHECK29-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP14]], 04667// CHECK29-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 14668// CHECK29-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 14669// CHECK29-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]4670// CHECK29-NEXT: store i32 [[ADD11]], ptr [[I]], align 44671// CHECK29-NEXT: br label [[SIMD_IF_END]]4672// CHECK29: simd.if.end:4673// CHECK29-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARGC_ADDR]], align 44674// CHECK29-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP15]])4675// CHECK29-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 44676// CHECK29-NEXT: [[TMP16:%.*]] = load ptr, ptr [[SAVED_STACK]], align 84677// CHECK29-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP16]])4678// CHECK29-NEXT: [[TMP17:%.*]] = load i32, ptr [[RETVAL]], align 44679// CHECK29-NEXT: ret i32 [[TMP17]]4680//4681//4682// CHECK29-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_4683// CHECK29-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat {4684// CHECK29-NEXT: entry:4685// CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 44686// CHECK29-NEXT: [[A:%.*]] = alloca [10 x i32], align 44687// CHECK29-NEXT: [[TE:%.*]] = alloca i32, align 44688// CHECK29-NEXT: [[TH:%.*]] = alloca i32, align 44689// CHECK29-NEXT: [[TMP:%.*]] = alloca i32, align 44690// CHECK29-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44691// CHECK29-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44692// CHECK29-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44693// CHECK29-NEXT: [[I:%.*]] = alloca i32, align 44694// CHECK29-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 44695// CHECK29-NEXT: store i32 0, ptr [[TE]], align 44696// CHECK29-NEXT: store i32 128, ptr [[TH]], align 44697// CHECK29-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44698// CHECK29-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 44699// CHECK29-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44700// CHECK29-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44701// CHECK29-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4702// CHECK29: omp.inner.for.cond:4703// CHECK29-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]4704// CHECK29-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]]4705// CHECK29-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]4706// CHECK29-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4707// CHECK29: omp.inner.for.body:4708// CHECK29-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]4709// CHECK29-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 14710// CHECK29-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4711// CHECK29-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]4712// CHECK29-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]4713// CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i644714// CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]4715// CHECK29-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP5]]4716// CHECK29-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4717// CHECK29: omp.body.continue:4718// CHECK29-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4719// CHECK29: omp.inner.for.inc:4720// CHECK29-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]4721// CHECK29-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 14722// CHECK29-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]4723// CHECK29-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]4724// CHECK29: omp.inner.for.end:4725// CHECK29-NEXT: store i32 10, ptr [[I]], align 44726// CHECK29-NEXT: ret i32 04727//4728//4729// CHECK31-LABEL: define {{[^@]+}}@main4730// CHECK31-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {4731// CHECK31-NEXT: entry:4732// CHECK31-NEXT: [[RETVAL:%.*]] = alloca i32, align 44733// CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 44734// CHECK31-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 44735// CHECK31-NEXT: [[N:%.*]] = alloca i32, align 44736// CHECK31-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 44737// CHECK31-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 44738// CHECK31-NEXT: [[I:%.*]] = alloca i32, align 44739// CHECK31-NEXT: [[TMP:%.*]] = alloca i32, align 44740// CHECK31-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 44741// CHECK31-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 44742// CHECK31-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44743// CHECK31-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44744// CHECK31-NEXT: [[I3:%.*]] = alloca i32, align 44745// CHECK31-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44746// CHECK31-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 44747// CHECK31-NEXT: [[I4:%.*]] = alloca i32, align 44748// CHECK31-NEXT: [[I5:%.*]] = alloca i32, align 44749// CHECK31-NEXT: store i32 0, ptr [[RETVAL]], align 44750// CHECK31-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 44751// CHECK31-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 44752// CHECK31-NEXT: store i32 100, ptr [[N]], align 44753// CHECK31-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 44754// CHECK31-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()4755// CHECK31-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 44756// CHECK31-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 44757// CHECK31-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 44758// CHECK31-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 44759// CHECK31-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 44760// CHECK31-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44761// CHECK31-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 04762// CHECK31-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 14763// CHECK31-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 14764// CHECK31-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 44765// CHECK31-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44766// CHECK31-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44767// CHECK31-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 44768// CHECK31-NEXT: store i32 0, ptr [[I3]], align 44769// CHECK31-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44770// CHECK31-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]4771// CHECK31-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]4772// CHECK31: simd.if.then:4773// CHECK31-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44774// CHECK31-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 44775// CHECK31-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[VLA]], i32 16) ]4776// CHECK31-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 44777// CHECK31-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 44778// CHECK31-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4779// CHECK31: omp.inner.for.cond:4780// CHECK31-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44781// CHECK31-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44782// CHECK31-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]4783// CHECK31-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4784// CHECK31: omp.inner.for.body:4785// CHECK31-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44786// CHECK31-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 14787// CHECK31-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4788// CHECK31-NEXT: store i32 [[ADD]], ptr [[I4]], align 44789// CHECK31-NEXT: [[TMP11:%.*]] = load i32, ptr [[I4]], align 44790// CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP11]]4791// CHECK31-NEXT: store i32 0, ptr [[ARRAYIDX]], align 44792// CHECK31-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4793// CHECK31: omp.body.continue:4794// CHECK31-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4795// CHECK31: omp.inner.for.inc:4796// CHECK31-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44797// CHECK31-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 14798// CHECK31-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 44799// CHECK31-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]4800// CHECK31: omp.inner.for.end:4801// CHECK31-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 44802// CHECK31-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP13]], 04803// CHECK31-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 14804// CHECK31-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 14805// CHECK31-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]4806// CHECK31-NEXT: store i32 [[ADD11]], ptr [[I]], align 44807// CHECK31-NEXT: br label [[SIMD_IF_END]]4808// CHECK31: simd.if.end:4809// CHECK31-NEXT: [[TMP14:%.*]] = load i32, ptr [[ARGC_ADDR]], align 44810// CHECK31-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP14]])4811// CHECK31-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 44812// CHECK31-NEXT: [[TMP15:%.*]] = load ptr, ptr [[SAVED_STACK]], align 44813// CHECK31-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP15]])4814// CHECK31-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 44815// CHECK31-NEXT: ret i32 [[TMP16]]4816//4817//4818// CHECK31-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_4819// CHECK31-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat {4820// CHECK31-NEXT: entry:4821// CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 44822// CHECK31-NEXT: [[A:%.*]] = alloca [10 x i32], align 44823// CHECK31-NEXT: [[TE:%.*]] = alloca i32, align 44824// CHECK31-NEXT: [[TH:%.*]] = alloca i32, align 44825// CHECK31-NEXT: [[TMP:%.*]] = alloca i32, align 44826// CHECK31-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44827// CHECK31-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44828// CHECK31-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44829// CHECK31-NEXT: [[I:%.*]] = alloca i32, align 44830// CHECK31-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 44831// CHECK31-NEXT: store i32 0, ptr [[TE]], align 44832// CHECK31-NEXT: store i32 128, ptr [[TH]], align 44833// CHECK31-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44834// CHECK31-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 44835// CHECK31-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44836// CHECK31-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44837// CHECK31-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4838// CHECK31: omp.inner.for.cond:4839// CHECK31-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]4840// CHECK31-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]]4841// CHECK31-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]4842// CHECK31-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4843// CHECK31: omp.inner.for.body:4844// CHECK31-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]4845// CHECK31-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 14846// CHECK31-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4847// CHECK31-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]4848// CHECK31-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]4849// CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP4]]4850// CHECK31-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]4851// CHECK31-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4852// CHECK31: omp.body.continue:4853// CHECK31-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4854// CHECK31: omp.inner.for.inc:4855// CHECK31-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]4856// CHECK31-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 14857// CHECK31-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]4858// CHECK31-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]4859// CHECK31: omp.inner.for.end:4860// CHECK31-NEXT: store i32 10, ptr [[I]], align 44861// CHECK31-NEXT: ret i32 04862//4863