4012 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// expected-no-diagnostics3#ifndef HEADER4#define HEADER5 6// Test host codegen.7// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK18// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s9// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK110// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK311// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s12// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK313 14// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK515// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s16// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK517// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK718// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s19// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK720#ifdef CK121 22template <typename T, int X, long long Y>23struct SS{24 T a[X];25 float b;26 int foo(void) {27 28 #pragma omp target29 #pragma omp teams distribute simd30 for(int i = 0; i < X; i++) {31 a[i] = (T)0;32 }33 #pragma omp target34 #pragma omp teams distribute simd dist_schedule(static)35 for(int i = 0; i < X; i++) {36 a[i] = (T)0;37 }38 #pragma omp target39 #pragma omp teams distribute simd dist_schedule(static, X/2)40 for(int i = 0; i < X; i++) {41 a[i] = (T)0;42 }43 44 45 46 47 48 49 return a[0];50 }51};52 53int teams_template_struct(void) {54 SS<int, 123, 456> V;55 return V.foo();56 57}58#endif // CK159 60// Test host codegen.61// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK962// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s63// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK964// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1165// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s66// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1167 68// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1369// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s70// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1371// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1572// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s73// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1574#ifdef CK275 76template <typename T, int n>77int tmain(T argc) {78 T a[n];79#pragma omp target80#pragma omp teams distribute simd81 for(int i = 0; i < n; i++) {82 a[i] = (T)0;83 }84#pragma omp target85#pragma omp teams distribute simd dist_schedule(static)86 for(int i = 0; i < n; i++) {87 a[i] = (T)0;88 }89#pragma omp target90#pragma omp teams distribute simd dist_schedule(static, n)91 for(int i = 0; i < n; i++) {92 a[i] = (T)0;93 }94 return 0;95}96 97int main (int argc, char **argv) {98 int n = 100;99 int a[n];100#pragma omp target101#pragma omp teams distribute simd102 for(int i = 0; i < n; i++) {103 a[i] = 0;104 }105#pragma omp target106#pragma omp teams distribute simd dist_schedule(static)107 for(int i = 0; i < n; i++) {108 a[i] = 0;109 }110#pragma omp target111#pragma omp teams distribute simd dist_schedule(static, n)112 for(int i = 0; i < n; i++) {113 a[i] = 0;114 }115 return tmain<int, 10>(argc);116}117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132#endif // CK2133#endif // #ifndef HEADER134// CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv135// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {136// CHECK1-NEXT: entry:137// CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4138// CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])139// CHECK1-NEXT: ret i32 [[CALL]]140//141//142// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv143// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {144// CHECK1-NEXT: entry:145// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8146// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8147// CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8148// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8149// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4150// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8151// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8152// CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8153// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8154// CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4155// CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8156// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8157// CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8158// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8159// CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4160// CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8161// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8162// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8163// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0164// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0165// CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8166// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0167// CHECK1-NEXT: store ptr [[A]], ptr [[TMP1]], align 8168// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0169// CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8170// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0171// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0172// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0173// CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4174// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1175// CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4176// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2177// CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8178// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3179// CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8180// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4181// CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8182// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5183// CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8184// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6185// CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8186// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7187// CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8188// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8189// CHECK1-NEXT: store i64 123, ptr [[TMP13]], align 8190// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9191// CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8192// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10193// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4194// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11195// CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 4196// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12197// CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4198// CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])199// CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0200// CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]201// CHECK1: omp_offload.failed:202// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]203// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]204// CHECK1: omp_offload.cont:205// CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0206// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0207// CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 8208// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0209// CHECK1-NEXT: store ptr [[A2]], ptr [[TMP21]], align 8210// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0211// CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8212// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0213// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0214// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0215// CHECK1-NEXT: store i32 3, ptr [[TMP25]], align 4216// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1217// CHECK1-NEXT: store i32 1, ptr [[TMP26]], align 4218// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2219// CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8220// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3221// CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8222// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4223// CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 8224// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5225// CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8226// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6227// CHECK1-NEXT: store ptr null, ptr [[TMP31]], align 8228// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7229// CHECK1-NEXT: store ptr null, ptr [[TMP32]], align 8230// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8231// CHECK1-NEXT: store i64 123, ptr [[TMP33]], align 8232// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9233// CHECK1-NEXT: store i64 0, ptr [[TMP34]], align 8234// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10235// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4236// CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11237// CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4238// CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12239// CHECK1-NEXT: store i32 0, ptr [[TMP37]], align 4240// CHECK1-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, ptr [[KERNEL_ARGS7]])241// CHECK1-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0242// CHECK1-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]243// CHECK1: omp_offload.failed8:244// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(ptr [[THIS1]]) #[[ATTR2]]245// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]]246// CHECK1: omp_offload.cont9:247// CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0248// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0249// CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 8250// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0251// CHECK1-NEXT: store ptr [[A10]], ptr [[TMP41]], align 8252// CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0253// CHECK1-NEXT: store ptr null, ptr [[TMP42]], align 8254// CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0255// CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0256// CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0257// CHECK1-NEXT: store i32 3, ptr [[TMP45]], align 4258// CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1259// CHECK1-NEXT: store i32 1, ptr [[TMP46]], align 4260// CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2261// CHECK1-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8262// CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3263// CHECK1-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8264// CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4265// CHECK1-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 8266// CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5267// CHECK1-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8268// CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6269// CHECK1-NEXT: store ptr null, ptr [[TMP51]], align 8270// CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7271// CHECK1-NEXT: store ptr null, ptr [[TMP52]], align 8272// CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8273// CHECK1-NEXT: store i64 123, ptr [[TMP53]], align 8274// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9275// CHECK1-NEXT: store i64 0, ptr [[TMP54]], align 8276// CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10277// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4278// CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11279// CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 4280// CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12281// CHECK1-NEXT: store i32 0, ptr [[TMP57]], align 4282// CHECK1-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, ptr [[KERNEL_ARGS15]])283// CHECK1-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0284// CHECK1-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]285// CHECK1: omp_offload.failed16:286// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(ptr [[THIS1]]) #[[ATTR2]]287// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]]288// CHECK1: omp_offload.cont17:289// CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0290// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A18]], i64 0, i64 0291// CHECK1-NEXT: [[TMP60:%.*]] = load i32, ptr [[ARRAYIDX]], align 4292// CHECK1-NEXT: ret i32 [[TMP60]]293//294//295// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28296// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {297// CHECK1-NEXT: entry:298// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8299// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8300// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8301// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])302// CHECK1-NEXT: ret void303//304//305// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined306// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {307// CHECK1-NEXT: entry:308// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8309// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8310// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8311// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4312// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4313// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4314// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4315// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4316// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4317// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4318// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8319// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8320// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8321// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8322// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4323// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4324// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4325// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4326// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8327// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4328// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)329// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4330// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122331// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]332// CHECK1: cond.true:333// CHECK1-NEXT: br label [[COND_END:%.*]]334// CHECK1: cond.false:335// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4336// CHECK1-NEXT: br label [[COND_END]]337// CHECK1: cond.end:338// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]339// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4340// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4341// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4342// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]343// CHECK1: omp.inner.for.cond:344// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]345// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]]346// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]347// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]348// CHECK1: omp.inner.for.body:349// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]350// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1351// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]352// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]353// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0354// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]355// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64356// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]357// CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]358// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]359// CHECK1: omp.body.continue:360// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]361// CHECK1: omp.inner.for.inc:362// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]363// CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1364// CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]365// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]366// CHECK1: omp.inner.for.end:367// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]368// CHECK1: omp.loop.exit:369// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])370// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4371// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0372// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]373// CHECK1: .omp.final.then:374// CHECK1-NEXT: store i32 123, ptr [[I]], align 4375// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]376// CHECK1: .omp.final.done:377// CHECK1-NEXT: ret void378//379//380// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33381// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {382// CHECK1-NEXT: entry:383// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8384// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8385// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8386// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined, ptr [[TMP0]])387// CHECK1-NEXT: ret void388//389//390// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined391// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {392// CHECK1-NEXT: entry:393// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8394// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8395// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8396// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4397// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4398// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4399// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4400// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4401// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4402// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4403// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8404// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8405// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8406// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8407// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4408// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4409// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4410// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4411// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8412// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4413// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)414// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4415// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122416// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]417// CHECK1: cond.true:418// CHECK1-NEXT: br label [[COND_END:%.*]]419// CHECK1: cond.false:420// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4421// CHECK1-NEXT: br label [[COND_END]]422// CHECK1: cond.end:423// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]424// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4425// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4426// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4427// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]428// CHECK1: omp.inner.for.cond:429// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]430// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]431// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]432// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]433// CHECK1: omp.inner.for.body:434// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]435// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1436// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]437// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]438// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0439// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]440// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64441// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]442// CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]]443// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]444// CHECK1: omp.body.continue:445// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]446// CHECK1: omp.inner.for.inc:447// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]448// CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1449// CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]450// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]451// CHECK1: omp.inner.for.end:452// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]453// CHECK1: omp.loop.exit:454// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])455// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4456// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0457// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]458// CHECK1: .omp.final.then:459// CHECK1-NEXT: store i32 123, ptr [[I]], align 4460// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]461// CHECK1: .omp.final.done:462// CHECK1-NEXT: ret void463//464//465// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38466// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {467// CHECK1-NEXT: entry:468// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8469// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8470// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8471// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined, ptr [[TMP0]])472// CHECK1-NEXT: ret void473//474//475// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined476// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {477// CHECK1-NEXT: entry:478// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8479// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8480// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8481// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4482// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4483// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4484// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4485// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4486// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4487// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4488// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8489// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8490// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8491// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8492// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4493// CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4494// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4495// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4496// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8497// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4498// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)499// CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]500// CHECK1: omp.dispatch.cond:501// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4502// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122503// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]504// CHECK1: cond.true:505// CHECK1-NEXT: br label [[COND_END:%.*]]506// CHECK1: cond.false:507// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4508// CHECK1-NEXT: br label [[COND_END]]509// CHECK1: cond.end:510// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]511// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4512// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4513// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4514// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4515// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4516// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]517// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]518// CHECK1: omp.dispatch.body:519// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]520// CHECK1: omp.inner.for.cond:521// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]522// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]523// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]524// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]525// CHECK1: omp.inner.for.body:526// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]527// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1528// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]529// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]530// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0531// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]532// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64533// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]534// CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]535// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]536// CHECK1: omp.body.continue:537// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]538// CHECK1: omp.inner.for.inc:539// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]540// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1541// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]542// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]543// CHECK1: omp.inner.for.end:544// CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]545// CHECK1: omp.dispatch.inc:546// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4547// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4548// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]549// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4550// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4551// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4552// CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]553// CHECK1-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4554// CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]555// CHECK1: omp.dispatch.end:556// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])557// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4558// CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0559// CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]560// CHECK1: .omp.final.then:561// CHECK1-NEXT: store i32 123, ptr [[I]], align 4562// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]563// CHECK1: .omp.final.done:564// CHECK1-NEXT: ret void565//566//567// CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv568// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {569// CHECK3-NEXT: entry:570// CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4571// CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])572// CHECK3-NEXT: ret i32 [[CALL]]573//574//575// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv576// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {577// CHECK3-NEXT: entry:578// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4579// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4580// CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4581// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4582// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4583// CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8584// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4585// CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4586// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4587// CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4588// CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8589// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4590// CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4591// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4592// CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 4593// CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8594// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4595// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4596// CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0597// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0598// CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4599// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0600// CHECK3-NEXT: store ptr [[A]], ptr [[TMP1]], align 4601// CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0602// CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4603// CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0604// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0605// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0606// CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4607// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1608// CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4609// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2610// CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4611// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3612// CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4613// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4614// CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4615// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5616// CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4617// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6618// CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4619// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7620// CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4621// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8622// CHECK3-NEXT: store i64 123, ptr [[TMP13]], align 8623// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9624// CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8625// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10626// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4627// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11628// CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 4629// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12630// CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4631// CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])632// CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0633// CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]634// CHECK3: omp_offload.failed:635// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]636// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]637// CHECK3: omp_offload.cont:638// CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0639// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0640// CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 4641// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0642// CHECK3-NEXT: store ptr [[A2]], ptr [[TMP21]], align 4643// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0644// CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 4645// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0646// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0647// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0648// CHECK3-NEXT: store i32 3, ptr [[TMP25]], align 4649// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1650// CHECK3-NEXT: store i32 1, ptr [[TMP26]], align 4651// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2652// CHECK3-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4653// CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3654// CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4655// CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4656// CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 4657// CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5658// CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4659// CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6660// CHECK3-NEXT: store ptr null, ptr [[TMP31]], align 4661// CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7662// CHECK3-NEXT: store ptr null, ptr [[TMP32]], align 4663// CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8664// CHECK3-NEXT: store i64 123, ptr [[TMP33]], align 8665// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9666// CHECK3-NEXT: store i64 0, ptr [[TMP34]], align 8667// CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10668// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4669// CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11670// CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4671// CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12672// CHECK3-NEXT: store i32 0, ptr [[TMP37]], align 4673// CHECK3-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, ptr [[KERNEL_ARGS7]])674// CHECK3-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0675// CHECK3-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]676// CHECK3: omp_offload.failed8:677// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(ptr [[THIS1]]) #[[ATTR2]]678// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]]679// CHECK3: omp_offload.cont9:680// CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0681// CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0682// CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 4683// CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0684// CHECK3-NEXT: store ptr [[A10]], ptr [[TMP41]], align 4685// CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0686// CHECK3-NEXT: store ptr null, ptr [[TMP42]], align 4687// CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0688// CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0689// CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0690// CHECK3-NEXT: store i32 3, ptr [[TMP45]], align 4691// CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1692// CHECK3-NEXT: store i32 1, ptr [[TMP46]], align 4693// CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2694// CHECK3-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 4695// CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3696// CHECK3-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 4697// CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4698// CHECK3-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 4699// CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5700// CHECK3-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4701// CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6702// CHECK3-NEXT: store ptr null, ptr [[TMP51]], align 4703// CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7704// CHECK3-NEXT: store ptr null, ptr [[TMP52]], align 4705// CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8706// CHECK3-NEXT: store i64 123, ptr [[TMP53]], align 8707// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9708// CHECK3-NEXT: store i64 0, ptr [[TMP54]], align 8709// CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10710// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4711// CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11712// CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 4713// CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12714// CHECK3-NEXT: store i32 0, ptr [[TMP57]], align 4715// CHECK3-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, ptr [[KERNEL_ARGS15]])716// CHECK3-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0717// CHECK3-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]718// CHECK3: omp_offload.failed16:719// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(ptr [[THIS1]]) #[[ATTR2]]720// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]]721// CHECK3: omp_offload.cont17:722// CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0723// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A18]], i32 0, i32 0724// CHECK3-NEXT: [[TMP60:%.*]] = load i32, ptr [[ARRAYIDX]], align 4725// CHECK3-NEXT: ret i32 [[TMP60]]726//727//728// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28729// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {730// CHECK3-NEXT: entry:731// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4732// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4733// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4734// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])735// CHECK3-NEXT: ret void736//737//738// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined739// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {740// CHECK3-NEXT: entry:741// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4742// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4743// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4744// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4745// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4746// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4747// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4748// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4749// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4750// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4751// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4752// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4753// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4754// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4755// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4756// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4757// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4758// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4759// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4760// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4761// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)762// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4763// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122764// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]765// CHECK3: cond.true:766// CHECK3-NEXT: br label [[COND_END:%.*]]767// CHECK3: cond.false:768// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4769// CHECK3-NEXT: br label [[COND_END]]770// CHECK3: cond.end:771// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]772// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4773// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4774// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4775// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]776// CHECK3: omp.inner.for.cond:777// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]778// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]]779// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]780// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]781// CHECK3: omp.inner.for.body:782// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]783// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1784// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]785// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]786// CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0787// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]788// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP9]]789// CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]]790// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]791// CHECK3: omp.body.continue:792// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]793// CHECK3: omp.inner.for.inc:794// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]795// CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1796// CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]797// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]798// CHECK3: omp.inner.for.end:799// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]800// CHECK3: omp.loop.exit:801// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])802// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4803// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0804// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]805// CHECK3: .omp.final.then:806// CHECK3-NEXT: store i32 123, ptr [[I]], align 4807// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]808// CHECK3: .omp.final.done:809// CHECK3-NEXT: ret void810//811//812// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33813// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {814// CHECK3-NEXT: entry:815// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4816// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4817// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4818// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined, ptr [[TMP0]])819// CHECK3-NEXT: ret void820//821//822// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined823// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {824// CHECK3-NEXT: entry:825// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4826// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4827// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4828// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4829// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4830// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4831// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4832// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4833// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4834// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4835// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4836// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4837// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4838// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4839// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4840// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4841// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4842// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4843// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4844// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4845// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)846// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4847// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122848// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]849// CHECK3: cond.true:850// CHECK3-NEXT: br label [[COND_END:%.*]]851// CHECK3: cond.false:852// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4853// CHECK3-NEXT: br label [[COND_END]]854// CHECK3: cond.end:855// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]856// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4857// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4858// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4859// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]860// CHECK3: omp.inner.for.cond:861// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]862// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]863// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]864// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]865// CHECK3: omp.inner.for.body:866// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]867// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1868// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]869// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]870// CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0871// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]872// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP9]]873// CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]874// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]875// CHECK3: omp.body.continue:876// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]877// CHECK3: omp.inner.for.inc:878// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]879// CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1880// CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]881// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]882// CHECK3: omp.inner.for.end:883// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]884// CHECK3: omp.loop.exit:885// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])886// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4887// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0888// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]889// CHECK3: .omp.final.then:890// CHECK3-NEXT: store i32 123, ptr [[I]], align 4891// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]892// CHECK3: .omp.final.done:893// CHECK3-NEXT: ret void894//895//896// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38897// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {898// CHECK3-NEXT: entry:899// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4900// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4901// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4902// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined, ptr [[TMP0]])903// CHECK3-NEXT: ret void904//905//906// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined907// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {908// CHECK3-NEXT: entry:909// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4910// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4911// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4912// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4913// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4914// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4915// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4916// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4917// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4918// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4919// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4920// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4921// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4922// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4923// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4924// CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4925// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4926// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4927// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4928// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4929// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)930// CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]931// CHECK3: omp.dispatch.cond:932// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4933// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122934// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]935// CHECK3: cond.true:936// CHECK3-NEXT: br label [[COND_END:%.*]]937// CHECK3: cond.false:938// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4939// CHECK3-NEXT: br label [[COND_END]]940// CHECK3: cond.end:941// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]942// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4943// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4944// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4945// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4946// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4947// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]948// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]949// CHECK3: omp.dispatch.body:950// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]951// CHECK3: omp.inner.for.cond:952// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]953// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]954// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]955// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]956// CHECK3: omp.inner.for.body:957// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]958// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1959// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]960// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]961// CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0962// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]963// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]964// CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]965// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]966// CHECK3: omp.body.continue:967// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]968// CHECK3: omp.inner.for.inc:969// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]970// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1971// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]972// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]973// CHECK3: omp.inner.for.end:974// CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]975// CHECK3: omp.dispatch.inc:976// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4977// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4978// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]979// CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4980// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4981// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4982// CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]983// CHECK3-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4984// CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]985// CHECK3: omp.dispatch.end:986// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])987// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4988// CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0989// CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]990// CHECK3: .omp.final.then:991// CHECK3-NEXT: store i32 123, ptr [[I]], align 4992// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]993// CHECK3: .omp.final.done:994// CHECK3-NEXT: ret void995//996//997// CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv998// CHECK5-SAME: () #[[ATTR0:[0-9]+]] {999// CHECK5-NEXT: entry:1000// CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 41001// CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])1002// CHECK5-NEXT: ret i32 [[CALL]]1003//1004//1005// CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv1006// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {1007// CHECK5-NEXT: entry:1008// CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81009// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 41010// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41011// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41012// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41013// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 41014// CHECK5-NEXT: [[_TMP3:%.*]] = alloca i32, align 41015// CHECK5-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 41016// CHECK5-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 41017// CHECK5-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 41018// CHECK5-NEXT: [[I7:%.*]] = alloca i32, align 41019// CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 41020// CHECK5-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 41021// CHECK5-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 41022// CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 41023// CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 41024// CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81025// CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81026// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41027// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 41028// CHECK5-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41029// CHECK5-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 41030// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1031// CHECK5: omp.inner.for.cond:1032// CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]1033// CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]1034// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]1035// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1036// CHECK5: omp.inner.for.body:1037// CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]1038// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 11039// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1040// CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]1041// CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 01042// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]1043// CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i641044// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]1045// CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]1046// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1047// CHECK5: omp.body.continue:1048// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1049// CHECK5: omp.inner.for.inc:1050// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]1051// CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 11052// CHECK5-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]1053// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]1054// CHECK5: omp.inner.for.end:1055// CHECK5-NEXT: store i32 123, ptr [[I]], align 41056// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB4]], align 41057// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB5]], align 41058// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB4]], align 41059// CHECK5-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV6]], align 41060// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]1061// CHECK5: omp.inner.for.cond8:1062// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]1063// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP6]]1064// CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1065// CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]]1066// CHECK5: omp.inner.for.body10:1067// CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]1068// CHECK5-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 11069// CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]1070// CHECK5-NEXT: store i32 [[ADD12]], ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP6]]1071// CHECK5-NEXT: [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01072// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP6]]1073// CHECK5-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i641074// CHECK5-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], ptr [[A13]], i64 0, i64 [[IDXPROM14]]1075// CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX15]], align 4, !llvm.access.group [[ACC_GRP6]]1076// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]]1077// CHECK5: omp.body.continue16:1078// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]]1079// CHECK5: omp.inner.for.inc17:1080// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]1081// CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 11082// CHECK5-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]1083// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]1084// CHECK5: omp.inner.for.end19:1085// CHECK5-NEXT: store i32 123, ptr [[I7]], align 41086// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB21]], align 41087// CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB22]], align 41088// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB21]], align 41089// CHECK5-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV23]], align 41090// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]]1091// CHECK5: omp.inner.for.cond25:1092// CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]1093// CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB22]], align 4, !llvm.access.group [[ACC_GRP9]]1094// CHECK5-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]1095// CHECK5-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]]1096// CHECK5: omp.inner.for.body27:1097// CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]]1098// CHECK5-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 11099// CHECK5-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]]1100// CHECK5-NEXT: store i32 [[ADD29]], ptr [[I24]], align 4, !llvm.access.group [[ACC_GRP9]]1101// CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01102// CHECK5-NEXT: [[TMP16:%.*]] = load i32, ptr [[I24]], align 4, !llvm.access.group [[ACC_GRP9]]1103// CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i641104// CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], ptr [[A30]], i64 0, i64 [[IDXPROM31]]1105// CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX32]], align 4, !llvm.access.group [[ACC_GRP9]]1106// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]]1107// CHECK5: omp.body.continue33:1108// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]]1109// CHECK5: omp.inner.for.inc34:1110// CHECK5-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]]1111// CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 11112// CHECK5-NEXT: store i32 [[ADD35]], ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]]1113// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]]1114// CHECK5: omp.inner.for.end36:1115// CHECK5-NEXT: store i32 123, ptr [[I24]], align 41116// CHECK5-NEXT: [[A37:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01117// CHECK5-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], ptr [[A37]], i64 0, i64 01118// CHECK5-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX38]], align 41119// CHECK5-NEXT: ret i32 [[TMP18]]1120//1121//1122// CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv1123// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {1124// CHECK7-NEXT: entry:1125// CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 41126// CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])1127// CHECK7-NEXT: ret i32 [[CALL]]1128//1129//1130// CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv1131// CHECK7-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {1132// CHECK7-NEXT: entry:1133// CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41134// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 41135// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41136// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41137// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41138// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 41139// CHECK7-NEXT: [[_TMP3:%.*]] = alloca i32, align 41140// CHECK7-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 41141// CHECK7-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 41142// CHECK7-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 41143// CHECK7-NEXT: [[I7:%.*]] = alloca i32, align 41144// CHECK7-NEXT: [[_TMP19:%.*]] = alloca i32, align 41145// CHECK7-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 41146// CHECK7-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 41147// CHECK7-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 41148// CHECK7-NEXT: [[I23:%.*]] = alloca i32, align 41149// CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41150// CHECK7-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41151// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41152// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 41153// CHECK7-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41154// CHECK7-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 41155// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1156// CHECK7: omp.inner.for.cond:1157// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]1158// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]1159// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]1160// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1161// CHECK7: omp.inner.for.body:1162// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]1163// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 11164// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1165// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]1166// CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 01167// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]1168// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP4]]1169// CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]1170// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1171// CHECK7: omp.body.continue:1172// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1173// CHECK7: omp.inner.for.inc:1174// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]1175// CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 11176// CHECK7-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]1177// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]1178// CHECK7: omp.inner.for.end:1179// CHECK7-NEXT: store i32 123, ptr [[I]], align 41180// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB4]], align 41181// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB5]], align 41182// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB4]], align 41183// CHECK7-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV6]], align 41184// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]1185// CHECK7: omp.inner.for.cond8:1186// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]1187// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP7]]1188// CHECK7-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1189// CHECK7-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]1190// CHECK7: omp.inner.for.body10:1191// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]]1192// CHECK7-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 11193// CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]1194// CHECK7-NEXT: store i32 [[ADD12]], ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP7]]1195// CHECK7-NEXT: [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01196// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP7]]1197// CHECK7-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], ptr [[A13]], i32 0, i32 [[TMP10]]1198// CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX14]], align 4, !llvm.access.group [[ACC_GRP7]]1199// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]1200// CHECK7: omp.body.continue15:1201// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]1202// CHECK7: omp.inner.for.inc16:1203// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]]1204// CHECK7-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 11205// CHECK7-NEXT: store i32 [[ADD17]], ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]]1206// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]]1207// CHECK7: omp.inner.for.end18:1208// CHECK7-NEXT: store i32 123, ptr [[I7]], align 41209// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB20]], align 41210// CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB21]], align 41211// CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB20]], align 41212// CHECK7-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV22]], align 41213// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]]1214// CHECK7: omp.inner.for.cond24:1215// CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]1216// CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB21]], align 4, !llvm.access.group [[ACC_GRP10]]1217// CHECK7-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]1218// CHECK7-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]]1219// CHECK7: omp.inner.for.body26:1220// CHECK7-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]]1221// CHECK7-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 11222// CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]]1223// CHECK7-NEXT: store i32 [[ADD28]], ptr [[I23]], align 4, !llvm.access.group [[ACC_GRP10]]1224// CHECK7-NEXT: [[A29:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01225// CHECK7-NEXT: [[TMP16:%.*]] = load i32, ptr [[I23]], align 4, !llvm.access.group [[ACC_GRP10]]1226// CHECK7-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], ptr [[A29]], i32 0, i32 [[TMP16]]1227// CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX30]], align 4, !llvm.access.group [[ACC_GRP10]]1228// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]]1229// CHECK7: omp.body.continue31:1230// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]]1231// CHECK7: omp.inner.for.inc32:1232// CHECK7-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]]1233// CHECK7-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 11234// CHECK7-NEXT: store i32 [[ADD33]], ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]]1235// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]]1236// CHECK7: omp.inner.for.end34:1237// CHECK7-NEXT: store i32 123, ptr [[I23]], align 41238// CHECK7-NEXT: [[A35:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01239// CHECK7-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], ptr [[A35]], i32 0, i32 01240// CHECK7-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX36]], align 41241// CHECK7-NEXT: ret i32 [[TMP18]]1242//1243//1244// CHECK9-LABEL: define {{[^@]+}}@main1245// CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {1246// CHECK9-NEXT: entry:1247// CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 41248// CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 41249// CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 81250// CHECK9-NEXT: [[N:%.*]] = alloca i32, align 41251// CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 81252// CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 81253// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 81254// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 81255// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 81256// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 81257// CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 81258// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 41259// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41260// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41261// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81262// CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 81263// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 81264// CHECK9-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 81265// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 81266// CHECK9-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 81267// CHECK9-NEXT: [[_TMP8:%.*]] = alloca i32, align 41268// CHECK9-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 41269// CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 41270// CHECK9-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81271// CHECK9-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 81272// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [3 x ptr], align 81273// CHECK9-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [3 x ptr], align 81274// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [3 x ptr], align 81275// CHECK9-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [3 x i64], align 81276// CHECK9-NEXT: [[_TMP23:%.*]] = alloca i32, align 41277// CHECK9-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 41278// CHECK9-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 41279// CHECK9-NEXT: [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81280// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 41281// CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 41282// CHECK9-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 81283// CHECK9-NEXT: store i32 100, ptr [[N]], align 41284// CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 41285// CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i641286// CHECK9-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()1287// CHECK9-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 81288// CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 41289// CHECK9-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 81290// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 41291// CHECK9-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 41292// CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 81293// CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 41294// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false)1295// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01296// CHECK9-NEXT: store i64 [[TMP4]], ptr [[TMP6]], align 81297// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01298// CHECK9-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 81299// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 01300// CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 81301// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11302// CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 81303// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11304// CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP10]], align 81305// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 11306// CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 81307// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21308// CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 81309// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21310// CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 81311// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 21312// CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 81313// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 21314// CHECK9-NEXT: store ptr null, ptr [[TMP15]], align 81315// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01316// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01317// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 01318// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 41319// CHECK9-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 41320// CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41321// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 01322// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11323// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11324// CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41325// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41326// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 11327// CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i641328// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01329// CHECK9-NEXT: store i32 3, ptr [[TMP23]], align 41330// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11331// CHECK9-NEXT: store i32 3, ptr [[TMP24]], align 41332// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21333// CHECK9-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 81334// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31335// CHECK9-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 81336// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41337// CHECK9-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 81338// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51339// CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 81340// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61341// CHECK9-NEXT: store ptr null, ptr [[TMP29]], align 81342// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71343// CHECK9-NEXT: store ptr null, ptr [[TMP30]], align 81344// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81345// CHECK9-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 81346// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91347// CHECK9-NEXT: store i64 0, ptr [[TMP32]], align 81348// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101349// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 41350// CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111351// CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP34]], align 41352// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121353// CHECK9-NEXT: store i32 0, ptr [[TMP35]], align 41354// CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, ptr [[KERNEL_ARGS]])1355// CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 01356// CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1357// CHECK9: omp_offload.failed:1358// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]1359// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]1360// CHECK9: omp_offload.cont:1361// CHECK9-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 41362// CHECK9-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 41363// CHECK9-NEXT: [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 81364// CHECK9-NEXT: [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 41365// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false)1366// CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 01367// CHECK9-NEXT: store i64 [[TMP39]], ptr [[TMP41]], align 81368// CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 01369// CHECK9-NEXT: store i64 [[TMP39]], ptr [[TMP42]], align 81370// CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 01371// CHECK9-NEXT: store ptr null, ptr [[TMP43]], align 81372// CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 11373// CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP44]], align 81374// CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 11375// CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP45]], align 81376// CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 11377// CHECK9-NEXT: store ptr null, ptr [[TMP46]], align 81378// CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 21379// CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP47]], align 81380// CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 21381// CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 81382// CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 21383// CHECK9-NEXT: store i64 [[TMP40]], ptr [[TMP49]], align 81384// CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 21385// CHECK9-NEXT: store ptr null, ptr [[TMP50]], align 81386// CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 01387// CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 01388// CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 01389// CHECK9-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 41390// CHECK9-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 41391// CHECK9-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 41392// CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 01393// CHECK9-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 11394// CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 11395// CHECK9-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 41396// CHECK9-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 41397// CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP56]], 11398// CHECK9-NEXT: [[TMP57:%.*]] = zext i32 [[ADD14]] to i641399// CHECK9-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 01400// CHECK9-NEXT: store i32 3, ptr [[TMP58]], align 41401// CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11402// CHECK9-NEXT: store i32 3, ptr [[TMP59]], align 41403// CHECK9-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 21404// CHECK9-NEXT: store ptr [[TMP51]], ptr [[TMP60]], align 81405// CHECK9-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 31406// CHECK9-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 81407// CHECK9-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 41408// CHECK9-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 81409// CHECK9-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 51410// CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP63]], align 81411// CHECK9-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 61412// CHECK9-NEXT: store ptr null, ptr [[TMP64]], align 81413// CHECK9-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 71414// CHECK9-NEXT: store ptr null, ptr [[TMP65]], align 81415// CHECK9-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 81416// CHECK9-NEXT: store i64 [[TMP57]], ptr [[TMP66]], align 81417// CHECK9-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 91418// CHECK9-NEXT: store i64 0, ptr [[TMP67]], align 81419// CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 101420// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP68]], align 41421// CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 111422// CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP69]], align 41423// CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 121424// CHECK9-NEXT: store i32 0, ptr [[TMP70]], align 41425// CHECK9-NEXT: [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, ptr [[KERNEL_ARGS15]])1426// CHECK9-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 01427// CHECK9-NEXT: br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]1428// CHECK9: omp_offload.failed16:1429// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]1430// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]]1431// CHECK9: omp_offload.cont17:1432// CHECK9-NEXT: [[TMP73:%.*]] = load i32, ptr [[N]], align 41433// CHECK9-NEXT: store i32 [[TMP73]], ptr [[N_CASTED18]], align 41434// CHECK9-NEXT: [[TMP74:%.*]] = load i64, ptr [[N_CASTED18]], align 81435// CHECK9-NEXT: [[TMP75:%.*]] = mul nuw i64 [[TMP1]], 41436// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES22]], ptr align 8 @.offload_sizes.3, i64 24, i1 false)1437// CHECK9-NEXT: [[TMP76:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 01438// CHECK9-NEXT: store i64 [[TMP74]], ptr [[TMP76]], align 81439// CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 01440// CHECK9-NEXT: store i64 [[TMP74]], ptr [[TMP77]], align 81441// CHECK9-NEXT: [[TMP78:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 01442// CHECK9-NEXT: store ptr null, ptr [[TMP78]], align 81443// CHECK9-NEXT: [[TMP79:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 11444// CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP79]], align 81445// CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 11446// CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP80]], align 81447// CHECK9-NEXT: [[TMP81:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 11448// CHECK9-NEXT: store ptr null, ptr [[TMP81]], align 81449// CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 21450// CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP82]], align 81451// CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 21452// CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP83]], align 81453// CHECK9-NEXT: [[TMP84:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 21454// CHECK9-NEXT: store i64 [[TMP75]], ptr [[TMP84]], align 81455// CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 21456// CHECK9-NEXT: store ptr null, ptr [[TMP85]], align 81457// CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 01458// CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 01459// CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 01460// CHECK9-NEXT: [[TMP89:%.*]] = load i32, ptr [[N]], align 41461// CHECK9-NEXT: store i32 [[TMP89]], ptr [[DOTCAPTURE_EXPR_24]], align 41462// CHECK9-NEXT: [[TMP90:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 41463// CHECK9-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP90]], 01464// CHECK9-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 11465// CHECK9-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 11466// CHECK9-NEXT: store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 41467// CHECK9-NEXT: [[TMP91:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 41468// CHECK9-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP91]], 11469// CHECK9-NEXT: [[TMP92:%.*]] = zext i32 [[ADD29]] to i641470// CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 01471// CHECK9-NEXT: store i32 3, ptr [[TMP93]], align 41472// CHECK9-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 11473// CHECK9-NEXT: store i32 3, ptr [[TMP94]], align 41474// CHECK9-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 21475// CHECK9-NEXT: store ptr [[TMP86]], ptr [[TMP95]], align 81476// CHECK9-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 31477// CHECK9-NEXT: store ptr [[TMP87]], ptr [[TMP96]], align 81478// CHECK9-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 41479// CHECK9-NEXT: store ptr [[TMP88]], ptr [[TMP97]], align 81480// CHECK9-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 51481// CHECK9-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP98]], align 81482// CHECK9-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 61483// CHECK9-NEXT: store ptr null, ptr [[TMP99]], align 81484// CHECK9-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 71485// CHECK9-NEXT: store ptr null, ptr [[TMP100]], align 81486// CHECK9-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 81487// CHECK9-NEXT: store i64 [[TMP92]], ptr [[TMP101]], align 81488// CHECK9-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 91489// CHECK9-NEXT: store i64 0, ptr [[TMP102]], align 81490// CHECK9-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 101491// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP103]], align 41492// CHECK9-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 111493// CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP104]], align 41494// CHECK9-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 121495// CHECK9-NEXT: store i32 0, ptr [[TMP105]], align 41496// CHECK9-NEXT: [[TMP106:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, ptr [[KERNEL_ARGS30]])1497// CHECK9-NEXT: [[TMP107:%.*]] = icmp ne i32 [[TMP106]], 01498// CHECK9-NEXT: br i1 [[TMP107]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]1499// CHECK9: omp_offload.failed31:1500// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i64 [[TMP74]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]1501// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT32]]1502// CHECK9: omp_offload.cont32:1503// CHECK9-NEXT: [[TMP108:%.*]] = load i32, ptr [[ARGC_ADDR]], align 41504// CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP108]])1505// CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 41506// CHECK9-NEXT: [[TMP109:%.*]] = load ptr, ptr [[SAVED_STACK]], align 81507// CHECK9-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP109]])1508// CHECK9-NEXT: [[TMP110:%.*]] = load i32, ptr [[RETVAL]], align 41509// CHECK9-NEXT: ret i32 [[TMP110]]1510//1511//1512// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1001513// CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {1514// CHECK9-NEXT: entry:1515// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 81516// CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 81517// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81518// CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 81519// CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 81520// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81521// CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 81522// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81523// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])1524// CHECK9-NEXT: ret void1525//1526//1527// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.omp_outlined1528// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1529// CHECK9-NEXT: entry:1530// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81531// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81532// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 81533// CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 81534// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81535// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41536// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 41537// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41538// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41539// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 41540// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41541// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41542// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41543// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41544// CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 41545// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81546// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81547// CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 81548// CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 81549// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81550// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 81551// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 81552// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 81553// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 41554// CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 41555// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41556// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 01557// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11558// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11559// CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41560// CHECK9-NEXT: store i32 0, ptr [[I]], align 41561// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41562// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]1563// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1564// CHECK9: omp.precond.then:1565// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41566// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41567// CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 41568// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41569// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41570// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81571// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41572// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1573// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41574// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41575// CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]1576// CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1577// CHECK9: cond.true:1578// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41579// CHECK9-NEXT: br label [[COND_END:%.*]]1580// CHECK9: cond.false:1581// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41582// CHECK9-NEXT: br label [[COND_END]]1583// CHECK9: cond.end:1584// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]1585// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41586// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41587// CHECK9-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 41588// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1589// CHECK9: omp.inner.for.cond:1590// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]1591// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]1592// CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]1593// CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1594// CHECK9: omp.inner.for.body:1595// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]1596// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 11597// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1598// CHECK9-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP9]]1599// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP9]]1600// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i641601// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]1602// CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]1603// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1604// CHECK9: omp.body.continue:1605// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1606// CHECK9: omp.inner.for.inc:1607// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]1608// CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 11609// CHECK9-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]1610// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]1611// CHECK9: omp.inner.for.end:1612// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1613// CHECK9: omp.loop.exit:1614// CHECK9-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81615// CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41616// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])1617// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41618// CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01619// CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1620// CHECK9: .omp.final.then:1621// CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41622// CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 01623// CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 11624// CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 11625// CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]1626// CHECK9-NEXT: store i32 [[ADD10]], ptr [[I3]], align 41627// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]1628// CHECK9: .omp.final.done:1629// CHECK9-NEXT: br label [[OMP_PRECOND_END]]1630// CHECK9: omp.precond.end:1631// CHECK9-NEXT: ret void1632//1633//1634// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1051635// CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1636// CHECK9-NEXT: entry:1637// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 81638// CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 81639// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81640// CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 81641// CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 81642// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81643// CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 81644// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81645// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])1646// CHECK9-NEXT: ret void1647//1648//1649// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.omp_outlined1650// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1651// CHECK9-NEXT: entry:1652// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81653// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81654// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 81655// CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 81656// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81657// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41658// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 41659// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41660// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41661// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 41662// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41663// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41664// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41665// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41666// CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 41667// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81668// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81669// CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 81670// CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 81671// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81672// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 81673// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 81674// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 81675// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 41676// CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 41677// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41678// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 01679// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11680// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11681// CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41682// CHECK9-NEXT: store i32 0, ptr [[I]], align 41683// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41684// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]1685// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1686// CHECK9: omp.precond.then:1687// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41688// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41689// CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 41690// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41691// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41692// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81693// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41694// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1695// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41696// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41697// CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]1698// CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1699// CHECK9: cond.true:1700// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41701// CHECK9-NEXT: br label [[COND_END:%.*]]1702// CHECK9: cond.false:1703// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41704// CHECK9-NEXT: br label [[COND_END]]1705// CHECK9: cond.end:1706// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]1707// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41708// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41709// CHECK9-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 41710// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1711// CHECK9: omp.inner.for.cond:1712// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]1713// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]1714// CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]1715// CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1716// CHECK9: omp.inner.for.body:1717// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1718// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 11719// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1720// CHECK9-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP15]]1721// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP15]]1722// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i641723// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]1724// CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]1725// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1726// CHECK9: omp.body.continue:1727// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1728// CHECK9: omp.inner.for.inc:1729// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1730// CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 11731// CHECK9-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1732// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]1733// CHECK9: omp.inner.for.end:1734// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1735// CHECK9: omp.loop.exit:1736// CHECK9-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81737// CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41738// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])1739// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41740// CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01741// CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1742// CHECK9: .omp.final.then:1743// CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41744// CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 01745// CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 11746// CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 11747// CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]1748// CHECK9-NEXT: store i32 [[ADD10]], ptr [[I3]], align 41749// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]1750// CHECK9: .omp.final.done:1751// CHECK9-NEXT: br label [[OMP_PRECOND_END]]1752// CHECK9: omp.precond.end:1753// CHECK9-NEXT: ret void1754//1755//1756// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1101757// CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1758// CHECK9-NEXT: entry:1759// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 81760// CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 81761// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81762// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41763// CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 81764// CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 81765// CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 81766// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81767// CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 81768// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81769// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 41770// CHECK9-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 41771// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41772// CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 41773// CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 81774// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP4]])1775// CHECK9-NEXT: ret void1776//1777//1778// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined1779// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {1780// CHECK9-NEXT: entry:1781// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81782// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81783// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 81784// CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 81785// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81786// CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 81787// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41788// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 41789// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41790// CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 41791// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 41792// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41793// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41794// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41795// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41796// CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 41797// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81798// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81799// CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 81800// CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 81801// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81802// CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 81803// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 81804// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 81805// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 81806// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 41807// CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 41808// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41809// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 01810// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11811// CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 11812// CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 41813// CHECK9-NEXT: store i32 0, ptr [[I]], align 41814// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41815// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]1816// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1817// CHECK9: omp.precond.then:1818// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41819// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 41820// CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 41821// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41822// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41823// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 41824// CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81825// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 41826// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])1827// CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]1828// CHECK9: omp.dispatch.cond:1829// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41830// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 41831// CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]1832// CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1833// CHECK9: cond.true:1834// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 41835// CHECK9-NEXT: br label [[COND_END:%.*]]1836// CHECK9: cond.false:1837// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41838// CHECK9-NEXT: br label [[COND_END]]1839// CHECK9: cond.end:1840// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]1841// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41842// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41843// CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 41844// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41845// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41846// CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]1847// CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]1848// CHECK9: omp.dispatch.body:1849// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1850// CHECK9: omp.inner.for.cond:1851// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]1852// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]1853// CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]1854// CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1855// CHECK9: omp.inner.for.body:1856// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1857// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 11858// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1859// CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP18]]1860// CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP18]]1861// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i641862// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]1863// CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]1864// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1865// CHECK9: omp.body.continue:1866// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1867// CHECK9: omp.inner.for.inc:1868// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1869// CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 11870// CHECK9-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1871// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]1872// CHECK9: omp.inner.for.end:1873// CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]1874// CHECK9: omp.dispatch.inc:1875// CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41876// CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41877// CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]1878// CHECK9-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 41879// CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41880// CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41881// CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]1882// CHECK9-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 41883// CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]1884// CHECK9: omp.dispatch.end:1885// CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81886// CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 41887// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP27]])1888// CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41889// CHECK9-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 01890// CHECK9-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1891// CHECK9: .omp.final.then:1892// CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41893// CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP30]], 01894// CHECK9-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 11895// CHECK9-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 11896// CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]1897// CHECK9-NEXT: store i32 [[ADD14]], ptr [[I4]], align 41898// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]1899// CHECK9: .omp.final.done:1900// CHECK9-NEXT: br label [[OMP_PRECOND_END]]1901// CHECK9: omp.precond.end:1902// CHECK9-NEXT: ret void1903//1904//1905// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_1906// CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {1907// CHECK9-NEXT: entry:1908// CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 41909// CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 41910// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 81911// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 81912// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 81913// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 41914// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81915// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 81916// CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 81917// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 81918// CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 41919// CHECK9-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81920// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 81921// CHECK9-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 81922// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 81923// CHECK9-NEXT: [[_TMP11:%.*]] = alloca i32, align 41924// CHECK9-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81925// CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 41926// CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01927// CHECK9-NEXT: store ptr [[A]], ptr [[TMP0]], align 81928// CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01929// CHECK9-NEXT: store ptr [[A]], ptr [[TMP1]], align 81930// CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 01931// CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 81932// CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01933// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01934// CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01935// CHECK9-NEXT: store i32 3, ptr [[TMP5]], align 41936// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11937// CHECK9-NEXT: store i32 1, ptr [[TMP6]], align 41938// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21939// CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 81940// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31941// CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 81942// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41943// CHECK9-NEXT: store ptr @.offload_sizes.5, ptr [[TMP9]], align 81944// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51945// CHECK9-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP10]], align 81946// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61947// CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 81948// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71949// CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 81950// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81951// CHECK9-NEXT: store i64 10, ptr [[TMP13]], align 81952// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91953// CHECK9-NEXT: store i64 0, ptr [[TMP14]], align 81954// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101955// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 41956// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111957// CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 41958// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121959// CHECK9-NEXT: store i32 0, ptr [[TMP17]], align 41960// CHECK9-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, ptr [[KERNEL_ARGS]])1961// CHECK9-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 01962// CHECK9-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1963// CHECK9: omp_offload.failed:1964// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79(ptr [[A]]) #[[ATTR3]]1965// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]1966// CHECK9: omp_offload.cont:1967// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 01968// CHECK9-NEXT: store ptr [[A]], ptr [[TMP20]], align 81969// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 01970// CHECK9-NEXT: store ptr [[A]], ptr [[TMP21]], align 81971// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 01972// CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 81973// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 01974// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 01975// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 01976// CHECK9-NEXT: store i32 3, ptr [[TMP25]], align 41977// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11978// CHECK9-NEXT: store i32 1, ptr [[TMP26]], align 41979// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 21980// CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 81981// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 31982// CHECK9-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 81983// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 41984// CHECK9-NEXT: store ptr @.offload_sizes.7, ptr [[TMP29]], align 81985// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 51986// CHECK9-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP30]], align 81987// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 61988// CHECK9-NEXT: store ptr null, ptr [[TMP31]], align 81989// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 71990// CHECK9-NEXT: store ptr null, ptr [[TMP32]], align 81991// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 81992// CHECK9-NEXT: store i64 10, ptr [[TMP33]], align 81993// CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 91994// CHECK9-NEXT: store i64 0, ptr [[TMP34]], align 81995// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 101996// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 41997// CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 111998// CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 41999// CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 122000// CHECK9-NEXT: store i32 0, ptr [[TMP37]], align 42001// CHECK9-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, ptr [[KERNEL_ARGS5]])2002// CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 02003// CHECK9-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]2004// CHECK9: omp_offload.failed6:2005// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84(ptr [[A]]) #[[ATTR3]]2006// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT7]]2007// CHECK9: omp_offload.cont7:2008// CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 02009// CHECK9-NEXT: store ptr [[A]], ptr [[TMP40]], align 82010// CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 02011// CHECK9-NEXT: store ptr [[A]], ptr [[TMP41]], align 82012// CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 02013// CHECK9-NEXT: store ptr null, ptr [[TMP42]], align 82014// CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 02015// CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 02016// CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 02017// CHECK9-NEXT: store i32 3, ptr [[TMP45]], align 42018// CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12019// CHECK9-NEXT: store i32 1, ptr [[TMP46]], align 42020// CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 22021// CHECK9-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 82022// CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 32023// CHECK9-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 82024// CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 42025// CHECK9-NEXT: store ptr @.offload_sizes.9, ptr [[TMP49]], align 82026// CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 52027// CHECK9-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP50]], align 82028// CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 62029// CHECK9-NEXT: store ptr null, ptr [[TMP51]], align 82030// CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 72031// CHECK9-NEXT: store ptr null, ptr [[TMP52]], align 82032// CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 82033// CHECK9-NEXT: store i64 10, ptr [[TMP53]], align 82034// CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 92035// CHECK9-NEXT: store i64 0, ptr [[TMP54]], align 82036// CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 102037// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 42038// CHECK9-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 112039// CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 42040// CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 122041// CHECK9-NEXT: store i32 0, ptr [[TMP57]], align 42042// CHECK9-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, ptr [[KERNEL_ARGS12]])2043// CHECK9-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 02044// CHECK9-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]2045// CHECK9: omp_offload.failed13:2046// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89(ptr [[A]]) #[[ATTR3]]2047// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT14]]2048// CHECK9: omp_offload.cont14:2049// CHECK9-NEXT: ret i32 02050//2051//2052// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l792053// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {2054// CHECK9-NEXT: entry:2055// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 82056// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 82057// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82058// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.omp_outlined, ptr [[TMP0]])2059// CHECK9-NEXT: ret void2060//2061//2062// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.omp_outlined2063// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {2064// CHECK9-NEXT: entry:2065// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82066// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82067// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 82068// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42069// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 42070// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42071// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42072// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42073// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42074// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 42075// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82076// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82077// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 82078// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82079// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42080// CHECK9-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 42081// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42082// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42083// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82084// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42085// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2086// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42087// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 92088// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2089// CHECK9: cond.true:2090// CHECK9-NEXT: br label [[COND_END:%.*]]2091// CHECK9: cond.false:2092// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42093// CHECK9-NEXT: br label [[COND_END]]2094// CHECK9: cond.end:2095// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2096// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42097// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42098// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42099// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2100// CHECK9: omp.inner.for.cond:2101// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]2102// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]2103// CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2104// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2105// CHECK9: omp.inner.for.body:2106// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]2107// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 12108// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2109// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]2110// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]2111// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i642112// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]2113// CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]]2114// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2115// CHECK9: omp.body.continue:2116// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2117// CHECK9: omp.inner.for.inc:2118// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]2119// CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 12120// CHECK9-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]2121// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]2122// CHECK9: omp.inner.for.end:2123// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2124// CHECK9: omp.loop.exit:2125// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2126// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42127// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 02128// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2129// CHECK9: .omp.final.then:2130// CHECK9-NEXT: store i32 10, ptr [[I]], align 42131// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]2132// CHECK9: .omp.final.done:2133// CHECK9-NEXT: ret void2134//2135//2136// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l842137// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {2138// CHECK9-NEXT: entry:2139// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 82140// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 82141// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82142// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined, ptr [[TMP0]])2143// CHECK9-NEXT: ret void2144//2145//2146// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined2147// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {2148// CHECK9-NEXT: entry:2149// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82150// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82151// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 82152// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42153// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 42154// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42155// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42156// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42157// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42158// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 42159// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82160// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82161// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 82162// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82163// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42164// CHECK9-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 42165// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42166// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42167// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82168// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42169// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2170// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42171// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 92172// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2173// CHECK9: cond.true:2174// CHECK9-NEXT: br label [[COND_END:%.*]]2175// CHECK9: cond.false:2176// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42177// CHECK9-NEXT: br label [[COND_END]]2178// CHECK9: cond.end:2179// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2180// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42181// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42182// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42183// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2184// CHECK9: omp.inner.for.cond:2185// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]2186// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]]2187// CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2188// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2189// CHECK9: omp.inner.for.body:2190// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]2191// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 12192// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2193// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]2194// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]2195// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i642196// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]2197// CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]]2198// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2199// CHECK9: omp.body.continue:2200// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2201// CHECK9: omp.inner.for.inc:2202// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]2203// CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 12204// CHECK9-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]2205// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]2206// CHECK9: omp.inner.for.end:2207// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2208// CHECK9: omp.loop.exit:2209// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2210// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42211// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 02212// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2213// CHECK9: .omp.final.then:2214// CHECK9-NEXT: store i32 10, ptr [[I]], align 42215// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]2216// CHECK9: .omp.final.done:2217// CHECK9-NEXT: ret void2218//2219//2220// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l892221// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {2222// CHECK9-NEXT: entry:2223// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 82224// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 82225// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82226// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.omp_outlined, ptr [[TMP0]])2227// CHECK9-NEXT: ret void2228//2229//2230// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.omp_outlined2231// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {2232// CHECK9-NEXT: entry:2233// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82234// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82235// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 82236// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42237// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 42238// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42239// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42240// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42241// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42242// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 42243// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82244// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82245// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 82246// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82247// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42248// CHECK9-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 42249// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42250// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42251// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82252// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42253// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 10)2254// CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]2255// CHECK9: omp.dispatch.cond:2256// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42257// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 92258// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2259// CHECK9: cond.true:2260// CHECK9-NEXT: br label [[COND_END:%.*]]2261// CHECK9: cond.false:2262// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42263// CHECK9-NEXT: br label [[COND_END]]2264// CHECK9: cond.end:2265// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2266// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42267// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42268// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42269// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42270// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42271// CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2272// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]2273// CHECK9: omp.dispatch.body:2274// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2275// CHECK9: omp.inner.for.cond:2276// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]]2277// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]]2278// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]2279// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2280// CHECK9: omp.inner.for.body:2281// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]2282// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 12283// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2284// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]]2285// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]]2286// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i642287// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]2288// CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP27]]2289// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2290// CHECK9: omp.body.continue:2291// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2292// CHECK9: omp.inner.for.inc:2293// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]2294// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 12295// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]2296// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]2297// CHECK9: omp.inner.for.end:2298// CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]2299// CHECK9: omp.dispatch.inc:2300// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42301// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42302// CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]2303// CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 42304// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42305// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42306// CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]2307// CHECK9-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 42308// CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]2309// CHECK9: omp.dispatch.end:2310// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2311// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42312// CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 02313// CHECK9-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2314// CHECK9: .omp.final.then:2315// CHECK9-NEXT: store i32 10, ptr [[I]], align 42316// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]2317// CHECK9: .omp.final.done:2318// CHECK9-NEXT: ret void2319//2320//2321// CHECK11-LABEL: define {{[^@]+}}@main2322// CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {2323// CHECK11-NEXT: entry:2324// CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 42325// CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 42326// CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 42327// CHECK11-NEXT: [[N:%.*]] = alloca i32, align 42328// CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 42329// CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 42330// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 42331// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 42332// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 42333// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 42334// CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 42335// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 42336// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42337// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42338// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82339// CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 42340// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 42341// CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 42342// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 42343// CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 42344// CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 42345// CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 42346// CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 42347// CHECK11-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82348// CHECK11-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 42349// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [3 x ptr], align 42350// CHECK11-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [3 x ptr], align 42351// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [3 x ptr], align 42352// CHECK11-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [3 x i64], align 42353// CHECK11-NEXT: [[_TMP23:%.*]] = alloca i32, align 42354// CHECK11-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 42355// CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 42356// CHECK11-NEXT: [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82357// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 42358// CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 42359// CHECK11-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 42360// CHECK11-NEXT: store i32 100, ptr [[N]], align 42361// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 42362// CHECK11-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()2363// CHECK11-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 42364// CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 42365// CHECK11-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 42366// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 42367// CHECK11-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 42368// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 42369// CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 42370// CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i642371// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false)2372// CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02373// CHECK11-NEXT: store i32 [[TMP3]], ptr [[TMP6]], align 42374// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02375// CHECK11-NEXT: store i32 [[TMP3]], ptr [[TMP7]], align 42376// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 02377// CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 42378// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 12379// CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 42380// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 12381// CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP10]], align 42382// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 12383// CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 42384// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 22385// CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 42386// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 22387// CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 42388// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 22389// CHECK11-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 42390// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 22391// CHECK11-NEXT: store ptr null, ptr [[TMP15]], align 42392// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02393// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02394// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 02395// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 42396// CHECK11-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 42397// CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42398// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 02399// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12400// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12401// CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42402// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42403// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 12404// CHECK11-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i642405// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02406// CHECK11-NEXT: store i32 3, ptr [[TMP23]], align 42407// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12408// CHECK11-NEXT: store i32 3, ptr [[TMP24]], align 42409// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22410// CHECK11-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 42411// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32412// CHECK11-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 42413// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42414// CHECK11-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 42415// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52416// CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 42417// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62418// CHECK11-NEXT: store ptr null, ptr [[TMP29]], align 42419// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72420// CHECK11-NEXT: store ptr null, ptr [[TMP30]], align 42421// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82422// CHECK11-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 82423// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92424// CHECK11-NEXT: store i64 0, ptr [[TMP32]], align 82425// CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102426// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 42427// CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112428// CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP34]], align 42429// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122430// CHECK11-NEXT: store i32 0, ptr [[TMP35]], align 42431// CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, ptr [[KERNEL_ARGS]])2432// CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 02433// CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2434// CHECK11: omp_offload.failed:2435// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]2436// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]2437// CHECK11: omp_offload.cont:2438// CHECK11-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 42439// CHECK11-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 42440// CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 42441// CHECK11-NEXT: [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 42442// CHECK11-NEXT: [[TMP41:%.*]] = sext i32 [[TMP40]] to i642443// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false)2444// CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 02445// CHECK11-NEXT: store i32 [[TMP39]], ptr [[TMP42]], align 42446// CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 02447// CHECK11-NEXT: store i32 [[TMP39]], ptr [[TMP43]], align 42448// CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 02449// CHECK11-NEXT: store ptr null, ptr [[TMP44]], align 42450// CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 12451// CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP45]], align 42452// CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 12453// CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP46]], align 42454// CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 12455// CHECK11-NEXT: store ptr null, ptr [[TMP47]], align 42456// CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 22457// CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 42458// CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 22459// CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP49]], align 42460// CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 22461// CHECK11-NEXT: store i64 [[TMP41]], ptr [[TMP50]], align 42462// CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 22463// CHECK11-NEXT: store ptr null, ptr [[TMP51]], align 42464// CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 02465// CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 02466// CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 02467// CHECK11-NEXT: [[TMP55:%.*]] = load i32, ptr [[N]], align 42468// CHECK11-NEXT: store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 42469// CHECK11-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 42470// CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 02471// CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 12472// CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 12473// CHECK11-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 42474// CHECK11-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 42475// CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP57]], 12476// CHECK11-NEXT: [[TMP58:%.*]] = zext i32 [[ADD14]] to i642477// CHECK11-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 02478// CHECK11-NEXT: store i32 3, ptr [[TMP59]], align 42479// CHECK11-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12480// CHECK11-NEXT: store i32 3, ptr [[TMP60]], align 42481// CHECK11-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 22482// CHECK11-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 42483// CHECK11-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 32484// CHECK11-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 42485// CHECK11-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 42486// CHECK11-NEXT: store ptr [[TMP54]], ptr [[TMP63]], align 42487// CHECK11-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 52488// CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP64]], align 42489// CHECK11-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 62490// CHECK11-NEXT: store ptr null, ptr [[TMP65]], align 42491// CHECK11-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 72492// CHECK11-NEXT: store ptr null, ptr [[TMP66]], align 42493// CHECK11-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 82494// CHECK11-NEXT: store i64 [[TMP58]], ptr [[TMP67]], align 82495// CHECK11-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 92496// CHECK11-NEXT: store i64 0, ptr [[TMP68]], align 82497// CHECK11-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 102498// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 42499// CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 112500// CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP70]], align 42501// CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 122502// CHECK11-NEXT: store i32 0, ptr [[TMP71]], align 42503// CHECK11-NEXT: [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, ptr [[KERNEL_ARGS15]])2504// CHECK11-NEXT: [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 02505// CHECK11-NEXT: br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]2506// CHECK11: omp_offload.failed16:2507// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]2508// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT17]]2509// CHECK11: omp_offload.cont17:2510// CHECK11-NEXT: [[TMP74:%.*]] = load i32, ptr [[N]], align 42511// CHECK11-NEXT: store i32 [[TMP74]], ptr [[N_CASTED18]], align 42512// CHECK11-NEXT: [[TMP75:%.*]] = load i32, ptr [[N_CASTED18]], align 42513// CHECK11-NEXT: [[TMP76:%.*]] = mul nuw i32 [[TMP0]], 42514// CHECK11-NEXT: [[TMP77:%.*]] = sext i32 [[TMP76]] to i642515// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES22]], ptr align 4 @.offload_sizes.3, i32 24, i1 false)2516// CHECK11-NEXT: [[TMP78:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 02517// CHECK11-NEXT: store i32 [[TMP75]], ptr [[TMP78]], align 42518// CHECK11-NEXT: [[TMP79:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 02519// CHECK11-NEXT: store i32 [[TMP75]], ptr [[TMP79]], align 42520// CHECK11-NEXT: [[TMP80:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 02521// CHECK11-NEXT: store ptr null, ptr [[TMP80]], align 42522// CHECK11-NEXT: [[TMP81:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 12523// CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP81]], align 42524// CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 12525// CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP82]], align 42526// CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 12527// CHECK11-NEXT: store ptr null, ptr [[TMP83]], align 42528// CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 22529// CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP84]], align 42530// CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 22531// CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP85]], align 42532// CHECK11-NEXT: [[TMP86:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 22533// CHECK11-NEXT: store i64 [[TMP77]], ptr [[TMP86]], align 42534// CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 22535// CHECK11-NEXT: store ptr null, ptr [[TMP87]], align 42536// CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 02537// CHECK11-NEXT: [[TMP89:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 02538// CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 02539// CHECK11-NEXT: [[TMP91:%.*]] = load i32, ptr [[N]], align 42540// CHECK11-NEXT: store i32 [[TMP91]], ptr [[DOTCAPTURE_EXPR_24]], align 42541// CHECK11-NEXT: [[TMP92:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 42542// CHECK11-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP92]], 02543// CHECK11-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 12544// CHECK11-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 12545// CHECK11-NEXT: store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 42546// CHECK11-NEXT: [[TMP93:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 42547// CHECK11-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP93]], 12548// CHECK11-NEXT: [[TMP94:%.*]] = zext i32 [[ADD29]] to i642549// CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 02550// CHECK11-NEXT: store i32 3, ptr [[TMP95]], align 42551// CHECK11-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 12552// CHECK11-NEXT: store i32 3, ptr [[TMP96]], align 42553// CHECK11-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 22554// CHECK11-NEXT: store ptr [[TMP88]], ptr [[TMP97]], align 42555// CHECK11-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 32556// CHECK11-NEXT: store ptr [[TMP89]], ptr [[TMP98]], align 42557// CHECK11-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 42558// CHECK11-NEXT: store ptr [[TMP90]], ptr [[TMP99]], align 42559// CHECK11-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 52560// CHECK11-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP100]], align 42561// CHECK11-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 62562// CHECK11-NEXT: store ptr null, ptr [[TMP101]], align 42563// CHECK11-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 72564// CHECK11-NEXT: store ptr null, ptr [[TMP102]], align 42565// CHECK11-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 82566// CHECK11-NEXT: store i64 [[TMP94]], ptr [[TMP103]], align 82567// CHECK11-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 92568// CHECK11-NEXT: store i64 0, ptr [[TMP104]], align 82569// CHECK11-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 102570// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP105]], align 42571// CHECK11-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 112572// CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP106]], align 42573// CHECK11-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 122574// CHECK11-NEXT: store i32 0, ptr [[TMP107]], align 42575// CHECK11-NEXT: [[TMP108:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, ptr [[KERNEL_ARGS30]])2576// CHECK11-NEXT: [[TMP109:%.*]] = icmp ne i32 [[TMP108]], 02577// CHECK11-NEXT: br i1 [[TMP109]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]2578// CHECK11: omp_offload.failed31:2579// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i32 [[TMP75]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]2580// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT32]]2581// CHECK11: omp_offload.cont32:2582// CHECK11-NEXT: [[TMP110:%.*]] = load i32, ptr [[ARGC_ADDR]], align 42583// CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP110]])2584// CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 42585// CHECK11-NEXT: [[TMP111:%.*]] = load ptr, ptr [[SAVED_STACK]], align 42586// CHECK11-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP111]])2587// CHECK11-NEXT: [[TMP112:%.*]] = load i32, ptr [[RETVAL]], align 42588// CHECK11-NEXT: ret i32 [[TMP112]]2589//2590//2591// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1002592// CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {2593// CHECK11-NEXT: entry:2594// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 42595// CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 42596// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 42597// CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 42598// CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 42599// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 42600// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 42601// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 42602// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])2603// CHECK11-NEXT: ret void2604//2605//2606// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.omp_outlined2607// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {2608// CHECK11-NEXT: entry:2609// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42610// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42611// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 42612// CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 42613// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 42614// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42615// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 42616// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42617// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42618// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 42619// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42620// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42621// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42622// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42623// CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 42624// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42625// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42626// CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 42627// CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 42628// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 42629// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 42630// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 42631// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 42632// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 42633// CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 42634// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42635// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 02636// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12637// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12638// CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42639// CHECK11-NEXT: store i32 0, ptr [[I]], align 42640// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42641// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]2642// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2643// CHECK11: omp.precond.then:2644// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42645// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42646// CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 42647// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42648// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42649// CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42650// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 42651// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2652// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42653// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42654// CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]2655// CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2656// CHECK11: cond.true:2657// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42658// CHECK11-NEXT: br label [[COND_END:%.*]]2659// CHECK11: cond.false:2660// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42661// CHECK11-NEXT: br label [[COND_END]]2662// CHECK11: cond.end:2663// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]2664// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42665// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42666// CHECK11-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 42667// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2668// CHECK11: omp.inner.for.cond:2669// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]2670// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]2671// CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]2672// CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2673// CHECK11: omp.inner.for.body:2674// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]2675// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 12676// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2677// CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP10]]2678// CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP10]]2679// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP17]]2680// CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]2681// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2682// CHECK11: omp.body.continue:2683// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2684// CHECK11: omp.inner.for.inc:2685// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]2686// CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 12687// CHECK11-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]2688// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]2689// CHECK11: omp.inner.for.end:2690// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2691// CHECK11: omp.loop.exit:2692// CHECK11-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42693// CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 42694// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])2695// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42696// CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 02697// CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2698// CHECK11: .omp.final.then:2699// CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42700// CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 02701// CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 12702// CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 12703// CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]2704// CHECK11-NEXT: store i32 [[ADD10]], ptr [[I3]], align 42705// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]2706// CHECK11: .omp.final.done:2707// CHECK11-NEXT: br label [[OMP_PRECOND_END]]2708// CHECK11: omp.precond.end:2709// CHECK11-NEXT: ret void2710//2711//2712// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1052713// CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {2714// CHECK11-NEXT: entry:2715// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 42716// CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 42717// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 42718// CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 42719// CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 42720// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 42721// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 42722// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 42723// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])2724// CHECK11-NEXT: ret void2725//2726//2727// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.omp_outlined2728// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {2729// CHECK11-NEXT: entry:2730// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42731// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42732// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 42733// CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 42734// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 42735// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42736// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 42737// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42738// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42739// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 42740// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42741// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42742// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42743// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42744// CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 42745// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42746// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42747// CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 42748// CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 42749// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 42750// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 42751// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 42752// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 42753// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 42754// CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 42755// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42756// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 02757// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12758// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12759// CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42760// CHECK11-NEXT: store i32 0, ptr [[I]], align 42761// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42762// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]2763// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2764// CHECK11: omp.precond.then:2765// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42766// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42767// CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 42768// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42769// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42770// CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42771// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 42772// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2773// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42774// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42775// CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]2776// CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2777// CHECK11: cond.true:2778// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42779// CHECK11-NEXT: br label [[COND_END:%.*]]2780// CHECK11: cond.false:2781// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42782// CHECK11-NEXT: br label [[COND_END]]2783// CHECK11: cond.end:2784// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]2785// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42786// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42787// CHECK11-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 42788// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2789// CHECK11: omp.inner.for.cond:2790// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]2791// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]2792// CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]2793// CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2794// CHECK11: omp.inner.for.body:2795// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]2796// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 12797// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2798// CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]2799// CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]2800// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP17]]2801// CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]2802// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2803// CHECK11: omp.body.continue:2804// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2805// CHECK11: omp.inner.for.inc:2806// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]2807// CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 12808// CHECK11-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]2809// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]2810// CHECK11: omp.inner.for.end:2811// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2812// CHECK11: omp.loop.exit:2813// CHECK11-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42814// CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 42815// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])2816// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42817// CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 02818// CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2819// CHECK11: .omp.final.then:2820// CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42821// CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 02822// CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 12823// CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 12824// CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]2825// CHECK11-NEXT: store i32 [[ADD10]], ptr [[I3]], align 42826// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]2827// CHECK11: .omp.final.done:2828// CHECK11-NEXT: br label [[OMP_PRECOND_END]]2829// CHECK11: omp.precond.end:2830// CHECK11-NEXT: ret void2831//2832//2833// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1102834// CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {2835// CHECK11-NEXT: entry:2836// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 42837// CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 42838// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 42839// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42840// CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 42841// CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 42842// CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 42843// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 42844// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 42845// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 42846// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 42847// CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 42848// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42849// CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 42850// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 42851// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP4]])2852// CHECK11-NEXT: ret void2853//2854//2855// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined2856// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {2857// CHECK11-NEXT: entry:2858// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42859// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42860// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 42861// CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 42862// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 42863// CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 42864// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42865// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 42866// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42867// CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 42868// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 42869// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42870// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42871// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42872// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42873// CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 42874// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42875// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42876// CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 42877// CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 42878// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 42879// CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 42880// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 42881// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 42882// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 42883// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 42884// CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 42885// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42886// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 02887// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12888// CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 12889// CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 42890// CHECK11-NEXT: store i32 0, ptr [[I]], align 42891// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42892// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]2893// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2894// CHECK11: omp.precond.then:2895// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42896// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42897// CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 42898// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42899// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42900// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 42901// CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42902// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 42903// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])2904// CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]2905// CHECK11: omp.dispatch.cond:2906// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42907// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42908// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]2909// CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2910// CHECK11: cond.true:2911// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42912// CHECK11-NEXT: br label [[COND_END:%.*]]2913// CHECK11: cond.false:2914// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42915// CHECK11-NEXT: br label [[COND_END]]2916// CHECK11: cond.end:2917// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]2918// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42919// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42920// CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 42921// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42922// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42923// CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]2924// CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]2925// CHECK11: omp.dispatch.body:2926// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2927// CHECK11: omp.inner.for.cond:2928// CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]2929// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]2930// CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]2931// CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2932// CHECK11: omp.inner.for.body:2933// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]2934// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 12935// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2936// CHECK11-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]2937// CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]2938// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP20]]2939// CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]]2940// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2941// CHECK11: omp.body.continue:2942// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2943// CHECK11: omp.inner.for.inc:2944// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]2945// CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 12946// CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]2947// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]2948// CHECK11: omp.inner.for.end:2949// CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]2950// CHECK11: omp.dispatch.inc:2951// CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42952// CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42953// CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]2954// CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 42955// CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42956// CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42957// CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]2958// CHECK11-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 42959// CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]2960// CHECK11: omp.dispatch.end:2961// CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42962// CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 42963// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP27]])2964// CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42965// CHECK11-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 02966// CHECK11-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2967// CHECK11: .omp.final.then:2968// CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42969// CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP30]], 02970// CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 12971// CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 12972// CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]2973// CHECK11-NEXT: store i32 [[ADD14]], ptr [[I4]], align 42974// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]2975// CHECK11: .omp.final.done:2976// CHECK11-NEXT: br label [[OMP_PRECOND_END]]2977// CHECK11: omp.precond.end:2978// CHECK11-NEXT: ret void2979//2980//2981// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_2982// CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {2983// CHECK11-NEXT: entry:2984// CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 42985// CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 42986// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 42987// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 42988// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 42989// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 42990// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82991// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 42992// CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 42993// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 42994// CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 42995// CHECK11-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82996// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 42997// CHECK11-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 42998// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 42999// CHECK11-NEXT: [[_TMP11:%.*]] = alloca i32, align 43000// CHECK11-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 83001// CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43002// CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03003// CHECK11-NEXT: store ptr [[A]], ptr [[TMP0]], align 43004// CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03005// CHECK11-NEXT: store ptr [[A]], ptr [[TMP1]], align 43006// CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 03007// CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 43008// CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03009// CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03010// CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 03011// CHECK11-NEXT: store i32 3, ptr [[TMP5]], align 43012// CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 13013// CHECK11-NEXT: store i32 1, ptr [[TMP6]], align 43014// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 23015// CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 43016// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 33017// CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 43018// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 43019// CHECK11-NEXT: store ptr @.offload_sizes.5, ptr [[TMP9]], align 43020// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 53021// CHECK11-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP10]], align 43022// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 63023// CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 43024// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 73025// CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 43026// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 83027// CHECK11-NEXT: store i64 10, ptr [[TMP13]], align 83028// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 93029// CHECK11-NEXT: store i64 0, ptr [[TMP14]], align 83030// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 103031// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 43032// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 113033// CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 43034// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 123035// CHECK11-NEXT: store i32 0, ptr [[TMP17]], align 43036// CHECK11-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, ptr [[KERNEL_ARGS]])3037// CHECK11-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 03038// CHECK11-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]3039// CHECK11: omp_offload.failed:3040// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79(ptr [[A]]) #[[ATTR3]]3041// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]3042// CHECK11: omp_offload.cont:3043// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 03044// CHECK11-NEXT: store ptr [[A]], ptr [[TMP20]], align 43045// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 03046// CHECK11-NEXT: store ptr [[A]], ptr [[TMP21]], align 43047// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 03048// CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 43049// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 03050// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 03051// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 03052// CHECK11-NEXT: store i32 3, ptr [[TMP25]], align 43053// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 13054// CHECK11-NEXT: store i32 1, ptr [[TMP26]], align 43055// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 23056// CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 43057// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 33058// CHECK11-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 43059// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 43060// CHECK11-NEXT: store ptr @.offload_sizes.7, ptr [[TMP29]], align 43061// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 53062// CHECK11-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP30]], align 43063// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 63064// CHECK11-NEXT: store ptr null, ptr [[TMP31]], align 43065// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 73066// CHECK11-NEXT: store ptr null, ptr [[TMP32]], align 43067// CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 83068// CHECK11-NEXT: store i64 10, ptr [[TMP33]], align 83069// CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 93070// CHECK11-NEXT: store i64 0, ptr [[TMP34]], align 83071// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 103072// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 43073// CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 113074// CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 43075// CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 123076// CHECK11-NEXT: store i32 0, ptr [[TMP37]], align 43077// CHECK11-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, ptr [[KERNEL_ARGS5]])3078// CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 03079// CHECK11-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]3080// CHECK11: omp_offload.failed6:3081// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84(ptr [[A]]) #[[ATTR3]]3082// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT7]]3083// CHECK11: omp_offload.cont7:3084// CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 03085// CHECK11-NEXT: store ptr [[A]], ptr [[TMP40]], align 43086// CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 03087// CHECK11-NEXT: store ptr [[A]], ptr [[TMP41]], align 43088// CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 03089// CHECK11-NEXT: store ptr null, ptr [[TMP42]], align 43090// CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 03091// CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 03092// CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 03093// CHECK11-NEXT: store i32 3, ptr [[TMP45]], align 43094// CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 13095// CHECK11-NEXT: store i32 1, ptr [[TMP46]], align 43096// CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 23097// CHECK11-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 43098// CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 33099// CHECK11-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 43100// CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 43101// CHECK11-NEXT: store ptr @.offload_sizes.9, ptr [[TMP49]], align 43102// CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 53103// CHECK11-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP50]], align 43104// CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 63105// CHECK11-NEXT: store ptr null, ptr [[TMP51]], align 43106// CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 73107// CHECK11-NEXT: store ptr null, ptr [[TMP52]], align 43108// CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 83109// CHECK11-NEXT: store i64 10, ptr [[TMP53]], align 83110// CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 93111// CHECK11-NEXT: store i64 0, ptr [[TMP54]], align 83112// CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 103113// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 43114// CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 113115// CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 43116// CHECK11-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 123117// CHECK11-NEXT: store i32 0, ptr [[TMP57]], align 43118// CHECK11-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, ptr [[KERNEL_ARGS12]])3119// CHECK11-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 03120// CHECK11-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]3121// CHECK11: omp_offload.failed13:3122// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89(ptr [[A]]) #[[ATTR3]]3123// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT14]]3124// CHECK11: omp_offload.cont14:3125// CHECK11-NEXT: ret i32 03126//3127//3128// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l793129// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3130// CHECK11-NEXT: entry:3131// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 43132// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 43133// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43134// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.omp_outlined, ptr [[TMP0]])3135// CHECK11-NEXT: ret void3136//3137//3138// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.omp_outlined3139// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3140// CHECK11-NEXT: entry:3141// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43142// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43143// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 43144// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43145// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 43146// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43147// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43148// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43149// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43150// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 43151// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43152// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43153// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 43154// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43155// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43156// CHECK11-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 43157// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43158// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43159// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43160// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43161// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3162// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43163// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 93164// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3165// CHECK11: cond.true:3166// CHECK11-NEXT: br label [[COND_END:%.*]]3167// CHECK11: cond.false:3168// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43169// CHECK11-NEXT: br label [[COND_END]]3170// CHECK11: cond.end:3171// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3172// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43173// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43174// CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43175// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3176// CHECK11: omp.inner.for.cond:3177// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]3178// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]3179// CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3180// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3181// CHECK11: omp.inner.for.body:3182// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]3183// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 13184// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3185// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]3186// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]3187// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP9]]3188// CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]]3189// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3190// CHECK11: omp.body.continue:3191// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3192// CHECK11: omp.inner.for.inc:3193// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]3194// CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 13195// CHECK11-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]3196// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]3197// CHECK11: omp.inner.for.end:3198// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3199// CHECK11: omp.loop.exit:3200// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3201// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43202// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 03203// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3204// CHECK11: .omp.final.then:3205// CHECK11-NEXT: store i32 10, ptr [[I]], align 43206// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]3207// CHECK11: .omp.final.done:3208// CHECK11-NEXT: ret void3209//3210//3211// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l843212// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3213// CHECK11-NEXT: entry:3214// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 43215// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 43216// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43217// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined, ptr [[TMP0]])3218// CHECK11-NEXT: ret void3219//3220//3221// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined3222// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3223// CHECK11-NEXT: entry:3224// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43225// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43226// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 43227// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43228// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 43229// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43230// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43231// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43232// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43233// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 43234// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43235// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43236// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 43237// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43238// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43239// CHECK11-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 43240// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43241// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43242// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43243// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43244// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3245// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43246// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 93247// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3248// CHECK11: cond.true:3249// CHECK11-NEXT: br label [[COND_END:%.*]]3250// CHECK11: cond.false:3251// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43252// CHECK11-NEXT: br label [[COND_END]]3253// CHECK11: cond.end:3254// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3255// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43256// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43257// CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43258// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3259// CHECK11: omp.inner.for.cond:3260// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]]3261// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]]3262// CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3263// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3264// CHECK11: omp.inner.for.body:3265// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]3266// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 13267// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3268// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]3269// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]3270// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP9]]3271// CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]]3272// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3273// CHECK11: omp.body.continue:3274// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3275// CHECK11: omp.inner.for.inc:3276// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]3277// CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 13278// CHECK11-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]3279// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]3280// CHECK11: omp.inner.for.end:3281// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3282// CHECK11: omp.loop.exit:3283// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3284// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43285// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 03286// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3287// CHECK11: .omp.final.then:3288// CHECK11-NEXT: store i32 10, ptr [[I]], align 43289// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]3290// CHECK11: .omp.final.done:3291// CHECK11-NEXT: ret void3292//3293//3294// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l893295// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3296// CHECK11-NEXT: entry:3297// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 43298// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 43299// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43300// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.omp_outlined, ptr [[TMP0]])3301// CHECK11-NEXT: ret void3302//3303//3304// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.omp_outlined3305// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3306// CHECK11-NEXT: entry:3307// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43308// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43309// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 43310// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43311// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 43312// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43313// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43314// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43315// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43316// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 43317// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43318// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43319// CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 43320// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43321// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43322// CHECK11-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 43323// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43324// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43325// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43326// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43327// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 10)3328// CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]3329// CHECK11: omp.dispatch.cond:3330// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43331// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 93332// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3333// CHECK11: cond.true:3334// CHECK11-NEXT: br label [[COND_END:%.*]]3335// CHECK11: cond.false:3336// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43337// CHECK11-NEXT: br label [[COND_END]]3338// CHECK11: cond.end:3339// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3340// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43341// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43342// CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43343// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43344// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43345// CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3346// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]3347// CHECK11: omp.dispatch.body:3348// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3349// CHECK11: omp.inner.for.cond:3350// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]]3351// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP28]]3352// CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]3353// CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3354// CHECK11: omp.inner.for.body:3355// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]3356// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 13357// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3358// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP28]]3359// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP28]]3360// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]3361// CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP28]]3362// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3363// CHECK11: omp.body.continue:3364// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3365// CHECK11: omp.inner.for.inc:3366// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]3367// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 13368// CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]3369// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]3370// CHECK11: omp.inner.for.end:3371// CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]3372// CHECK11: omp.dispatch.inc:3373// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43374// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43375// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]3376// CHECK11-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 43377// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43378// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43379// CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]3380// CHECK11-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 43381// CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]3382// CHECK11: omp.dispatch.end:3383// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3384// CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43385// CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 03386// CHECK11-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3387// CHECK11: .omp.final.then:3388// CHECK11-NEXT: store i32 10, ptr [[I]], align 43389// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]3390// CHECK11: .omp.final.done:3391// CHECK11-NEXT: ret void3392//3393//3394// CHECK13-LABEL: define {{[^@]+}}@main3395// CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {3396// CHECK13-NEXT: entry:3397// CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 43398// CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 43399// CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 83400// CHECK13-NEXT: [[N:%.*]] = alloca i32, align 43401// CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 83402// CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 83403// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 43404// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 43405// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 43406// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43407// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43408// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 43409// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43410// CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 43411// CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 43412// CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 43413// CHECK13-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 43414// CHECK13-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 43415// CHECK13-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 43416// CHECK13-NEXT: [[I18:%.*]] = alloca i32, align 43417// CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 43418// CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 43419// CHECK13-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 43420// CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 43421// CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 43422// CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 43423// CHECK13-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 43424// CHECK13-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 43425// CHECK13-NEXT: [[I48:%.*]] = alloca i32, align 43426// CHECK13-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 43427// CHECK13-NEXT: [[I52:%.*]] = alloca i32, align 43428// CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 43429// CHECK13-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43430// CHECK13-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 83431// CHECK13-NEXT: store i32 100, ptr [[N]], align 43432// CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 43433// CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i643434// CHECK13-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()3435// CHECK13-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 83436// CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 43437// CHECK13-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 83438// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 43439// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 43440// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43441// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 03442// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 13443// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 13444// CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 43445// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43446// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43447// CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 43448// CHECK13-NEXT: store i32 0, ptr [[I]], align 43449// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43450// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]3451// CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]3452// CHECK13: simd.if.then:3453// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43454// CHECK13-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 43455// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3456// CHECK13: omp.inner.for.cond:3457// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]3458// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]3459// CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]3460// CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3461// CHECK13: omp.inner.for.body:3462// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]3463// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 13464// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3465// CHECK13-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]]3466// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]]3467// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i643468// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM]]3469// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]3470// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3471// CHECK13: omp.body.continue:3472// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3473// CHECK13: omp.inner.for.inc:3474// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]3475// CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 13476// CHECK13-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]3477// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]3478// CHECK13: omp.inner.for.end:3479// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43480// CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 03481// CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 13482// CHECK13-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 13483// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]3484// CHECK13-NEXT: store i32 [[ADD9]], ptr [[I3]], align 43485// CHECK13-NEXT: br label [[SIMD_IF_END]]3486// CHECK13: simd.if.end:3487// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[N]], align 43488// CHECK13-NEXT: store i32 [[TMP14]], ptr [[DOTCAPTURE_EXPR_11]], align 43489// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 43490// CHECK13-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 03491// CHECK13-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 13492// CHECK13-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 13493// CHECK13-NEXT: store i32 [[SUB15]], ptr [[DOTCAPTURE_EXPR_12]], align 43494// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB16]], align 43495// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 43496// CHECK13-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_UB17]], align 43497// CHECK13-NEXT: store i32 0, ptr [[I18]], align 43498// CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 43499// CHECK13-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]]3500// CHECK13-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]]3501// CHECK13: simd.if.then20:3502// CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB16]], align 43503// CHECK13-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV21]], align 43504// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]3505// CHECK13: omp.inner.for.cond23:3506// CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]3507// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB17]], align 4, !llvm.access.group [[ACC_GRP6]]3508// CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]3509// CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]3510// CHECK13: omp.inner.for.body25:3511// CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]]3512// CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 13513// CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]3514// CHECK13-NEXT: store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP6]]3515// CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP6]]3516// CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i643517// CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM28]]3518// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX29]], align 4, !llvm.access.group [[ACC_GRP6]]3519// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]3520// CHECK13: omp.body.continue30:3521// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]3522// CHECK13: omp.inner.for.inc31:3523// CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]]3524// CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 13525// CHECK13-NEXT: store i32 [[ADD32]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]]3526// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]]3527// CHECK13: omp.inner.for.end33:3528// CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 43529// CHECK13-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 03530// CHECK13-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 13531// CHECK13-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 13532// CHECK13-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]]3533// CHECK13-NEXT: store i32 [[ADD37]], ptr [[I22]], align 43534// CHECK13-NEXT: br label [[SIMD_IF_END38]]3535// CHECK13: simd.if.end38:3536// CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[N]], align 43537// CHECK13-NEXT: store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_39]], align 43538// CHECK13-NEXT: [[TMP26:%.*]] = load i32, ptr [[N]], align 43539// CHECK13-NEXT: store i32 [[TMP26]], ptr [[DOTCAPTURE_EXPR_41]], align 43540// CHECK13-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 43541// CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 03542// CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 13543// CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 13544// CHECK13-NEXT: store i32 [[SUB45]], ptr [[DOTCAPTURE_EXPR_42]], align 43545// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB46]], align 43546// CHECK13-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_42]], align 43547// CHECK13-NEXT: store i32 [[TMP28]], ptr [[DOTOMP_UB47]], align 43548// CHECK13-NEXT: store i32 0, ptr [[I48]], align 43549// CHECK13-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 43550// CHECK13-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]]3551// CHECK13-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]]3552// CHECK13: simd.if.then50:3553// CHECK13-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_LB46]], align 43554// CHECK13-NEXT: store i32 [[TMP30]], ptr [[DOTOMP_IV51]], align 43555// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]]3556// CHECK13: omp.inner.for.cond53:3557// CHECK13-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]3558// CHECK13-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_UB47]], align 4, !llvm.access.group [[ACC_GRP9]]3559// CHECK13-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]]3560// CHECK13-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]]3561// CHECK13: omp.inner.for.body55:3562// CHECK13-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]]3563// CHECK13-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 13564// CHECK13-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]]3565// CHECK13-NEXT: store i32 [[ADD57]], ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP9]]3566// CHECK13-NEXT: [[TMP34:%.*]] = load i32, ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP9]]3567// CHECK13-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i643568// CHECK13-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM58]]3569// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX59]], align 4, !llvm.access.group [[ACC_GRP9]]3570// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]]3571// CHECK13: omp.body.continue60:3572// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]]3573// CHECK13: omp.inner.for.inc61:3574// CHECK13-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]]3575// CHECK13-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 13576// CHECK13-NEXT: store i32 [[ADD62]], ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]]3577// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]]3578// CHECK13: omp.inner.for.end63:3579// CHECK13-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 43580// CHECK13-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 03581// CHECK13-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 13582// CHECK13-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 13583// CHECK13-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]]3584// CHECK13-NEXT: store i32 [[ADD67]], ptr [[I52]], align 43585// CHECK13-NEXT: br label [[SIMD_IF_END68]]3586// CHECK13: simd.if.end68:3587// CHECK13-NEXT: [[TMP37:%.*]] = load i32, ptr [[ARGC_ADDR]], align 43588// CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP37]])3589// CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 43590// CHECK13-NEXT: [[TMP38:%.*]] = load ptr, ptr [[SAVED_STACK]], align 83591// CHECK13-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP38]])3592// CHECK13-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 43593// CHECK13-NEXT: ret i32 [[TMP39]]3594//3595//3596// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_3597// CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {3598// CHECK13-NEXT: entry:3599// CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 43600// CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 43601// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 43602// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43603// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43604// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43605// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 43606// CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 43607// CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 43608// CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 43609// CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 43610// CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 43611// CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 43612// CHECK13-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 43613// CHECK13-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 43614// CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 43615// CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 43616// CHECK13-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43617// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43618// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 43619// CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43620// CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 43621// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3622// CHECK13: omp.inner.for.cond:3623// CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]3624// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]3625// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]3626// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3627// CHECK13: omp.inner.for.body:3628// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]3629// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 13630// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3631// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]3632// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]3633// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i643634// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]3635// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]]3636// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3637// CHECK13: omp.body.continue:3638// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3639// CHECK13: omp.inner.for.inc:3640// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]3641// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 13642// CHECK13-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]3643// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]3644// CHECK13: omp.inner.for.end:3645// CHECK13-NEXT: store i32 10, ptr [[I]], align 43646// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 43647// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB4]], align 43648// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 43649// CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV5]], align 43650// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]3651// CHECK13: omp.inner.for.cond7:3652// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]3653// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP15]]3654// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3655// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]]3656// CHECK13: omp.inner.for.body9:3657// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]]3658// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 13659// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]3660// CHECK13-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP15]]3661// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP15]]3662// CHECK13-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i643663// CHECK13-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM12]]3664// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX13]], align 4, !llvm.access.group [[ACC_GRP15]]3665// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]3666// CHECK13: omp.body.continue14:3667// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]3668// CHECK13: omp.inner.for.inc15:3669// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]]3670// CHECK13-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 13671// CHECK13-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]]3672// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]]3673// CHECK13: omp.inner.for.end17:3674// CHECK13-NEXT: store i32 10, ptr [[I6]], align 43675// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB19]], align 43676// CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB20]], align 43677// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB19]], align 43678// CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV21]], align 43679// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]3680// CHECK13: omp.inner.for.cond23:3681// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]3682// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB20]], align 4, !llvm.access.group [[ACC_GRP18]]3683// CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]3684// CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]3685// CHECK13: omp.inner.for.body25:3686// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]]3687// CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP15]], 13688// CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]3689// CHECK13-NEXT: store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP18]]3690// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP18]]3691// CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP16]] to i643692// CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM28]]3693// CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX29]], align 4, !llvm.access.group [[ACC_GRP18]]3694// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]3695// CHECK13: omp.body.continue30:3696// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]3697// CHECK13: omp.inner.for.inc31:3698// CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]]3699// CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP17]], 13700// CHECK13-NEXT: store i32 [[ADD32]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]]3701// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]]3702// CHECK13: omp.inner.for.end33:3703// CHECK13-NEXT: store i32 10, ptr [[I22]], align 43704// CHECK13-NEXT: ret i32 03705//3706//3707// CHECK15-LABEL: define {{[^@]+}}@main3708// CHECK15-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {3709// CHECK15-NEXT: entry:3710// CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 43711// CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 43712// CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 43713// CHECK15-NEXT: [[N:%.*]] = alloca i32, align 43714// CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 43715// CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 43716// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 43717// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 43718// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 43719// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43720// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43721// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 43722// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43723// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 43724// CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 43725// CHECK15-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 43726// CHECK15-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 43727// CHECK15-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 43728// CHECK15-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 43729// CHECK15-NEXT: [[I18:%.*]] = alloca i32, align 43730// CHECK15-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 43731// CHECK15-NEXT: [[I22:%.*]] = alloca i32, align 43732// CHECK15-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 43733// CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 43734// CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 43735// CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 43736// CHECK15-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 43737// CHECK15-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 43738// CHECK15-NEXT: [[I47:%.*]] = alloca i32, align 43739// CHECK15-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 43740// CHECK15-NEXT: [[I51:%.*]] = alloca i32, align 43741// CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 43742// CHECK15-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43743// CHECK15-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 43744// CHECK15-NEXT: store i32 100, ptr [[N]], align 43745// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 43746// CHECK15-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()3747// CHECK15-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 43748// CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 43749// CHECK15-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 43750// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 43751// CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 43752// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43753// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 03754// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 13755// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 13756// CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 43757// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43758// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43759// CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 43760// CHECK15-NEXT: store i32 0, ptr [[I]], align 43761// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43762// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]3763// CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]3764// CHECK15: simd.if.then:3765// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43766// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43767// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3768// CHECK15: omp.inner.for.cond:3769// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]3770// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]3771// CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3772// CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3773// CHECK15: omp.inner.for.body:3774// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]3775// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 13776// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3777// CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]]3778// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]]3779// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP10]]3780// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]3781// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3782// CHECK15: omp.body.continue:3783// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3784// CHECK15: omp.inner.for.inc:3785// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]3786// CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 13787// CHECK15-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]3788// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]3789// CHECK15: omp.inner.for.end:3790// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43791// CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 03792// CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 13793// CHECK15-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 13794// CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]3795// CHECK15-NEXT: store i32 [[ADD9]], ptr [[I3]], align 43796// CHECK15-NEXT: br label [[SIMD_IF_END]]3797// CHECK15: simd.if.end:3798// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[N]], align 43799// CHECK15-NEXT: store i32 [[TMP13]], ptr [[DOTCAPTURE_EXPR_11]], align 43800// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 43801// CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 03802// CHECK15-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 13803// CHECK15-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 13804// CHECK15-NEXT: store i32 [[SUB15]], ptr [[DOTCAPTURE_EXPR_12]], align 43805// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB16]], align 43806// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 43807// CHECK15-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_UB17]], align 43808// CHECK15-NEXT: store i32 0, ptr [[I18]], align 43809// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 43810// CHECK15-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]]3811// CHECK15-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]]3812// CHECK15: simd.if.then20:3813// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB16]], align 43814// CHECK15-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV21]], align 43815// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]3816// CHECK15: omp.inner.for.cond23:3817// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]3818// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB17]], align 4, !llvm.access.group [[ACC_GRP7]]3819// CHECK15-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]3820// CHECK15-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]]3821// CHECK15: omp.inner.for.body25:3822// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]]3823// CHECK15-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 13824// CHECK15-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]3825// CHECK15-NEXT: store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP7]]3826// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP7]]3827// CHECK15-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP21]]3828// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX28]], align 4, !llvm.access.group [[ACC_GRP7]]3829// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]]3830// CHECK15: omp.body.continue29:3831// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]]3832// CHECK15: omp.inner.for.inc30:3833// CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]]3834// CHECK15-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 13835// CHECK15-NEXT: store i32 [[ADD31]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]]3836// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]]3837// CHECK15: omp.inner.for.end32:3838// CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 43839// CHECK15-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 03840// CHECK15-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 13841// CHECK15-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 13842// CHECK15-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]]3843// CHECK15-NEXT: store i32 [[ADD36]], ptr [[I22]], align 43844// CHECK15-NEXT: br label [[SIMD_IF_END37]]3845// CHECK15: simd.if.end37:3846// CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[N]], align 43847// CHECK15-NEXT: store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_38]], align 43848// CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[N]], align 43849// CHECK15-NEXT: store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_40]], align 43850// CHECK15-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 43851// CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 03852// CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 13853// CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 13854// CHECK15-NEXT: store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 43855// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB45]], align 43856// CHECK15-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 43857// CHECK15-NEXT: store i32 [[TMP27]], ptr [[DOTOMP_UB46]], align 43858// CHECK15-NEXT: store i32 0, ptr [[I47]], align 43859// CHECK15-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 43860// CHECK15-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]]3861// CHECK15-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]]3862// CHECK15: simd.if.then49:3863// CHECK15-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_LB45]], align 43864// CHECK15-NEXT: store i32 [[TMP29]], ptr [[DOTOMP_IV50]], align 43865// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]]3866// CHECK15: omp.inner.for.cond52:3867// CHECK15-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]3868// CHECK15-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_UB46]], align 4, !llvm.access.group [[ACC_GRP10]]3869// CHECK15-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]]3870// CHECK15-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]]3871// CHECK15: omp.inner.for.body54:3872// CHECK15-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]]3873// CHECK15-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 13874// CHECK15-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]]3875// CHECK15-NEXT: store i32 [[ADD56]], ptr [[I51]], align 4, !llvm.access.group [[ACC_GRP10]]3876// CHECK15-NEXT: [[TMP33:%.*]] = load i32, ptr [[I51]], align 4, !llvm.access.group [[ACC_GRP10]]3877// CHECK15-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP33]]3878// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX57]], align 4, !llvm.access.group [[ACC_GRP10]]3879// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]]3880// CHECK15: omp.body.continue58:3881// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]]3882// CHECK15: omp.inner.for.inc59:3883// CHECK15-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]]3884// CHECK15-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 13885// CHECK15-NEXT: store i32 [[ADD60]], ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]]3886// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]]3887// CHECK15: omp.inner.for.end61:3888// CHECK15-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 43889// CHECK15-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 03890// CHECK15-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 13891// CHECK15-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 13892// CHECK15-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]]3893// CHECK15-NEXT: store i32 [[ADD65]], ptr [[I51]], align 43894// CHECK15-NEXT: br label [[SIMD_IF_END66]]3895// CHECK15: simd.if.end66:3896// CHECK15-NEXT: [[TMP36:%.*]] = load i32, ptr [[ARGC_ADDR]], align 43897// CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP36]])3898// CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 43899// CHECK15-NEXT: [[TMP37:%.*]] = load ptr, ptr [[SAVED_STACK]], align 43900// CHECK15-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP37]])3901// CHECK15-NEXT: [[TMP38:%.*]] = load i32, ptr [[RETVAL]], align 43902// CHECK15-NEXT: ret i32 [[TMP38]]3903//3904//3905// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_3906// CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {3907// CHECK15-NEXT: entry:3908// CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 43909// CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 43910// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 43911// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43912// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43913// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43914// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 43915// CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 43916// CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 43917// CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 43918// CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 43919// CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 43920// CHECK15-NEXT: [[_TMP17:%.*]] = alloca i32, align 43921// CHECK15-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 43922// CHECK15-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 43923// CHECK15-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 43924// CHECK15-NEXT: [[I21:%.*]] = alloca i32, align 43925// CHECK15-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43926// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43927// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 43928// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43929// CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 43930// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3931// CHECK15: omp.inner.for.cond:3932// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]3933// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]3934// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]3935// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3936// CHECK15: omp.inner.for.body:3937// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]3938// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 13939// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3940// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]3941// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]3942// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP4]]3943// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]3944// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3945// CHECK15: omp.body.continue:3946// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3947// CHECK15: omp.inner.for.inc:3948// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]3949// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 13950// CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]3951// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]3952// CHECK15: omp.inner.for.end:3953// CHECK15-NEXT: store i32 10, ptr [[I]], align 43954// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 43955// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB4]], align 43956// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 43957// CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV5]], align 43958// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]3959// CHECK15: omp.inner.for.cond7:3960// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]3961// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP16]]3962// CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3963// CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]3964// CHECK15: omp.inner.for.body9:3965// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]]3966// CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 13967// CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]3968// CHECK15-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP16]]3969// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP16]]3970// CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP10]]3971// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX12]], align 4, !llvm.access.group [[ACC_GRP16]]3972// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]3973// CHECK15: omp.body.continue13:3974// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]3975// CHECK15: omp.inner.for.inc14:3976// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]]3977// CHECK15-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 13978// CHECK15-NEXT: store i32 [[ADD15]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]]3979// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]3980// CHECK15: omp.inner.for.end16:3981// CHECK15-NEXT: store i32 10, ptr [[I6]], align 43982// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB18]], align 43983// CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB19]], align 43984// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB18]], align 43985// CHECK15-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV20]], align 43986// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]3987// CHECK15: omp.inner.for.cond22:3988// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]3989// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB19]], align 4, !llvm.access.group [[ACC_GRP19]]3990// CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]3991// CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]]3992// CHECK15: omp.inner.for.body24:3993// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]]3994// CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 13995// CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]3996// CHECK15-NEXT: store i32 [[ADD26]], ptr [[I21]], align 4, !llvm.access.group [[ACC_GRP19]]3997// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[I21]], align 4, !llvm.access.group [[ACC_GRP19]]3998// CHECK15-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP16]]3999// CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX27]], align 4, !llvm.access.group [[ACC_GRP19]]4000// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]]4001// CHECK15: omp.body.continue28:4002// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]]4003// CHECK15: omp.inner.for.inc29:4004// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]]4005// CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP17]], 14006// CHECK15-NEXT: store i32 [[ADD30]], ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]]4007// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]]4008// CHECK15: omp.inner.for.end31:4009// CHECK15-NEXT: store i32 10, ptr [[I21]], align 44010// CHECK15-NEXT: ret i32 04011//4012