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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping4// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping7// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK510// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping11// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK512// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK713// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping14// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK715 16// RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping18// RUN: %clang_cc1  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping| FileCheck %s --check-prefix=CHECK919// RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1120// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping21// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1122 23// RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1324// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping25// RUN: %clang_cc1  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1326// RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1527// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping28// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1529// expected-no-diagnostics30#ifndef HEADER31#define HEADER32 33template <class T>34struct S {35  T f;36  S(T a) : f(a) {}37  S() : f() {}38  operator T() { return T(); }39  ~S() {}40};41 42template <typename T>43T tmain() {44  S<T> test;45  T t_var = T();46  T vec[] = {1, 2};47  S<T> s_arr[] = {1, 2};48  S<T> &var = test;49  #pragma omp target50  #pragma omp teams distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var)51  for (int i = 0; i < 2; ++i) {52    vec[i] = t_var;53    s_arr[i] = var;54  }55  return T();56}57 58int main() {59  static int svar;60  volatile double g;61  volatile double &g1 = g;62 63  #ifdef LAMBDA64  [&]() {65    static float sfvar;66 67    #pragma omp target68    #pragma omp teams distribute simd lastprivate(g, g1, svar, sfvar)69    for (int i = 0; i < 2; ++i) {70      // loop variables71 72      // init private variables73      g = 1;74      g1 = 1;75      svar = 3;76      sfvar = 4.0;77 78 79      [&]() {80        g = 2;81        g1 = 2;82        svar = 4;83        sfvar = 8.0;84 85      }();86    }87  }();88  return 0;89  #else90  S<float> test;91  int t_var = 0;92  int vec[] = {1, 2};93  S<float> s_arr[] = {1, 2};94  S<float> &var = test;95 96  #pragma omp target97  #pragma omp teams distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)98  for (int i = 0; i < 2; ++i) {99    vec[i] = t_var;100    s_arr[i] = var;101  }102  int i;103 104  return tmain<int>();105  #endif106}107 108 109// skip loop variables110 111// copy from parameters to local address variables112 113// load content of local address variables114// the distribute loop115// assignment: vec[i] = t_var;116 117// assignment: s_arr[i] = var;118 119// lastprivates120 121 122// template tmain123 124 125 126// skip alloca of global_tid and bound_tid127// skip loop variables128 129// skip init of bound and global tid130// copy from parameters to local address variables131 132// load content of local address variables133// assignment: vec[i] = t_var;134 135// assignment: s_arr[i] = var;136 137// lastprivates138 139#endif140// CHECK1-LABEL: define {{[^@]+}}@main141// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {142// CHECK1-NEXT:  entry:143// CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4144// CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8145// CHECK1-NEXT:    [[G1:%.*]] = alloca ptr, align 8146// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8147// CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4148// CHECK1-NEXT:    store ptr [[G]], ptr [[G1]], align 8149// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0150// CHECK1-NEXT:    store ptr [[G]], ptr [[TMP0]], align 8151// CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1152// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8, !nonnull [[META5:![0-9]+]], !align [[META6:![0-9]+]]153// CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 8154// CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])155// CHECK1-NEXT:    ret i32 0156//157//158// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67159// CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {160// CHECK1-NEXT:  entry:161// CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8162// CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8163// CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8164// CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8165// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8166// CHECK1-NEXT:    store i64 [[G]], ptr [[G_ADDR]], align 8167// CHECK1-NEXT:    store i64 [[G1]], ptr [[G1_ADDR]], align 8168// CHECK1-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8169// CHECK1-NEXT:    store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8170// CHECK1-NEXT:    store ptr [[G1_ADDR]], ptr [[TMP]], align 8171// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META5]], !align [[META6]]172// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined, ptr [[G_ADDR]], ptr [[TMP0]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])173// CHECK1-NEXT:    ret void174//175//176// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined177// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {178// CHECK1-NEXT:  entry:179// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8180// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8181// CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8182// CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 8183// CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8184// CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 8185// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8186// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4187// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4188// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4189// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4190// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4191// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4192// CHECK1-NEXT:    [[G2:%.*]] = alloca double, align 8193// CHECK1-NEXT:    [[G13:%.*]] = alloca double, align 8194// CHECK1-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8195// CHECK1-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4196// CHECK1-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4197// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4198// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8199// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8200// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8201// CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8202// CHECK1-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 8203// CHECK1-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8204// CHECK1-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8205// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]206// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]207// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8, !nonnull [[META5]], !align [[META7:![0-9]+]]208// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8, !nonnull [[META5]], !align [[META7]]209// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8210// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4211// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4212// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4213// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4214// CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META5]], !align [[META6]]215// CHECK1-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 8216// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8217// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4218// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)219// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4220// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1221// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]222// CHECK1:       cond.true:223// CHECK1-NEXT:    br label [[COND_END:%.*]]224// CHECK1:       cond.false:225// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4226// CHECK1-NEXT:    br label [[COND_END]]227// CHECK1:       cond.end:228// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]229// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4230// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4231// CHECK1-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4232// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]233// CHECK1:       omp.inner.for.cond:234// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]235// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]236// CHECK1-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]237// CHECK1-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]238// CHECK1:       omp.inner.for.body:239// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]240// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1241// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]242// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]243// CHECK1-NEXT:    store double 1.000000e+00, ptr [[G2]], align 8, !llvm.access.group [[ACC_GRP8]]244// CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[_TMP4]], align 8, !nonnull [[META5]], !align [[META6]], !llvm.access.group [[ACC_GRP8]]245// CHECK1-NEXT:    store volatile double 1.000000e+00, ptr [[TMP13]], align 8, !llvm.access.group [[ACC_GRP8]]246// CHECK1-NEXT:    store i32 3, ptr [[SVAR5]], align 4, !llvm.access.group [[ACC_GRP8]]247// CHECK1-NEXT:    store float 4.000000e+00, ptr [[SFVAR6]], align 4, !llvm.access.group [[ACC_GRP8]]248// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0249// CHECK1-NEXT:    store ptr [[G2]], ptr [[TMP14]], align 8, !llvm.access.group [[ACC_GRP8]]250// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1251// CHECK1-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP4]], align 8, !nonnull [[META5]], !align [[META6]], !llvm.access.group [[ACC_GRP8]]252// CHECK1-NEXT:    store ptr [[TMP16]], ptr [[TMP15]], align 8, !llvm.access.group [[ACC_GRP8]]253// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2254// CHECK1-NEXT:    store ptr [[SVAR5]], ptr [[TMP17]], align 8, !llvm.access.group [[ACC_GRP8]]255// CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3256// CHECK1-NEXT:    store ptr [[SFVAR6]], ptr [[TMP18]], align 8, !llvm.access.group [[ACC_GRP8]]257// CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP8]]258// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]259// CHECK1:       omp.body.continue:260// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]261// CHECK1:       omp.inner.for.inc:262// CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]263// CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1264// CHECK1-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]265// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]266// CHECK1:       omp.inner.for.end:267// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]268// CHECK1:       omp.loop.exit:269// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]])270// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4271// CHECK1-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0272// CHECK1-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]273// CHECK1:       .omp.final.then:274// CHECK1-NEXT:    store i32 2, ptr [[I]], align 4275// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]276// CHECK1:       .omp.final.done:277// CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4278// CHECK1-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0279// CHECK1-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]280// CHECK1:       .omp.lastprivate.then:281// CHECK1-NEXT:    [[TMP24:%.*]] = load double, ptr [[G2]], align 8282// CHECK1-NEXT:    store volatile double [[TMP24]], ptr [[TMP0]], align 8283// CHECK1-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP4]], align 8284// CHECK1-NEXT:    [[TMP26:%.*]] = load double, ptr [[TMP25]], align 8285// CHECK1-NEXT:    store volatile double [[TMP26]], ptr [[TMP4]], align 8286// CHECK1-NEXT:    [[TMP27:%.*]] = load i32, ptr [[SVAR5]], align 4287// CHECK1-NEXT:    store i32 [[TMP27]], ptr [[TMP2]], align 4288// CHECK1-NEXT:    [[TMP28:%.*]] = load float, ptr [[SFVAR6]], align 4289// CHECK1-NEXT:    store float [[TMP28]], ptr [[TMP3]], align 4290// CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]291// CHECK1:       .omp.lastprivate.done:292// CHECK1-NEXT:    ret void293//294//295// CHECK3-LABEL: define {{[^@]+}}@main296// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {297// CHECK3-NEXT:  entry:298// CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4299// CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8300// CHECK3-NEXT:    [[G1:%.*]] = alloca ptr, align 4301// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4302// CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4303// CHECK3-NEXT:    store ptr [[G]], ptr [[G1]], align 4304// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0305// CHECK3-NEXT:    store ptr [[G]], ptr [[TMP0]], align 4306// CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1307// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4, !nonnull [[META6:![0-9]+]], !align [[META7:![0-9]+]]308// CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 4309// CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])310// CHECK3-NEXT:    ret i32 0311//312//313// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67314// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {315// CHECK3-NEXT:  entry:316// CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4317// CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4318// CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4319// CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4320// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4321// CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8322// CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8323// CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 4324// CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4325// CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4326// CHECK3-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4327// CHECK3-NEXT:    store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4328// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]329// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]330// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4331// CHECK3-NEXT:    [[TMP2:%.*]] = load double, ptr [[TMP0]], align 8332// CHECK3-NEXT:    store double [[TMP2]], ptr [[G2]], align 8333// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META6]], !align [[META7]]334// CHECK3-NEXT:    [[TMP4:%.*]] = load double, ptr [[TMP3]], align 4335// CHECK3-NEXT:    store double [[TMP4]], ptr [[G13]], align 8336// CHECK3-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 4337// CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP4]], align 4, !nonnull [[META6]], !align [[META7]]338// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined, ptr [[G2]], ptr [[TMP5]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])339// CHECK3-NEXT:    ret void340//341//342// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined343// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {344// CHECK3-NEXT:  entry:345// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4346// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4347// CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4348// CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4349// CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4350// CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 4351// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4352// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4353// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4354// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4355// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4356// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4357// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4358// CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8359// CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8360// CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 4361// CHECK3-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4362// CHECK3-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4363// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4364// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4365// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4366// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4367// CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4368// CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4369// CHECK3-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4370// CHECK3-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4371// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]372// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]373// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]374// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]375// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4376// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4377// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4378// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4379// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4380// CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META6]], !align [[META7]]381// CHECK3-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 4382// CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4383// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4384// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)385// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4386// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1387// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]388// CHECK3:       cond.true:389// CHECK3-NEXT:    br label [[COND_END:%.*]]390// CHECK3:       cond.false:391// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4392// CHECK3-NEXT:    br label [[COND_END]]393// CHECK3:       cond.end:394// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]395// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4396// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4397// CHECK3-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4398// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]399// CHECK3:       omp.inner.for.cond:400// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]401// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]402// CHECK3-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]403// CHECK3-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]404// CHECK3:       omp.inner.for.body:405// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]406// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1407// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]408// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]409// CHECK3-NEXT:    store double 1.000000e+00, ptr [[G2]], align 8, !llvm.access.group [[ACC_GRP8]]410// CHECK3-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[_TMP4]], align 4, !nonnull [[META6]], !align [[META7]], !llvm.access.group [[ACC_GRP8]]411// CHECK3-NEXT:    store volatile double 1.000000e+00, ptr [[TMP13]], align 4, !llvm.access.group [[ACC_GRP8]]412// CHECK3-NEXT:    store i32 3, ptr [[SVAR5]], align 4, !llvm.access.group [[ACC_GRP8]]413// CHECK3-NEXT:    store float 4.000000e+00, ptr [[SFVAR6]], align 4, !llvm.access.group [[ACC_GRP8]]414// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0415// CHECK3-NEXT:    store ptr [[G2]], ptr [[TMP14]], align 4, !llvm.access.group [[ACC_GRP8]]416// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1417// CHECK3-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP4]], align 4, !nonnull [[META6]], !align [[META7]], !llvm.access.group [[ACC_GRP8]]418// CHECK3-NEXT:    store ptr [[TMP16]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP8]]419// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2420// CHECK3-NEXT:    store ptr [[SVAR5]], ptr [[TMP17]], align 4, !llvm.access.group [[ACC_GRP8]]421// CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3422// CHECK3-NEXT:    store ptr [[SFVAR6]], ptr [[TMP18]], align 4, !llvm.access.group [[ACC_GRP8]]423// CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP8]]424// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]425// CHECK3:       omp.body.continue:426// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]427// CHECK3:       omp.inner.for.inc:428// CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]429// CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1430// CHECK3-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]431// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]432// CHECK3:       omp.inner.for.end:433// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]434// CHECK3:       omp.loop.exit:435// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]])436// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4437// CHECK3-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0438// CHECK3-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]439// CHECK3:       .omp.final.then:440// CHECK3-NEXT:    store i32 2, ptr [[I]], align 4441// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]442// CHECK3:       .omp.final.done:443// CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4444// CHECK3-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0445// CHECK3-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]446// CHECK3:       .omp.lastprivate.then:447// CHECK3-NEXT:    [[TMP24:%.*]] = load double, ptr [[G2]], align 8448// CHECK3-NEXT:    store volatile double [[TMP24]], ptr [[TMP0]], align 8449// CHECK3-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP4]], align 4450// CHECK3-NEXT:    [[TMP26:%.*]] = load double, ptr [[TMP25]], align 4451// CHECK3-NEXT:    store volatile double [[TMP26]], ptr [[TMP4]], align 4452// CHECK3-NEXT:    [[TMP27:%.*]] = load i32, ptr [[SVAR5]], align 4453// CHECK3-NEXT:    store i32 [[TMP27]], ptr [[TMP2]], align 4454// CHECK3-NEXT:    [[TMP28:%.*]] = load float, ptr [[SFVAR6]], align 4455// CHECK3-NEXT:    store float [[TMP28]], ptr [[TMP3]], align 4456// CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]457// CHECK3:       .omp.lastprivate.done:458// CHECK3-NEXT:    ret void459//460//461// CHECK5-LABEL: define {{[^@]+}}@main462// CHECK5-SAME: () #[[ATTR0:[0-9]+]] {463// CHECK5-NEXT:  entry:464// CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4465// CHECK5-NEXT:    [[G:%.*]] = alloca double, align 8466// CHECK5-NEXT:    [[G1:%.*]] = alloca ptr, align 8467// CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8468// CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 4469// CHECK5-NEXT:    store ptr [[G]], ptr [[G1]], align 8470// CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0471// CHECK5-NEXT:    store ptr [[G]], ptr [[TMP0]], align 8472// CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1473// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]474// CHECK5-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 8475// CHECK5-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])476// CHECK5-NEXT:    ret i32 0477//478//479// CHECK7-LABEL: define {{[^@]+}}@main480// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {481// CHECK7-NEXT:  entry:482// CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4483// CHECK7-NEXT:    [[G:%.*]] = alloca double, align 8484// CHECK7-NEXT:    [[G1:%.*]] = alloca ptr, align 4485// CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4486// CHECK7-NEXT:    store i32 0, ptr [[RETVAL]], align 4487// CHECK7-NEXT:    store ptr [[G]], ptr [[G1]], align 4488// CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0489// CHECK7-NEXT:    store ptr [[G]], ptr [[TMP0]], align 4490// CHECK7-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1491// CHECK7-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]492// CHECK7-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 4493// CHECK7-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])494// CHECK7-NEXT:    ret i32 0495//496//497// CHECK9-LABEL: define {{[^@]+}}@main498// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {499// CHECK9-NEXT:  entry:500// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4501// CHECK9-NEXT:    [[G:%.*]] = alloca double, align 8502// CHECK9-NEXT:    [[G1:%.*]] = alloca ptr, align 8503// CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4504// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4505// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4506// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4507// CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8508// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8509// CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8510// CHECK9-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8511// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8512// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8513// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8514// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4515// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8516// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4517// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4518// CHECK9-NEXT:    store ptr [[G]], ptr [[G1]], align 8519// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])520// CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4521// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)522// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)523// CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1524// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)525// CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8526// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META7:![0-9]+]], !align [[META8:![0-9]+]]527// CHECK9-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8528// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4529// CHECK9-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4530// CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8531// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]532// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4533// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4534// CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8535// CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]536// CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]537// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0538// CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP8]], align 8539// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0540// CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP9]], align 8541// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0542// CHECK9-NEXT:    store ptr null, ptr [[TMP10]], align 8543// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1544// CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP11]], align 8545// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1546// CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP12]], align 8547// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1548// CHECK9-NEXT:    store ptr null, ptr [[TMP13]], align 8549// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2550// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP14]], align 8551// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2552// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP15]], align 8553// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2554// CHECK9-NEXT:    store ptr null, ptr [[TMP16]], align 8555// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3556// CHECK9-NEXT:    store ptr [[TMP6]], ptr [[TMP17]], align 8557// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3558// CHECK9-NEXT:    store ptr [[TMP7]], ptr [[TMP18]], align 8559// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3560// CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8561// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4562// CHECK9-NEXT:    store i64 [[TMP5]], ptr [[TMP20]], align 8563// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4564// CHECK9-NEXT:    store i64 [[TMP5]], ptr [[TMP21]], align 8565// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4566// CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8567// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0568// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0569// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0570// CHECK9-NEXT:    store i32 3, ptr [[TMP25]], align 4571// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1572// CHECK9-NEXT:    store i32 5, ptr [[TMP26]], align 4573// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2574// CHECK9-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8575// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3576// CHECK9-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8577// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4578// CHECK9-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 8579// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5580// CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 8581// CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6582// CHECK9-NEXT:    store ptr null, ptr [[TMP31]], align 8583// CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7584// CHECK9-NEXT:    store ptr null, ptr [[TMP32]], align 8585// CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8586// CHECK9-NEXT:    store i64 2, ptr [[TMP33]], align 8587// CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9588// CHECK9-NEXT:    store i64 0, ptr [[TMP34]], align 8589// CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10590// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4591// CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11592// CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4593// CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12594// CHECK9-NEXT:    store i32 0, ptr [[TMP37]], align 4595// CHECK9-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, ptr [[KERNEL_ARGS]])596// CHECK9-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0597// CHECK9-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]598// CHECK9:       omp_offload.failed:599// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]]600// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]601// CHECK9:       omp_offload.cont:602// CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()603// CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4604// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0605// CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2606// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]607// CHECK9:       arraydestroy.body:608// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]609// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1610// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]611// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]612// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]613// CHECK9:       arraydestroy.done2:614// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]615// CHECK9-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4616// CHECK9-NEXT:    ret i32 [[TMP41]]617//618//619// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev620// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {621// CHECK9-NEXT:  entry:622// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8623// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8624// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8625// CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])626// CHECK9-NEXT:    ret void627//628//629// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef630// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {631// CHECK9-NEXT:  entry:632// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8633// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4634// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8635// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4636// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8637// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4638// CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])639// CHECK9-NEXT:    ret void640//641//642// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96643// CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {644// CHECK9-NEXT:  entry:645// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8646// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8647// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8648// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8649// CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8650// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8651// CHECK9-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8652// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8653// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8654// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8655// CHECK9-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8656// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]657// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]658// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]659// CHECK9-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8660// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]661// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined, ptr [[TMP0]], ptr [[T_VAR_ADDR]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])662// CHECK9-NEXT:    ret void663//664//665// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined666// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {667// CHECK9-NEXT:  entry:668// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8669// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8670// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8671// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8672// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8673// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8674// CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8675// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8676// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4677// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4678// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4679// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4680// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4681// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4682// CHECK9-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4683// CHECK9-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4684// CHECK9-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4685// CHECK9-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4686// CHECK9-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8687// CHECK9-NEXT:    [[SVAR7:%.*]] = alloca i32, align 4688// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4689// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8690// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8691// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8692// CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8693// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8694// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8695// CHECK9-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8696// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]697// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]698// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]699// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]700// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]701// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8702// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4703// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4704// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4705// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4706// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0707// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2708// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]709// CHECK9:       arrayctor.loop:710// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]711// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])712// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1713// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]714// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]715// CHECK9:       arrayctor.cont:716// CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]717// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])718// CHECK9-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 8719// CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8720// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4721// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)722// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4723// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1724// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]725// CHECK9:       cond.true:726// CHECK9-NEXT:    br label [[COND_END:%.*]]727// CHECK9:       cond.false:728// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4729// CHECK9-NEXT:    br label [[COND_END]]730// CHECK9:       cond.end:731// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]732// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4733// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4734// CHECK9-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4735// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]736// CHECK9:       omp.inner.for.cond:737// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]738// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]739// CHECK9-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]740// CHECK9-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]741// CHECK9:       omp.inner.for.cond.cleanup:742// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]743// CHECK9:       omp.inner.for.body:744// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]745// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1746// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]747// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]748// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP9]]749// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]750// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64751// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]752// CHECK9-NEXT:    store i32 [[TMP14]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]753// CHECK9-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META7]], !align [[META8]], !llvm.access.group [[ACC_GRP9]]754// CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]755// CHECK9-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64756// CHECK9-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM9]]757// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP16]], i64 4, i1 false), !llvm.access.group [[ACC_GRP9]]758// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]759// CHECK9:       omp.body.continue:760// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]761// CHECK9:       omp.inner.for.inc:762// CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]763// CHECK9-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP18]], 1764// CHECK9-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]765// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]766// CHECK9:       omp.inner.for.end:767// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]768// CHECK9:       omp.loop.exit:769// CHECK9-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8770// CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4771// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])772// CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4773// CHECK9-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0774// CHECK9-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]775// CHECK9:       .omp.final.then:776// CHECK9-NEXT:    store i32 2, ptr [[I]], align 4777// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]778// CHECK9:       .omp.final.done:779// CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4780// CHECK9-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0781// CHECK9-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]782// CHECK9:       .omp.lastprivate.then:783// CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[T_VAR2]], align 4784// CHECK9-NEXT:    store i32 [[TMP25]], ptr [[TMP1]], align 4785// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false)786// CHECK9-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0787// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2788// CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP26]]789// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]790// CHECK9:       omp.arraycpy.body:791// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]792// CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]793// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)794// CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1795// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1796// CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]]797// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]798// CHECK9:       omp.arraycpy.done13:799// CHECK9-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP6]], align 8800// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP27]], i64 4, i1 false)801// CHECK9-NEXT:    [[TMP28:%.*]] = load i32, ptr [[SVAR7]], align 4802// CHECK9-NEXT:    store i32 [[TMP28]], ptr [[TMP4]], align 4803// CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]804// CHECK9:       .omp.lastprivate.done:805// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]806// CHECK9-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0807// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 2808// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]809// CHECK9:       arraydestroy.body:810// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]811// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1812// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]813// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]814// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]815// CHECK9:       arraydestroy.done15:816// CHECK9-NEXT:    ret void817//818//819// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev820// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {821// CHECK9-NEXT:  entry:822// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8823// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8824// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8825// CHECK9-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]826// CHECK9-NEXT:    ret void827//828//829// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v830// CHECK9-SAME: () #[[ATTR1]] comdat {831// CHECK9-NEXT:  entry:832// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4833// CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4834// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4835// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4836// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4837// CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8838// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8839// CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8840// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8841// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8842// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8843// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4844// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8845// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])846// CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4847// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)848// CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)849// CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1850// CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)851// CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8852// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META7]], !align [[META8]]853// CHECK9-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8854// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4855// CHECK9-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4856// CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8857// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]858// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]859// CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]860// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0861// CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP6]], align 8862// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0863// CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP7]], align 8864// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0865// CHECK9-NEXT:    store ptr null, ptr [[TMP8]], align 8866// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1867// CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP9]], align 8868// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1869// CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP10]], align 8870// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1871// CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 8872// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2873// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP12]], align 8874// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2875// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP13]], align 8876// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2877// CHECK9-NEXT:    store ptr null, ptr [[TMP14]], align 8878// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3879// CHECK9-NEXT:    store ptr [[TMP4]], ptr [[TMP15]], align 8880// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3881// CHECK9-NEXT:    store ptr [[TMP5]], ptr [[TMP16]], align 8882// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3883// CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8884// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0885// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0886// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0887// CHECK9-NEXT:    store i32 3, ptr [[TMP20]], align 4888// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1889// CHECK9-NEXT:    store i32 4, ptr [[TMP21]], align 4890// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2891// CHECK9-NEXT:    store ptr [[TMP18]], ptr [[TMP22]], align 8892// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3893// CHECK9-NEXT:    store ptr [[TMP19]], ptr [[TMP23]], align 8894// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4895// CHECK9-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP24]], align 8896// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5897// CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP25]], align 8898// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6899// CHECK9-NEXT:    store ptr null, ptr [[TMP26]], align 8900// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7901// CHECK9-NEXT:    store ptr null, ptr [[TMP27]], align 8902// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8903// CHECK9-NEXT:    store i64 2, ptr [[TMP28]], align 8904// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9905// CHECK9-NEXT:    store i64 0, ptr [[TMP29]], align 8906// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10907// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4908// CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11909// CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP31]], align 4910// CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12911// CHECK9-NEXT:    store i32 0, ptr [[TMP32]], align 4912// CHECK9-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])913// CHECK9-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0914// CHECK9-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]915// CHECK9:       omp_offload.failed:916// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]917// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]918// CHECK9:       omp_offload.cont:919// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4920// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0921// CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2922// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]923// CHECK9:       arraydestroy.body:924// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]925// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1926// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]927// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]928// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]929// CHECK9:       arraydestroy.done2:930// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]931// CHECK9-NEXT:    [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4932// CHECK9-NEXT:    ret i32 [[TMP36]]933//934//935// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev936// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {937// CHECK9-NEXT:  entry:938// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8939// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8940// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8941// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0942// CHECK9-NEXT:    store float 0.000000e+00, ptr [[F]], align 4943// CHECK9-NEXT:    ret void944//945//946// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef947// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {948// CHECK9-NEXT:  entry:949// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8950// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4951// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8952// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4953// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8954// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0955// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4956// CHECK9-NEXT:    store float [[TMP0]], ptr [[F]], align 4957// CHECK9-NEXT:    ret void958//959//960// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev961// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {962// CHECK9-NEXT:  entry:963// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8964// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8965// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8966// CHECK9-NEXT:    ret void967//968//969// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev970// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {971// CHECK9-NEXT:  entry:972// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8973// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8974// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8975// CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])976// CHECK9-NEXT:    ret void977//978//979// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei980// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {981// CHECK9-NEXT:  entry:982// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8983// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4984// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8985// CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4986// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8987// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4988// CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])989// CHECK9-NEXT:    ret void990//991//992// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49993// CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {994// CHECK9-NEXT:  entry:995// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8996// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8997// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8998// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8999// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 81000// CHECK9-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 81001// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 81002// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 81003// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 81004// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1005// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1006// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1007// CHECK9-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 81008// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1009// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], ptr [[T_VAR_ADDR]], ptr [[TMP1]], ptr [[TMP3]])1010// CHECK9-NEXT:    ret void1011//1012//1013// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1014// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1015// CHECK9-NEXT:  entry:1016// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81017// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81018// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 81019// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 81020// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 81021// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 81022// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 81023// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41024// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41025// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41026// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41027// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41028// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41029// CHECK9-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 41030// CHECK9-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 41031// CHECK9-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 41032// CHECK9-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41033// CHECK9-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 81034// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41035// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81036// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81037// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 81038// CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 81039// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 81040// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 81041// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1042// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1043// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1044// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1045// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 81046// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41047// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41048// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41049// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41050// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01051// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21052// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1053// CHECK9:       arrayctor.loop:1054// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1055// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1056// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 11057// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1058// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1059// CHECK9:       arrayctor.cont:1060// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1061// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])1062// CHECK9-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 81063// CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81064// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 41065// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1066// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41067// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 11068// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1069// CHECK9:       cond.true:1070// CHECK9-NEXT:    br label [[COND_END:%.*]]1071// CHECK9:       cond.false:1072// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41073// CHECK9-NEXT:    br label [[COND_END]]1074// CHECK9:       cond.end:1075// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]1076// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41077// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41078// CHECK9-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 41079// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1080// CHECK9:       omp.inner.for.cond:1081// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]1082// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]1083// CHECK9-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]1084// CHECK9-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1085// CHECK9:       omp.inner.for.cond.cleanup:1086// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1087// CHECK9:       omp.inner.for.body:1088// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1089// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 11090// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1091// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]1092// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP15]]1093// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]1094// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i641095// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]1096// CHECK9-NEXT:    store i32 [[TMP13]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]1097// CHECK9-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META7]], !align [[META8]], !llvm.access.group [[ACC_GRP15]]1098// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]1099// CHECK9-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i641100// CHECK9-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM8]]1101// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP15]], i64 4, i1 false), !llvm.access.group [[ACC_GRP15]]1102// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1103// CHECK9:       omp.body.continue:1104// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1105// CHECK9:       omp.inner.for.inc:1106// CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1107// CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP17]], 11108// CHECK9-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1109// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]1110// CHECK9:       omp.inner.for.end:1111// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1112// CHECK9:       omp.loop.exit:1113// CHECK9-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81114// CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 41115// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])1116// CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41117// CHECK9-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 01118// CHECK9-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1119// CHECK9:       .omp.final.then:1120// CHECK9-NEXT:    store i32 2, ptr [[I]], align 41121// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]1122// CHECK9:       .omp.final.done:1123// CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41124// CHECK9-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 01125// CHECK9-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1126// CHECK9:       .omp.lastprivate.then:1127// CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[T_VAR2]], align 41128// CHECK9-NEXT:    store i32 [[TMP24]], ptr [[TMP1]], align 41129// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false)1130// CHECK9-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 01131// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 21132// CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP25]]1133// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1134// CHECK9:       omp.arraycpy.body:1135// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1136// CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1137// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)1138// CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11139// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11140// CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP25]]1141// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]1142// CHECK9:       omp.arraycpy.done12:1143// CHECK9-NEXT:    [[TMP26:%.*]] = load ptr, ptr [[_TMP6]], align 81144// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP26]], i64 4, i1 false)1145// CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1146// CHECK9:       .omp.lastprivate.done:1147// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]1148// CHECK9-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01149// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 21150// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1151// CHECK9:       arraydestroy.body:1152// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1153// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11154// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1155// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]1156// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]1157// CHECK9:       arraydestroy.done14:1158// CHECK9-NEXT:    ret void1159//1160//1161// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1162// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1163// CHECK9-NEXT:  entry:1164// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81165// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81166// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81167// CHECK9-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1168// CHECK9-NEXT:    ret void1169//1170//1171// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1172// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1173// CHECK9-NEXT:  entry:1174// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81175// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81176// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81177// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01178// CHECK9-NEXT:    store i32 0, ptr [[F]], align 41179// CHECK9-NEXT:    ret void1180//1181//1182// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1183// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1184// CHECK9-NEXT:  entry:1185// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81186// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41187// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81188// CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41189// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81190// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01191// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41192// CHECK9-NEXT:    store i32 [[TMP0]], ptr [[F]], align 41193// CHECK9-NEXT:    ret void1194//1195//1196// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1197// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1198// CHECK9-NEXT:  entry:1199// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81200// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81201// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81202// CHECK9-NEXT:    ret void1203//1204//1205// CHECK11-LABEL: define {{[^@]+}}@main1206// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {1207// CHECK11-NEXT:  entry:1208// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41209// CHECK11-NEXT:    [[G:%.*]] = alloca double, align 81210// CHECK11-NEXT:    [[G1:%.*]] = alloca ptr, align 41211// CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41212// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41213// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41214// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41215// CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 41216// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41217// CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 41218// CHECK11-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 41219// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 41220// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 41221// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 41222// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41223// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81224// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41225// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 41226// CHECK11-NEXT:    store ptr [[G]], ptr [[G1]], align 41227// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1228// CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 41229// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)1230// CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1231// CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 11232// CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1233// CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 41234// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META8:![0-9]+]], !align [[META9:![0-9]+]]1235// CHECK11-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 41236// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41237// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41238// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41239// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1240// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 41241// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 41242// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 41243// CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1244// CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1245// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01246// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP8]], align 41247// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01248// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP9]], align 41249// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01250// CHECK11-NEXT:    store ptr null, ptr [[TMP10]], align 41251// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11252// CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP11]], align 41253// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11254// CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP12]], align 41255// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11256// CHECK11-NEXT:    store ptr null, ptr [[TMP13]], align 41257// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21258// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP14]], align 41259// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21260// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP15]], align 41261// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21262// CHECK11-NEXT:    store ptr null, ptr [[TMP16]], align 41263// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31264// CHECK11-NEXT:    store ptr [[TMP6]], ptr [[TMP17]], align 41265// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31266// CHECK11-NEXT:    store ptr [[TMP7]], ptr [[TMP18]], align 41267// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31268// CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 41269// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 41270// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP20]], align 41271// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 41272// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP21]], align 41273// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 41274// CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 41275// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01276// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01277// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01278// CHECK11-NEXT:    store i32 3, ptr [[TMP25]], align 41279// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11280// CHECK11-NEXT:    store i32 5, ptr [[TMP26]], align 41281// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21282// CHECK11-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 41283// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31284// CHECK11-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 41285// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41286// CHECK11-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 41287// CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51288// CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 41289// CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61290// CHECK11-NEXT:    store ptr null, ptr [[TMP31]], align 41291// CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71292// CHECK11-NEXT:    store ptr null, ptr [[TMP32]], align 41293// CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81294// CHECK11-NEXT:    store i64 2, ptr [[TMP33]], align 81295// CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91296// CHECK11-NEXT:    store i64 0, ptr [[TMP34]], align 81297// CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101298// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 41299// CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111300// CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 41301// CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121302// CHECK11-NEXT:    store i32 0, ptr [[TMP37]], align 41303// CHECK11-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, ptr [[KERNEL_ARGS]])1304// CHECK11-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 01305// CHECK11-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1306// CHECK11:       omp_offload.failed:1307// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]1308// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1309// CHECK11:       omp_offload.cont:1310// CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1311// CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 41312// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01313// CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21314// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1315// CHECK11:       arraydestroy.body:1316// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1317// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11318// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1319// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1320// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1321// CHECK11:       arraydestroy.done2:1322// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1323// CHECK11-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 41324// CHECK11-NEXT:    ret i32 [[TMP41]]1325//1326//1327// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1328// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {1329// CHECK11-NEXT:  entry:1330// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41331// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41332// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41333// CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1334// CHECK11-NEXT:    ret void1335//1336//1337// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1338// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1339// CHECK11-NEXT:  entry:1340// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41341// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41342// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41343// CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41344// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41345// CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41346// CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1347// CHECK11-NEXT:    ret void1348//1349//1350// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l961351// CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {1352// CHECK11-NEXT:  entry:1353// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 41354// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 41355// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 41356// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 41357// CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 41358// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41359// CHECK11-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41360// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 41361// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41362// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 41363// CHECK11-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 41364// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1365// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1366// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1367// CHECK11-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 41368// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1369// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined, ptr [[TMP0]], ptr [[T_VAR_ADDR]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])1370// CHECK11-NEXT:    ret void1371//1372//1373// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined1374// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {1375// CHECK11-NEXT:  entry:1376// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41377// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41378// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 41379// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 41380// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 41381// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 41382// CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 41383// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41384// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41385// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41386// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41387// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41388// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41389// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41390// CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 41391// CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 41392// CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 41393// CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 41394// CHECK11-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 41395// CHECK11-NEXT:    [[SVAR7:%.*]] = alloca i32, align 41396// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41397// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41398// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41399// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 41400// CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 41401// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41402// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 41403// CHECK11-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 41404// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1405// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1406// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1407// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1408// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1409// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 41410// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41411// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41412// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41413// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41414// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 01415// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21416// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1417// CHECK11:       arrayctor.loop:1418// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1419// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1420// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 11421// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1422// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1423// CHECK11:       arrayctor.cont:1424// CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1425// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])1426// CHECK11-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 41427// CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41428// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41429// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1430// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41431// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 11432// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1433// CHECK11:       cond.true:1434// CHECK11-NEXT:    br label [[COND_END:%.*]]1435// CHECK11:       cond.false:1436// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41437// CHECK11-NEXT:    br label [[COND_END]]1438// CHECK11:       cond.end:1439// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]1440// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41441// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41442// CHECK11-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 41443// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1444// CHECK11:       omp.inner.for.cond:1445// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]1446// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]1447// CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]1448// CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1449// CHECK11:       omp.inner.for.cond.cleanup:1450// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1451// CHECK11:       omp.inner.for.body:1452// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1453// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 11454// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1455// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1456// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP10]]1457// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1458// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP15]]1459// CHECK11-NEXT:    store i32 [[TMP14]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]1460// CHECK11-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP6]], align 4, !nonnull [[META8]], !align [[META9]], !llvm.access.group [[ACC_GRP10]]1461// CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1462// CHECK11-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP17]]1463// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP16]], i32 4, i1 false), !llvm.access.group [[ACC_GRP10]]1464// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1465// CHECK11:       omp.body.continue:1466// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1467// CHECK11:       omp.inner.for.inc:1468// CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1469// CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP18]], 11470// CHECK11-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1471// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]1472// CHECK11:       omp.inner.for.end:1473// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1474// CHECK11:       omp.loop.exit:1475// CHECK11-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41476// CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41477// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])1478// CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41479// CHECK11-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01480// CHECK11-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1481// CHECK11:       .omp.final.then:1482// CHECK11-NEXT:    store i32 2, ptr [[I]], align 41483// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]1484// CHECK11:       .omp.final.done:1485// CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41486// CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 01487// CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1488// CHECK11:       .omp.lastprivate.then:1489// CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[T_VAR2]], align 41490// CHECK11-NEXT:    store i32 [[TMP25]], ptr [[TMP1]], align 41491// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)1492// CHECK11-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 01493// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 21494// CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP26]]1495// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1496// CHECK11:       omp.arraycpy.body:1497// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1498// CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1499// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)1500// CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11501// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11502// CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]]1503// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]1504// CHECK11:       omp.arraycpy.done12:1505// CHECK11-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP6]], align 41506// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP27]], i32 4, i1 false)1507// CHECK11-NEXT:    [[TMP28:%.*]] = load i32, ptr [[SVAR7]], align 41508// CHECK11-NEXT:    store i32 [[TMP28]], ptr [[TMP4]], align 41509// CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1510// CHECK11:       .omp.lastprivate.done:1511// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]1512// CHECK11-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 01513// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 21514// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1515// CHECK11:       arraydestroy.body:1516// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1517// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11518// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1519// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]1520// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]1521// CHECK11:       arraydestroy.done14:1522// CHECK11-NEXT:    ret void1523//1524//1525// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1526// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1527// CHECK11-NEXT:  entry:1528// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41529// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41530// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41531// CHECK11-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1532// CHECK11-NEXT:    ret void1533//1534//1535// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1536// CHECK11-SAME: () #[[ATTR1]] comdat {1537// CHECK11-NEXT:  entry:1538// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41539// CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41540// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41541// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41542// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41543// CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 41544// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41545// CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 41546// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 41547// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 41548// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 41549// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41550// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81551// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1552// CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 41553// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)1554// CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1555// CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 11556// CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1557// CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 41558// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META8]], !align [[META9]]1559// CHECK11-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 41560// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41561// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41562// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41563// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1564// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1565// CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1566// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01567// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP6]], align 41568// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01569// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP7]], align 41570// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01571// CHECK11-NEXT:    store ptr null, ptr [[TMP8]], align 41572// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11573// CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP9]], align 41574// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11575// CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP10]], align 41576// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11577// CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 41578// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21579// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP12]], align 41580// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21581// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP13]], align 41582// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21583// CHECK11-NEXT:    store ptr null, ptr [[TMP14]], align 41584// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31585// CHECK11-NEXT:    store ptr [[TMP4]], ptr [[TMP15]], align 41586// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31587// CHECK11-NEXT:    store ptr [[TMP5]], ptr [[TMP16]], align 41588// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31589// CHECK11-NEXT:    store ptr null, ptr [[TMP17]], align 41590// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01591// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01592// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01593// CHECK11-NEXT:    store i32 3, ptr [[TMP20]], align 41594// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11595// CHECK11-NEXT:    store i32 4, ptr [[TMP21]], align 41596// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21597// CHECK11-NEXT:    store ptr [[TMP18]], ptr [[TMP22]], align 41598// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31599// CHECK11-NEXT:    store ptr [[TMP19]], ptr [[TMP23]], align 41600// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41601// CHECK11-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP24]], align 41602// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51603// CHECK11-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP25]], align 41604// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61605// CHECK11-NEXT:    store ptr null, ptr [[TMP26]], align 41606// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71607// CHECK11-NEXT:    store ptr null, ptr [[TMP27]], align 41608// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81609// CHECK11-NEXT:    store i64 2, ptr [[TMP28]], align 81610// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91611// CHECK11-NEXT:    store i64 0, ptr [[TMP29]], align 81612// CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101613// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP30]], align 41614// CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111615// CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP31]], align 41616// CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121617// CHECK11-NEXT:    store i32 0, ptr [[TMP32]], align 41618// CHECK11-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])1619// CHECK11-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 01620// CHECK11-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1621// CHECK11:       omp_offload.failed:1622// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]1623// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1624// CHECK11:       omp_offload.cont:1625// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 41626// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01627// CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21628// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1629// CHECK11:       arraydestroy.body:1630// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1631// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11632// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1633// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1634// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1635// CHECK11:       arraydestroy.done2:1636// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1637// CHECK11-NEXT:    [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 41638// CHECK11-NEXT:    ret i32 [[TMP36]]1639//1640//1641// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1642// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1643// CHECK11-NEXT:  entry:1644// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41645// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41646// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41647// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01648// CHECK11-NEXT:    store float 0.000000e+00, ptr [[F]], align 41649// CHECK11-NEXT:    ret void1650//1651//1652// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1653// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1654// CHECK11-NEXT:  entry:1655// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41656// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41657// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41658// CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41659// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41660// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01661// CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41662// CHECK11-NEXT:    store float [[TMP0]], ptr [[F]], align 41663// CHECK11-NEXT:    ret void1664//1665//1666// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1667// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1668// CHECK11-NEXT:  entry:1669// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41670// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41671// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41672// CHECK11-NEXT:    ret void1673//1674//1675// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1676// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1677// CHECK11-NEXT:  entry:1678// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41679// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41680// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41681// CHECK11-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1682// CHECK11-NEXT:    ret void1683//1684//1685// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1686// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1687// CHECK11-NEXT:  entry:1688// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41689// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41690// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41691// CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41692// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41693// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41694// CHECK11-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1695// CHECK11-NEXT:    ret void1696//1697//1698// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491699// CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1700// CHECK11-NEXT:  entry:1701// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 41702// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 41703// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 41704// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 41705// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41706// CHECK11-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41707// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 41708// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41709// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 41710// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1711// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1712// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1713// CHECK11-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 41714// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1715// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], ptr [[T_VAR_ADDR]], ptr [[TMP1]], ptr [[TMP3]])1716// CHECK11-NEXT:    ret void1717//1718//1719// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1720// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1721// CHECK11-NEXT:  entry:1722// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41723// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41724// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 41725// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 41726// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 41727// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 41728// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41729// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41730// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41731// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41732// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41733// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41734// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41735// CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 41736// CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 41737// CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 41738// CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41739// CHECK11-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 41740// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41741// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41742// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41743// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 41744// CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 41745// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41746// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 41747// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1748// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1749// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1750// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1751// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 41752// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41753// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41754// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41755// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41756// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01757// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21758// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1759// CHECK11:       arrayctor.loop:1760// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1761// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1762// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 11763// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1764// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1765// CHECK11:       arrayctor.cont:1766// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1767// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])1768// CHECK11-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 41769// CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41770// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 41771// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1772// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41773// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 11774// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1775// CHECK11:       cond.true:1776// CHECK11-NEXT:    br label [[COND_END:%.*]]1777// CHECK11:       cond.false:1778// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41779// CHECK11-NEXT:    br label [[COND_END]]1780// CHECK11:       cond.end:1781// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]1782// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41783// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41784// CHECK11-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 41785// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1786// CHECK11:       omp.inner.for.cond:1787// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]1788// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]1789// CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]1790// CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1791// CHECK11:       omp.inner.for.cond.cleanup:1792// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1793// CHECK11:       omp.inner.for.body:1794// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]1795// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 11796// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1797// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]1798// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP16]]1799// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]1800// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP14]]1801// CHECK11-NEXT:    store i32 [[TMP13]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]1802// CHECK11-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 4, !nonnull [[META8]], !align [[META9]], !llvm.access.group [[ACC_GRP16]]1803// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]1804// CHECK11-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP16]]1805// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP15]], i32 4, i1 false), !llvm.access.group [[ACC_GRP16]]1806// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1807// CHECK11:       omp.body.continue:1808// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1809// CHECK11:       omp.inner.for.inc:1810// CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]1811// CHECK11-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP17]], 11812// CHECK11-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]1813// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]1814// CHECK11:       omp.inner.for.end:1815// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1816// CHECK11:       omp.loop.exit:1817// CHECK11-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41818// CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 41819// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])1820// CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41821// CHECK11-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 01822// CHECK11-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1823// CHECK11:       .omp.final.then:1824// CHECK11-NEXT:    store i32 2, ptr [[I]], align 41825// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]1826// CHECK11:       .omp.final.done:1827// CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41828// CHECK11-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 01829// CHECK11-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1830// CHECK11:       .omp.lastprivate.then:1831// CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[T_VAR2]], align 41832// CHECK11-NEXT:    store i32 [[TMP24]], ptr [[TMP1]], align 41833// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)1834// CHECK11-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 01835// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 21836// CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP25]]1837// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1838// CHECK11:       omp.arraycpy.body:1839// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1840// CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1841// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)1842// CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11843// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11844// CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP25]]1845// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]1846// CHECK11:       omp.arraycpy.done11:1847// CHECK11-NEXT:    [[TMP26:%.*]] = load ptr, ptr [[_TMP6]], align 41848// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP26]], i32 4, i1 false)1849// CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1850// CHECK11:       .omp.lastprivate.done:1851// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]1852// CHECK11-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01853// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 21854// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1855// CHECK11:       arraydestroy.body:1856// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1857// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11858// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1859// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]1860// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]1861// CHECK11:       arraydestroy.done13:1862// CHECK11-NEXT:    ret void1863//1864//1865// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1866// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1867// CHECK11-NEXT:  entry:1868// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41869// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41870// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41871// CHECK11-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1872// CHECK11-NEXT:    ret void1873//1874//1875// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1876// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1877// CHECK11-NEXT:  entry:1878// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41879// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41880// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41881// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01882// CHECK11-NEXT:    store i32 0, ptr [[F]], align 41883// CHECK11-NEXT:    ret void1884//1885//1886// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1887// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1888// CHECK11-NEXT:  entry:1889// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41890// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41891// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41892// CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41893// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41894// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01895// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41896// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[F]], align 41897// CHECK11-NEXT:    ret void1898//1899//1900// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1901// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1902// CHECK11-NEXT:  entry:1903// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41904// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41905// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41906// CHECK11-NEXT:    ret void1907//1908//1909// CHECK13-LABEL: define {{[^@]+}}@main1910// CHECK13-SAME: () #[[ATTR0:[0-9]+]] {1911// CHECK13-NEXT:  entry:1912// CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41913// CHECK13-NEXT:    [[G:%.*]] = alloca double, align 81914// CHECK13-NEXT:    [[G1:%.*]] = alloca ptr, align 81915// CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41916// CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41917// CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41918// CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41919// CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 81920// CHECK13-NEXT:    [[TMP:%.*]] = alloca ptr, align 81921// CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81922// CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 41923// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41924// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41925// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41926// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 41927// CHECK13-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 41928// CHECK13-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 41929// CHECK13-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 41930// CHECK13-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S]], align 41931// CHECK13-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 81932// CHECK13-NEXT:    [[SVAR:%.*]] = alloca i32, align 41933// CHECK13-NEXT:    [[I15:%.*]] = alloca i32, align 41934// CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 41935// CHECK13-NEXT:    store ptr [[G]], ptr [[G1]], align 81936// CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1937// CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 41938// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)1939// CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1940// CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 11941// CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1942// CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 81943// CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]1944// CHECK13-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 81945// CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]1946// CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]1947// CHECK13-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 81948// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41949// CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41950// CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41951// CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 41952// CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 01953// CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 21954// CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1955// CHECK13:       arrayctor.loop:1956// CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1957// CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1958// CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 11959// CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1960// CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1961// CHECK13:       arrayctor.cont:1962// CHECK13-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META2]], !align [[META3]]1963// CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])1964// CHECK13-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 81965// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1966// CHECK13:       omp.inner.for.cond:1967// CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]1968// CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP4]]1969// CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1970// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1971// CHECK13:       omp.inner.for.cond.cleanup:1972// CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1973// CHECK13:       omp.inner.for.body:1974// CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]1975// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 11976// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1977// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]1978// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP4]]1979// CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]1980// CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i641981// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]1982// CHECK13-NEXT:    store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP4]]1983// CHECK13-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP7]], align 8, !nonnull [[META2]], !align [[META3]], !llvm.access.group [[ACC_GRP4]]1984// CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]1985// CHECK13-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP11]] to i641986// CHECK13-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM8]]1987// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group [[ACC_GRP4]]1988// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1989// CHECK13:       omp.body.continue:1990// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1991// CHECK13:       omp.inner.for.inc:1992// CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]1993// CHECK13-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP12]], 11994// CHECK13-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]1995// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]1996// CHECK13:       omp.inner.for.end:1997// CHECK13-NEXT:    store i32 2, ptr [[I]], align 41998// CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[T_VAR3]], align 41999// CHECK13-NEXT:    store i32 [[TMP13]], ptr [[T_VAR]], align 42000// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC4]], i64 8, i1 false)2001// CHECK13-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02002// CHECK13-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 22003// CHECK13-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP14]]2004// CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2005// CHECK13:       omp.arraycpy.body:2006// CHECK13-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2007// CHECK13-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2008// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)2009// CHECK13-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12010// CHECK13-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12011// CHECK13-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]]2012// CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]2013// CHECK13:       omp.arraycpy.done12:2014// CHECK13-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP7]], align 82015// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i64 4, i1 false)2016// CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[SVAR]], align 42017// CHECK13-NEXT:    store i32 [[TMP16]], ptr @_ZZ4mainE4svar, align 42018// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR3:[0-9]+]]2019// CHECK13-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 02020// CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i64 22021// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2022// CHECK13:       arraydestroy.body:2023// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2024// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -12025// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2026// CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]2027// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]2028// CHECK13:       arraydestroy.done14:2029// CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()2030// CHECK13-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 42031// CHECK13-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02032// CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN16]], i64 22033// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY17:%.*]]2034// CHECK13:       arraydestroy.body17:2035// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]2036// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST18]], i64 -12037// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]]2038// CHECK13-NEXT:    [[ARRAYDESTROY_DONE20:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]2039// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]2040// CHECK13:       arraydestroy.done21:2041// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2042// CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 42043// CHECK13-NEXT:    ret i32 [[TMP19]]2044//2045//2046// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev2047// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {2048// CHECK13-NEXT:  entry:2049// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82050// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82051// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82052// CHECK13-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2053// CHECK13-NEXT:    ret void2054//2055//2056// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef2057// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2058// CHECK13-NEXT:  entry:2059// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82060// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42061// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82062// CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42063// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82064// CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42065// CHECK13-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])2066// CHECK13-NEXT:    ret void2067//2068//2069// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev2070// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2071// CHECK13-NEXT:  entry:2072// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82073// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82074// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82075// CHECK13-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2076// CHECK13-NEXT:    ret void2077//2078//2079// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v2080// CHECK13-SAME: () #[[ATTR1]] comdat {2081// CHECK13-NEXT:  entry:2082// CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42083// CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42084// CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 42085// CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 42086// CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 42087// CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 82088// CHECK13-NEXT:    [[TMP:%.*]] = alloca ptr, align 82089// CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 82090// CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 42091// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42092// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42093// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42094// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 42095// CHECK13-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 42096// CHECK13-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 42097// CHECK13-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 42098// CHECK13-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0]], align 42099// CHECK13-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 82100// CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2101// CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 42102// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)2103// CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)2104// CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 12105// CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)2106// CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 82107// CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]2108// CHECK13-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 82109// CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]2110// CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]2111// CHECK13-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 82112// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42113// CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42114// CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42115// CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 42116// CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 02117// CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 22118// CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2119// CHECK13:       arrayctor.loop:2120// CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2121// CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2122// CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 12123// CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2124// CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2125// CHECK13:       arrayctor.cont:2126// CHECK13-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META2]], !align [[META3]]2127// CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])2128// CHECK13-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 82129// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2130// CHECK13:       omp.inner.for.cond:2131// CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]2132// CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]2133// CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]2134// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2135// CHECK13:       omp.inner.for.cond.cleanup:2136// CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2137// CHECK13:       omp.inner.for.body:2138// CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2139// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 12140// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2141// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2142// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP8]]2143// CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2144// CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i642145// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]2146// CHECK13-NEXT:    store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP8]]2147// CHECK13-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP7]], align 8, !nonnull [[META2]], !align [[META3]], !llvm.access.group [[ACC_GRP8]]2148// CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2149// CHECK13-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP11]] to i642150// CHECK13-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM8]]2151// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group [[ACC_GRP8]]2152// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2153// CHECK13:       omp.body.continue:2154// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2155// CHECK13:       omp.inner.for.inc:2156// CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2157// CHECK13-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP12]], 12158// CHECK13-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2159// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]2160// CHECK13:       omp.inner.for.end:2161// CHECK13-NEXT:    store i32 2, ptr [[I]], align 42162// CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[T_VAR3]], align 42163// CHECK13-NEXT:    store i32 [[TMP13]], ptr [[T_VAR]], align 42164// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC4]], i64 8, i1 false)2165// CHECK13-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02166// CHECK13-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 22167// CHECK13-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP14]]2168// CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2169// CHECK13:       omp.arraycpy.body:2170// CHECK13-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2171// CHECK13-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2172// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)2173// CHECK13-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12174// CHECK13-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12175// CHECK13-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]]2176// CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]2177// CHECK13:       omp.arraycpy.done12:2178// CHECK13-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP7]], align 82179// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i64 4, i1 false)2180// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR3]]2181// CHECK13-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 02182// CHECK13-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 22183// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2184// CHECK13:       arraydestroy.body:2185// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP16]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2186// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -12187// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2188// CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]2189// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]2190// CHECK13:       arraydestroy.done14:2191// CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 42192// CHECK13-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02193// CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN15]], i64 22194// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY16:%.*]]2195// CHECK13:       arraydestroy.body16:2196// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi ptr [ [[TMP17]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]2197// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST17]], i64 -12198// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR3]]2199// CHECK13-NEXT:    [[ARRAYDESTROY_DONE19:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]2200// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]2201// CHECK13:       arraydestroy.done20:2202// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2203// CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[RETVAL]], align 42204// CHECK13-NEXT:    ret i32 [[TMP18]]2205//2206//2207// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev2208// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2209// CHECK13-NEXT:  entry:2210// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82211// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82212// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82213// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02214// CHECK13-NEXT:    store float 0.000000e+00, ptr [[F]], align 42215// CHECK13-NEXT:    ret void2216//2217//2218// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev2219// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2220// CHECK13-NEXT:  entry:2221// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82222// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82223// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82224// CHECK13-NEXT:    ret void2225//2226//2227// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef2228// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2229// CHECK13-NEXT:  entry:2230// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82231// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42232// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82233// CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42234// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82235// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02236// CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42237// CHECK13-NEXT:    store float [[TMP0]], ptr [[F]], align 42238// CHECK13-NEXT:    ret void2239//2240//2241// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev2242// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2243// CHECK13-NEXT:  entry:2244// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82245// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82246// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82247// CHECK13-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2248// CHECK13-NEXT:    ret void2249//2250//2251// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei2252// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2253// CHECK13-NEXT:  entry:2254// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82255// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42256// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82257// CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42258// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82259// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42260// CHECK13-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])2261// CHECK13-NEXT:    ret void2262//2263//2264// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev2265// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2266// CHECK13-NEXT:  entry:2267// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82268// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82269// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82270// CHECK13-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2271// CHECK13-NEXT:    ret void2272//2273//2274// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev2275// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2276// CHECK13-NEXT:  entry:2277// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82278// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82279// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82280// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02281// CHECK13-NEXT:    store i32 0, ptr [[F]], align 42282// CHECK13-NEXT:    ret void2283//2284//2285// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei2286// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2287// CHECK13-NEXT:  entry:2288// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82289// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42290// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82291// CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42292// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82293// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02294// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42295// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[F]], align 42296// CHECK13-NEXT:    ret void2297//2298//2299// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2300// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2301// CHECK13-NEXT:  entry:2302// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82303// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82304// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82305// CHECK13-NEXT:    ret void2306//2307//2308// CHECK15-LABEL: define {{[^@]+}}@main2309// CHECK15-SAME: () #[[ATTR0:[0-9]+]] {2310// CHECK15-NEXT:  entry:2311// CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42312// CHECK15-NEXT:    [[G:%.*]] = alloca double, align 82313// CHECK15-NEXT:    [[G1:%.*]] = alloca ptr, align 42314// CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 42315// CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 42316// CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 42317// CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 42318// CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 42319// CHECK15-NEXT:    [[TMP:%.*]] = alloca ptr, align 42320// CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 42321// CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 42322// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42323// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42324// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42325// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 42326// CHECK15-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 42327// CHECK15-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 42328// CHECK15-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 42329// CHECK15-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S]], align 42330// CHECK15-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 42331// CHECK15-NEXT:    [[SVAR:%.*]] = alloca i32, align 42332// CHECK15-NEXT:    [[I14:%.*]] = alloca i32, align 42333// CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 42334// CHECK15-NEXT:    store ptr [[G]], ptr [[G1]], align 42335// CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2336// CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 42337// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)2338// CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)2339// CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 12340// CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)2341// CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 42342// CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]2343// CHECK15-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 42344// CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]2345// CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META3]], !align [[META4]]2346// CHECK15-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 42347// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42348// CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42349// CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42350// CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 42351// CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 02352// CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 22353// CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2354// CHECK15:       arrayctor.loop:2355// CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2356// CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2357// CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 12358// CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2359// CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2360// CHECK15:       arrayctor.cont:2361// CHECK15-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 4, !nonnull [[META3]], !align [[META4]]2362// CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])2363// CHECK15-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 42364// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2365// CHECK15:       omp.inner.for.cond:2366// CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]2367// CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]]2368// CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]2369// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2370// CHECK15:       omp.inner.for.cond.cleanup:2371// CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2372// CHECK15:       omp.inner.for.body:2373// CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]2374// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 12375// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2376// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]2377// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP5]]2378// CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]2379// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP9]]2380// CHECK15-NEXT:    store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP5]]2381// CHECK15-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP7]], align 4, !nonnull [[META3]], !align [[META4]], !llvm.access.group [[ACC_GRP5]]2382// CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]2383// CHECK15-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 [[TMP11]]2384// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group [[ACC_GRP5]]2385// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2386// CHECK15:       omp.body.continue:2387// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2388// CHECK15:       omp.inner.for.inc:2389// CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]2390// CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP12]], 12391// CHECK15-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]2392// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]2393// CHECK15:       omp.inner.for.end:2394// CHECK15-NEXT:    store i32 2, ptr [[I]], align 42395// CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[T_VAR3]], align 42396// CHECK15-NEXT:    store i32 [[TMP13]], ptr [[T_VAR]], align 42397// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC4]], i32 8, i1 false)2398// CHECK15-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02399// CHECK15-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i32 22400// CHECK15-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP14]]2401// CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2402// CHECK15:       omp.arraycpy.body:2403// CHECK15-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2404// CHECK15-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2405// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)2406// CHECK15-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12407// CHECK15-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12408// CHECK15-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]]2409// CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]2410// CHECK15:       omp.arraycpy.done11:2411// CHECK15-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP7]], align 42412// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i32 4, i1 false)2413// CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[SVAR]], align 42414// CHECK15-NEXT:    store i32 [[TMP16]], ptr @_ZZ4mainE4svar, align 42415// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR3:[0-9]+]]2416// CHECK15-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 02417// CHECK15-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i32 22418// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2419// CHECK15:       arraydestroy.body:2420// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2421// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12422// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2423// CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]2424// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]2425// CHECK15:       arraydestroy.done13:2426// CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()2427// CHECK15-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 42428// CHECK15-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02429// CHECK15-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i32 22430// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY16:%.*]]2431// CHECK15:       arraydestroy.body16:2432// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]2433// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST17]], i32 -12434// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR3]]2435// CHECK15-NEXT:    [[ARRAYDESTROY_DONE19:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]2436// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]2437// CHECK15:       arraydestroy.done20:2438// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2439// CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 42440// CHECK15-NEXT:    ret i32 [[TMP19]]2441//2442//2443// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev2444// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {2445// CHECK15-NEXT:  entry:2446// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42447// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42448// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42449// CHECK15-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2450// CHECK15-NEXT:    ret void2451//2452//2453// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef2454// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2455// CHECK15-NEXT:  entry:2456// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42457// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42458// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42459// CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42460// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42461// CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42462// CHECK15-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])2463// CHECK15-NEXT:    ret void2464//2465//2466// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev2467// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2468// CHECK15-NEXT:  entry:2469// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42470// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42471// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42472// CHECK15-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2473// CHECK15-NEXT:    ret void2474//2475//2476// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v2477// CHECK15-SAME: () #[[ATTR1]] comdat {2478// CHECK15-NEXT:  entry:2479// CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42480// CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42481// CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 42482// CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 42483// CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 42484// CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 42485// CHECK15-NEXT:    [[TMP:%.*]] = alloca ptr, align 42486// CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 42487// CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 42488// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42489// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42490// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42491// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 42492// CHECK15-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 42493// CHECK15-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 42494// CHECK15-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 42495// CHECK15-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0]], align 42496// CHECK15-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 42497// CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2498// CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 42499// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)2500// CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)2501// CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 12502// CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)2503// CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 42504// CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]2505// CHECK15-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 42506// CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]2507// CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META3]], !align [[META4]]2508// CHECK15-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 42509// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42510// CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42511// CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42512// CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 42513// CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 02514// CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 22515// CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2516// CHECK15:       arrayctor.loop:2517// CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2518// CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2519// CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 12520// CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2521// CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2522// CHECK15:       arrayctor.cont:2523// CHECK15-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 4, !nonnull [[META3]], !align [[META4]]2524// CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])2525// CHECK15-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 42526// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2527// CHECK15:       omp.inner.for.cond:2528// CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]2529// CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]2530// CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]2531// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2532// CHECK15:       omp.inner.for.cond.cleanup:2533// CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2534// CHECK15:       omp.inner.for.body:2535// CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]2536// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 12537// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2538// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]2539// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP9]]2540// CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]2541// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP9]]2542// CHECK15-NEXT:    store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]2543// CHECK15-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP7]], align 4, !nonnull [[META3]], !align [[META4]], !llvm.access.group [[ACC_GRP9]]2544// CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]2545// CHECK15-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 [[TMP11]]2546// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group [[ACC_GRP9]]2547// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2548// CHECK15:       omp.body.continue:2549// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2550// CHECK15:       omp.inner.for.inc:2551// CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]2552// CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP12]], 12553// CHECK15-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]2554// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]2555// CHECK15:       omp.inner.for.end:2556// CHECK15-NEXT:    store i32 2, ptr [[I]], align 42557// CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[T_VAR3]], align 42558// CHECK15-NEXT:    store i32 [[TMP13]], ptr [[T_VAR]], align 42559// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC4]], i32 8, i1 false)2560// CHECK15-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02561// CHECK15-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 22562// CHECK15-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP14]]2563// CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2564// CHECK15:       omp.arraycpy.body:2565// CHECK15-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2566// CHECK15-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2567// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)2568// CHECK15-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12569// CHECK15-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12570// CHECK15-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]]2571// CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]2572// CHECK15:       omp.arraycpy.done11:2573// CHECK15-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP7]], align 42574// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i32 4, i1 false)2575// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR3]]2576// CHECK15-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 02577// CHECK15-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 22578// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2579// CHECK15:       arraydestroy.body:2580// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP16]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2581// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12582// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2583// CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]2584// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]2585// CHECK15:       arraydestroy.done13:2586// CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 42587// CHECK15-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02588// CHECK15-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i32 22589// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY15:%.*]]2590// CHECK15:       arraydestroy.body15:2591// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi ptr [ [[TMP17]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ]2592// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST16]], i32 -12593// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR3]]2594// CHECK15-NEXT:    [[ARRAYDESTROY_DONE18:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]]2595// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]]2596// CHECK15:       arraydestroy.done19:2597// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2598// CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[RETVAL]], align 42599// CHECK15-NEXT:    ret i32 [[TMP18]]2600//2601//2602// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev2603// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2604// CHECK15-NEXT:  entry:2605// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42606// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42607// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42608// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02609// CHECK15-NEXT:    store float 0.000000e+00, ptr [[F]], align 42610// CHECK15-NEXT:    ret void2611//2612//2613// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev2614// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2615// CHECK15-NEXT:  entry:2616// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42617// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42618// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42619// CHECK15-NEXT:    ret void2620//2621//2622// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef2623// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2624// CHECK15-NEXT:  entry:2625// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42626// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42627// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42628// CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42629// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42630// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02631// CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42632// CHECK15-NEXT:    store float [[TMP0]], ptr [[F]], align 42633// CHECK15-NEXT:    ret void2634//2635//2636// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev2637// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2638// CHECK15-NEXT:  entry:2639// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42640// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42641// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42642// CHECK15-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2643// CHECK15-NEXT:    ret void2644//2645//2646// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei2647// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2648// CHECK15-NEXT:  entry:2649// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42650// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42651// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42652// CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42653// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42654// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42655// CHECK15-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])2656// CHECK15-NEXT:    ret void2657//2658//2659// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev2660// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2661// CHECK15-NEXT:  entry:2662// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42663// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42664// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42665// CHECK15-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2666// CHECK15-NEXT:    ret void2667//2668//2669// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev2670// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2671// CHECK15-NEXT:  entry:2672// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42673// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42674// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42675// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02676// CHECK15-NEXT:    store i32 0, ptr [[F]], align 42677// CHECK15-NEXT:    ret void2678//2679//2680// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei2681// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2682// CHECK15-NEXT:  entry:2683// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42684// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42685// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42686// CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42687// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42688// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02689// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42690// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[F]], align 42691// CHECK15-NEXT:    ret void2692//2693//2694// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2695// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2696// CHECK15-NEXT:  entry:2697// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42698// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42699// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42700// CHECK15-NEXT:    ret void2701//2702