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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// expected-no-diagnostics3#ifndef HEADER4#define HEADER5 6// Test host codegen.7// RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK18// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s9// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK110// RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK311// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s12// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK313 14// RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"15// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s16// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"17// RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"18// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s19// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"20#ifdef CK121 22template <typename T, int X, long long Y>23struct SS{24  T a[X][Y];25 26  int foo(void) {27 28    #pragma omp target29    #pragma omp teams loop collapse(2)30    for(int i = 0; i < X; i++) {31      for(int j = 0; j < Y; j++) {32        a[i][j] = (T)0;33      }34    }35 36    // discard loop variables not needed here37 38 39    return a[0][0];40  }41};42 43int teams_template_struct(void) {44  SS<int, 123, 456> V;45  return V.foo();46 47}48#endif // CK149 50// Test host codegen.51// RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK952// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s53// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK954// RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1155// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s56// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1157 58// RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"59// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s60// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"61// RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"62// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s63// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"64#ifdef CK265 66template <typename T, int n, int m>67int tmain(T argc) {68  T a[n][m];69  #pragma omp target70  #pragma omp teams loop collapse(2)71  for(int i = 0; i < n; i++) {72    for(int j = 0; j < m; j++) {73      a[i][j] = (T)0;74    }75  }76  return 0;77}78 79int main (int argc, char **argv) {80  int n = 100;81  int m = 2;82  int a[n][m];83  #pragma omp target84  #pragma omp teams loop collapse(2)85  for(int i = 0; i < n; i++) {86    for(int j = 0; j < m; j++) {87      a[i][j] = 0;88    }89  }90  return tmain<int, 10, 2>(argc);91}92 93 94 95 96 97 98 99 100// discard loop variables not needed here101 102 103#endif // CK2104#endif // #ifndef HEADER105// CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv106// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {107// CHECK1-NEXT:  entry:108// CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4109// CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]])110// CHECK1-NEXT:    ret i32 [[CALL]]111//112//113// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv114// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat {115// CHECK1-NEXT:  entry:116// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8117// CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8118// CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8119// CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8120// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4121// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4122// CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8123// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8124// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8125// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0126// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0127// CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 8128// CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0129// CHECK1-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8130// CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0131// CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8132// CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0133// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0134// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0135// CHECK1-NEXT:    store i32 3, ptr [[TMP5]], align 4136// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1137// CHECK1-NEXT:    store i32 1, ptr [[TMP6]], align 4138// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2139// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8140// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3141// CHECK1-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8142// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4143// CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 8144// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5145// CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 8146// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6147// CHECK1-NEXT:    store ptr null, ptr [[TMP11]], align 8148// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7149// CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8150// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8151// CHECK1-NEXT:    store i64 56088, ptr [[TMP13]], align 8152// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9153// CHECK1-NEXT:    store i64 0, ptr [[TMP14]], align 8154// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10155// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4156// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11157// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4158// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12159// CHECK1-NEXT:    store i32 0, ptr [[TMP17]], align 4160// CHECK1-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])161// CHECK1-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0162// CHECK1-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]163// CHECK1:       omp_offload.failed:164// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]165// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]166// CHECK1:       omp_offload.cont:167// CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0168// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i64 0, i64 0169// CHECK1-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 0170// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4171// CHECK1-NEXT:    ret i32 [[TMP20]]172//173//174// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28175// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {176// CHECK1-NEXT:  entry:177// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8178// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8179// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8180// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])181// CHECK1-NEXT:    ret void182//183//184// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined185// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {186// CHECK1-NEXT:  entry:187// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8188// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8189// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8190// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4191// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4192// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4193// CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4194// CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4195// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4196// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4197// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4198// CHECK1-NEXT:    [[J:%.*]] = alloca i32, align 4199// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8200// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8201// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8202// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8203// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4204// CHECK1-NEXT:    store i32 56087, ptr [[DOTOMP_COMB_UB]], align 4205// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4206// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4207// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8208// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4209// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)210// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4211// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087212// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]213// CHECK1:       cond.true:214// CHECK1-NEXT:    br label [[COND_END:%.*]]215// CHECK1:       cond.false:216// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4217// CHECK1-NEXT:    br label [[COND_END]]218// CHECK1:       cond.end:219// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]220// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4221// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4222// CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4223// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]224// CHECK1:       omp.inner.for.cond:225// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4226// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4227// CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]228// CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]229// CHECK1:       omp.inner.for.body:230// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4231// CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 456232// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1233// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]234// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4235// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4236// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4237// CHECK1-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456238// CHECK1-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456239// CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]240// CHECK1-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1241// CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]242// CHECK1-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4243// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0244// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4245// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64246// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i64 0, i64 [[IDXPROM]]247// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4248// CHECK1-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64249// CHECK1-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]250// CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX8]], align 4251// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]252// CHECK1:       omp.body.continue:253// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]254// CHECK1:       omp.inner.for.inc:255// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4256// CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1257// CHECK1-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4258// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]259// CHECK1:       omp.inner.for.end:260// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]261// CHECK1:       omp.loop.exit:262// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])263// CHECK1-NEXT:    ret void264//265//266// CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv267// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {268// CHECK3-NEXT:  entry:269// CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4270// CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]])271// CHECK3-NEXT:    ret i32 [[CALL]]272//273//274// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv275// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {276// CHECK3-NEXT:  entry:277// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4278// CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4279// CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4280// CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4281// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4282// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4283// CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8284// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4285// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4286// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0287// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0288// CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 4289// CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0290// CHECK3-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4291// CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0292// CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 4293// CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0294// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0295// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0296// CHECK3-NEXT:    store i32 3, ptr [[TMP5]], align 4297// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1298// CHECK3-NEXT:    store i32 1, ptr [[TMP6]], align 4299// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2300// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4301// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3302// CHECK3-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4303// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4304// CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 4305// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5306// CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 4307// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6308// CHECK3-NEXT:    store ptr null, ptr [[TMP11]], align 4309// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7310// CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 4311// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8312// CHECK3-NEXT:    store i64 56088, ptr [[TMP13]], align 8313// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9314// CHECK3-NEXT:    store i64 0, ptr [[TMP14]], align 8315// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10316// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4317// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11318// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4319// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12320// CHECK3-NEXT:    store i32 0, ptr [[TMP17]], align 4321// CHECK3-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])322// CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0323// CHECK3-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]324// CHECK3:       omp_offload.failed:325// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]326// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]327// CHECK3:       omp_offload.cont:328// CHECK3-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0329// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i32 0, i32 0330// CHECK3-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 0331// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4332// CHECK3-NEXT:    ret i32 [[TMP20]]333//334//335// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28336// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {337// CHECK3-NEXT:  entry:338// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4339// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4340// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4341// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])342// CHECK3-NEXT:    ret void343//344//345// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined346// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {347// CHECK3-NEXT:  entry:348// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4349// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4350// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4351// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4352// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4353// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4354// CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4355// CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4356// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4357// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4358// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4359// CHECK3-NEXT:    [[J:%.*]] = alloca i32, align 4360// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4361// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4362// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4363// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4364// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4365// CHECK3-NEXT:    store i32 56087, ptr [[DOTOMP_COMB_UB]], align 4366// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4367// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4368// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4369// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4370// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)371// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4372// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087373// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]374// CHECK3:       cond.true:375// CHECK3-NEXT:    br label [[COND_END:%.*]]376// CHECK3:       cond.false:377// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4378// CHECK3-NEXT:    br label [[COND_END]]379// CHECK3:       cond.end:380// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]381// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4382// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4383// CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4384// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]385// CHECK3:       omp.inner.for.cond:386// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4387// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4388// CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]389// CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]390// CHECK3:       omp.inner.for.body:391// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4392// CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 456393// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1394// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]395// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4396// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4397// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4398// CHECK3-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456399// CHECK3-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456400// CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]401// CHECK3-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1402// CHECK3-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]403// CHECK3-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4404// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0405// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4406// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i32 0, i32 [[TMP11]]407// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4408// CHECK3-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP12]]409// CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX7]], align 4410// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]411// CHECK3:       omp.body.continue:412// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]413// CHECK3:       omp.inner.for.inc:414// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4415// CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1416// CHECK3-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4417// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]418// CHECK3:       omp.inner.for.end:419// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]420// CHECK3:       omp.loop.exit:421// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])422// CHECK3-NEXT:    ret void423//424//425// CHECK9-LABEL: define {{[^@]+}}@main426// CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {427// CHECK9-NEXT:  entry:428// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4429// CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4430// CHECK9-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 8431// CHECK9-NEXT:    [[N:%.*]] = alloca i32, align 4432// CHECK9-NEXT:    [[M:%.*]] = alloca i32, align 4433// CHECK9-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8434// CHECK9-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8435// CHECK9-NEXT:    [[__VLA_EXPR1:%.*]] = alloca i64, align 8436// CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8437// CHECK9-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8438// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8439// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8440// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8441// CHECK9-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8442// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4443// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4444// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4445// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4446// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8447// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8448// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4449// CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4450// CHECK9-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8451// CHECK9-NEXT:    store i32 100, ptr [[N]], align 4452// CHECK9-NEXT:    store i32 2, ptr [[M]], align 4453// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4454// CHECK9-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64455// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M]], align 4456// CHECK9-NEXT:    [[TMP3:%.*]] = zext i32 [[TMP2]] to i64457// CHECK9-NEXT:    [[TMP4:%.*]] = call ptr @llvm.stacksave.p0()458// CHECK9-NEXT:    store ptr [[TMP4]], ptr [[SAVED_STACK]], align 8459// CHECK9-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]460// CHECK9-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4461// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8462// CHECK9-NEXT:    store i64 [[TMP3]], ptr [[__VLA_EXPR1]], align 8463// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[N]], align 4464// CHECK9-NEXT:    store i32 [[TMP6]], ptr [[N_CASTED]], align 4465// CHECK9-NEXT:    [[TMP7:%.*]] = load i64, ptr [[N_CASTED]], align 8466// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[M]], align 4467// CHECK9-NEXT:    store i32 [[TMP8]], ptr [[M_CASTED]], align 4468// CHECK9-NEXT:    [[TMP9:%.*]] = load i64, ptr [[M_CASTED]], align 8469// CHECK9-NEXT:    [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]470// CHECK9-NEXT:    [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4471// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 40, i1 false)472// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0473// CHECK9-NEXT:    store i64 [[TMP7]], ptr [[TMP12]], align 8474// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0475// CHECK9-NEXT:    store i64 [[TMP7]], ptr [[TMP13]], align 8476// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0477// CHECK9-NEXT:    store ptr null, ptr [[TMP14]], align 8478// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1479// CHECK9-NEXT:    store i64 [[TMP9]], ptr [[TMP15]], align 8480// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1481// CHECK9-NEXT:    store i64 [[TMP9]], ptr [[TMP16]], align 8482// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1483// CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8484// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2485// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP18]], align 8486// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2487// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP19]], align 8488// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2489// CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8490// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3491// CHECK9-NEXT:    store i64 [[TMP3]], ptr [[TMP21]], align 8492// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3493// CHECK9-NEXT:    store i64 [[TMP3]], ptr [[TMP22]], align 8494// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3495// CHECK9-NEXT:    store ptr null, ptr [[TMP23]], align 8496// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4497// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP24]], align 8498// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4499// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP25]], align 8500// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4501// CHECK9-NEXT:    store i64 [[TMP11]], ptr [[TMP26]], align 8502// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4503// CHECK9-NEXT:    store ptr null, ptr [[TMP27]], align 8504// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0505// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0506// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0507// CHECK9-NEXT:    [[TMP31:%.*]] = load i32, ptr [[N]], align 4508// CHECK9-NEXT:    store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_]], align 4509// CHECK9-NEXT:    [[TMP32:%.*]] = load i32, ptr [[M]], align 4510// CHECK9-NEXT:    store i32 [[TMP32]], ptr [[DOTCAPTURE_EXPR_2]], align 4511// CHECK9-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4512// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP33]], 0513// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1514// CHECK9-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64515// CHECK9-NEXT:    [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4516// CHECK9-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[TMP34]], 0517// CHECK9-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1518// CHECK9-NEXT:    [[CONV6:%.*]] = sext i32 [[DIV5]] to i64519// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]520// CHECK9-NEXT:    [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1521// CHECK9-NEXT:    store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8522// CHECK9-NEXT:    [[TMP35:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8523// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i64 [[TMP35]], 1524// CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0525// CHECK9-NEXT:    store i32 3, ptr [[TMP36]], align 4526// CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1527// CHECK9-NEXT:    store i32 5, ptr [[TMP37]], align 4528// CHECK9-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2529// CHECK9-NEXT:    store ptr [[TMP28]], ptr [[TMP38]], align 8530// CHECK9-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3531// CHECK9-NEXT:    store ptr [[TMP29]], ptr [[TMP39]], align 8532// CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4533// CHECK9-NEXT:    store ptr [[TMP30]], ptr [[TMP40]], align 8534// CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5535// CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP41]], align 8536// CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6537// CHECK9-NEXT:    store ptr null, ptr [[TMP42]], align 8538// CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7539// CHECK9-NEXT:    store ptr null, ptr [[TMP43]], align 8540// CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8541// CHECK9-NEXT:    store i64 [[ADD]], ptr [[TMP44]], align 8542// CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9543// CHECK9-NEXT:    store i64 0, ptr [[TMP45]], align 8544// CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10545// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4546// CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11547// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4548// CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12549// CHECK9-NEXT:    store i32 0, ptr [[TMP48]], align 4550// CHECK9-NEXT:    [[TMP49:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, ptr [[KERNEL_ARGS]])551// CHECK9-NEXT:    [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0552// CHECK9-NEXT:    br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]553// CHECK9:       omp_offload.failed:554// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]555// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]556// CHECK9:       omp_offload.cont:557// CHECK9-NEXT:    [[TMP51:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4558// CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP51]])559// CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4560// CHECK9-NEXT:    [[TMP52:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8561// CHECK9-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP52]])562// CHECK9-NEXT:    [[TMP53:%.*]] = load i32, ptr [[RETVAL]], align 4563// CHECK9-NEXT:    ret i32 [[TMP53]]564//565//566// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83567// CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {568// CHECK9-NEXT:  entry:569// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8570// CHECK9-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8571// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8572// CHECK9-NEXT:    [[VLA_ADDR2:%.*]] = alloca i64, align 8573// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8574// CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8575// CHECK9-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8576// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8577// CHECK9-NEXT:    store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8578// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8579// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8580// CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8581// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8582// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined, ptr [[N_ADDR]], ptr [[M_ADDR]], i64 [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])583// CHECK9-NEXT:    ret void584//585//586// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined587// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {588// CHECK9-NEXT:  entry:589// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8590// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8591// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8592// CHECK9-NEXT:    [[M_ADDR:%.*]] = alloca ptr, align 8593// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8594// CHECK9-NEXT:    [[VLA_ADDR2:%.*]] = alloca i64, align 8595// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8596// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i64, align 8597// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4598// CHECK9-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4599// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4600// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4601// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8602// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4603// CHECK9-NEXT:    [[J:%.*]] = alloca i32, align 4604// CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8605// CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8606// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8607// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4608// CHECK9-NEXT:    [[I11:%.*]] = alloca i32, align 4609// CHECK9-NEXT:    [[J12:%.*]] = alloca i32, align 4610// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8611// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8612// CHECK9-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8613// CHECK9-NEXT:    store ptr [[M]], ptr [[M_ADDR]], align 8614// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8615// CHECK9-NEXT:    store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8616// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8617// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8618// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 8619// CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 8620// CHECK9-NEXT:    [[TMP3:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8621// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8622// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4623// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4624// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4625// CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 4626// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4627// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0628// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1629// CHECK9-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64630// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4631// CHECK9-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0632// CHECK9-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1633// CHECK9-NEXT:    [[CONV8:%.*]] = sext i32 [[DIV7]] to i64634// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]635// CHECK9-NEXT:    [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1636// CHECK9-NEXT:    store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8637// CHECK9-NEXT:    store i32 0, ptr [[I]], align 4638// CHECK9-NEXT:    store i32 0, ptr [[J]], align 4639// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4640// CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]641// CHECK9-NEXT:    br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]642// CHECK9:       land.lhs.true:643// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4644// CHECK9-NEXT:    [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]645// CHECK9-NEXT:    br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]646// CHECK9:       omp.precond.then:647// CHECK9-NEXT:    store i64 0, ptr [[DOTOMP_COMB_LB]], align 8648// CHECK9-NEXT:    [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8649// CHECK9-NEXT:    store i64 [[TMP11]], ptr [[DOTOMP_COMB_UB]], align 8650// CHECK9-NEXT:    store i64 1, ptr [[DOTOMP_STRIDE]], align 8651// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4652// CHECK9-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8653// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4654// CHECK9-NEXT:    call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)655// CHECK9-NEXT:    [[TMP14:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8656// CHECK9-NEXT:    [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8657// CHECK9-NEXT:    [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]658// CHECK9-NEXT:    br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]659// CHECK9:       cond.true:660// CHECK9-NEXT:    [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8661// CHECK9-NEXT:    br label [[COND_END:%.*]]662// CHECK9:       cond.false:663// CHECK9-NEXT:    [[TMP17:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8664// CHECK9-NEXT:    br label [[COND_END]]665// CHECK9:       cond.end:666// CHECK9-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]667// CHECK9-NEXT:    store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 8668// CHECK9-NEXT:    [[TMP18:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8669// CHECK9-NEXT:    store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 8670// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]671// CHECK9:       omp.inner.for.cond:672// CHECK9-NEXT:    [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8673// CHECK9-NEXT:    [[TMP20:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8674// CHECK9-NEXT:    [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]675// CHECK9-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]676// CHECK9:       omp.inner.for.body:677// CHECK9-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8678// CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4679// CHECK9-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 0680// CHECK9-NEXT:    [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1681// CHECK9-NEXT:    [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]682// CHECK9-NEXT:    [[CONV18:%.*]] = sext i32 [[MUL17]] to i64683// CHECK9-NEXT:    [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]]684// CHECK9-NEXT:    [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1685// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i64 0, [[MUL20]]686// CHECK9-NEXT:    [[CONV21:%.*]] = trunc i64 [[ADD]] to i32687// CHECK9-NEXT:    store i32 [[CONV21]], ptr [[I11]], align 4688// CHECK9-NEXT:    [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8689// CHECK9-NEXT:    [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8690// CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4691// CHECK9-NEXT:    [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 0692// CHECK9-NEXT:    [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1693// CHECK9-NEXT:    [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]694// CHECK9-NEXT:    [[CONV25:%.*]] = sext i32 [[MUL24]] to i64695// CHECK9-NEXT:    [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]]696// CHECK9-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4697// CHECK9-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 0698// CHECK9-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1699// CHECK9-NEXT:    [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]700// CHECK9-NEXT:    [[CONV30:%.*]] = sext i32 [[MUL29]] to i64701// CHECK9-NEXT:    [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]702// CHECK9-NEXT:    [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]]703// CHECK9-NEXT:    [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1704// CHECK9-NEXT:    [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]705// CHECK9-NEXT:    [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32706// CHECK9-NEXT:    store i32 [[CONV35]], ptr [[J12]], align 4707// CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[I11]], align 4708// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP27]] to i64709// CHECK9-NEXT:    [[TMP28:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]]710// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 [[TMP28]]711// CHECK9-NEXT:    [[TMP29:%.*]] = load i32, ptr [[J12]], align 4712// CHECK9-NEXT:    [[IDXPROM36:%.*]] = sext i32 [[TMP29]] to i64713// CHECK9-NEXT:    [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i64 [[IDXPROM36]]714// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX37]], align 4715// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]716// CHECK9:       omp.body.continue:717// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]718// CHECK9:       omp.inner.for.inc:719// CHECK9-NEXT:    [[TMP30:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8720// CHECK9-NEXT:    [[ADD38:%.*]] = add nsw i64 [[TMP30]], 1721// CHECK9-NEXT:    store i64 [[ADD38]], ptr [[DOTOMP_IV]], align 8722// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]723// CHECK9:       omp.inner.for.end:724// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]725// CHECK9:       omp.loop.exit:726// CHECK9-NEXT:    [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8727// CHECK9-NEXT:    [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4728// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP32]])729// CHECK9-NEXT:    br label [[OMP_PRECOND_END]]730// CHECK9:       omp.precond.end:731// CHECK9-NEXT:    ret void732//733//734// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_735// CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {736// CHECK9-NEXT:  entry:737// CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4738// CHECK9-NEXT:    [[A:%.*]] = alloca [10 x [2 x i32]], align 4739// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8740// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8741// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8742// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4743// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4744// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8745// CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4746// CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0747// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP0]], align 8748// CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0749// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8750// CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0751// CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8752// CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0753// CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0754// CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0755// CHECK9-NEXT:    store i32 3, ptr [[TMP5]], align 4756// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1757// CHECK9-NEXT:    store i32 1, ptr [[TMP6]], align 4758// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2759// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8760// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3761// CHECK9-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8762// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4763// CHECK9-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP9]], align 8764// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5765// CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP10]], align 8766// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6767// CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 8768// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7769// CHECK9-NEXT:    store ptr null, ptr [[TMP12]], align 8770// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8771// CHECK9-NEXT:    store i64 20, ptr [[TMP13]], align 8772// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9773// CHECK9-NEXT:    store i64 0, ptr [[TMP14]], align 8774// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10775// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4776// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11777// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4778// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12779// CHECK9-NEXT:    store i32 0, ptr [[TMP17]], align 4780// CHECK9-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, ptr [[KERNEL_ARGS]])781// CHECK9-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0782// CHECK9-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]783// CHECK9:       omp_offload.failed:784// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69(ptr [[A]]) #[[ATTR3]]785// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]786// CHECK9:       omp_offload.cont:787// CHECK9-NEXT:    ret i32 0788//789//790// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69791// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {792// CHECK9-NEXT:  entry:793// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8794// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8795// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8796// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined, ptr [[TMP0]])797// CHECK9-NEXT:    ret void798//799//800// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined801// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {802// CHECK9-NEXT:  entry:803// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8804// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8805// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8806// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4807// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4808// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4809// CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4810// CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4811// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4812// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4813// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4814// CHECK9-NEXT:    [[J:%.*]] = alloca i32, align 4815// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8816// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8817// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8818// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8819// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4820// CHECK9-NEXT:    store i32 19, ptr [[DOTOMP_COMB_UB]], align 4821// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4822// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4823// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8824// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4825// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)826// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4827// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19828// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]829// CHECK9:       cond.true:830// CHECK9-NEXT:    br label [[COND_END:%.*]]831// CHECK9:       cond.false:832// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4833// CHECK9-NEXT:    br label [[COND_END]]834// CHECK9:       cond.end:835// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]836// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4837// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4838// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4839// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]840// CHECK9:       omp.inner.for.cond:841// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4842// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4843// CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]844// CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]845// CHECK9:       omp.inner.for.body:846// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4847// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 2848// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1849// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]850// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4851// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4852// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4853// CHECK9-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2854// CHECK9-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2855// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]856// CHECK9-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1857// CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]858// CHECK9-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4859// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4860// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64861// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]862// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4863// CHECK9-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64864// CHECK9-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]865// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX8]], align 4866// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]867// CHECK9:       omp.body.continue:868// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]869// CHECK9:       omp.inner.for.inc:870// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4871// CHECK9-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1872// CHECK9-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4873// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]874// CHECK9:       omp.inner.for.end:875// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]876// CHECK9:       omp.loop.exit:877// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])878// CHECK9-NEXT:    ret void879//880//881// CHECK11-LABEL: define {{[^@]+}}@main882// CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {883// CHECK11-NEXT:  entry:884// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4885// CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4886// CHECK11-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 4887// CHECK11-NEXT:    [[N:%.*]] = alloca i32, align 4888// CHECK11-NEXT:    [[M:%.*]] = alloca i32, align 4889// CHECK11-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 4890// CHECK11-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4891// CHECK11-NEXT:    [[__VLA_EXPR1:%.*]] = alloca i32, align 4892// CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4893// CHECK11-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4894// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4895// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4896// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4897// CHECK11-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4898// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4899// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4900// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4901// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4902// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8903// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8904// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4905// CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4906// CHECK11-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4907// CHECK11-NEXT:    store i32 100, ptr [[N]], align 4908// CHECK11-NEXT:    store i32 2, ptr [[M]], align 4909// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4910// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M]], align 4911// CHECK11-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()912// CHECK11-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 4913// CHECK11-NEXT:    [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]914// CHECK11-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4915// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4916// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[__VLA_EXPR1]], align 4917// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[N]], align 4918// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[N_CASTED]], align 4919// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4920// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[M]], align 4921// CHECK11-NEXT:    store i32 [[TMP6]], ptr [[M_CASTED]], align 4922// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[M_CASTED]], align 4923// CHECK11-NEXT:    [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]924// CHECK11-NEXT:    [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4925// CHECK11-NEXT:    [[TMP10:%.*]] = sext i32 [[TMP9]] to i64926// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 40, i1 false)927// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0928// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP11]], align 4929// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0930// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP12]], align 4931// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0932// CHECK11-NEXT:    store ptr null, ptr [[TMP13]], align 4933// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1934// CHECK11-NEXT:    store i32 [[TMP7]], ptr [[TMP14]], align 4935// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1936// CHECK11-NEXT:    store i32 [[TMP7]], ptr [[TMP15]], align 4937// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1938// CHECK11-NEXT:    store ptr null, ptr [[TMP16]], align 4939// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2940// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP17]], align 4941// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2942// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP18]], align 4943// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2944// CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 4945// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3946// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[TMP20]], align 4947// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3948// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[TMP21]], align 4949// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3950// CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 4951// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4952// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP23]], align 4953// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4954// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP24]], align 4955// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4956// CHECK11-NEXT:    store i64 [[TMP10]], ptr [[TMP25]], align 4957// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4958// CHECK11-NEXT:    store ptr null, ptr [[TMP26]], align 4959// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0960// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0961// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0962// CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[N]], align 4963// CHECK11-NEXT:    store i32 [[TMP30]], ptr [[DOTCAPTURE_EXPR_]], align 4964// CHECK11-NEXT:    [[TMP31:%.*]] = load i32, ptr [[M]], align 4965// CHECK11-NEXT:    store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_2]], align 4966// CHECK11-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4967// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0968// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1969// CHECK11-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64970// CHECK11-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4971// CHECK11-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[TMP33]], 0972// CHECK11-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1973// CHECK11-NEXT:    [[CONV6:%.*]] = sext i32 [[DIV5]] to i64974// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]975// CHECK11-NEXT:    [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1976// CHECK11-NEXT:    store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8977// CHECK11-NEXT:    [[TMP34:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8978// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i64 [[TMP34]], 1979// CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0980// CHECK11-NEXT:    store i32 3, ptr [[TMP35]], align 4981// CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1982// CHECK11-NEXT:    store i32 5, ptr [[TMP36]], align 4983// CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2984// CHECK11-NEXT:    store ptr [[TMP27]], ptr [[TMP37]], align 4985// CHECK11-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3986// CHECK11-NEXT:    store ptr [[TMP28]], ptr [[TMP38]], align 4987// CHECK11-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4988// CHECK11-NEXT:    store ptr [[TMP29]], ptr [[TMP39]], align 4989// CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5990// CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP40]], align 4991// CHECK11-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6992// CHECK11-NEXT:    store ptr null, ptr [[TMP41]], align 4993// CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7994// CHECK11-NEXT:    store ptr null, ptr [[TMP42]], align 4995// CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8996// CHECK11-NEXT:    store i64 [[ADD]], ptr [[TMP43]], align 8997// CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9998// CHECK11-NEXT:    store i64 0, ptr [[TMP44]], align 8999// CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101000// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP45]], align 41001// CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111002// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP46]], align 41003// CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121004// CHECK11-NEXT:    store i32 0, ptr [[TMP47]], align 41005// CHECK11-NEXT:    [[TMP48:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, ptr [[KERNEL_ARGS]])1006// CHECK11-NEXT:    [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 01007// CHECK11-NEXT:    br i1 [[TMP49]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1008// CHECK11:       omp_offload.failed:1009// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]1010// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1011// CHECK11:       omp_offload.cont:1012// CHECK11-NEXT:    [[TMP50:%.*]] = load i32, ptr [[ARGC_ADDR]], align 41013// CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP50]])1014// CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 41015// CHECK11-NEXT:    [[TMP51:%.*]] = load ptr, ptr [[SAVED_STACK]], align 41016// CHECK11-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP51]])1017// CHECK11-NEXT:    [[TMP52:%.*]] = load i32, ptr [[RETVAL]], align 41018// CHECK11-NEXT:    ret i32 [[TMP52]]1019//1020//1021// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l831022// CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {1023// CHECK11-NEXT:  entry:1024// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 41025// CHECK11-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 41026// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 41027// CHECK11-NEXT:    [[VLA_ADDR2:%.*]] = alloca i32, align 41028// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41029// CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 41030// CHECK11-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 41031// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 41032// CHECK11-NEXT:    store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 41033// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41034// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 41035// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 41036// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 41037// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined, ptr [[N_ADDR]], ptr [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])1038// CHECK11-NEXT:    ret void1039//1040//1041// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined1042// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1043// CHECK11-NEXT:  entry:1044// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41045// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41046// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 41047// CHECK11-NEXT:    [[M_ADDR:%.*]] = alloca ptr, align 41048// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 41049// CHECK11-NEXT:    [[VLA_ADDR2:%.*]] = alloca i32, align 41050// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41051// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i64, align 81052// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41053// CHECK11-NEXT:    [[_TMP3:%.*]] = alloca i32, align 41054// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41055// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 41056// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 81057// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41058// CHECK11-NEXT:    [[J:%.*]] = alloca i32, align 41059// CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 81060// CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 81061// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i64, align 81062// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41063// CHECK11-NEXT:    [[I11:%.*]] = alloca i32, align 41064// CHECK11-NEXT:    [[J12:%.*]] = alloca i32, align 41065// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41066// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41067// CHECK11-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 41068// CHECK11-NEXT:    store ptr [[M]], ptr [[M_ADDR]], align 41069// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 41070// CHECK11-NEXT:    store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 41071// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41072// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 41073// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 41074// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 41075// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[VLA_ADDR2]], align 41076// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 41077// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 41078// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 41079// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 41080// CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 41081// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41082// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP7]], 01083// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 11084// CHECK11-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i641085// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41086// CHECK11-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 01087// CHECK11-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 11088// CHECK11-NEXT:    [[CONV8:%.*]] = sext i32 [[DIV7]] to i641089// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]1090// CHECK11-NEXT:    [[SUB9:%.*]] = sub nsw i64 [[MUL]], 11091// CHECK11-NEXT:    store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 81092// CHECK11-NEXT:    store i32 0, ptr [[I]], align 41093// CHECK11-NEXT:    store i32 0, ptr [[J]], align 41094// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41095// CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]1096// CHECK11-NEXT:    br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]1097// CHECK11:       land.lhs.true:1098// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41099// CHECK11-NEXT:    [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]1100// CHECK11-NEXT:    br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]1101// CHECK11:       omp.precond.then:1102// CHECK11-NEXT:    store i64 0, ptr [[DOTOMP_COMB_LB]], align 81103// CHECK11-NEXT:    [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81104// CHECK11-NEXT:    store i64 [[TMP11]], ptr [[DOTOMP_COMB_UB]], align 81105// CHECK11-NEXT:    store i64 1, ptr [[DOTOMP_STRIDE]], align 81106// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41107// CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41108// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 41109// CHECK11-NEXT:    call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)1110// CHECK11-NEXT:    [[TMP14:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 81111// CHECK11-NEXT:    [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81112// CHECK11-NEXT:    [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]1113// CHECK11-NEXT:    br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1114// CHECK11:       cond.true:1115// CHECK11-NEXT:    [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81116// CHECK11-NEXT:    br label [[COND_END:%.*]]1117// CHECK11:       cond.false:1118// CHECK11-NEXT:    [[TMP17:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 81119// CHECK11-NEXT:    br label [[COND_END]]1120// CHECK11:       cond.end:1121// CHECK11-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]1122// CHECK11-NEXT:    store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 81123// CHECK11-NEXT:    [[TMP18:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 81124// CHECK11-NEXT:    store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 81125// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1126// CHECK11:       omp.inner.for.cond:1127// CHECK11-NEXT:    [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81128// CHECK11-NEXT:    [[TMP20:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 81129// CHECK11-NEXT:    [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]1130// CHECK11-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1131// CHECK11:       omp.inner.for.body:1132// CHECK11-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81133// CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41134// CHECK11-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 01135// CHECK11-NEXT:    [[DIV16:%.*]] = sdiv i32 [[SUB15]], 11136// CHECK11-NEXT:    [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]1137// CHECK11-NEXT:    [[CONV18:%.*]] = sext i32 [[MUL17]] to i641138// CHECK11-NEXT:    [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]]1139// CHECK11-NEXT:    [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 11140// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i64 0, [[MUL20]]1141// CHECK11-NEXT:    [[CONV21:%.*]] = trunc i64 [[ADD]] to i321142// CHECK11-NEXT:    store i32 [[CONV21]], ptr [[I11]], align 41143// CHECK11-NEXT:    [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81144// CHECK11-NEXT:    [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81145// CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41146// CHECK11-NEXT:    [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 01147// CHECK11-NEXT:    [[DIV23:%.*]] = sdiv i32 [[SUB22]], 11148// CHECK11-NEXT:    [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]1149// CHECK11-NEXT:    [[CONV25:%.*]] = sext i32 [[MUL24]] to i641150// CHECK11-NEXT:    [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]]1151// CHECK11-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41152// CHECK11-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 01153// CHECK11-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 11154// CHECK11-NEXT:    [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]1155// CHECK11-NEXT:    [[CONV30:%.*]] = sext i32 [[MUL29]] to i641156// CHECK11-NEXT:    [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]1157// CHECK11-NEXT:    [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]]1158// CHECK11-NEXT:    [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 11159// CHECK11-NEXT:    [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]1160// CHECK11-NEXT:    [[CONV35:%.*]] = trunc i64 [[ADD34]] to i321161// CHECK11-NEXT:    store i32 [[CONV35]], ptr [[J12]], align 41162// CHECK11-NEXT:    [[TMP27:%.*]] = load i32, ptr [[I11]], align 41163// CHECK11-NEXT:    [[TMP28:%.*]] = mul nsw i32 [[TMP27]], [[TMP3]]1164// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 [[TMP28]]1165// CHECK11-NEXT:    [[TMP29:%.*]] = load i32, ptr [[J12]], align 41166// CHECK11-NEXT:    [[ARRAYIDX36:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i32 [[TMP29]]1167// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX36]], align 41168// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1169// CHECK11:       omp.body.continue:1170// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1171// CHECK11:       omp.inner.for.inc:1172// CHECK11-NEXT:    [[TMP30:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81173// CHECK11-NEXT:    [[ADD37:%.*]] = add nsw i64 [[TMP30]], 11174// CHECK11-NEXT:    store i64 [[ADD37]], ptr [[DOTOMP_IV]], align 81175// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1176// CHECK11:       omp.inner.for.end:1177// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1178// CHECK11:       omp.loop.exit:1179// CHECK11-NEXT:    [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41180// CHECK11-NEXT:    [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 41181// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP32]])1182// CHECK11-NEXT:    br label [[OMP_PRECOND_END]]1183// CHECK11:       omp.precond.end:1184// CHECK11-NEXT:    ret void1185//1186//1187// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_1188// CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {1189// CHECK11-NEXT:  entry:1190// CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 41191// CHECK11-NEXT:    [[A:%.*]] = alloca [10 x [2 x i32]], align 41192// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 41193// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 41194// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 41195// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41196// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41197// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81198// CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 41199// CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01200// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP0]], align 41201// CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01202// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP1]], align 41203// CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01204// CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 41205// CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01206// CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01207// CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01208// CHECK11-NEXT:    store i32 3, ptr [[TMP5]], align 41209// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11210// CHECK11-NEXT:    store i32 1, ptr [[TMP6]], align 41211// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21212// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 41213// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31214// CHECK11-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 41215// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41216// CHECK11-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP9]], align 41217// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51218// CHECK11-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP10]], align 41219// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61220// CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 41221// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71222// CHECK11-NEXT:    store ptr null, ptr [[TMP12]], align 41223// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81224// CHECK11-NEXT:    store i64 20, ptr [[TMP13]], align 81225// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91226// CHECK11-NEXT:    store i64 0, ptr [[TMP14]], align 81227// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101228// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 41229// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111230// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 41231// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121232// CHECK11-NEXT:    store i32 0, ptr [[TMP17]], align 41233// CHECK11-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, ptr [[KERNEL_ARGS]])1234// CHECK11-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 01235// CHECK11-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1236// CHECK11:       omp_offload.failed:1237// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69(ptr [[A]]) #[[ATTR3]]1238// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1239// CHECK11:       omp_offload.cont:1240// CHECK11-NEXT:    ret i32 01241//1242//1243// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l691244// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {1245// CHECK11-NEXT:  entry:1246// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41247// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41248// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41249// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined, ptr [[TMP0]])1250// CHECK11-NEXT:    ret void1251//1252//1253// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined1254// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {1255// CHECK11-NEXT:  entry:1256// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41257// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41258// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41259// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41260// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41261// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41262// CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41263// CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41264// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41265// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41266// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41267// CHECK11-NEXT:    [[J:%.*]] = alloca i32, align 41268// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41269// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41270// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41271// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41272// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 41273// CHECK11-NEXT:    store i32 19, ptr [[DOTOMP_COMB_UB]], align 41274// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41275// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41276// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41277// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41278// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1279// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41280// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 191281// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1282// CHECK11:       cond.true:1283// CHECK11-NEXT:    br label [[COND_END:%.*]]1284// CHECK11:       cond.false:1285// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41286// CHECK11-NEXT:    br label [[COND_END]]1287// CHECK11:       cond.end:1288// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1289// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41290// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41291// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41292// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1293// CHECK11:       omp.inner.for.cond:1294// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41295// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41296// CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1297// CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1298// CHECK11:       omp.inner.for.body:1299// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41300// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 21301// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 11302// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1303// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 41304// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41305// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41306// CHECK11-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 21307// CHECK11-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 21308// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]1309// CHECK11-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 11310// CHECK11-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]1311// CHECK11-NEXT:    store i32 [[ADD6]], ptr [[J]], align 41312// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 41313// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP11]]1314// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 41315// CHECK11-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP12]]1316// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX7]], align 41317// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1318// CHECK11:       omp.body.continue:1319// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1320// CHECK11:       omp.inner.for.inc:1321// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41322// CHECK11-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP13]], 11323// CHECK11-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 41324// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1325// CHECK11:       omp.inner.for.end:1326// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1327// CHECK11:       omp.loop.exit:1328// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1329// CHECK11-NEXT:    ret void1330//1331