1417 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK13// RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK15// RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK36// RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s7// RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"10// RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"12// RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"13// RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s14// RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"15 16// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK917// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK919 20// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"21// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s22// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"23 24// expected-no-diagnostics25#ifndef HEADER26#define HEADER27 28struct St {29 int a, b;30 St() : a(0), b(0) {}31 St(const St &st) : a(st.a + st.b), b(0) {}32 ~St() {}33};34 35volatile int g = 1212;36volatile int &g1 = g;37 38template <class T>39struct S {40 T f;41 S(T a) : f(a + g) {}42 S() : f(g) {}43 S(const S &s, St t = St()) : f(s.f + t.a) {}44 operator T() { return T(); }45 ~S() {}46};47 48 49template <typename T>50T tmain() {51 S<T> test;52 T t_var = T();53 T vec[] = {1, 2};54 S<T> s_arr[] = {1, 2};55 S<T> &var = test;56#pragma omp target57#pragma omp teams loop private(t_var, vec, s_arr, var)58 for (int i = 0; i < 2; ++i) {59 vec[i] = t_var;60 s_arr[i] = var;61 }62 return T();63}64 65S<float> test;66int t_var = 333;67int vec[] = {1, 2};68S<float> s_arr[] = {1, 2};69S<float> var(3);70 71int main() {72 static int sivar;73#ifdef LAMBDA74 [&]() {75#pragma omp target76#pragma omp teams loop private(g, g1, sivar)77 for (int i = 0; i < 2; ++i) {78 79 // Skip global, bound tid and loop vars80 81 g = 1;82 g1 = 1;83 sivar = 2;84 85 // Skip global, bound tid and loop vars86 [&]() {87 g = 2;88 g1 = 2;89 sivar = 4;90 91 }();92 }93 }();94 return 0;95#else96#pragma omp target97#pragma omp teams loop private(t_var, vec, s_arr, var, sivar)98 for (int i = 0; i < 2; ++i) {99 vec[i] = t_var;100 s_arr[i] = var;101 sivar += i;102 }103 return tmain<int>();104#endif105}106 107 108 109// Skip global, bound tid and loop vars110 111// private(s_arr)112 113// private(var)114 115 116// Skip global, bound tid and loop vars117 118// private(s_arr)119 120// private(var)121 122 123 124 125// Skip global, bound tid and loop vars126 127// private(s_arr)128 129 130// private(var)131 132 133// Skip global, bound tid and loop vars134// prev lb and ub135// iter variables136 137// private(s_arr)138 139 140// private(var)141 142 143 144#endif145// CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init146// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {147// CHECK1-NEXT: entry:148// CHECK1-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @test)149// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @test, ptr @__dso_handle) #[[ATTR2:[0-9]+]]150// CHECK1-NEXT: ret void151//152//153// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev154// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {155// CHECK1-NEXT: entry:156// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8157// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8158// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8159// CHECK1-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])160// CHECK1-NEXT: ret void161//162//163// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev164// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {165// CHECK1-NEXT: entry:166// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8167// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8168// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8169// CHECK1-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]170// CHECK1-NEXT: ret void171//172//173// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev174// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {175// CHECK1-NEXT: entry:176// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8177// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8178// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8179// CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0180// CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 4181// CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float182// CHECK1-NEXT: store float [[CONV]], ptr [[F]], align 4183// CHECK1-NEXT: ret void184//185//186// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev187// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {188// CHECK1-NEXT: entry:189// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8190// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8191// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8192// CHECK1-NEXT: ret void193//194//195// CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.1196// CHECK1-SAME: () #[[ATTR0]] {197// CHECK1-NEXT: entry:198// CHECK1-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @s_arr, float noundef 1.000000e+00)199// CHECK1-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i64 1), float noundef 2.000000e+00)200// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @__cxx_global_array_dtor, ptr null, ptr @__dso_handle) #[[ATTR2]]201// CHECK1-NEXT: ret void202//203//204// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef205// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {206// CHECK1-NEXT: entry:207// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8208// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4209// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8210// CHECK1-NEXT: store float [[A]], ptr [[A_ADDR]], align 4211// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8212// CHECK1-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4213// CHECK1-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])214// CHECK1-NEXT: ret void215//216//217// CHECK1-LABEL: define {{[^@]+}}@__cxx_global_array_dtor218// CHECK1-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR0]] {219// CHECK1-NEXT: entry:220// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8221// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8222// CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]223// CHECK1: arraydestroy.body:224// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]225// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1226// CHECK1-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]227// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], @s_arr228// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]229// CHECK1: arraydestroy.done1:230// CHECK1-NEXT: ret void231//232//233// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef234// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {235// CHECK1-NEXT: entry:236// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8237// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4238// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8239// CHECK1-NEXT: store float [[A]], ptr [[A_ADDR]], align 4240// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8241// CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0242// CHECK1-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4243// CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @g, align 4244// CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float245// CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]246// CHECK1-NEXT: store float [[ADD]], ptr [[F]], align 4247// CHECK1-NEXT: ret void248//249//250// CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.2251// CHECK1-SAME: () #[[ATTR0]] {252// CHECK1-NEXT: entry:253// CHECK1-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @var, float noundef 3.000000e+00)254// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @var, ptr @__dso_handle) #[[ATTR2]]255// CHECK1-NEXT: ret void256//257//258// CHECK1-LABEL: define {{[^@]+}}@main259// CHECK1-SAME: () #[[ATTR3:[0-9]+]] {260// CHECK1-NEXT: entry:261// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4262// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4263// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8264// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4265// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0266// CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4267// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1268// CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4269// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2270// CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8271// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3272// CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8273// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4274// CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8275// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5276// CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8277// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6278// CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8279// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7280// CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8281// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8282// CHECK1-NEXT: store i64 2, ptr [[TMP8]], align 8283// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9284// CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8285// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10286// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4287// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11288// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4289// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12290// CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4291// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, ptr [[KERNEL_ARGS]])292// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0293// CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]294// CHECK1: omp_offload.failed:295// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96() #[[ATTR2]]296// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]297// CHECK1: omp_offload.cont:298// CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()299// CHECK1-NEXT: ret i32 [[CALL]]300//301//302// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96303// CHECK1-SAME: () #[[ATTR4:[0-9]+]] {304// CHECK1-NEXT: entry:305// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined)306// CHECK1-NEXT: ret void307//308//309// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined310// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {311// CHECK1-NEXT: entry:312// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8313// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8314// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4315// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4316// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4317// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4318// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4319// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4320// CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4321// CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4322// CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4323// CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4324// CHECK1-NEXT: [[SIVAR:%.*]] = alloca i32, align 4325// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4326// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8327// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8328// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4329// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4330// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4331// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4332// CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0333// CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2334// CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]335// CHECK1: arrayctor.loop:336// CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]337// CHECK1-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])338// CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1339// CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]340// CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]341// CHECK1: arrayctor.cont:342// CHECK1-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])343// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8344// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4345// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)346// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4347// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1348// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]349// CHECK1: cond.true:350// CHECK1-NEXT: br label [[COND_END:%.*]]351// CHECK1: cond.false:352// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4353// CHECK1-NEXT: br label [[COND_END]]354// CHECK1: cond.end:355// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]356// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4357// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4358// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4359// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]360// CHECK1: omp.inner.for.cond:361// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4362// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4363// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]364// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]365// CHECK1: omp.inner.for.cond.cleanup:366// CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]]367// CHECK1: omp.inner.for.body:368// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4369// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1370// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]371// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4372// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4373// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4374// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64375// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]]376// CHECK1-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4377// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4378// CHECK1-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP10]] to i64379// CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 [[IDXPROM2]]380// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX3]], ptr align 4 [[VAR]], i64 4, i1 false)381// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4382// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[SIVAR]], align 4383// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]384// CHECK1-NEXT: store i32 [[ADD4]], ptr [[SIVAR]], align 4385// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]386// CHECK1: omp.body.continue:387// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]388// CHECK1: omp.inner.for.inc:389// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4390// CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1391// CHECK1-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4392// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]393// CHECK1: omp.inner.for.end:394// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]395// CHECK1: omp.loop.exit:396// CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8397// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4398// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP15]])399// CHECK1-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]400// CHECK1-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0401// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN6]], i64 2402// CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]403// CHECK1: arraydestroy.body:404// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP16]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]405// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1406// CHECK1-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]407// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]408// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]409// CHECK1: arraydestroy.done7:410// CHECK1-NEXT: ret void411//412//413// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v414// CHECK1-SAME: () #[[ATTR1]] comdat {415// CHECK1-NEXT: entry:416// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4417// CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4418// CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4419// CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4420// CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4421// CHECK1-NEXT: [[VAR:%.*]] = alloca ptr, align 8422// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4423// CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8424// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8425// CHECK1-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])426// CHECK1-NEXT: store i32 0, ptr [[T_VAR]], align 4427// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)428// CHECK1-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)429// CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1430// CHECK1-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)431// CHECK1-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8432// CHECK1-NEXT: store ptr undef, ptr [[_TMP1]], align 8433// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0434// CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4435// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1436// CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4437// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2438// CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8439// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3440// CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8441// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4442// CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8443// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5444// CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8445// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6446// CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8447// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7448// CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8449// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8450// CHECK1-NEXT: store i64 2, ptr [[TMP8]], align 8451// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9452// CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8453// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10454// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4455// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11456// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4457// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12458// CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4459// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.region_id, ptr [[KERNEL_ARGS]])460// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0461// CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]462// CHECK1: omp_offload.failed:463// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56() #[[ATTR2]]464// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]465// CHECK1: omp_offload.cont:466// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4467// CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0468// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2469// CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]470// CHECK1: arraydestroy.body:471// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]472// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1473// CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]474// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]475// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]476// CHECK1: arraydestroy.done2:477// CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]478// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4479// CHECK1-NEXT: ret i32 [[TMP16]]480//481//482// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev483// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {484// CHECK1-NEXT: entry:485// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8486// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8487// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8488// CHECK1-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])489// CHECK1-NEXT: ret void490//491//492// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei493// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {494// CHECK1-NEXT: entry:495// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8496// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4497// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8498// CHECK1-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4499// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8500// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4501// CHECK1-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])502// CHECK1-NEXT: ret void503//504//505// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56506// CHECK1-SAME: () #[[ATTR4]] {507// CHECK1-NEXT: entry:508// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined)509// CHECK1-NEXT: ret void510//511//512// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined513// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {514// CHECK1-NEXT: entry:515// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8516// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8517// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4518// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4519// CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8520// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4521// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4522// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4523// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4524// CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4525// CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4526// CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4527// CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4528// CHECK1-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8529// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4530// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8531// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8532// CHECK1-NEXT: store ptr undef, ptr [[_TMP1]], align 8533// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4534// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4535// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4536// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4537// CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0538// CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2539// CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]540// CHECK1: arrayctor.loop:541// CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]542// CHECK1-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])543// CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1544// CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]545// CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]546// CHECK1: arrayctor.cont:547// CHECK1-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])548// CHECK1-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 8549// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8550// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4551// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)552// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4553// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1554// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]555// CHECK1: cond.true:556// CHECK1-NEXT: br label [[COND_END:%.*]]557// CHECK1: cond.false:558// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4559// CHECK1-NEXT: br label [[COND_END]]560// CHECK1: cond.end:561// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]562// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4563// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4564// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4565// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]566// CHECK1: omp.inner.for.cond:567// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4568// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4569// CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]570// CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]571// CHECK1: omp.inner.for.cond.cleanup:572// CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]]573// CHECK1: omp.inner.for.body:574// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4575// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1576// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]577// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4578// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4579// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4580// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64581// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]]582// CHECK1-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4583// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 8584// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4585// CHECK1-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64586// CHECK1-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 [[IDXPROM4]]587// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX5]], ptr align 4 [[TMP10]], i64 4, i1 false)588// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]589// CHECK1: omp.body.continue:590// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]591// CHECK1: omp.inner.for.inc:592// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4593// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1594// CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4595// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]596// CHECK1: omp.inner.for.end:597// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]598// CHECK1: omp.loop.exit:599// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8600// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4601// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])602// CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]603// CHECK1-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0604// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN7]], i64 2605// CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]606// CHECK1: arraydestroy.body:607// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]608// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1609// CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]610// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]611// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]612// CHECK1: arraydestroy.done8:613// CHECK1-NEXT: ret void614//615//616// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev617// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {618// CHECK1-NEXT: entry:619// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8620// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8621// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8622// CHECK1-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]623// CHECK1-NEXT: ret void624//625//626// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev627// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {628// CHECK1-NEXT: entry:629// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8630// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8631// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8632// CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0633// CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 4634// CHECK1-NEXT: store i32 [[TMP0]], ptr [[F]], align 4635// CHECK1-NEXT: ret void636//637//638// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei639// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {640// CHECK1-NEXT: entry:641// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8642// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4643// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8644// CHECK1-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4645// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8646// CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0647// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4648// CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @g, align 4649// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]650// CHECK1-NEXT: store i32 [[ADD]], ptr [[F]], align 4651// CHECK1-NEXT: ret void652//653//654// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev655// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {656// CHECK1-NEXT: entry:657// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8658// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8659// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8660// CHECK1-NEXT: ret void661//662//663// CHECK1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_teams_generic_loop_private_codegen.cpp664// CHECK1-SAME: () #[[ATTR0]] {665// CHECK1-NEXT: entry:666// CHECK1-NEXT: call void @__cxx_global_var_init()667// CHECK1-NEXT: call void @__cxx_global_var_init.1()668// CHECK1-NEXT: call void @__cxx_global_var_init.2()669// CHECK1-NEXT: ret void670//671//672// CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init673// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {674// CHECK3-NEXT: entry:675// CHECK3-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @test)676// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @test, ptr @__dso_handle) #[[ATTR2:[0-9]+]]677// CHECK3-NEXT: ret void678//679//680// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev681// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {682// CHECK3-NEXT: entry:683// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4684// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4685// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4686// CHECK3-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])687// CHECK3-NEXT: ret void688//689//690// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev691// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {692// CHECK3-NEXT: entry:693// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4694// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4695// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4696// CHECK3-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]697// CHECK3-NEXT: ret void698//699//700// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev701// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {702// CHECK3-NEXT: entry:703// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4704// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4705// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4706// CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0707// CHECK3-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 4708// CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float709// CHECK3-NEXT: store float [[CONV]], ptr [[F]], align 4710// CHECK3-NEXT: ret void711//712//713// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev714// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {715// CHECK3-NEXT: entry:716// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4717// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4718// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4719// CHECK3-NEXT: ret void720//721//722// CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init.1723// CHECK3-SAME: () #[[ATTR0]] {724// CHECK3-NEXT: entry:725// CHECK3-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @s_arr, float noundef 1.000000e+00)726// CHECK3-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i32 1), float noundef 2.000000e+00)727// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @__cxx_global_array_dtor, ptr null, ptr @__dso_handle) #[[ATTR2]]728// CHECK3-NEXT: ret void729//730//731// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef732// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {733// CHECK3-NEXT: entry:734// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4735// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca float, align 4736// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4737// CHECK3-NEXT: store float [[A]], ptr [[A_ADDR]], align 4738// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4739// CHECK3-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4740// CHECK3-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])741// CHECK3-NEXT: ret void742//743//744// CHECK3-LABEL: define {{[^@]+}}@__cxx_global_array_dtor745// CHECK3-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR0]] {746// CHECK3-NEXT: entry:747// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4748// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4749// CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]750// CHECK3: arraydestroy.body:751// CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i32 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]752// CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1753// CHECK3-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]754// CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], @s_arr755// CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]756// CHECK3: arraydestroy.done1:757// CHECK3-NEXT: ret void758//759//760// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef761// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {762// CHECK3-NEXT: entry:763// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4764// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca float, align 4765// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4766// CHECK3-NEXT: store float [[A]], ptr [[A_ADDR]], align 4767// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4768// CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0769// CHECK3-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4770// CHECK3-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @g, align 4771// CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float772// CHECK3-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]773// CHECK3-NEXT: store float [[ADD]], ptr [[F]], align 4774// CHECK3-NEXT: ret void775//776//777// CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init.2778// CHECK3-SAME: () #[[ATTR0]] {779// CHECK3-NEXT: entry:780// CHECK3-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @var, float noundef 3.000000e+00)781// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @var, ptr @__dso_handle) #[[ATTR2]]782// CHECK3-NEXT: ret void783//784//785// CHECK3-LABEL: define {{[^@]+}}@main786// CHECK3-SAME: () #[[ATTR3:[0-9]+]] {787// CHECK3-NEXT: entry:788// CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4789// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4790// CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8791// CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4792// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0793// CHECK3-NEXT: store i32 3, ptr [[TMP0]], align 4794// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1795// CHECK3-NEXT: store i32 0, ptr [[TMP1]], align 4796// CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2797// CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4798// CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3799// CHECK3-NEXT: store ptr null, ptr [[TMP3]], align 4800// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4801// CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 4802// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5803// CHECK3-NEXT: store ptr null, ptr [[TMP5]], align 4804// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6805// CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 4806// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7807// CHECK3-NEXT: store ptr null, ptr [[TMP7]], align 4808// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8809// CHECK3-NEXT: store i64 2, ptr [[TMP8]], align 8810// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9811// CHECK3-NEXT: store i64 0, ptr [[TMP9]], align 8812// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10813// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4814// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11815// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4816// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12817// CHECK3-NEXT: store i32 0, ptr [[TMP12]], align 4818// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, ptr [[KERNEL_ARGS]])819// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0820// CHECK3-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]821// CHECK3: omp_offload.failed:822// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96() #[[ATTR2]]823// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]824// CHECK3: omp_offload.cont:825// CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()826// CHECK3-NEXT: ret i32 [[CALL]]827//828//829// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96830// CHECK3-SAME: () #[[ATTR4:[0-9]+]] {831// CHECK3-NEXT: entry:832// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined)833// CHECK3-NEXT: ret void834//835//836// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined837// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {838// CHECK3-NEXT: entry:839// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4840// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4841// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4842// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4843// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4844// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4845// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4846// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4847// CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4848// CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4849// CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4850// CHECK3-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4851// CHECK3-NEXT: [[SIVAR:%.*]] = alloca i32, align 4852// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4853// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4854// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4855// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4856// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4857// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4858// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4859// CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0860// CHECK3-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2861// CHECK3-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]862// CHECK3: arrayctor.loop:863// CHECK3-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]864// CHECK3-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])865// CHECK3-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1866// CHECK3-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]867// CHECK3-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]868// CHECK3: arrayctor.cont:869// CHECK3-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])870// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4871// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4872// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)873// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4874// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1875// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]876// CHECK3: cond.true:877// CHECK3-NEXT: br label [[COND_END:%.*]]878// CHECK3: cond.false:879// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4880// CHECK3-NEXT: br label [[COND_END]]881// CHECK3: cond.end:882// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]883// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4884// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4885// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4886// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]887// CHECK3: omp.inner.for.cond:888// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4889// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4890// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]891// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]892// CHECK3: omp.inner.for.cond.cleanup:893// CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]]894// CHECK3: omp.inner.for.body:895// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4896// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1897// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]898// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4899// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4900// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4901// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP9]]902// CHECK3-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4903// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4904// CHECK3-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 [[TMP10]]905// CHECK3-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX2]], ptr align 4 [[VAR]], i32 4, i1 false)906// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4907// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[SIVAR]], align 4908// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]909// CHECK3-NEXT: store i32 [[ADD3]], ptr [[SIVAR]], align 4910// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]911// CHECK3: omp.body.continue:912// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]913// CHECK3: omp.inner.for.inc:914// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4915// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1916// CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4917// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]918// CHECK3: omp.inner.for.end:919// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]920// CHECK3: omp.loop.exit:921// CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4922// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4923// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP15]])924// CHECK3-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]925// CHECK3-NEXT: [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0926// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN5]], i32 2927// CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]928// CHECK3: arraydestroy.body:929// CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP16]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]930// CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1931// CHECK3-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]932// CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]]933// CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]934// CHECK3: arraydestroy.done6:935// CHECK3-NEXT: ret void936//937//938// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v939// CHECK3-SAME: () #[[ATTR1]] comdat {940// CHECK3-NEXT: entry:941// CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4942// CHECK3-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4943// CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4944// CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4945// CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4946// CHECK3-NEXT: [[VAR:%.*]] = alloca ptr, align 4947// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4948// CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4949// CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8950// CHECK3-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])951// CHECK3-NEXT: store i32 0, ptr [[T_VAR]], align 4952// CHECK3-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)953// CHECK3-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)954// CHECK3-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1955// CHECK3-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)956// CHECK3-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4957// CHECK3-NEXT: store ptr undef, ptr [[_TMP1]], align 4958// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0959// CHECK3-NEXT: store i32 3, ptr [[TMP0]], align 4960// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1961// CHECK3-NEXT: store i32 0, ptr [[TMP1]], align 4962// CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2963// CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4964// CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3965// CHECK3-NEXT: store ptr null, ptr [[TMP3]], align 4966// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4967// CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 4968// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5969// CHECK3-NEXT: store ptr null, ptr [[TMP5]], align 4970// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6971// CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 4972// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7973// CHECK3-NEXT: store ptr null, ptr [[TMP7]], align 4974// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8975// CHECK3-NEXT: store i64 2, ptr [[TMP8]], align 8976// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9977// CHECK3-NEXT: store i64 0, ptr [[TMP9]], align 8978// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10979// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4980// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11981// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4982// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12983// CHECK3-NEXT: store i32 0, ptr [[TMP12]], align 4984// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.region_id, ptr [[KERNEL_ARGS]])985// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0986// CHECK3-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]987// CHECK3: omp_offload.failed:988// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56() #[[ATTR2]]989// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]990// CHECK3: omp_offload.cont:991// CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4992// CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0993// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2994// CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]995// CHECK3: arraydestroy.body:996// CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]997// CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1998// CHECK3-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]999// CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1000// CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1001// CHECK3: arraydestroy.done2:1002// CHECK3-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]]1003// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 41004// CHECK3-NEXT: ret i32 [[TMP16]]1005//1006//1007// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1008// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1009// CHECK3-NEXT: entry:1010// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41011// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41012// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41013// CHECK3-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1014// CHECK3-NEXT: ret void1015//1016//1017// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1018// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1019// CHECK3-NEXT: entry:1020// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41021// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41022// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41023// CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41024// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41025// CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41026// CHECK3-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1027// CHECK3-NEXT: ret void1028//1029//1030// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l561031// CHECK3-SAME: () #[[ATTR4]] {1032// CHECK3-NEXT: entry:1033// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined)1034// CHECK3-NEXT: ret void1035//1036//1037// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l56.omp_outlined1038// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {1039// CHECK3-NEXT: entry:1040// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41041// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41042// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41043// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41044// CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 41045// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41046// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41047// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41048// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41049// CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 41050// CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41051// CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41052// CHECK3-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41053// CHECK3-NEXT: [[_TMP2:%.*]] = alloca ptr, align 41054// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41055// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41056// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41057// CHECK3-NEXT: store ptr undef, ptr [[_TMP1]], align 41058// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41059// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 41060// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41061// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41062// CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01063// CHECK3-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21064// CHECK3-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]1065// CHECK3: arrayctor.loop:1066// CHECK3-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1067// CHECK3-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1068// CHECK3-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 11069// CHECK3-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1070// CHECK3-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1071// CHECK3: arrayctor.cont:1072// CHECK3-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1073// CHECK3-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 41074// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41075// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41076// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1077// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41078// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11079// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1080// CHECK3: cond.true:1081// CHECK3-NEXT: br label [[COND_END:%.*]]1082// CHECK3: cond.false:1083// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41084// CHECK3-NEXT: br label [[COND_END]]1085// CHECK3: cond.end:1086// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1087// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41088// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41089// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41090// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1091// CHECK3: omp.inner.for.cond:1092// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41093// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41094// CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1095// CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1096// CHECK3: omp.inner.for.cond.cleanup:1097// CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1098// CHECK3: omp.inner.for.body:1099// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41100// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 11101// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1102// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 41103// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 41104// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 41105// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP9]]1106// CHECK3-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 41107// CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 41108// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 41109// CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 [[TMP11]]1110// CHECK3-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP10]], i32 4, i1 false)1111// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1112// CHECK3: omp.body.continue:1113// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1114// CHECK3: omp.inner.for.inc:1115// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41116// CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 11117// CHECK3-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 41118// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]1119// CHECK3: omp.inner.for.end:1120// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1121// CHECK3: omp.loop.exit:1122// CHECK3-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41123// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 41124// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])1125// CHECK3-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]]1126// CHECK3-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01127// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN6]], i32 21128// CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1129// CHECK3: arraydestroy.body:1130// CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1131// CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11132// CHECK3-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]1133// CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]1134// CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]1135// CHECK3: arraydestroy.done7:1136// CHECK3-NEXT: ret void1137//1138//1139// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1140// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1141// CHECK3-NEXT: entry:1142// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41143// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41144// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41145// CHECK3-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]1146// CHECK3-NEXT: ret void1147//1148//1149// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1150// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1151// CHECK3-NEXT: entry:1152// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41153// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41154// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41155// CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01156// CHECK3-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 41157// CHECK3-NEXT: store i32 [[TMP0]], ptr [[F]], align 41158// CHECK3-NEXT: ret void1159//1160//1161// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1162// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1163// CHECK3-NEXT: entry:1164// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41165// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41166// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41167// CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41168// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41169// CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01170// CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41171// CHECK3-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @g, align 41172// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]1173// CHECK3-NEXT: store i32 [[ADD]], ptr [[F]], align 41174// CHECK3-NEXT: ret void1175//1176//1177// CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1178// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1179// CHECK3-NEXT: entry:1180// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41181// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41182// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41183// CHECK3-NEXT: ret void1184//1185//1186// CHECK3-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_teams_generic_loop_private_codegen.cpp1187// CHECK3-SAME: () #[[ATTR0]] {1188// CHECK3-NEXT: entry:1189// CHECK3-NEXT: call void @__cxx_global_var_init()1190// CHECK3-NEXT: call void @__cxx_global_var_init.1()1191// CHECK3-NEXT: call void @__cxx_global_var_init.2()1192// CHECK3-NEXT: ret void1193//1194//1195// CHECK9-LABEL: define {{[^@]+}}@__cxx_global_var_init1196// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {1197// CHECK9-NEXT: entry:1198// CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @test)1199// CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @test, ptr @__dso_handle) #[[ATTR2:[0-9]+]]1200// CHECK9-NEXT: ret void1201//1202//1203// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1204// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {1205// CHECK9-NEXT: entry:1206// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81207// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81208// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81209// CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1210// CHECK9-NEXT: ret void1211//1212//1213// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1214// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1215// CHECK9-NEXT: entry:1216// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81217// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81218// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81219// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]1220// CHECK9-NEXT: ret void1221//1222//1223// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1224// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1225// CHECK9-NEXT: entry:1226// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81227// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81228// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81229// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01230// CHECK9-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 41231// CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float1232// CHECK9-NEXT: store float [[CONV]], ptr [[F]], align 41233// CHECK9-NEXT: ret void1234//1235//1236// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1237// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1238// CHECK9-NEXT: entry:1239// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81240// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81241// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81242// CHECK9-NEXT: ret void1243//1244//1245// CHECK9-LABEL: define {{[^@]+}}@__cxx_global_var_init.11246// CHECK9-SAME: () #[[ATTR0]] {1247// CHECK9-NEXT: entry:1248// CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @s_arr, float noundef 1.000000e+00)1249// CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i64 1), float noundef 2.000000e+00)1250// CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @__cxx_global_array_dtor, ptr null, ptr @__dso_handle) #[[ATTR2]]1251// CHECK9-NEXT: ret void1252//1253//1254// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1255// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1256// CHECK9-NEXT: entry:1257// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81258// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 41259// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81260// CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 41261// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81262// CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41263// CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1264// CHECK9-NEXT: ret void1265//1266//1267// CHECK9-LABEL: define {{[^@]+}}@__cxx_global_array_dtor1268// CHECK9-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR0]] {1269// CHECK9-NEXT: entry:1270// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 81271// CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 81272// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1273// CHECK9: arraydestroy.body:1274// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1275// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11276// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]]1277// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], @s_arr1278// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]1279// CHECK9: arraydestroy.done1:1280// CHECK9-NEXT: ret void1281//1282//1283// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1284// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1285// CHECK9-NEXT: entry:1286// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81287// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 41288// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81289// CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 41290// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81291// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01292// CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41293// CHECK9-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @g, align 41294// CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float1295// CHECK9-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]1296// CHECK9-NEXT: store float [[ADD]], ptr [[F]], align 41297// CHECK9-NEXT: ret void1298//1299//1300// CHECK9-LABEL: define {{[^@]+}}@__cxx_global_var_init.21301// CHECK9-SAME: () #[[ATTR0]] {1302// CHECK9-NEXT: entry:1303// CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @var, float noundef 3.000000e+00)1304// CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @var, ptr @__dso_handle) #[[ATTR2]]1305// CHECK9-NEXT: ret void1306//1307//1308// CHECK9-LABEL: define {{[^@]+}}@main1309// CHECK9-SAME: () #[[ATTR3:[0-9]+]] {1310// CHECK9-NEXT: entry:1311// CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 41312// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 11313// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 41314// CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])1315// CHECK9-NEXT: ret i32 01316//1317//1318// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l751319// CHECK9-SAME: (i64 noundef [[G1:%.*]]) #[[ATTR4:[0-9]+]] {1320// CHECK9-NEXT: entry:1321// CHECK9-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 81322// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 81323// CHECK9-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 81324// CHECK9-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 81325// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l75.omp_outlined)1326// CHECK9-NEXT: ret void1327//1328//1329// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l75.omp_outlined1330// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] {1331// CHECK9-NEXT: entry:1332// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81333// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81334// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41335// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 41336// CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 81337// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41338// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41339// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41340// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41341// CHECK9-NEXT: [[G:%.*]] = alloca i32, align 41342// CHECK9-NEXT: [[G1:%.*]] = alloca i32, align 41343// CHECK9-NEXT: [[_TMP2:%.*]] = alloca ptr, align 81344// CHECK9-NEXT: [[SIVAR:%.*]] = alloca i32, align 41345// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 41346// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 81347// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81348// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81349// CHECK9-NEXT: store ptr undef, ptr [[_TMP1]], align 81350// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41351// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 41352// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41353// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41354// CHECK9-NEXT: store ptr [[G1]], ptr [[_TMP2]], align 81355// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81356// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41357// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1358// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41359// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11360// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1361// CHECK9: cond.true:1362// CHECK9-NEXT: br label [[COND_END:%.*]]1363// CHECK9: cond.false:1364// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41365// CHECK9-NEXT: br label [[COND_END]]1366// CHECK9: cond.end:1367// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1368// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41369// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41370// CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41371// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1372// CHECK9: omp.inner.for.cond:1373// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41374// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41375// CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1376// CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1377// CHECK9: omp.inner.for.body:1378// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41379// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 11380// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1381// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 41382// CHECK9-NEXT: store i32 1, ptr [[G]], align 41383// CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[_TMP2]], align 81384// CHECK9-NEXT: store volatile i32 1, ptr [[TMP8]], align 41385// CHECK9-NEXT: store i32 2, ptr [[SIVAR]], align 41386// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 01387// CHECK9-NEXT: store ptr [[G]], ptr [[TMP9]], align 81388// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 11389// CHECK9-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP2]], align 81390// CHECK9-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 81391// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 21392// CHECK9-NEXT: store ptr [[SIVAR]], ptr [[TMP12]], align 81393// CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]])1394// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1395// CHECK9: omp.body.continue:1396// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1397// CHECK9: omp.inner.for.inc:1398// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41399// CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 11400// CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 41401// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]1402// CHECK9: omp.inner.for.end:1403// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1404// CHECK9: omp.loop.exit:1405// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])1406// CHECK9-NEXT: ret void1407//1408//1409// CHECK9-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_teams_generic_loop_private_codegen.cpp1410// CHECK9-SAME: () #[[ATTR0]] {1411// CHECK9-NEXT: entry:1412// CHECK9-NEXT: call void @__cxx_global_var_init()1413// CHECK9-NEXT: call void @__cxx_global_var_init.1()1414// CHECK9-NEXT: call void @__cxx_global_var_init.2()1415// CHECK9-NEXT: ret void1416//1417