238 lines · cpp
1// Check code generation2// RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp -emit-llvm %s -o - | FileCheck %s --check-prefix=IR3 4// Check same results after serialization round-trip5// RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp -emit-pch -o %t %s6// RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp -include-pch %t -emit-llvm %s -o - | FileCheck %s --check-prefix=IR7// expected-no-diagnostics8 9#ifndef HEADER10#define HEADER11 12// placeholder for loop body code.13extern "C" void body(...) {}14 15 16// IR-LABEL: @func(17// IR-NEXT: [[ENTRY:.*]]:18// IR-NEXT: %[[START_ADDR:.+]] = alloca i32, align 419// IR-NEXT: %[[END_ADDR:.+]] = alloca i32, align 420// IR-NEXT: %[[STEP_ADDR:.+]] = alloca i32, align 421// IR-NEXT: %[[DOTOMP_IV:.+]] = alloca i32, align 422// IR-NEXT: %[[TMP:.+]] = alloca i32, align 423// IR-NEXT: %[[I:.+]] = alloca i32, align 424// IR-NEXT: %[[DOTCAPTURE_EXPR_:.+]] = alloca i32, align 425// IR-NEXT: %[[DOTCAPTURE_EXPR_1:.+]] = alloca i32, align 426// IR-NEXT: %[[DOTCAPTURE_EXPR_2:.+]] = alloca i32, align 427// IR-NEXT: %[[DOTCAPTURE_EXPR_3:.+]] = alloca i32, align 428// IR-NEXT: %[[DOTUNROLLED_IV_I:.+]] = alloca i32, align 429// IR-NEXT: %[[DOTCAPTURE_EXPR_6:.+]] = alloca i32, align 430// IR-NEXT: %[[DOTCAPTURE_EXPR_8:.+]] = alloca i32, align 431// IR-NEXT: %[[DOTCAPTURE_EXPR_12:.+]] = alloca i32, align 432// IR-NEXT: %[[DOTCAPTURE_EXPR_14:.+]] = alloca i32, align 433// IR-NEXT: %[[DOTUNROLLED_IV__UNROLLED_IV_I:.+]] = alloca i32, align 434// IR-NEXT: %[[DOTOMP_LB:.+]] = alloca i32, align 435// IR-NEXT: %[[DOTOMP_UB:.+]] = alloca i32, align 436// IR-NEXT: %[[DOTOMP_STRIDE:.+]] = alloca i32, align 437// IR-NEXT: %[[DOTOMP_IS_LAST:.+]] = alloca i32, align 438// IR-NEXT: %[[DOTUNROLLED_IV__UNROLLED_IV_I18:.+]] = alloca i32, align 439// IR-NEXT: %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I:.+]] = alloca i32, align 440// IR-NEXT: %[[DOTUNROLL_INNER_IV_I:.+]] = alloca i32, align 441// IR-NEXT: %[[TMP0:.+]] = call i32 @__kmpc_global_thread_num(ptr @2)42// IR-NEXT: store i32 %[[START:.+]], ptr %[[START_ADDR]], align 443// IR-NEXT: store i32 %[[END:.+]], ptr %[[END_ADDR]], align 444// IR-NEXT: store i32 %[[STEP:.+]], ptr %[[STEP_ADDR]], align 445// IR-NEXT: %[[TMP1:.+]] = load i32, ptr %[[START_ADDR]], align 446// IR-NEXT: store i32 %[[TMP1]], ptr %[[I]], align 447// IR-NEXT: %[[TMP2:.+]] = load i32, ptr %[[START_ADDR]], align 448// IR-NEXT: store i32 %[[TMP2]], ptr %[[DOTCAPTURE_EXPR_]], align 449// IR-NEXT: %[[TMP3:.+]] = load i32, ptr %[[END_ADDR]], align 450// IR-NEXT: store i32 %[[TMP3]], ptr %[[DOTCAPTURE_EXPR_1]], align 451// IR-NEXT: %[[TMP4:.+]] = load i32, ptr %[[STEP_ADDR]], align 452// IR-NEXT: store i32 %[[TMP4]], ptr %[[DOTCAPTURE_EXPR_2]], align 453// IR-NEXT: %[[TMP5:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_1]], align 454// IR-NEXT: %[[TMP6:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_]], align 455// IR-NEXT: %[[SUB:.+]] = sub i32 %[[TMP5]], %[[TMP6]]56// IR-NEXT: %[[SUB4:.+]] = sub i32 %[[SUB]], 157// IR-NEXT: %[[TMP7:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_2]], align 458// IR-NEXT: %[[ADD:.+]] = add i32 %[[SUB4]], %[[TMP7]]59// IR-NEXT: %[[TMP8:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_2]], align 460// IR-NEXT: %[[DIV:.+]] = udiv i32 %[[ADD]], %[[TMP8]]61// IR-NEXT: %[[SUB5:.+]] = sub i32 %[[DIV]], 162// IR-NEXT: store i32 %[[SUB5]], ptr %[[DOTCAPTURE_EXPR_3]], align 463// IR-NEXT: store i32 0, ptr %[[DOTUNROLLED_IV_I]], align 464// IR-NEXT: %[[TMP9:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_3]], align 465// IR-NEXT: %[[ADD7:.+]] = add i32 %[[TMP9]], 166// IR-NEXT: store i32 %[[ADD7]], ptr %[[DOTCAPTURE_EXPR_6]], align 467// IR-NEXT: %[[TMP10:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_6]], align 468// IR-NEXT: %[[SUB9:.+]] = sub i32 %[[TMP10]], -169// IR-NEXT: %[[DIV10:.+]] = udiv i32 %[[SUB9]], 270// IR-NEXT: %[[SUB11:.+]] = sub i32 %[[DIV10]], 171// IR-NEXT: store i32 %[[SUB11]], ptr %[[DOTCAPTURE_EXPR_8]], align 472// IR-NEXT: %[[TMP11:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_8]], align 473// IR-NEXT: %[[ADD13:.+]] = add i32 %[[TMP11]], 174// IR-NEXT: store i32 %[[ADD13]], ptr %[[DOTCAPTURE_EXPR_12]], align 475// IR-NEXT: %[[TMP12:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_12]], align 476// IR-NEXT: %[[SUB15:.+]] = sub i32 %[[TMP12]], -177// IR-NEXT: %[[DIV16:.+]] = udiv i32 %[[SUB15]], 278// IR-NEXT: %[[SUB17:.+]] = sub i32 %[[DIV16]], 179// IR-NEXT: store i32 %[[SUB17]], ptr %[[DOTCAPTURE_EXPR_14]], align 480// IR-NEXT: store i32 0, ptr %[[DOTUNROLLED_IV__UNROLLED_IV_I]], align 481// IR-NEXT: %[[TMP13:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_12]], align 482// IR-NEXT: %[[CMP:.+]] = icmp ult i32 0, %[[TMP13]]83// IR-NEXT: br i1 %[[CMP]], label %[[OMP_PRECOND_THEN:.+]], label %[[OMP_PRECOND_END:.+]]84// IR-EMPTY:85// IR-NEXT: [[OMP_PRECOND_THEN]]:86// IR-NEXT: store i32 0, ptr %[[DOTOMP_LB]], align 487// IR-NEXT: %[[TMP14:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_14]], align 488// IR-NEXT: store i32 %[[TMP14]], ptr %[[DOTOMP_UB]], align 489// IR-NEXT: store i32 1, ptr %[[DOTOMP_STRIDE]], align 490// IR-NEXT: store i32 0, ptr %[[DOTOMP_IS_LAST]], align 491// IR-NEXT: call void @__kmpc_for_static_init_4u(ptr @1, i32 %[[TMP0]], i32 34, ptr %[[DOTOMP_IS_LAST]], ptr %[[DOTOMP_LB]], ptr %[[DOTOMP_UB]], ptr %[[DOTOMP_STRIDE]], i32 1, i32 1)92// IR-NEXT: %[[TMP15:.+]] = load i32, ptr %[[DOTOMP_UB]], align 493// IR-NEXT: %[[TMP16:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_14]], align 494// IR-NEXT: %[[CMP19:.+]] = icmp ugt i32 %[[TMP15]], %[[TMP16]]95// IR-NEXT: br i1 %[[CMP19]], label %[[COND_TRUE:.+]], label %[[COND_FALSE:.+]]96// IR-EMPTY:97// IR-NEXT: [[COND_TRUE]]:98// IR-NEXT: %[[TMP17:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_14]], align 499// IR-NEXT: br label %[[COND_END:.+]]100// IR-EMPTY:101// IR-NEXT: [[COND_FALSE]]:102// IR-NEXT: %[[TMP18:.+]] = load i32, ptr %[[DOTOMP_UB]], align 4103// IR-NEXT: br label %[[COND_END]]104// IR-EMPTY:105// IR-NEXT: [[COND_END]]:106// IR-NEXT: %[[COND:.+]] = phi i32 [ %[[TMP17]], %[[COND_TRUE]] ], [ %[[TMP18]], %[[COND_FALSE]] ]107// IR-NEXT: store i32 %[[COND]], ptr %[[DOTOMP_UB]], align 4108// IR-NEXT: %[[TMP19:.+]] = load i32, ptr %[[DOTOMP_LB]], align 4109// IR-NEXT: store i32 %[[TMP19]], ptr %[[DOTOMP_IV]], align 4110// IR-NEXT: br label %[[OMP_INNER_FOR_COND:.+]]111// IR-EMPTY:112// IR-NEXT: [[OMP_INNER_FOR_COND]]:113// IR-NEXT: %[[TMP20:.+]] = load i32, ptr %[[DOTOMP_IV]], align 4114// IR-NEXT: %[[TMP21:.+]] = load i32, ptr %[[DOTOMP_UB]], align 4115// IR-NEXT: %[[ADD20:.+]] = add i32 %[[TMP21]], 1116// IR-NEXT: %[[CMP21:.+]] = icmp ult i32 %[[TMP20]], %[[ADD20]]117// IR-NEXT: br i1 %[[CMP21]], label %[[OMP_INNER_FOR_BODY:.+]], label %[[OMP_INNER_FOR_END:.+]]118// IR-EMPTY:119// IR-NEXT: [[OMP_INNER_FOR_BODY]]:120// IR-NEXT: %[[TMP22:.+]] = load i32, ptr %[[DOTOMP_IV]], align 4121// IR-NEXT: %[[MUL:.+]] = mul i32 %[[TMP22]], 2122// IR-NEXT: %[[ADD22:.+]] = add i32 0, %[[MUL]]123// IR-NEXT: store i32 %[[ADD22]], ptr %[[DOTUNROLLED_IV__UNROLLED_IV_I18]], align 4124// IR-NEXT: %[[TMP23:.+]] = load i32, ptr %[[DOTUNROLLED_IV__UNROLLED_IV_I18]], align 4125// IR-NEXT: store i32 %[[TMP23]], ptr %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I]], align 4126// IR-NEXT: br label %[[FOR_COND:.+]]127// IR-EMPTY:128// IR-NEXT: [[FOR_COND]]:129// IR-NEXT: %[[TMP24:.+]] = load i32, ptr %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I]], align 4130// IR-NEXT: %[[TMP25:.+]] = load i32, ptr %[[DOTUNROLLED_IV__UNROLLED_IV_I18]], align 4131// IR-NEXT: %[[ADD23:.+]] = add i32 %[[TMP25]], 2132// IR-NEXT: %[[CMP24:.+]] = icmp ult i32 %[[TMP24]], %[[ADD23]]133// IR-NEXT: br i1 %[[CMP24]], label %[[LAND_RHS:.+]], label %[[LAND_END:.+]]134// IR-EMPTY:135// IR-NEXT: [[LAND_RHS]]:136// IR-NEXT: %[[TMP26:.+]] = load i32, ptr %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I]], align 4137// IR-NEXT: %[[TMP27:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_8]], align 4138// IR-NEXT: %[[ADD25:.+]] = add i32 %[[TMP27]], 1139// IR-NEXT: %[[CMP26:.+]] = icmp ult i32 %[[TMP26]], %[[ADD25]]140// IR-NEXT: br label %[[LAND_END]]141// IR-EMPTY:142// IR-NEXT: [[LAND_END]]:143// IR-NEXT: %[[TMP28:.+]] = phi i1 [ false, %[[FOR_COND]] ], [ %[[CMP26]], %[[LAND_RHS]] ]144// IR-NEXT: br i1 %[[TMP28]], label %[[FOR_BODY:.+]], label %[[FOR_END41:.+]]145// IR-EMPTY:146// IR-NEXT: [[FOR_BODY]]:147// IR-NEXT: %[[TMP29:.+]] = load i32, ptr %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I]], align 4148// IR-NEXT: %[[MUL27:.+]] = mul i32 %[[TMP29]], 2149// IR-NEXT: %[[ADD28:.+]] = add i32 0, %[[MUL27]]150// IR-NEXT: store i32 %[[ADD28]], ptr %[[DOTUNROLLED_IV_I]], align 4151// IR-NEXT: %[[TMP30:.+]] = load i32, ptr %[[DOTUNROLLED_IV_I]], align 4152// IR-NEXT: store i32 %[[TMP30]], ptr %[[DOTUNROLL_INNER_IV_I]], align 4153// IR-NEXT: br label %[[FOR_COND29:.+]]154// IR-EMPTY:155// IR-NEXT: [[FOR_COND29]]:156// IR-NEXT: %[[TMP31:.+]] = load i32, ptr %[[DOTUNROLL_INNER_IV_I]], align 4157// IR-NEXT: %[[TMP32:.+]] = load i32, ptr %[[DOTUNROLLED_IV_I]], align 4158// IR-NEXT: %[[ADD30:.+]] = add i32 %[[TMP32]], 2159// IR-NEXT: %[[CMP31:.+]] = icmp ult i32 %[[TMP31]], %[[ADD30]]160// IR-NEXT: br i1 %[[CMP31]], label %[[LAND_RHS32:.+]], label %[[LAND_END35:.+]]161// IR-EMPTY:162// IR-NEXT: [[LAND_RHS32]]:163// IR-NEXT: %[[TMP33:.+]] = load i32, ptr %[[DOTUNROLL_INNER_IV_I]], align 4164// IR-NEXT: %[[TMP34:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_3]], align 4165// IR-NEXT: %[[ADD33:.+]] = add i32 %[[TMP34]], 1166// IR-NEXT: %[[CMP34:.+]] = icmp ult i32 %[[TMP33]], %[[ADD33]]167// IR-NEXT: br label %[[LAND_END35]]168// IR-EMPTY:169// IR-NEXT: [[LAND_END35]]:170// IR-NEXT: %[[TMP35:.+]] = phi i1 [ false, %[[FOR_COND29]] ], [ %[[CMP34]], %[[LAND_RHS32]] ]171// IR-NEXT: br i1 %[[TMP35]], label %[[FOR_BODY36:.+]], label %[[FOR_END:.+]]172// IR-EMPTY:173// IR-NEXT: [[FOR_BODY36]]:174// IR-NEXT: %[[TMP36:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_]], align 4175// IR-NEXT: %[[TMP37:.+]] = load i32, ptr %[[DOTUNROLL_INNER_IV_I]], align 4176// IR-NEXT: %[[TMP38:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_2]], align 4177// IR-NEXT: %[[MUL37:.+]] = mul i32 %[[TMP37]], %[[TMP38]]178// IR-NEXT: %[[ADD38:.+]] = add i32 %[[TMP36]], %[[MUL37]]179// IR-NEXT: store i32 %[[ADD38]], ptr %[[I]], align 4180// IR-NEXT: %[[TMP39:.+]] = load i32, ptr %[[START_ADDR]], align 4181// IR-NEXT: %[[TMP40:.+]] = load i32, ptr %[[END_ADDR]], align 4182// IR-NEXT: %[[TMP41:.+]] = load i32, ptr %[[STEP_ADDR]], align 4183// IR-NEXT: %[[TMP42:.+]] = load i32, ptr %[[I]], align 4184// IR-NEXT: call void (...) @body(i32 noundef %[[TMP39]], i32 noundef %[[TMP40]], i32 noundef %[[TMP41]], i32 noundef %[[TMP42]])185// IR-NEXT: br label %[[FOR_INC:.+]]186// IR-EMPTY:187// IR-NEXT: [[FOR_INC]]:188// IR-NEXT: %[[TMP43:.+]] = load i32, ptr %[[DOTUNROLL_INNER_IV_I]], align 4189// IR-NEXT: %[[INC:.+]] = add i32 %[[TMP43]], 1190// IR-NEXT: store i32 %[[INC]], ptr %[[DOTUNROLL_INNER_IV_I]], align 4191// IR-NEXT: br label %[[FOR_COND29]], !llvm.loop ![[LOOP2:[0-9]+]]192// IR-EMPTY:193// IR-NEXT: [[FOR_END]]:194// IR-NEXT: br label %[[FOR_INC39:.+]]195// IR-EMPTY:196// IR-NEXT: [[FOR_INC39]]:197// IR-NEXT: %[[TMP44:.+]] = load i32, ptr %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I]], align 4198// IR-NEXT: %[[INC40:.+]] = add i32 %[[TMP44]], 1199// IR-NEXT: store i32 %[[INC40]], ptr %[[DOTUNROLL_INNER_IV__UNROLLED_IV_I]], align 4200// IR-NEXT: br label %[[FOR_COND]], !llvm.loop ![[LOOP5:[0-9]+]]201// IR-EMPTY:202// IR-NEXT: [[FOR_END41]]:203// IR-NEXT: br label %[[OMP_BODY_CONTINUE:.+]]204// IR-EMPTY:205// IR-NEXT: [[OMP_BODY_CONTINUE]]:206// IR-NEXT: br label %[[OMP_INNER_FOR_INC:.+]]207// IR-EMPTY:208// IR-NEXT: [[OMP_INNER_FOR_INC]]:209// IR-NEXT: %[[TMP45:.+]] = load i32, ptr %[[DOTOMP_IV]], align 4210// IR-NEXT: %[[ADD42:.+]] = add i32 %[[TMP45]], 1211// IR-NEXT: store i32 %[[ADD42]], ptr %[[DOTOMP_IV]], align 4212// IR-NEXT: br label %[[OMP_INNER_FOR_COND]]213// IR-EMPTY:214// IR-NEXT: [[OMP_INNER_FOR_END]]:215// IR-NEXT: br label %[[OMP_LOOP_EXIT:.+]]216// IR-EMPTY:217// IR-NEXT: [[OMP_LOOP_EXIT]]:218// IR-NEXT: call void @__kmpc_for_static_fini(ptr @1, i32 %[[TMP0]])219// IR-NEXT: br label %[[OMP_PRECOND_END]]220// IR-EMPTY:221// IR-NEXT: [[OMP_PRECOND_END]]:222// IR-NEXT: call void @__kmpc_barrier(ptr @3, i32 %[[TMP0]])223// IR-NEXT: ret void224// IR-NEXT: }225extern "C" void func(int start, int end, int step) {226 [[omp::sequence(directive(for), directive(unroll partial), directive(unroll partial))]]227 for (int i = start; i < end; i+=step)228 body(start, end, step, i);229}230 231#endif /* HEADER */232 233 234// IR: ![[LOOP2]] = distinct !{![[LOOP2]], ![[LOOPPROP3:[0-9]+]], ![[LOOPPROP4:[0-9]+]]}235// IR: ![[LOOPPROP3]] = !{!"llvm.loop.mustprogress"}236// IR: ![[LOOPPROP4]] = !{!"llvm.loop.unroll.count", i32 2}237// IR: ![[LOOP5]] = distinct !{![[LOOP5]], ![[LOOPPROP3]], ![[LOOPPROP4]]}238