78 lines · c
1// RUN: %clang_cc1 -triple %itanium_abi_triple %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping -fcoverage-mcdc | FileCheck %s -check-prefix=MCDC2// RUN: %clang_cc1 -triple %itanium_abi_triple %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping | FileCheck %s -check-prefix=NOMCDC3 4int test(int a, int b, int c, int d, int e, int f) {5 return ((a || b) ? (c && d) : (e || f));6}7 8// NOMCDC-NOT: %mcdc.addr9// NOMCDC-NOT: __profbm_test10 11// MCDC BOOKKEEPING.12// MCDC: @__profbm_test = private global [2 x i8] zeroinitializer13 14// ALLOCATE MCDC TEMP AND ZERO IT.15// MCDC-LABEL: @test(16// MCDC: %mcdc.addr = alloca i32, align 417// MCDC: store i32 0, ptr %mcdc.addr, align 418 19// TERNARY TRUE SHOULD UPDATE THE BITMAP WITH RESULT AT ELEMENT 0.20// MCDC-LABEL: cond.true:21// MCDC-DAG: %[[TEMP0:mcdc.temp[0-9]*]] = load i32, ptr %mcdc.addr, align 422// MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 023// MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 324// MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]25// MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 726// MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i827// MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]28// MCDC: %[[LAB8:.+]] = load i8, ptr %[[LAB4]], align 129// MCDC: %[[LAB9:[0-9]+]] = or i8 %[[LAB8]], %[[LAB7]]30// MCDC: store i8 %[[LAB9]], ptr %[[LAB4]], align 131 32// CHECK FOR ZERO OF MCDC TEMP33// MCDC: store i32 0, ptr %mcdc.addr, align 434 35// TERNARY TRUE YIELDS TERNARY LHS LOGICAL-AND.36// TERNARY LHS LOGICAL-AND SHOULD UPDATE THE BITMAP WITH RESULT AT ELEMENT 1.37// MCDC-LABEL: land.end:38// MCDC-DAG: %[[TEMP0:mcdc.temp[0-9]*]] = load i32, ptr %mcdc.addr, align 439// MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 340// MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 341// MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]42// MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 743// MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i844// MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]45// MCDC: %[[LAB8:.+]] = load i8, ptr %[[LAB4]], align 146// MCDC: %[[LAB9:[0-9]+]] = or i8 %[[LAB8]], %[[LAB7]]47// MCDC: store i8 %[[LAB9]], ptr %[[LAB4]], align 148 49// TERNARY FALSE SHOULD UPDATE THE BITMAP WITH RESULT AT ELEMENT 0.50// MCDC-LABEL: cond.false:51// MCDC-DAG: %[[TEMP0:mcdc.temp[0-9]*]] = load i32, ptr %mcdc.addr, align 452// MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 053// MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 354// MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]55// MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 756// MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i857// MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]58// MCDC: %[[LAB8:.+]] = load i8, ptr %[[LAB4]], align 159// MCDC: %[[LAB9:[0-9]+]] = or i8 %[[LAB8]], %[[LAB7]]60// MCDC: store i8 %[[LAB9]], ptr %[[LAB4]], align 161 62// CHECK FOR ZERO OF MCDC TEMP63// MCDC: store i32 0, ptr %mcdc.addr, align 464 65// TERNARY FALSE YIELDS TERNARY RHS LOGICAL-OR.66// TERNARY RHS LOGICAL-OR SHOULD UPDATE THE BITMAP WITH RESULT AT ELEMENT 2.67// MCDC-LABEL: lor.end:68// MCDC-DAG: %[[TEMP0:mcdc.temp[0-9]*]] = load i32, ptr %mcdc.addr, align 469// MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 670// MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 371// MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]72// MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 773// MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i874// MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]75// MCDC: %[[LAB8:.+]] = load i8, ptr %[[LAB4]], align 176// MCDC: %[[LAB9:[0-9]+]] = or i8 %[[LAB8]], %[[LAB7]]77// MCDC: store i8 %[[LAB9]], ptr %[[LAB4]], align 178