96 lines · c
1// RUN: %clang_cc1 -triple %itanium_abi_triple %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping -fcoverage-mcdc | FileCheck %s -check-prefix=MCDC2// RUN: %clang_cc1 -triple %itanium_abi_triple %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping | FileCheck %s -check-prefix=NOMCDC3// RUN: %clang_cc1 -triple %itanium_abi_triple %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping -fcoverage-mcdc -disable-llvm-passes | FileCheck %s -check-prefix=NOPROFPASS4 5int test(int a, int b, int c, int d, int e, int f) {6 return ((a && b) || ((c && d) || (e && f)));7}8 9// NOMCDC-NOT: %mcdc.addr10// NOMCDC-NOT: __profbm_test11// NOPROFPASS-NOT: __profbm_test12 13// MCDC BOOKKEEPING.14// MCDC: @__profbm_test = private global [2 x i8] zeroinitializer15// MCDC: @__profc_test = private global [9 x i64] zeroinitializer16 17// ALLOCATE MCDC TEMP AND ZERO IT.18// NOPROFPASS-LABEL: @test(19// NOPROFPASS: call void @llvm.instrprof.mcdc.parameters(ptr @__profn_test, i64 [[HASH:[0-9]+]], i32 15)20// MCDC-LABEL: @test(21// MCDC: %mcdc.addr = alloca i32, align 422// MCDC: store i32 0, ptr %mcdc.addr, align 423 24// SHIFT FIRST CONDITION WITH ID = 0.25// MCDC: %[[LAB1:[0-9]+]] = load i32, ptr %a.addr, align 426// MCDC-DAG: %[[BOOL:tobool[0-9]*]] = icmp ne i32 %[[LAB1]], 027// MCDC-DAG: %[[TEMP:mcdc.*]] = load i32, ptr %mcdc.addr, align 428// MCDC-DAG: %[[LAB2:[0-9]+]] = add i32 %[[TEMP]], 029// MCDC-DAG: %[[LAB3:[0-9]+]] = add i32 %[[TEMP]], 030// MCDC-DAG: %[[LAB4:[0-9]+]] = select i1 %[[BOOL]], i32 %[[LAB2]], i32 %[[LAB3]]31// MCDC-DAG: store i32 %[[LAB4]], ptr %mcdc.addr, align 432 33// SHIFT SECOND CONDITION WITH ID = 2.34// NOPROFPASS-LABEL: land.lhs.true:35// MCDC: %[[LAB1:[0-9]+]] = load i32, ptr %b.addr, align 436// MCDC-DAG: %[[BOOL:tobool[0-9]*]] = icmp ne i32 %[[LAB1]], 037// MCDC-DAG: %[[TEMP:mcdc.*]] = load i32, ptr %mcdc.addr, align 438// MCDC-DAG: %[[LAB2:[0-9]+]] = add i32 %[[TEMP]], 1439// MCDC-DAG: %[[LAB3:[0-9]+]] = add i32 %[[TEMP]], 140// MCDC-DAG: %[[LAB4:[0-9]+]] = select i1 %[[BOOL]], i32 %[[LAB2]], i32 %[[LAB3]]41// MCDC-DAG: store i32 %[[LAB4]], ptr %mcdc.addr, align 442 43// SHIFT THIRD CONDITION WITH ID = 1.44// NOPROFPASS-LABEL: lor.rhs:45// MCDC: %[[LAB1:[0-9]+]] = load i32, ptr %c.addr, align 446// MCDC-DAG: %[[BOOL:tobool[0-9]*]] = icmp ne i32 %[[LAB1]], 047// MCDC-DAG: %[[TEMP:mcdc.*]] = load i32, ptr %mcdc.addr, align 448// MCDC-DAG: %[[LAB2:[0-9]+]] = add i32 %[[TEMP]], 049// MCDC-DAG: %[[LAB3:[0-9]+]] = add i32 %[[TEMP]], 050// MCDC-DAG: %[[LAB4:[0-9]+]] = select i1 %[[BOOL]], i32 %[[LAB2]], i32 %[[LAB3]]51// MCDC-DAG: store i32 %[[LAB4]], ptr %mcdc.addr, align 452 53// SHIFT FOURTH CONDITION WITH ID = 4.54// NOPROFPASS-LABEL: land.lhs.true3:55// MCDC: %[[LAB1:[0-9]+]] = load i32, ptr %d.addr, align 456// MCDC-DAG: %[[BOOL:tobool[0-9]*]] = icmp ne i32 %[[LAB1]], 057// MCDC-DAG: %[[TEMP:mcdc.*]] = load i32, ptr %mcdc.addr, align 458// MCDC-DAG: %[[LAB2:[0-9]+]] = add i32 %[[TEMP]], 1259// MCDC-DAG: %[[LAB3:[0-9]+]] = add i32 %[[TEMP]], 260// MCDC-DAG: %[[LAB4:[0-9]+]] = select i1 %[[BOOL]], i32 %[[LAB2]], i32 %[[LAB3]]61// MCDC-DAG: store i32 %[[LAB4]], ptr %mcdc.addr, align 462 63// SHIFT FIFTH CONDITION WITH ID = 3.64// NOPROFPASS-LABEL: lor.rhs6:65// MCDC: %[[LAB1:[0-9]+]] = load i32, ptr %e.addr, align 466// MCDC-DAG: %[[BOOL:tobool[0-9]*]] = icmp ne i32 %[[LAB1]], 067// MCDC-DAG: %[[TEMP:mcdc.*]] = load i32, ptr %mcdc.addr, align 468// MCDC-DAG: %[[LAB2:[0-9]+]] = add i32 %[[TEMP]], 069// MCDC-DAG: %[[LAB3:[0-9]+]] = add i32 %[[TEMP]], 070// MCDC-DAG: %[[LAB4:[0-9]+]] = select i1 %[[BOOL]], i32 %[[LAB2]], i32 %[[LAB3]]71// MCDC-DAG: store i32 %[[LAB4]], ptr %mcdc.addr, align 472 73// SHIFT SIXTH CONDITION WITH ID = 5.74// NOPROFPASS-LABEL: land.rhs:75// MCDC: %[[LAB1:[0-9]+]] = load i32, ptr %f.addr, align 476// MCDC-DAG: %[[BOOL:tobool[0-9]*]] = icmp ne i32 %[[LAB1]], 077// MCDC-DAG: %[[TEMP:mcdc.*]] = load i32, ptr %mcdc.addr, align 478// MCDC-DAG: %[[LAB2:[0-9]+]] = add i32 %[[TEMP]], 879// MCDC-DAG: %[[LAB3:[0-9]+]] = add i32 %[[TEMP]], 480// MCDC-DAG: %[[LAB4:[0-9]+]] = select i1 %[[BOOL]], i32 %[[LAB2]], i32 %[[LAB3]]81// MCDC-DAG: store i32 %[[LAB4]], ptr %mcdc.addr, align 482 83// UPDATE FINAL BITMASK WITH RESULT.84// NOPROFPASS-LABEL: lor.end:85// NOPROFPASS: call void @llvm.instrprof.mcdc.tvbitmap.update(ptr @__profn_test, i64 [[HASH]], i32 0, ptr %mcdc.addr)86// MCDC-DAG: %[[TEMP0:mcdc.temp[0-9]*]] = load i32, ptr %mcdc.addr, align 487// MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 088// MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 389// MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]90// MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 791// MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i892// MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]93// MCDC: %[[BITS:.+]] = load i8, ptr %[[LAB4]], align 194// MCDC: %[[LAB8:[0-9]+]] = or i8 %[[BITS]], %[[LAB7]]95// MCDC: store i8 %[[LAB8]], ptr %[[LAB4]], align 196