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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2/// Check that we generate checks for functions even though the mangledName3/// property in the AST dump JSON does not match the LLVM IR name.4// RUN: %clang_cc1 -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=ELF5// RUN: %clang_cc1 -triple=x86_64-apple-macho -emit-llvm -o - %s | FileCheck %s --check-prefix=MACHO6// RUN: %clang_cc1 -triple=x86_64-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefix=MSVC7// RUN: %clang_cc1 -triple=x86_64-windows-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=MINGW8// RUN: %clang_cc1 -triple=i686-unknown-win32 -emit-llvm -o - %s | FileCheck %s --check-prefix=WIN329// RUN: %clang_cc1 -triple thumbv7s-apple-darwin -target-abi apcs-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=THUMB-DARWIN10 11// UTC_ARGS: --disable12// ELF: target datalayout = "e-m:e-13// MACHO: target datalayout = "e-m:o-14// MSVC: target datalayout = "e-m:w-15// MINGW: target datalayout = "e-m:w-16// WIN32: target datalayout = "e-m:x-17// THUMB-DARWIN: target datalayout = "e-m:o-18// UTC_ARGS: --enable19 20#ifdef __arm__21typedef __attribute__((neon_vector_type(8))) __INT8_TYPE__ int8x8_t;22// THUMB-DARWIN-LABEL: @test_vaba_s8(23// THUMB-DARWIN-NEXT: entry:24// THUMB-DARWIN-NEXT: [[A_ADDR:%.*]] = alloca <8 x i8>, align 825// THUMB-DARWIN-NEXT: [[B_ADDR:%.*]] = alloca <8 x i8>, align 826// THUMB-DARWIN-NEXT: [[C_ADDR:%.*]] = alloca <8 x i8>, align 827// THUMB-DARWIN-NEXT: store <8 x i8> [[A:%.*]], ptr [[A_ADDR]], align 828// THUMB-DARWIN-NEXT: store <8 x i8> [[B:%.*]], ptr [[B_ADDR]], align 829// THUMB-DARWIN-NEXT: store <8 x i8> [[C:%.*]], ptr [[C_ADDR]], align 830// THUMB-DARWIN-NEXT: [[TMP0:%.*]] = load <8 x i8>, ptr [[A_ADDR]], align 831// THUMB-DARWIN-NEXT: [[TMP1:%.*]] = load <8 x i8>, ptr [[B_ADDR]], align 832// THUMB-DARWIN-NEXT: [[ADD:%.*]] = add <8 x i8> [[TMP0]], [[TMP1]]33// THUMB-DARWIN-NEXT: [[TMP2:%.*]] = load <8 x i8>, ptr [[C_ADDR]], align 834// THUMB-DARWIN-NEXT: [[ADD1:%.*]] = add <8 x i8> [[ADD]], [[TMP2]]35// THUMB-DARWIN-NEXT: ret <8 x i8> [[ADD1]]36//37int8x8_t test_vaba_s8(int8x8_t a, int8x8_t b, int8x8_t c) {38 return a + b + c;39}40#endif41 42/// Check global variable mangling43[[gnu::used]] static int i1 = 1;44int i2 = 2;45 46// ELF-LABEL: @static_noinline_fn(47// ELF-NEXT: entry:48// ELF-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 449// ELF-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 450// ELF-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 451// ELF-NEXT: ret i32 [[TMP0]]52//53// MACHO-LABEL: @static_noinline_fn(54// MACHO-NEXT: entry:55// MACHO-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 456// MACHO-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 457// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 458// MACHO-NEXT: ret i32 [[TMP0]]59//60// MSVC-LABEL: @static_noinline_fn(61// MSVC-NEXT: entry:62// MSVC-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 463// MSVC-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 464// MSVC-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 465// MSVC-NEXT: ret i32 [[TMP0]]66//67// MINGW-LABEL: @static_noinline_fn(68// MINGW-NEXT: entry:69// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 470// MINGW-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 471// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 472// MINGW-NEXT: ret i32 [[TMP0]]73//74// WIN32-LABEL: @static_noinline_fn(75// WIN32-NEXT: entry:76// WIN32-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 477// WIN32-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 478// WIN32-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 479// WIN32-NEXT: ret i32 [[TMP0]]80//81// THUMB-DARWIN-LABEL: @static_noinline_fn(82// THUMB-DARWIN-NEXT: entry:83// THUMB-DARWIN-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 484// THUMB-DARWIN-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 485// THUMB-DARWIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 486// THUMB-DARWIN-NEXT: ret i32 [[TMP0]]87//88[[clang::noinline,gnu::used]] static int static_noinline_fn(int arg) { return arg; }89 90// ELF-LABEL: @hidden_visibility(91// ELF-NEXT: entry:92// ELF-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 493// ELF-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 494// ELF-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 495// ELF-NEXT: ret i32 [[TMP0]]96//97// MACHO-LABEL: @hidden_visibility(98// MACHO-NEXT: entry:99// MACHO-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4100// MACHO-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4101// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4102// MACHO-NEXT: ret i32 [[TMP0]]103//104// MSVC-LABEL: @hidden_visibility(105// MSVC-NEXT: entry:106// MSVC-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4107// MSVC-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4108// MSVC-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4109// MSVC-NEXT: ret i32 [[TMP0]]110//111// MINGW-LABEL: @hidden_visibility(112// MINGW-NEXT: entry:113// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4114// MINGW-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4115// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4116// MINGW-NEXT: ret i32 [[TMP0]]117//118// WIN32-LABEL: @hidden_visibility(119// WIN32-NEXT: entry:120// WIN32-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4121// WIN32-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4122// WIN32-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4123// WIN32-NEXT: ret i32 [[TMP0]]124//125// THUMB-DARWIN-LABEL: @hidden_visibility(126// THUMB-DARWIN-NEXT: entry:127// THUMB-DARWIN-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4128// THUMB-DARWIN-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4129// THUMB-DARWIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4130// THUMB-DARWIN-NEXT: ret i32 [[TMP0]]131//132[[gnu::visibility("hidden")]] int hidden_visibility(int arg) { return arg; }133 134#ifdef __ELF__135// ELF-LABEL: @protected_visibility(136// ELF-NEXT: entry:137// ELF-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4138// ELF-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4139// ELF-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4140// ELF-NEXT: ret i32 [[TMP0]]141//142[[gnu::visibility("protected")]] int protected_visibility(int arg) { return arg; }143#endif144 145// ELF-LABEL: @default_visibility(146// ELF-NEXT: entry:147// ELF-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4148// ELF-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4149// ELF-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4150// ELF-NEXT: ret i32 [[TMP0]]151//152// MACHO-LABEL: @default_visibility(153// MACHO-NEXT: entry:154// MACHO-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4155// MACHO-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4156// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4157// MACHO-NEXT: ret i32 [[TMP0]]158//159// MSVC-LABEL: @default_visibility(160// MSVC-NEXT: entry:161// MSVC-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4162// MSVC-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4163// MSVC-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4164// MSVC-NEXT: ret i32 [[TMP0]]165//166// MINGW-LABEL: @default_visibility(167// MINGW-NEXT: entry:168// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4169// MINGW-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4170// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4171// MINGW-NEXT: ret i32 [[TMP0]]172//173// WIN32-LABEL: @default_visibility(174// WIN32-NEXT: entry:175// WIN32-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4176// WIN32-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4177// WIN32-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4178// WIN32-NEXT: ret i32 [[TMP0]]179//180// THUMB-DARWIN-LABEL: @default_visibility(181// THUMB-DARWIN-NEXT: entry:182// THUMB-DARWIN-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4183// THUMB-DARWIN-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4184// THUMB-DARWIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4185// THUMB-DARWIN-NEXT: ret i32 [[TMP0]]186//187[[gnu::visibility("default")]] int default_visibility(int arg) { return arg; }188 189// ELF-LABEL: @no_visibility(190// ELF-NEXT: entry:191// ELF-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4192// ELF-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4193// ELF-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4194// ELF-NEXT: ret i32 [[TMP0]]195//196// MACHO-LABEL: @no_visibility(197// MACHO-NEXT: entry:198// MACHO-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4199// MACHO-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4200// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4201// MACHO-NEXT: ret i32 [[TMP0]]202//203// MSVC-LABEL: @no_visibility(204// MSVC-NEXT: entry:205// MSVC-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4206// MSVC-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4207// MSVC-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4208// MSVC-NEXT: ret i32 [[TMP0]]209//210// MINGW-LABEL: @no_visibility(211// MINGW-NEXT: entry:212// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4213// MINGW-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4214// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4215// MINGW-NEXT: ret i32 [[TMP0]]216//217// WIN32-LABEL: @no_visibility(218// WIN32-NEXT: entry:219// WIN32-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4220// WIN32-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4221// WIN32-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4222// WIN32-NEXT: ret i32 [[TMP0]]223//224// THUMB-DARWIN-LABEL: @no_visibility(225// THUMB-DARWIN-NEXT: entry:226// THUMB-DARWIN-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4227// THUMB-DARWIN-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4228// THUMB-DARWIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4229// THUMB-DARWIN-NEXT: ret i32 [[TMP0]]230//231int no_visibility(int arg) { return arg; }232 233 234/// FIXME: the i386 @fastcall@12 is not being checked here235#ifdef _WIN32236// MSVC-LABEL: @fastcall(237// MSVC-NEXT: entry:238// MSVC-NEXT: [[ARG3_ADDR:%.*]] = alloca i32, align 4239// MSVC-NEXT: [[ARG2_ADDR:%.*]] = alloca i32, align 4240// MSVC-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4241// MSVC-NEXT: store i32 [[ARG3:%.*]], ptr [[ARG3_ADDR]], align 4242// MSVC-NEXT: store i32 [[ARG2:%.*]], ptr [[ARG2_ADDR]], align 4243// MSVC-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4244// MSVC-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4245// MSVC-NEXT: ret i32 [[TMP0]]246//247// MINGW-LABEL: @fastcall(248// MINGW-NEXT: entry:249// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4250// MINGW-NEXT: [[ARG2_ADDR:%.*]] = alloca i32, align 4251// MINGW-NEXT: [[ARG3_ADDR:%.*]] = alloca i32, align 4252// MINGW-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4253// MINGW-NEXT: store i32 [[ARG2:%.*]], ptr [[ARG2_ADDR]], align 4254// MINGW-NEXT: store i32 [[ARG3:%.*]], ptr [[ARG3_ADDR]], align 4255// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4256// MINGW-NEXT: ret i32 [[TMP0]]257//258int __fastcall fastcall(int arg, long arg2, long arg3) { return arg; }259#endif260 261