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1//===-- save.S - save up to 12 callee-saved registers ---------------------===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// Multiple entry points depending on number of registers to save10//11//===----------------------------------------------------------------------===//12 13// The entry points are grouped up into 2s for rv64 and 4s for rv32 since this14// is the minimum grouping which will maintain the required 16-byte stack15// alignment.16 17 .text18 19#if __riscv_xlen == 3220 21#ifndef __riscv_abi_rve22 23 .globl __riscv_save_1224 .type __riscv_save_12,@function25__riscv_save_12:26 addi sp, sp, -6427 mv t1, zero28 sw s11, 12(sp)29 j .Lriscv_save_11_830 31 .globl __riscv_save_1132 .type __riscv_save_11,@function33 .globl __riscv_save_1034 .type __riscv_save_10,@function35 .globl __riscv_save_936 .type __riscv_save_9,@function37 .globl __riscv_save_838 .type __riscv_save_8,@function39__riscv_save_11:40__riscv_save_10:41__riscv_save_9:42__riscv_save_8:43 addi sp, sp, -6444 li t1, 1645.Lriscv_save_11_8:46 sw s10, 16(sp)47 sw s9, 20(sp)48 sw s8, 24(sp)49 sw s7, 28(sp)50 j .Lriscv_save_7_451 52 .globl __riscv_save_753 .type __riscv_save_7,@function54 .globl __riscv_save_655 .type __riscv_save_6,@function56 .globl __riscv_save_557 .type __riscv_save_5,@function58 .globl __riscv_save_459 .type __riscv_save_4,@function60__riscv_save_7:61__riscv_save_6:62__riscv_save_5:63__riscv_save_4:64 addi sp, sp, -6465 li t1, 3266.Lriscv_save_7_4:67 sw s6, 32(sp)68 sw s5, 36(sp)69 sw s4, 40(sp)70 sw s3, 44(sp)71 sw s2, 48(sp)72 sw s1, 52(sp)73 sw s0, 56(sp)74 sw ra, 60(sp)75 add sp, sp, t176 jr t077 78 .globl __riscv_save_379 .type __riscv_save_3,@function80 .globl __riscv_save_281 .type __riscv_save_2,@function82 .globl __riscv_save_183 .type __riscv_save_1,@function84 .globl __riscv_save_085 .type __riscv_save_0,@function86__riscv_save_3:87__riscv_save_2:88__riscv_save_1:89__riscv_save_0:90 addi sp, sp, -1691 sw s2, 0(sp)92 sw s1, 4(sp)93 sw s0, 8(sp)94 sw ra, 12(sp)95 jr t096 97#else98 99 .globl __riscv_save_2100 .type __riscv_save_2,@function101__riscv_save_2:102 addi sp, sp, -12103 sw s1, 0(sp)104 sw s0, 4(sp)105 sw ra, 8(sp)106 jr t0107 108 .globl __riscv_save_1109 .type __riscv_save_1,@function110__riscv_save_1:111 addi sp, sp, -8112 sw s0, 0(sp)113 sw ra, 4(sp)114 jr t0115 116 .globl __riscv_save_0117 .type __riscv_save_0,@function118__riscv_save_0:119 addi sp, sp, -4120 sw ra, 0(sp)121 jr t0122 123#endif124 125#elif __riscv_xlen == 64126 127#ifndef __riscv_abi_rve128 129 .globl __riscv_save_12130 .type __riscv_save_12,@function131__riscv_save_12:132 addi sp, sp, -112133 mv t1, zero134 sd s11, 8(sp)135 j .Lriscv_save_11_10136 137 .globl __riscv_save_11138 .type __riscv_save_11,@function139 .globl __riscv_save_10140 .type __riscv_save_10,@function141__riscv_save_11:142__riscv_save_10:143 addi sp, sp, -112144 li t1, 16145.Lriscv_save_11_10:146 sd s10, 16(sp)147 sd s9, 24(sp)148 j .Lriscv_save_9_8149 150 .globl __riscv_save_9151 .type __riscv_save_9,@function152 .globl __riscv_save_8153 .type __riscv_save_8,@function154__riscv_save_9:155__riscv_save_8:156 addi sp, sp, -112157 li t1, 32158.Lriscv_save_9_8:159 sd s8, 32(sp)160 sd s7, 40(sp)161 j .Lriscv_save_7_6162 163 .globl __riscv_save_7164 .type __riscv_save_7,@function165 .globl __riscv_save_6166 .type __riscv_save_6,@function167__riscv_save_7:168__riscv_save_6:169 addi sp, sp, -112170 li t1, 48171.Lriscv_save_7_6:172 sd s6, 48(sp)173 sd s5, 56(sp)174 j .Lriscv_save_5_4175 176 .globl __riscv_save_5177 .type __riscv_save_5,@function178 .globl __riscv_save_4179 .type __riscv_save_4,@function180__riscv_save_5:181__riscv_save_4:182 addi sp, sp, -112183 li t1, 64184.Lriscv_save_5_4:185 sd s4, 64(sp)186 sd s3, 72(sp)187 j .Lriscv_save_3_2188 189 .globl __riscv_save_3190 .type __riscv_save_3,@function191 .globl __riscv_save_2192 .type __riscv_save_2,@function193__riscv_save_3:194__riscv_save_2:195 addi sp, sp, -112196 li t1, 80197.Lriscv_save_3_2:198 sd s2, 80(sp)199 sd s1, 88(sp)200 sd s0, 96(sp)201 sd ra, 104(sp)202 add sp, sp, t1203 jr t0204 205 .globl __riscv_save_1206 .type __riscv_save_1,@function207 .globl __riscv_save_0208 .type __riscv_save_0,@function209__riscv_save_1:210__riscv_save_0:211 addi sp, sp, -16212 sd s0, 0(sp)213 sd ra, 8(sp)214 jr t0215 216#else217 218 .globl __riscv_save_2219 .type __riscv_save_2,@function220__riscv_save_2:221 addi sp, sp, -24222 sw s1, 0(sp)223 sw s0, 8(sp)224 sw ra, 16(sp)225 jr t0226 227 .globl __riscv_save_1228 .type __riscv_save_1,@function229__riscv_save_1:230 addi sp, sp, -16231 sw s0, 0(sp)232 sw ra, 8(sp)233 jr t0234 235 .globl __riscv_save_0236 .type __riscv_save_0,@function237__riscv_save_0:238 addi sp, sp, -8239 sw ra, 0(sp)240 jr t0241 242#endif243 244#else245# error "xlen must be 32 or 64 for save-restore implementation246#endif247