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1! RUN: %flang_fc1 -flang-experimental-hlfir -triple powerpc64le-unknown-unknown -target-cpu pwr10 -emit-llvm %s -o - | FileCheck --check-prefixes="LLVMIR" %s2! REQUIRES: target=powerpc{{.*}}3 4 subroutine test_pmxvbf16ger2_def()5 use, intrinsic :: mma6 implicit none7 vector(unsigned(1)) vu10, vu118 __vector_quad :: cq9 call mma_pmxvbf16ger2(cq, vu10, vu11, 7, 7, 2)10 end subroutine test_pmxvbf16ger2_def11 12!CHECK-LABEL: @test_pmxvbf16ger2_def_13! LLVMIR: %[[VAL_0:.*]] = alloca <16 x i8>, i64 1, align 1614! LLVMIR: %[[VAL_1:.*]] = alloca <16 x i8>, i64 1, align 1615! LLVMIR: %[[VAL_2:.*]] = alloca <512 x i1>, i64 1, align 6416! LLVMIR: %[[VAL_3:.*]] = load <16 x i8>, ptr %[[VAL_1]], align 1617! LLVMIR: %[[VAL_4:.*]] = load <16 x i8>, ptr %[[VAL_0]], align 1618! LLVMIR: %[[VAL_5:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2(<16 x i8> %[[VAL_3]], <16 x i8> %[[VAL_4]], i32 7, i32 7, i32 2)19! LLVMIR: store <512 x i1> %[[VAL_5]], ptr %[[VAL_2]], align 6420 21 22 subroutine test_pmxvbf16ger2_non_def()23 use, intrinsic :: mma24 implicit none25 vector(unsigned(1)) vu10, vu1126 __vector_quad :: cq27 call mma_pmxvbf16ger2(cq, vu10, vu11, 7_2, 7_1, 2_8)28 end subroutine test_pmxvbf16ger2_non_def29 30!CHECK-LABEL: @test_pmxvbf16ger2_non_def_31! LLVMIR: %[[VAL_6:.*]] = alloca <16 x i8>, i64 1, align 1632! LLVMIR: %[[VAL_7:.*]] = alloca <16 x i8>, i64 1, align 1633! LLVMIR: %[[VAL_8:.*]] = alloca <512 x i1>, i64 1, align 6434! LLVMIR: %[[VAL_9:.*]] = load <16 x i8>, ptr %[[VAL_7]], align 1635! LLVMIR: %[[VAL_10:.*]] = load <16 x i8>, ptr %[[VAL_6]], align 1636! LLVMIR: %[[VAL_11:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2(<16 x i8> %[[VAL_9]], <16 x i8> %[[VAL_10]], i32 7, i32 7, i32 2)37! LLVMIR: store <512 x i1> %[[VAL_11]], ptr %[[VAL_8]], align 6438 39 40 subroutine test_pmxvbf16ger2nn_def()41 use, intrinsic :: mma42 implicit none43 vector(unsigned(1)) vu10, vu1144 __vector_quad :: cq45 call mma_pmxvbf16ger2nn(cq, vu10, vu11, 7, 7, 2)46 end subroutine test_pmxvbf16ger2nn_def47 48!CHECK-LABEL: @test_pmxvbf16ger2nn_def_49! LLVMIR: %[[VAL_12:.*]] = alloca <16 x i8>, i64 1, align 1650! LLVMIR: %[[VAL_13:.*]] = alloca <16 x i8>, i64 1, align 1651! LLVMIR: %[[VAL_14:.*]] = alloca <512 x i1>, i64 1, align 6452! LLVMIR: %[[VAL_15:.*]] = load <16 x i8>, ptr %[[VAL_13]], align 1653! LLVMIR: %[[VAL_16:.*]] = load <16 x i8>, ptr %[[VAL_12]], align 1654! LLVMIR: %[[VAL_17:.*]] = load <512 x i1>, ptr %[[VAL_14]], align 6455! LLVMIR: %[[VAL_18:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2nn(<512 x i1> %[[VAL_17]], <16 x i8> %[[VAL_15]], <16 x i8> %[[VAL_16]], i32 7, i32 7, i32 2)56! LLVMIR: store <512 x i1> %[[VAL_18]], ptr %[[VAL_14]], align 6457 58 subroutine test_pmxvbf16ger2nn_non_def()59 use, intrinsic :: mma60 implicit none61 vector(unsigned(1)) vu10, vu1162 __vector_quad :: cq63 call mma_pmxvbf16ger2nn(cq, vu10, vu11, 7_2, 7_1, 2_8)64 end subroutine test_pmxvbf16ger2nn_non_def65 66!CHECK-LABEL: @test_pmxvbf16ger2nn_non_def_67! LLVMIR: %[[VAL_19:.*]] = alloca <16 x i8>, i64 1, align 1668! LLVMIR: %[[VAL_20:.*]] = alloca <16 x i8>, i64 1, align 1669! LLVMIR: %[[VAL_21:.*]] = alloca <512 x i1>, i64 1, align 6470! LLVMIR: %[[VAL_22:.*]] = load <16 x i8>, ptr %[[VAL_20]], align 1671! LLVMIR: %[[VAL_23:.*]] = load <16 x i8>, ptr %[[VAL_19]], align 1672! LLVMIR: %[[VAL_24:.*]] = load <512 x i1>, ptr %[[VAL_21]], align 6473! LLVMIR: %[[VAL_25:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2nn(<512 x i1> %[[VAL_24]], <16 x i8> %[[VAL_22]], <16 x i8> %[[VAL_23]], i32 7, i32 7, i32 2)74! LLVMIR: store <512 x i1> %[[VAL_25]], ptr %[[VAL_21]], align 6475 76 subroutine test_pmxvbf16ger2np_def()77 use, intrinsic :: mma78 implicit none79 vector(unsigned(1)) vu10, vu1180 __vector_quad :: cq81 call mma_pmxvbf16ger2np(cq, vu10, vu11, 7, 7, 2)82 end subroutine test_pmxvbf16ger2np_def83 84!CHECK-LABEL: @test_pmxvbf16ger2np_def_85! LLVMIR: %[[VAL_26:.*]] = alloca <16 x i8>, i64 1, align 1686! LLVMIR: %[[VAL_27:.*]] = alloca <16 x i8>, i64 1, align 1687! LLVMIR: %[[VAL_28:.*]] = alloca <512 x i1>, i64 1, align 6488! LLVMIR: %[[VAL_29:.*]] = load <16 x i8>, ptr %[[VAL_27]], align 1689! LLVMIR: %[[VAL_30:.*]] = load <16 x i8>, ptr %[[VAL_26]], align 1690! LLVMIR: %[[VAL_31:.*]] = load <512 x i1>, ptr %[[VAL_28]], align 6491! LLVMIR: %[[VAL_32:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2np(<512 x i1> %[[VAL_31]], <16 x i8> %[[VAL_29]], <16 x i8> %[[VAL_30]], i32 7, i32 7, i32 2)92! LLVMIR: store <512 x i1> %[[VAL_32]], ptr %[[VAL_28]], align 6493 94 subroutine test_pmxvbf16ger2np_non_def()95 use, intrinsic :: mma96 implicit none97 vector(unsigned(1)) vu10, vu1198 __vector_quad :: cq99 call mma_pmxvbf16ger2np(cq, vu10, vu11, 7_2, 7_1, 2_8)100 end subroutine test_pmxvbf16ger2np_non_def101 102!CHECK-LABEL: @test_pmxvbf16ger2np_non_def_103! LLVMIR: %[[VAL_33:.*]] = alloca <16 x i8>, i64 1, align 16104! LLVMIR: %[[VAL_34:.*]] = alloca <16 x i8>, i64 1, align 16105! LLVMIR: %[[VAL_35:.*]] = alloca <512 x i1>, i64 1, align 64106! LLVMIR: %[[VAL_36:.*]] = load <16 x i8>, ptr %[[VAL_34]], align 16107! LLVMIR: %[[VAL_37:.*]] = load <16 x i8>, ptr %[[VAL_33]], align 16108! LLVMIR: %[[VAL_38:.*]] = load <512 x i1>, ptr %[[VAL_35]], align 64109! LLVMIR: %[[VAL_39:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2np(<512 x i1> %[[VAL_38]], <16 x i8> %[[VAL_36]], <16 x i8> %[[VAL_37]], i32 7, i32 7, i32 2)110! LLVMIR: store <512 x i1> %[[VAL_39]], ptr %[[VAL_35]], align 64111 112 subroutine test_pmxvbf16ger2pn_def()113 use, intrinsic :: mma114 implicit none115 vector(unsigned(1)) vu10, vu11116 __vector_quad :: cq117 call mma_pmxvbf16ger2pn(cq, vu10, vu11, 7, 7, 2)118 end subroutine test_pmxvbf16ger2pn_def119 120!CHECK-LABEL: @test_pmxvbf16ger2pn_def_121! LLVMIR: %[[VAL_40:.*]] = alloca <16 x i8>, i64 1, align 16122! LLVMIR: %[[VAL_41:.*]] = alloca <16 x i8>, i64 1, align 16123! LLVMIR: %[[VAL_42:.*]] = alloca <512 x i1>, i64 1, align 64124! LLVMIR: %[[VAL_43:.*]] = load <16 x i8>, ptr %[[VAL_41]], align 16125! LLVMIR: %[[VAL_44:.*]] = load <16 x i8>, ptr %[[VAL_40]], align 16126! LLVMIR: %[[VAL_45:.*]] = load <512 x i1>, ptr %[[VAL_42]], align 64127! LLVMIR: %[[VAL_46:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2pn(<512 x i1> %[[VAL_45]], <16 x i8> %[[VAL_43]], <16 x i8> %[[VAL_44]], i32 7, i32 7, i32 2)128! LLVMIR: store <512 x i1> %[[VAL_46]], ptr %[[VAL_42]], align 64129 130 subroutine test_pmxvbf16ger2pn_non_def()131 use, intrinsic :: mma132 implicit none133 vector(unsigned(1)) vu10, vu11134 __vector_quad :: cq135 call mma_pmxvbf16ger2pn(cq, vu10, vu11, 7_2, 7_1, 2_8)136 end subroutine test_pmxvbf16ger2pn_non_def137 138!CHECK-LABEL: @test_pmxvbf16ger2pn_non_def_139! LLVMIR: %[[VAL_47:.*]] = alloca <16 x i8>, i64 1, align 16140! LLVMIR: %[[VAL_48:.*]] = alloca <16 x i8>, i64 1, align 16141! LLVMIR: %[[VAL_49:.*]] = alloca <512 x i1>, i64 1, align 64142! LLVMIR: %[[VAL_50:.*]] = load <16 x i8>, ptr %[[VAL_48]], align 16143! LLVMIR: %[[VAL_51:.*]] = load <16 x i8>, ptr %[[VAL_47]], align 16144! LLVMIR: %[[VAL_52:.*]] = load <512 x i1>, ptr %[[VAL_49]], align 64145! LLVMIR: %[[VAL_53:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2pn(<512 x i1> %[[VAL_52]], <16 x i8> %[[VAL_50]], <16 x i8> %[[VAL_51]], i32 7, i32 7, i32 2)146! LLVMIR: store <512 x i1> %[[VAL_53]], ptr %[[VAL_49]], align 64147 148 subroutine test_pmxvbf16ger2pp_def()149 use, intrinsic :: mma150 implicit none151 vector(unsigned(1)) vu10, vu11152 __vector_quad :: cq153 call mma_pmxvbf16ger2pp(cq, vu10, vu11, 7, 7, 2)154 end subroutine test_pmxvbf16ger2pp_def155 156!CHECK-LABEL: @test_pmxvbf16ger2pp_def_157! LLVMIR: %[[VAL_54:.*]] = alloca <16 x i8>, i64 1, align 16158! LLVMIR: %[[VAL_55:.*]] = alloca <16 x i8>, i64 1, align 16159! LLVMIR: %[[VAL_56:.*]] = alloca <512 x i1>, i64 1, align 64160! LLVMIR: %[[VAL_57:.*]] = load <16 x i8>, ptr %[[VAL_55]], align 16161! LLVMIR: %[[VAL_58:.*]] = load <16 x i8>, ptr %[[VAL_54]], align 16162! LLVMIR: %[[VAL_59:.*]] = load <512 x i1>, ptr %[[VAL_56]], align 64163! LLVMIR: %[[VAL_60:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2pp(<512 x i1> %[[VAL_59]], <16 x i8> %[[VAL_57]], <16 x i8> %[[VAL_58]], i32 7, i32 7, i32 2)164! LLVMIR: store <512 x i1> %[[VAL_60]], ptr %[[VAL_56]], align 64165 166 subroutine test_pmxvbf16ger2pp_non_def()167 use, intrinsic :: mma168 implicit none169 vector(unsigned(1)) vu10, vu11170 __vector_quad :: cq171 call mma_pmxvbf16ger2pp(cq, vu10, vu11, 7_2, 7_1, 2_8)172 end subroutine test_pmxvbf16ger2pp_non_def173 174!CHECK-LABEL: @test_pmxvbf16ger2pp_non_def_175! LLVMIR: %[[VAL_61:.*]] = alloca <16 x i8>, i64 1, align 16176! LLVMIR: %[[VAL_62:.*]] = alloca <16 x i8>, i64 1, align 16177! LLVMIR: %[[VAL_63:.*]] = alloca <512 x i1>, i64 1, align 64178! LLVMIR: %[[VAL_64:.*]] = load <16 x i8>, ptr %[[VAL_62]], align 16179! LLVMIR: %[[VAL_65:.*]] = load <16 x i8>, ptr %[[VAL_61]], align 16180! LLVMIR: %[[VAL_66:.*]] = load <512 x i1>, ptr %[[VAL_63]], align 64181! LLVMIR: %[[VAL_67:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvbf16ger2pp(<512 x i1> %[[VAL_66]], <16 x i8> %[[VAL_64]], <16 x i8> %[[VAL_65]], i32 7, i32 7, i32 2)182! LLVMIR: store <512 x i1> %[[VAL_67]], ptr %[[VAL_63]], align 64183 184 subroutine test_pmxvf16ger2_def()185 use, intrinsic :: mma186 implicit none187 vector(unsigned(1)) vu10, vu11188 __vector_quad :: cq189 call mma_pmxvf16ger2(cq, vu10, vu11, 7, 7, 2)190 end subroutine test_pmxvf16ger2_def191 192!CHECK-LABEL: @test_pmxvf16ger2_def_193! LLVMIR: %[[VAL_68:.*]] = alloca <16 x i8>, i64 1, align 16194! LLVMIR: %[[VAL_69:.*]] = alloca <16 x i8>, i64 1, align 16195! LLVMIR: %[[VAL_70:.*]] = alloca <512 x i1>, i64 1, align 64196! LLVMIR: %[[VAL_71:.*]] = load <16 x i8>, ptr %[[VAL_69]], align 16197! LLVMIR: %[[VAL_72:.*]] = load <16 x i8>, ptr %[[VAL_68]], align 16198! LLVMIR: %[[VAL_73:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf16ger2(<16 x i8> %[[VAL_71]], <16 x i8> %[[VAL_72]], i32 7, i32 7, i32 2)199! LLVMIR: store <512 x i1> %[[VAL_73]], ptr %[[VAL_70]], align 64200 201 subroutine test_pmxvf16ger2_non_def()202 use, intrinsic :: mma203 implicit none204 vector(unsigned(1)) vu10, vu11205 __vector_quad :: cq206 call mma_pmxvf16ger2(cq, vu10, vu11, 7_2, 7_1, 2_8)207 end subroutine test_pmxvf16ger2_non_def208 209!CHECK-LABEL: @test_pmxvf16ger2_non_def_210! LLVMIR: %[[VAL_74:.*]] = alloca <16 x i8>, i64 1, align 16211! LLVMIR: %[[VAL_75:.*]] = alloca <16 x i8>, i64 1, align 16212! LLVMIR: %[[VAL_76:.*]] = alloca <512 x i1>, i64 1, align 64213! LLVMIR: %[[VAL_77:.*]] = load <16 x i8>, ptr %[[VAL_75]], align 16214! LLVMIR: %[[VAL_78:.*]] = load <16 x i8>, ptr %[[VAL_74]], align 16215! LLVMIR: %[[VAL_79:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf16ger2(<16 x i8> %[[VAL_77]], <16 x i8> %[[VAL_78]], i32 7, i32 7, i32 2)216! LLVMIR: store <512 x i1> %[[VAL_79]], ptr %[[VAL_76]], align 64217 218 subroutine test_pmxvf16ger2nn_def()219 use, intrinsic :: mma220 implicit none221 vector(unsigned(1)) vu10, vu11222 __vector_quad :: cq223 call mma_pmxvf16ger2nn(cq, vu10, vu11, 7, 7, 2)224 end subroutine test_pmxvf16ger2nn_def225 226!CHECK-LABEL: @test_pmxvf16ger2nn_def_227! LLVMIR: %[[VAL_80:.*]] = alloca <16 x i8>, i64 1, align 16228! LLVMIR: %[[VAL_81:.*]] = alloca <16 x i8>, i64 1, align 16229! LLVMIR: %[[VAL_82:.*]] = alloca <512 x i1>, i64 1, align 64230! LLVMIR: %[[VAL_83:.*]] = load <16 x i8>, ptr %[[VAL_81]], align 16231! LLVMIR: %[[VAL_84:.*]] = load <16 x i8>, ptr %[[VAL_80]], align 16232! LLVMIR: %[[VAL_85:.*]] = load <512 x i1>, ptr %[[VAL_82]], align 64233! LLVMIR: %[[VAL_86:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf16ger2nn(<512 x i1> %[[VAL_85]], <16 x i8> %[[VAL_83]], <16 x i8> %[[VAL_84]], i32 7, i32 7, i32 2)234! LLVMIR: store <512 x i1> %[[VAL_86]], ptr %[[VAL_82]], align 64235 236 subroutine test_pmxvf16ger2nn_non_def()237 use, intrinsic :: mma238 implicit none239 vector(unsigned(1)) vu10, vu11240 __vector_quad :: cq241 call mma_pmxvf16ger2nn(cq, vu10, vu11, 7_2, 7_1, 2_8)242 end subroutine test_pmxvf16ger2nn_non_def243 244!CHECK-LABEL: @test_pmxvf16ger2nn_non_def_245! LLVMIR: %[[VAL_87:.*]] = alloca <16 x i8>, i64 1, align 16246! LLVMIR: %[[VAL_88:.*]] = alloca <16 x i8>, i64 1, align 16247! LLVMIR: %[[VAL_89:.*]] = alloca <512 x i1>, i64 1, align 64248! LLVMIR: %[[VAL_90:.*]] = load <16 x i8>, ptr %[[VAL_88]], align 16249! LLVMIR: %[[VAL_91:.*]] = load <16 x i8>, ptr %[[VAL_87]], align 16250! LLVMIR: %[[VAL_92:.*]] = load <512 x i1>, ptr %[[VAL_89]], align 64251! LLVMIR: %[[VAL_93:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf16ger2nn(<512 x i1> %[[VAL_92]], <16 x i8> %[[VAL_90]], <16 x i8> %[[VAL_91]], i32 7, i32 7, i32 2)252! LLVMIR: store <512 x i1> %[[VAL_93]], ptr %[[VAL_89]], align 64253 254 subroutine test_pmxvf16ger2np_def()255 use, intrinsic :: mma256 implicit none257 vector(unsigned(1)) vu10, vu11258 __vector_quad :: cq259 call mma_pmxvf16ger2np(cq, vu10, vu11, 7, 7, 2)260 end subroutine test_pmxvf16ger2np_def261 262!CHECK-LABEL: @test_pmxvf16ger2np_def_263! LLVMIR: %[[VAL_94:.*]] = alloca <16 x i8>, i64 1, align 16264! LLVMIR: %[[VAL_95:.*]] = alloca <16 x i8>, i64 1, align 16265! LLVMIR: %[[VAL_96:.*]] = alloca <512 x i1>, i64 1, align 64266! LLVMIR: %[[VAL_97:.*]] = load <16 x i8>, ptr %[[VAL_95]], align 16267! LLVMIR: %[[VAL_98:.*]] = load <16 x i8>, ptr %[[VAL_94]], align 16268! LLVMIR: %[[VAL_99:.*]] = load <512 x i1>, ptr %[[VAL_96]], align 64269! LLVMIR: %[[VAL_100:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf16ger2np(<512 x i1> %[[VAL_99]], <16 x i8> %[[VAL_97]], <16 x i8> %[[VAL_98]], i32 7, i32 7, i32 2)270! LLVMIR: store <512 x i1> %[[VAL_100]], ptr %[[VAL_96]], align 64271 272 subroutine test_pmxvf16ger2np_non_def()273 use, intrinsic :: mma274 implicit none275 vector(unsigned(1)) vu10, vu11276 __vector_quad :: cq277 call mma_pmxvf16ger2np(cq, vu10, vu11, 7_2, 7_1, 2_8)278 end subroutine test_pmxvf16ger2np_non_def279 280!CHECK-LABEL: @test_pmxvf16ger2np_non_def_281! LLVMIR: %[[VAL_101:.*]] = alloca <16 x i8>, i64 1, align 16282! LLVMIR: %[[VAL_102:.*]] = alloca <16 x i8>, i64 1, align 16283! LLVMIR: %[[VAL_103:.*]] = alloca <512 x i1>, i64 1, align 64284! LLVMIR: %[[VAL_104:.*]] = load <16 x i8>, ptr %[[VAL_102]], align 16285! LLVMIR: %[[VAL_105:.*]] = load <16 x i8>, ptr %[[VAL_101]], align 16286! LLVMIR: %[[VAL_106:.*]] = load <512 x i1>, ptr %[[VAL_103]], align 64287! LLVMIR: %[[VAL_107:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf16ger2np(<512 x i1> %[[VAL_106]], <16 x i8> %[[VAL_104]], <16 x i8> %[[VAL_105]], i32 7, i32 7, i32 2)288! LLVMIR: store <512 x i1> %[[VAL_107]], ptr %[[VAL_103]], align 64289 290 subroutine test_pmxvf16ger2pn_def()291 use, intrinsic :: mma292 implicit none293 vector(unsigned(1)) vu10, vu11294 __vector_quad :: cq295 call mma_pmxvf16ger2pn(cq, vu10, vu11, 7, 7, 2)296 end subroutine test_pmxvf16ger2pn_def297 298!CHECK-LABEL: @test_pmxvf16ger2pn_def_299! LLVMIR: %[[VAL_108:.*]] = alloca <16 x i8>, i64 1, align 16300! LLVMIR: %[[VAL_109:.*]] = alloca <16 x i8>, i64 1, align 16301! LLVMIR: %[[VAL_110:.*]] = alloca <512 x i1>, i64 1, align 64302! LLVMIR: %[[VAL_111:.*]] = load <16 x i8>, ptr %[[VAL_109]], align 16303! LLVMIR: %[[VAL_112:.*]] = load <16 x i8>, ptr %[[VAL_108]], align 16304! LLVMIR: %[[VAL_113:.*]] = load <512 x i1>, ptr %[[VAL_110]], align 64305! LLVMIR: %[[VAL_114:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf16ger2pn(<512 x i1> %[[VAL_113]], <16 x i8> %[[VAL_111]], <16 x i8> %[[VAL_112]], i32 7, i32 7, i32 2)306! LLVMIR: store <512 x i1> %[[VAL_114]], ptr %[[VAL_110]], align 64307 308 subroutine test_pmxvf16ger2pn_non_def()309 use, intrinsic :: mma310 implicit none311 vector(unsigned(1)) vu10, vu11312 __vector_quad :: cq313 call mma_pmxvf16ger2pn(cq, vu10, vu11, 7_2, 7_1, 2_8)314 end subroutine test_pmxvf16ger2pn_non_def315 316!CHECK-LABEL: @test_pmxvf16ger2pn_non_def_317! LLVMIR: %[[VAL_115:.*]] = alloca <16 x i8>, i64 1, align 16318! LLVMIR: %[[VAL_116:.*]] = alloca <16 x i8>, i64 1, align 16319! LLVMIR: %[[VAL_117:.*]] = alloca <512 x i1>, i64 1, align 64320! LLVMIR: %[[VAL_118:.*]] = load <16 x i8>, ptr %[[VAL_116]], align 16321! LLVMIR: %[[VAL_119:.*]] = load <16 x i8>, ptr %[[VAL_115]], align 16322! LLVMIR: %[[VAL_120:.*]] = load <512 x i1>, ptr %[[VAL_117]], align 64323! LLVMIR: %[[VAL_121:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf16ger2pn(<512 x i1> %[[VAL_120]], <16 x i8> %[[VAL_118]], <16 x i8> %[[VAL_119]], i32 7, i32 7, i32 2)324! LLVMIR: store <512 x i1> %[[VAL_121]], ptr %[[VAL_117]], align 64325 326 subroutine test_pmxvf16ger2pp_def()327 use, intrinsic :: mma328 implicit none329 vector(unsigned(1)) vu10, vu11330 __vector_quad :: cq331 call mma_pmxvf16ger2pp(cq, vu10, vu11, 7, 7, 2)332 end subroutine test_pmxvf16ger2pp_def333 334!CHECK-LABEL: @test_pmxvf16ger2pp_def_335! LLVMIR: %[[VAL_122:.*]] = alloca <16 x i8>, i64 1, align 16336! LLVMIR: %[[VAL_123:.*]] = alloca <16 x i8>, i64 1, align 16337! LLVMIR: %[[VAL_124:.*]] = alloca <512 x i1>, i64 1, align 64338! LLVMIR: %[[VAL_125:.*]] = load <16 x i8>, ptr %[[VAL_123]], align 16339! LLVMIR: %[[VAL_126:.*]] = load <16 x i8>, ptr %[[VAL_122]], align 16340! LLVMIR: %[[VAL_127:.*]] = load <512 x i1>, ptr %[[VAL_124]], align 64341! LLVMIR: %[[VAL_128:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf16ger2pp(<512 x i1> %[[VAL_127]], <16 x i8> %[[VAL_125]], <16 x i8> %[[VAL_126]], i32 7, i32 7, i32 2)342! LLVMIR: store <512 x i1> %[[VAL_128]], ptr %[[VAL_124]], align 64343 344 subroutine test_pmxvf16ger2pp_non_def()345 use, intrinsic :: mma346 implicit none347 vector(unsigned(1)) vu10, vu11348 __vector_quad :: cq349 call mma_pmxvf16ger2pp(cq, vu10, vu11, 7_2, 7_1, 2_8)350 end subroutine test_pmxvf16ger2pp_non_def351 352!CHECK-LABEL: @test_pmxvf16ger2pp_non_def_353! LLVMIR: %[[VAL_129:.*]] = alloca <16 x i8>, i64 1, align 16354! LLVMIR: %[[VAL_130:.*]] = alloca <16 x i8>, i64 1, align 16355! LLVMIR: %[[VAL_131:.*]] = alloca <512 x i1>, i64 1, align 64356! LLVMIR: %[[VAL_132:.*]] = load <16 x i8>, ptr %[[VAL_130]], align 16357! LLVMIR: %[[VAL_133:.*]] = load <16 x i8>, ptr %[[VAL_129]], align 16358! LLVMIR: %[[VAL_134:.*]] = load <512 x i1>, ptr %[[VAL_131]], align 64359! LLVMIR: %[[VAL_135:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf16ger2pp(<512 x i1> %[[VAL_134]], <16 x i8> %[[VAL_132]], <16 x i8> %[[VAL_133]], i32 7, i32 7, i32 2)360! LLVMIR: store <512 x i1> %[[VAL_135]], ptr %[[VAL_131]], align 64361 362 subroutine test_pmxvf32ger_u1_def()363 use, intrinsic :: mma364 implicit none365 vector(unsigned(1)) vu10, vu11366 __vector_quad :: cq367 call mma_pmxvf32ger(cq, vu10, vu11, 7, 2)368 end subroutine test_pmxvf32ger_u1_def369 370!CHECK-LABEL: @test_pmxvf32ger_u1_def_371! LLVMIR: %[[VAL_136:.*]] = alloca <16 x i8>, i64 1, align 16372! LLVMIR: %[[VAL_137:.*]] = alloca <16 x i8>, i64 1, align 16373! LLVMIR: %[[VAL_138:.*]] = alloca <512 x i1>, i64 1, align 64374! LLVMIR: %[[VAL_139:.*]] = load <16 x i8>, ptr %[[VAL_137]], align 16375! LLVMIR: %[[VAL_140:.*]] = load <16 x i8>, ptr %[[VAL_136]], align 16376! LLVMIR: %[[VAL_141:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32ger(<16 x i8> %[[VAL_139]], <16 x i8> %[[VAL_140]], i32 7, i32 2)377! LLVMIR: store <512 x i1> %[[VAL_141]], ptr %[[VAL_138]], align 64378 379 subroutine test_pmxvf32ger_u1_non_def()380 use, intrinsic :: mma381 implicit none382 vector(unsigned(1)) vu10, vu11383 __vector_quad :: cq384 call mma_pmxvf32ger(cq, vu10, vu11, 7_2, 2_1)385 end subroutine test_pmxvf32ger_u1_non_def386 387!CHECK-LABEL: @test_pmxvf32ger_u1_non_def_388! LLVMIR: %[[VAL_142:.*]] = alloca <16 x i8>, i64 1, align 16389! LLVMIR: %[[VAL_143:.*]] = alloca <16 x i8>, i64 1, align 16390! LLVMIR: %[[VAL_144:.*]] = alloca <512 x i1>, i64 1, align 64391! LLVMIR: %[[VAL_145:.*]] = load <16 x i8>, ptr %[[VAL_143]], align 16392! LLVMIR: %[[VAL_146:.*]] = load <16 x i8>, ptr %[[VAL_142]], align 16393! LLVMIR: %[[VAL_147:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32ger(<16 x i8> %[[VAL_145]], <16 x i8> %[[VAL_146]], i32 7, i32 2)394! LLVMIR: store <512 x i1> %[[VAL_147]], ptr %[[VAL_144]], align 64395 396 subroutine test_pmxvf32ger_r4_def()397 use, intrinsic :: mma398 implicit none399 vector(real(4)) vr40, vr41400 __vector_quad :: cq401 call mma_pmxvf32ger(cq, vr40, vr41, 7, 2)402 end subroutine test_pmxvf32ger_r4_def403 404!CHECK-LABEL: @test_pmxvf32ger_r4_def_405! LLVMIR: %[[VAL_148:.*]] = alloca <4 x float>, i64 1, align 16406! LLVMIR: %[[VAL_149:.*]] = alloca <4 x float>, i64 1, align 16407! LLVMIR: %[[VAL_150:.*]] = alloca <512 x i1>, i64 1, align 64408! LLVMIR: %[[VAL_151:.*]] = load <4 x float>, ptr %[[VAL_149]], align 16409! LLVMIR: %[[VAL_152:.*]] = load <4 x float>, ptr %[[VAL_148]], align 16410! LLVMIR: %[[VAL_153:.*]] = bitcast <4 x float> %[[VAL_151]] to <16 x i8>411! LLVMIR: %[[VAL_154:.*]] = bitcast <4 x float> %[[VAL_152]] to <16 x i8>412! LLVMIR: %[[VAL_155:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32ger(<16 x i8> %[[VAL_153]], <16 x i8> %[[VAL_154]], i32 7, i32 2)413! LLVMIR: store <512 x i1> %[[VAL_155]], ptr %[[VAL_150]], align 64414 415 subroutine test_pmxvf32ger_r4_non_def()416 use, intrinsic :: mma417 implicit none418 vector(real(4)) vr40, vr41419 __vector_quad :: cq420 call mma_pmxvf32ger(cq, vr40, vr41, 7_2, 2_1)421 end subroutine test_pmxvf32ger_r4_non_def422 423!CHECK-LABEL: @test_pmxvf32ger_r4_non_def_424! LLVMIR: %[[VAL_156:.*]] = alloca <4 x float>, i64 1, align 16425! LLVMIR: %[[VAL_157:.*]] = alloca <4 x float>, i64 1, align 16426! LLVMIR: %[[VAL_158:.*]] = alloca <512 x i1>, i64 1, align 64427! LLVMIR: %[[VAL_159:.*]] = load <4 x float>, ptr %[[VAL_157]], align 16428! LLVMIR: %[[VAL_160:.*]] = load <4 x float>, ptr %[[VAL_156]], align 16429! LLVMIR: %[[VAL_161:.*]] = bitcast <4 x float> %[[VAL_159]] to <16 x i8>430! LLVMIR: %[[VAL_162:.*]] = bitcast <4 x float> %[[VAL_160]] to <16 x i8>431! LLVMIR: %[[VAL_163:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32ger(<16 x i8> %[[VAL_161]], <16 x i8> %[[VAL_162]], i32 7, i32 2)432! LLVMIR: store <512 x i1> %[[VAL_163]], ptr %[[VAL_158]], align 64433 434 subroutine test_pmxvf32gernn_u1_def()435 use, intrinsic :: mma436 implicit none437 vector(unsigned(1)) vu10, vu11438 __vector_quad :: cq439 call mma_pmxvf32gernn(cq, vu10, vu11, 7, 2)440 end subroutine test_pmxvf32gernn_u1_def441 442!CHECK-LABEL: @test_pmxvf32gernn_u1_def_443! LLVMIR: %[[VAL_164:.*]] = alloca <16 x i8>, i64 1, align 16444! LLVMIR: %[[VAL_165:.*]] = alloca <16 x i8>, i64 1, align 16445! LLVMIR: %[[VAL_166:.*]] = alloca <512 x i1>, i64 1, align 64446! LLVMIR: %[[VAL_167:.*]] = load <16 x i8>, ptr %[[VAL_165]], align 16447! LLVMIR: %[[VAL_168:.*]] = load <16 x i8>, ptr %[[VAL_164]], align 16448! LLVMIR: %[[VAL_169:.*]] = load <512 x i1>, ptr %[[VAL_166]], align 64449! LLVMIR: %[[VAL_170:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gernn(<512 x i1> %[[VAL_169]], <16 x i8> %[[VAL_167]], <16 x i8> %[[VAL_168]], i32 7, i32 2)450! LLVMIR: store <512 x i1> %[[VAL_170]], ptr %[[VAL_166]], align 64451 452 subroutine test_pmxvf32gernn_u1_non_def()453 use, intrinsic :: mma454 implicit none455 vector(unsigned(1)) vu10, vu11456 __vector_quad :: cq457 call mma_pmxvf32gernn(cq, vu10, vu11, 7_2, 2_1)458 end subroutine test_pmxvf32gernn_u1_non_def459 460!CHECK-LABEL: @test_pmxvf32gernn_u1_non_def_461! LLVMIR: %[[VAL_171:.*]] = alloca <16 x i8>, i64 1, align 16462! LLVMIR: %[[VAL_172:.*]] = alloca <16 x i8>, i64 1, align 16463! LLVMIR: %[[VAL_173:.*]] = alloca <512 x i1>, i64 1, align 64464! LLVMIR: %[[VAL_174:.*]] = load <16 x i8>, ptr %[[VAL_172]], align 16465! LLVMIR: %[[VAL_175:.*]] = load <16 x i8>, ptr %[[VAL_171]], align 16466! LLVMIR: %[[VAL_176:.*]] = load <512 x i1>, ptr %[[VAL_173]], align 64467! LLVMIR: %[[VAL_177:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gernn(<512 x i1> %[[VAL_176]], <16 x i8> %[[VAL_174]], <16 x i8> %[[VAL_175]], i32 7, i32 2)468! LLVMIR: store <512 x i1> %[[VAL_177]], ptr %[[VAL_173]], align 64469 470 subroutine test_pmxvf32gernn_r4_def()471 use, intrinsic :: mma472 implicit none473 vector(real(4)) vr40, vr41474 __vector_quad :: cq475 call mma_pmxvf32gernn(cq, vr40, vr41, 7, 2)476 end subroutine test_pmxvf32gernn_r4_def477 478!CHECK-LABEL: @test_pmxvf32gernn_r4_def_479! LLVMIR: %[[VAL_178:.*]] = alloca <4 x float>, i64 1, align 16480! LLVMIR: %[[VAL_179:.*]] = alloca <4 x float>, i64 1, align 16481! LLVMIR: %[[VAL_180:.*]] = alloca <512 x i1>, i64 1, align 64482! LLVMIR: %[[VAL_181:.*]] = load <4 x float>, ptr %[[VAL_179]], align 16483! LLVMIR: %[[VAL_182:.*]] = load <4 x float>, ptr %[[VAL_178]], align 16484! LLVMIR: %[[VAL_183:.*]] = load <512 x i1>, ptr %[[VAL_180]], align 64485! LLVMIR: %[[VAL_184:.*]] = bitcast <4 x float> %[[VAL_181]] to <16 x i8>486! LLVMIR: %[[VAL_185:.*]] = bitcast <4 x float> %[[VAL_182]] to <16 x i8>487! LLVMIR: %[[VAL_186:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gernn(<512 x i1> %[[VAL_183]], <16 x i8> %[[VAL_184]], <16 x i8> %[[VAL_185]], i32 7, i32 2)488! LLVMIR: store <512 x i1> %[[VAL_186]], ptr %[[VAL_180]], align 64489 490 subroutine test_pmxvf32gernn_r4_non_def()491 use, intrinsic :: mma492 implicit none493 vector(real(4)) vr40, vr41494 __vector_quad :: cq495 call mma_pmxvf32gernn(cq, vr40, vr41, 7_2, 2_1)496 end subroutine test_pmxvf32gernn_r4_non_def497 498!CHECK-LABEL: @test_pmxvf32gernn_r4_non_def_499! LLVMIR: %[[VAL_187:.*]] = alloca <4 x float>, i64 1, align 16500! LLVMIR: %[[VAL_188:.*]] = alloca <4 x float>, i64 1, align 16501! LLVMIR: %[[VAL_189:.*]] = alloca <512 x i1>, i64 1, align 64502! LLVMIR: %[[VAL_190:.*]] = load <4 x float>, ptr %[[VAL_188]], align 16503! LLVMIR: %[[VAL_191:.*]] = load <4 x float>, ptr %[[VAL_187]], align 16504! LLVMIR: %[[VAL_192:.*]] = load <512 x i1>, ptr %[[VAL_189]], align 64505! LLVMIR: %[[VAL_193:.*]] = bitcast <4 x float> %[[VAL_190]] to <16 x i8>506! LLVMIR: %[[VAL_194:.*]] = bitcast <4 x float> %[[VAL_191]] to <16 x i8>507! LLVMIR: %[[VAL_195:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gernn(<512 x i1> %[[VAL_192]], <16 x i8> %[[VAL_193]], <16 x i8> %[[VAL_194]], i32 7, i32 2)508! LLVMIR: store <512 x i1> %[[VAL_195]], ptr %[[VAL_189]], align 64509 510 subroutine test_pmxvf32gernp_u1_def()511 use, intrinsic :: mma512 implicit none513 vector(unsigned(1)) vu10, vu11514 __vector_quad :: cq515 call mma_pmxvf32gernp(cq, vu10, vu11, 7, 2)516 end subroutine test_pmxvf32gernp_u1_def517 518!CHECK-LABEL: @test_pmxvf32gernp_u1_def_519! LLVMIR: %[[VAL_196:.*]] = alloca <16 x i8>, i64 1, align 16520! LLVMIR: %[[VAL_197:.*]] = alloca <16 x i8>, i64 1, align 16521! LLVMIR: %[[VAL_198:.*]] = alloca <512 x i1>, i64 1, align 64522! LLVMIR: %[[VAL_199:.*]] = load <16 x i8>, ptr %[[VAL_197]], align 16523! LLVMIR: %[[VAL_200:.*]] = load <16 x i8>, ptr %[[VAL_196]], align 16524! LLVMIR: %[[VAL_201:.*]] = load <512 x i1>, ptr %[[VAL_198]], align 64525! LLVMIR: %[[VAL_202:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gernp(<512 x i1> %[[VAL_201]], <16 x i8> %[[VAL_199]], <16 x i8> %[[VAL_200]], i32 7, i32 2)526! LLVMIR: store <512 x i1> %[[VAL_202]], ptr %[[VAL_198]], align 64527 528 subroutine test_pmxvf32gernp_u1_non_def()529 use, intrinsic :: mma530 implicit none531 vector(unsigned(1)) vu10, vu11532 __vector_quad :: cq533 call mma_pmxvf32gernp(cq, vu10, vu11, 7_2, 2_1)534 end subroutine test_pmxvf32gernp_u1_non_def535 536!CHECK-LABEL: @test_pmxvf32gernp_u1_non_def_537! LLVMIR: %[[VAL_203:.*]] = alloca <16 x i8>, i64 1, align 16538! LLVMIR: %[[VAL_204:.*]] = alloca <16 x i8>, i64 1, align 16539! LLVMIR: %[[VAL_205:.*]] = alloca <512 x i1>, i64 1, align 64540! LLVMIR: %[[VAL_206:.*]] = load <16 x i8>, ptr %[[VAL_204]], align 16541! LLVMIR: %[[VAL_207:.*]] = load <16 x i8>, ptr %[[VAL_203]], align 16542! LLVMIR: %[[VAL_208:.*]] = load <512 x i1>, ptr %[[VAL_205]], align 64543! LLVMIR: %[[VAL_209:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gernp(<512 x i1> %[[VAL_208]], <16 x i8> %[[VAL_206]], <16 x i8> %[[VAL_207]], i32 7, i32 2)544! LLVMIR: store <512 x i1> %[[VAL_209]], ptr %[[VAL_205]], align 64545 546 subroutine test_pmxvf32gernp_r4_def()547 use, intrinsic :: mma548 implicit none549 vector(real(4)) vr40, vr41550 __vector_quad :: cq551 call mma_pmxvf32gernp(cq, vr40, vr41, 7, 2)552 end subroutine test_pmxvf32gernp_r4_def553 554!CHECK-LABEL: @test_pmxvf32gernp_r4_def_555! LLVMIR: %[[VAL_210:.*]] = alloca <4 x float>, i64 1, align 16556! LLVMIR: %[[VAL_211:.*]] = alloca <4 x float>, i64 1, align 16557! LLVMIR: %[[VAL_212:.*]] = alloca <512 x i1>, i64 1, align 64558! LLVMIR: %[[VAL_213:.*]] = load <4 x float>, ptr %[[VAL_211]], align 16559! LLVMIR: %[[VAL_214:.*]] = load <4 x float>, ptr %[[VAL_210]], align 16560! LLVMIR: %[[VAL_215:.*]] = load <512 x i1>, ptr %[[VAL_212]], align 64561! LLVMIR: %[[VAL_216:.*]] = bitcast <4 x float> %[[VAL_213]] to <16 x i8>562! LLVMIR: %[[VAL_217:.*]] = bitcast <4 x float> %[[VAL_214]] to <16 x i8>563! LLVMIR: %[[VAL_218:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gernp(<512 x i1> %[[VAL_215]], <16 x i8> %[[VAL_216]], <16 x i8> %[[VAL_217]], i32 7, i32 2)564! LLVMIR: store <512 x i1> %[[VAL_218]], ptr %[[VAL_212]], align 64565 566 subroutine test_pmxvf32gernp_r4_non_def()567 use, intrinsic :: mma568 implicit none569 vector(real(4)) vr40, vr41570 __vector_quad :: cq571 call mma_pmxvf32gernp(cq, vr40, vr41, 7_2, 2_1)572 end subroutine test_pmxvf32gernp_r4_non_def573 574!CHECK-LABEL: @test_pmxvf32gernp_r4_non_def_575! LLVMIR: %[[VAL_219:.*]] = alloca <4 x float>, i64 1, align 16576! LLVMIR: %[[VAL_220:.*]] = alloca <4 x float>, i64 1, align 16577! LLVMIR: %[[VAL_221:.*]] = alloca <512 x i1>, i64 1, align 64578! LLVMIR: %[[VAL_222:.*]] = load <4 x float>, ptr %[[VAL_220]], align 16579! LLVMIR: %[[VAL_223:.*]] = load <4 x float>, ptr %[[VAL_219]], align 16580! LLVMIR: %[[VAL_224:.*]] = load <512 x i1>, ptr %[[VAL_221]], align 64581! LLVMIR: %[[VAL_225:.*]] = bitcast <4 x float> %[[VAL_222]] to <16 x i8>582! LLVMIR: %[[VAL_226:.*]] = bitcast <4 x float> %[[VAL_223]] to <16 x i8>583! LLVMIR: %[[VAL_227:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gernp(<512 x i1> %[[VAL_224]], <16 x i8> %[[VAL_225]], <16 x i8> %[[VAL_226]], i32 7, i32 2)584! LLVMIR: store <512 x i1> %[[VAL_227]], ptr %[[VAL_221]], align 64585 586 subroutine test_pmxvf32gerpn_u1_def()587 use, intrinsic :: mma588 implicit none589 vector(unsigned(1)) vu10, vu11590 __vector_quad :: cq591 call mma_pmxvf32gerpn(cq, vu10, vu11, 7, 2)592 end subroutine test_pmxvf32gerpn_u1_def593 594!CHECK-LABEL: @test_pmxvf32gerpn_u1_def_595! LLVMIR: %[[VAL_228:.*]] = alloca <16 x i8>, i64 1, align 16596! LLVMIR: %[[VAL_229:.*]] = alloca <16 x i8>, i64 1, align 16597! LLVMIR: %[[VAL_230:.*]] = alloca <512 x i1>, i64 1, align 64598! LLVMIR: %[[VAL_231:.*]] = load <16 x i8>, ptr %[[VAL_229]], align 16599! LLVMIR: %[[VAL_232:.*]] = load <16 x i8>, ptr %[[VAL_228]], align 16600! LLVMIR: %[[VAL_233:.*]] = load <512 x i1>, ptr %[[VAL_230]], align 64601! LLVMIR: %[[VAL_234:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gerpn(<512 x i1> %[[VAL_233]], <16 x i8> %[[VAL_231]], <16 x i8> %[[VAL_232]], i32 7, i32 2)602! LLVMIR: store <512 x i1> %[[VAL_234]], ptr %[[VAL_230]], align 64603 604 subroutine test_pmxvf32gerpn_u1_non_def()605 use, intrinsic :: mma606 implicit none607 vector(unsigned(1)) vu10, vu11608 __vector_quad :: cq609 call mma_pmxvf32gerpn(cq, vu10, vu11, 7_2, 2_1)610 end subroutine test_pmxvf32gerpn_u1_non_def611 612!CHECK-LABEL: @test_pmxvf32gerpn_u1_non_def_613! LLVMIR: %[[VAL_235:.*]] = alloca <16 x i8>, i64 1, align 16614! LLVMIR: %[[VAL_236:.*]] = alloca <16 x i8>, i64 1, align 16615! LLVMIR: %[[VAL_237:.*]] = alloca <512 x i1>, i64 1, align 64616! LLVMIR: %[[VAL_238:.*]] = load <16 x i8>, ptr %[[VAL_236]], align 16617! LLVMIR: %[[VAL_239:.*]] = load <16 x i8>, ptr %[[VAL_235]], align 16618! LLVMIR: %[[VAL_240:.*]] = load <512 x i1>, ptr %[[VAL_237]], align 64619! LLVMIR: %[[VAL_241:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gerpn(<512 x i1> %[[VAL_240]], <16 x i8> %[[VAL_238]], <16 x i8> %[[VAL_239]], i32 7, i32 2)620! LLVMIR: store <512 x i1> %[[VAL_241]], ptr %[[VAL_237]], align 64621 622 subroutine test_pmxvf32gerpn_r4_def()623 use, intrinsic :: mma624 implicit none625 vector(real(4)) vr40, vr41626 __vector_quad :: cq627 call mma_pmxvf32gerpn(cq, vr40, vr41, 7, 2)628 end subroutine test_pmxvf32gerpn_r4_def629 630!CHECK-LABEL: @test_pmxvf32gerpn_r4_def_631! LLVMIR: %[[VAL_242:.*]] = alloca <4 x float>, i64 1, align 16632! LLVMIR: %[[VAL_243:.*]] = alloca <4 x float>, i64 1, align 16633! LLVMIR: %[[VAL_244:.*]] = alloca <512 x i1>, i64 1, align 64634! LLVMIR: %[[VAL_245:.*]] = load <4 x float>, ptr %[[VAL_243]], align 16635! LLVMIR: %[[VAL_246:.*]] = load <4 x float>, ptr %[[VAL_242]], align 16636! LLVMIR: %[[VAL_247:.*]] = load <512 x i1>, ptr %[[VAL_244]], align 64637! LLVMIR: %[[VAL_248:.*]] = bitcast <4 x float> %[[VAL_245]] to <16 x i8>638! LLVMIR: %[[VAL_249:.*]] = bitcast <4 x float> %[[VAL_246]] to <16 x i8>639! LLVMIR: %[[VAL_250:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gerpn(<512 x i1> %[[VAL_247]], <16 x i8> %[[VAL_248]], <16 x i8> %[[VAL_249]], i32 7, i32 2)640! LLVMIR: store <512 x i1> %[[VAL_250]], ptr %[[VAL_244]], align 64641 642 subroutine test_pmxvf32gerpn_r4_non_def()643 use, intrinsic :: mma644 implicit none645 vector(real(4)) vr40, vr41646 __vector_quad :: cq647 call mma_pmxvf32gerpn(cq, vr40, vr41, 7_2, 2_1)648 end subroutine test_pmxvf32gerpn_r4_non_def649 650!CHECK-LABEL: @test_pmxvf32gerpn_r4_non_def_651! LLVMIR: %[[VAL_251:.*]] = alloca <4 x float>, i64 1, align 16652! LLVMIR: %[[VAL_252:.*]] = alloca <4 x float>, i64 1, align 16653! LLVMIR: %[[VAL_253:.*]] = alloca <512 x i1>, i64 1, align 64654! LLVMIR: %[[VAL_254:.*]] = load <4 x float>, ptr %[[VAL_252]], align 16655! LLVMIR: %[[VAL_255:.*]] = load <4 x float>, ptr %[[VAL_251]], align 16656! LLVMIR: %[[VAL_256:.*]] = load <512 x i1>, ptr %[[VAL_253]], align 64657! LLVMIR: %[[VAL_257:.*]] = bitcast <4 x float> %[[VAL_254]] to <16 x i8>658! LLVMIR: %[[VAL_258:.*]] = bitcast <4 x float> %[[VAL_255]] to <16 x i8>659! LLVMIR: %[[VAL_259:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gerpn(<512 x i1> %[[VAL_256]], <16 x i8> %[[VAL_257]], <16 x i8> %[[VAL_258]], i32 7, i32 2)660! LLVMIR: store <512 x i1> %[[VAL_259]], ptr %[[VAL_253]], align 64661 662 subroutine test_pmxvf32gerpp_u1_def()663 use, intrinsic :: mma664 implicit none665 vector(unsigned(1)) vu10, vu11666 __vector_quad :: cq667 call mma_pmxvf32gerpp(cq, vu10, vu11, 7, 2)668 end subroutine test_pmxvf32gerpp_u1_def669 670!CHECK-LABEL: @test_pmxvf32gerpp_u1_def_671! LLVMIR: %[[VAL_260:.*]] = alloca <16 x i8>, i64 1, align 16672! LLVMIR: %[[VAL_261:.*]] = alloca <16 x i8>, i64 1, align 16673! LLVMIR: %[[VAL_262:.*]] = alloca <512 x i1>, i64 1, align 64674! LLVMIR: %[[VAL_263:.*]] = load <16 x i8>, ptr %[[VAL_261]], align 16675! LLVMIR: %[[VAL_264:.*]] = load <16 x i8>, ptr %[[VAL_260]], align 16676! LLVMIR: %[[VAL_265:.*]] = load <512 x i1>, ptr %[[VAL_262]], align 64677! LLVMIR: %[[VAL_266:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gerpp(<512 x i1> %[[VAL_265]], <16 x i8> %[[VAL_263]], <16 x i8> %[[VAL_264]], i32 7, i32 2)678! LLVMIR: store <512 x i1> %[[VAL_266]], ptr %[[VAL_262]], align 64679 680 subroutine test_pmxvf32gerpp_u1_non_def()681 use, intrinsic :: mma682 implicit none683 vector(unsigned(1)) vu10, vu11684 __vector_quad :: cq685 call mma_pmxvf32gerpp(cq, vu10, vu11, 7_2, 2_1)686 end subroutine test_pmxvf32gerpp_u1_non_def687 688!CHECK-LABEL: @test_pmxvf32gerpp_u1_non_def_689! LLVMIR: %[[VAL_267:.*]] = alloca <16 x i8>, i64 1, align 16690! LLVMIR: %[[VAL_268:.*]] = alloca <16 x i8>, i64 1, align 16691! LLVMIR: %[[VAL_269:.*]] = alloca <512 x i1>, i64 1, align 64692! LLVMIR: %[[VAL_270:.*]] = load <16 x i8>, ptr %[[VAL_268]], align 16693! LLVMIR: %[[VAL_271:.*]] = load <16 x i8>, ptr %[[VAL_267]], align 16694! LLVMIR: %[[VAL_272:.*]] = load <512 x i1>, ptr %[[VAL_269]], align 64695! LLVMIR: %[[VAL_273:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gerpp(<512 x i1> %[[VAL_272]], <16 x i8> %[[VAL_270]], <16 x i8> %[[VAL_271]], i32 7, i32 2)696! LLVMIR: store <512 x i1> %[[VAL_273]], ptr %[[VAL_269]], align 64697 698 subroutine test_pmxvf32gerpp_r4_def()699 use, intrinsic :: mma700 implicit none701 vector(real(4)) vr40, vr41702 __vector_quad :: cq703 call mma_pmxvf32gerpp(cq, vr40, vr41, 7, 2)704 end subroutine test_pmxvf32gerpp_r4_def705 706!CHECK-LABEL: @test_pmxvf32gerpp_r4_def_707! LLVMIR: %[[VAL_274:.*]] = alloca <4 x float>, i64 1, align 16708! LLVMIR: %[[VAL_275:.*]] = alloca <4 x float>, i64 1, align 16709! LLVMIR: %[[VAL_276:.*]] = alloca <512 x i1>, i64 1, align 64710! LLVMIR: %[[VAL_277:.*]] = load <4 x float>, ptr %[[VAL_275]], align 16711! LLVMIR: %[[VAL_278:.*]] = load <4 x float>, ptr %[[VAL_274]], align 16712! LLVMIR: %[[VAL_279:.*]] = load <512 x i1>, ptr %[[VAL_276]], align 64713! LLVMIR: %[[VAL_280:.*]] = bitcast <4 x float> %[[VAL_277]] to <16 x i8>714! LLVMIR: %[[VAL_281:.*]] = bitcast <4 x float> %[[VAL_278]] to <16 x i8>715! LLVMIR: %[[VAL_282:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gerpp(<512 x i1> %[[VAL_279]], <16 x i8> %[[VAL_280]], <16 x i8> %[[VAL_281]], i32 7, i32 2)716! LLVMIR: store <512 x i1> %[[VAL_282]], ptr %[[VAL_276]], align 64717 718 subroutine test_pmxvf32gerpp_r4_non_def()719 use, intrinsic :: mma720 implicit none721 vector(real(4)) vr40, vr41722 __vector_quad :: cq723 call mma_pmxvf32gerpp(cq, vr40, vr41, 7_2, 2_1)724 end subroutine test_pmxvf32gerpp_r4_non_def725 726!CHECK-LABEL: @test_pmxvf32gerpp_r4_non_def_727! LLVMIR: %[[VAL_283:.*]] = alloca <4 x float>, i64 1, align 16728! LLVMIR: %[[VAL_284:.*]] = alloca <4 x float>, i64 1, align 16729! LLVMIR: %[[VAL_285:.*]] = alloca <512 x i1>, i64 1, align 64730! LLVMIR: %[[VAL_286:.*]] = load <4 x float>, ptr %[[VAL_284]], align 16731! LLVMIR: %[[VAL_287:.*]] = load <4 x float>, ptr %[[VAL_283]], align 16732! LLVMIR: %[[VAL_288:.*]] = load <512 x i1>, ptr %[[VAL_285]], align 64733! LLVMIR: %[[VAL_289:.*]] = bitcast <4 x float> %[[VAL_286]] to <16 x i8>734! LLVMIR: %[[VAL_290:.*]] = bitcast <4 x float> %[[VAL_287]] to <16 x i8>735! LLVMIR: %[[VAL_291:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf32gerpp(<512 x i1> %[[VAL_288]], <16 x i8> %[[VAL_289]], <16 x i8> %[[VAL_290]], i32 7, i32 2)736! LLVMIR: store <512 x i1> %[[VAL_291]], ptr %[[VAL_285]], align 64737 738 subroutine test_pmxvf64ger_u1_def()739 use, intrinsic :: mma740 implicit none741 vector(unsigned(1)) vu10742 __vector_pair :: cp743 __vector_quad :: cq744 call mma_pmxvf64ger(cq, cp, vu10, 7, 2)745 end subroutine test_pmxvf64ger_u1_def746 747!CHECK-LABEL: @test_pmxvf64ger_u1_def_748! LLVMIR: %[[VAL_292:.*]] = alloca <16 x i8>, i64 1, align 16749! LLVMIR: %[[VAL_293:.*]] = alloca <512 x i1>, i64 1, align 64750! LLVMIR: %[[VAL_294:.*]] = alloca <256 x i1>, i64 1, align 32751! LLVMIR: %[[VAL_295:.*]] = load <256 x i1>, ptr %[[VAL_294]], align 32752! LLVMIR: %[[VAL_296:.*]] = load <16 x i8>, ptr %[[VAL_292]], align 16753! LLVMIR: %[[VAL_297:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64ger(<256 x i1> %[[VAL_295]], <16 x i8> %[[VAL_296]], i32 7, i32 2)754! LLVMIR: store <512 x i1> %[[VAL_297]], ptr %[[VAL_293]], align 64755 756 subroutine test_pmxvf64ger_u1_non_def()757 use, intrinsic :: mma758 implicit none759 vector(unsigned(1)) vu10760 __vector_pair :: cp761 __vector_quad :: cq762 call mma_pmxvf64ger(cq, cp, vu10, 7_2, 2_1)763 end subroutine test_pmxvf64ger_u1_non_def764 765!CHECK-LABEL: @test_pmxvf64ger_u1_non_def_766! LLVMIR: %[[VAL_298:.*]] = alloca <16 x i8>, i64 1, align 16767! LLVMIR: %[[VAL_299:.*]] = alloca <512 x i1>, i64 1, align 64768! LLVMIR: %[[VAL_300:.*]] = alloca <256 x i1>, i64 1, align 32769! LLVMIR: %[[VAL_301:.*]] = load <256 x i1>, ptr %[[VAL_300]], align 32770! LLVMIR: %[[VAL_302:.*]] = load <16 x i8>, ptr %[[VAL_298]], align 16771! LLVMIR: %[[VAL_303:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64ger(<256 x i1> %[[VAL_301]], <16 x i8> %[[VAL_302]], i32 7, i32 2)772! LLVMIR: store <512 x i1> %[[VAL_303]], ptr %[[VAL_299]], align 64773 774 subroutine test_pmxvf64ger_r8_def()775 use, intrinsic :: mma776 implicit none777 vector(real(8)) vr80778 __vector_pair :: cp779 __vector_quad :: cq780 call mma_pmxvf64ger(cq, cp, vr80, 7, 2)781 end subroutine test_pmxvf64ger_r8_def782 783!CHECK-LABEL: @test_pmxvf64ger_r8_def_784! LLVMIR: %[[VAL_304:.*]] = alloca <2 x double>, i64 1, align 16785! LLVMIR: %[[VAL_305:.*]] = alloca <512 x i1>, i64 1, align 64786! LLVMIR: %[[VAL_306:.*]] = alloca <256 x i1>, i64 1, align 32787! LLVMIR: %[[VAL_307:.*]] = load <256 x i1>, ptr %[[VAL_306]], align 32788! LLVMIR: %[[VAL_308:.*]] = load <2 x double>, ptr %[[VAL_304]], align 16789! LLVMIR: %[[VAL_309:.*]] = bitcast <2 x double> %[[VAL_308]] to <16 x i8>790! LLVMIR: %[[VAL_310:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64ger(<256 x i1> %[[VAL_307]], <16 x i8> %[[VAL_309]], i32 7, i32 2)791! LLVMIR: store <512 x i1> %[[VAL_310]], ptr %[[VAL_305]], align 64792 793 subroutine test_pmxvf64ger_r8_non_def()794 use, intrinsic :: mma795 implicit none796 vector(real(8)) vr80797 __vector_pair :: cp798 __vector_quad :: cq799 call mma_pmxvf64ger(cq, cp, vr80, 7_2, 2_1)800 end subroutine test_pmxvf64ger_r8_non_def801 802!CHECK-LABEL: @test_pmxvf64ger_r8_non_def_803! LLVMIR: %[[VAL_311:.*]] = alloca <2 x double>, i64 1, align 16804! LLVMIR: %[[VAL_312:.*]] = alloca <512 x i1>, i64 1, align 64805! LLVMIR: %[[VAL_313:.*]] = alloca <256 x i1>, i64 1, align 32806! LLVMIR: %[[VAL_314:.*]] = load <256 x i1>, ptr %[[VAL_313]], align 32807! LLVMIR: %[[VAL_315:.*]] = load <2 x double>, ptr %[[VAL_311]], align 16808! LLVMIR: %[[VAL_316:.*]] = bitcast <2 x double> %[[VAL_315]] to <16 x i8>809! LLVMIR: %[[VAL_317:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64ger(<256 x i1> %[[VAL_314]], <16 x i8> %[[VAL_316]], i32 7, i32 2)810! LLVMIR: store <512 x i1> %[[VAL_317]], ptr %[[VAL_312]], align 64811 812 subroutine test_pmxvf64gernn_u1_def()813 use, intrinsic :: mma814 implicit none815 vector(unsigned(1)) vu10816 __vector_pair :: cp817 __vector_quad :: cq818 call mma_pmxvf64gernn(cq, cp, vu10, 7, 2)819 end subroutine test_pmxvf64gernn_u1_def820 821!CHECK-LABEL: @test_pmxvf64gernn_u1_def_822! LLVMIR: %[[VAL_318:.*]] = alloca <16 x i8>, i64 1, align 16823! LLVMIR: %[[VAL_319:.*]] = alloca <512 x i1>, i64 1, align 64824! LLVMIR: %[[VAL_320:.*]] = alloca <256 x i1>, i64 1, align 32825! LLVMIR: %[[VAL_321:.*]] = load <256 x i1>, ptr %[[VAL_320]], align 32826! LLVMIR: %[[VAL_322:.*]] = load <16 x i8>, ptr %[[VAL_318]], align 16827! LLVMIR: %[[VAL_323:.*]] = load <512 x i1>, ptr %[[VAL_319]], align 64828! LLVMIR: %[[VAL_324:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gernn(<512 x i1> %[[VAL_323]], <256 x i1> %[[VAL_321]], <16 x i8> %[[VAL_322]], i32 7, i32 2)829! LLVMIR: store <512 x i1> %[[VAL_324]], ptr %[[VAL_319]], align 64830 831 subroutine test_pmxvf64gernn_u1_non_def()832 use, intrinsic :: mma833 implicit none834 vector(unsigned(1)) vu10835 __vector_pair :: cp836 __vector_quad :: cq837 call mma_pmxvf64gernn(cq, cp, vu10, 7_2, 2_1)838 end subroutine test_pmxvf64gernn_u1_non_def839 840!CHECK-LABEL: @test_pmxvf64gernn_u1_non_def_841! LLVMIR: %[[VAL_325:.*]] = alloca <16 x i8>, i64 1, align 16842! LLVMIR: %[[VAL_326:.*]] = alloca <512 x i1>, i64 1, align 64843! LLVMIR: %[[VAL_327:.*]] = alloca <256 x i1>, i64 1, align 32844! LLVMIR: %[[VAL_328:.*]] = load <256 x i1>, ptr %[[VAL_327]], align 32845! LLVMIR: %[[VAL_329:.*]] = load <16 x i8>, ptr %[[VAL_325]], align 16846! LLVMIR: %[[VAL_330:.*]] = load <512 x i1>, ptr %[[VAL_326]], align 64847! LLVMIR: %[[VAL_331:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gernn(<512 x i1> %[[VAL_330]], <256 x i1> %[[VAL_328]], <16 x i8> %[[VAL_329]], i32 7, i32 2)848! LLVMIR: store <512 x i1> %[[VAL_331]], ptr %[[VAL_326]], align 64849 850 subroutine test_pmxvf64gernn_r8_def()851 use, intrinsic :: mma852 implicit none853 vector(real(8)) vr80854 __vector_pair :: cp855 __vector_quad :: cq856 call mma_pmxvf64gernn(cq, cp, vr80, 7, 2)857 end subroutine test_pmxvf64gernn_r8_def858 859!CHECK-LABEL: @test_pmxvf64gernn_r8_def_860! LLVMIR: %[[VAL_332:.*]] = alloca <2 x double>, i64 1, align 16861! LLVMIR: %[[VAL_333:.*]] = alloca <512 x i1>, i64 1, align 64862! LLVMIR: %[[VAL_334:.*]] = alloca <256 x i1>, i64 1, align 32863! LLVMIR: %[[VAL_335:.*]] = load <256 x i1>, ptr %[[VAL_334]], align 32864! LLVMIR: %[[VAL_336:.*]] = load <2 x double>, ptr %[[VAL_332]], align 16865! LLVMIR: %[[VAL_337:.*]] = load <512 x i1>, ptr %[[VAL_333]], align 64866! LLVMIR: %[[VAL_338:.*]] = bitcast <2 x double> %[[VAL_336]] to <16 x i8>867! LLVMIR: %[[VAL_339:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gernn(<512 x i1> %[[VAL_337]], <256 x i1> %[[VAL_335]], <16 x i8> %[[VAL_338]], i32 7, i32 2)868! LLVMIR: store <512 x i1> %[[VAL_339]], ptr %[[VAL_333]], align 64869 870 subroutine test_pmxvf64gernn_r8_non_def()871 use, intrinsic :: mma872 implicit none873 vector(real(8)) vr80874 __vector_pair :: cp875 __vector_quad :: cq876 call mma_pmxvf64gernn(cq, cp, vr80, 7_2, 2_1)877 end subroutine test_pmxvf64gernn_r8_non_def878 879!CHECK-LABEL: @test_pmxvf64gernn_r8_non_def_880! LLVMIR: %[[VAL_340:.*]] = alloca <2 x double>, i64 1, align 16881! LLVMIR: %[[VAL_341:.*]] = alloca <512 x i1>, i64 1, align 64882! LLVMIR: %[[VAL_342:.*]] = alloca <256 x i1>, i64 1, align 32883! LLVMIR: %[[VAL_343:.*]] = load <256 x i1>, ptr %[[VAL_342]], align 32884! LLVMIR: %[[VAL_344:.*]] = load <2 x double>, ptr %[[VAL_340]], align 16885! LLVMIR: %[[VAL_345:.*]] = load <512 x i1>, ptr %[[VAL_341]], align 64886! LLVMIR: %[[VAL_346:.*]] = bitcast <2 x double> %[[VAL_344]] to <16 x i8>887! LLVMIR: %[[VAL_347:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gernn(<512 x i1> %[[VAL_345]], <256 x i1> %[[VAL_343]], <16 x i8> %[[VAL_346]], i32 7, i32 2)888! LLVMIR: store <512 x i1> %[[VAL_347]], ptr %[[VAL_341]], align 64889 890 subroutine test_pmxvf64gernp_u1_def()891 use, intrinsic :: mma892 implicit none893 vector(unsigned(1)) vu10894 __vector_pair :: cp895 __vector_quad :: cq896 call mma_pmxvf64gernp(cq, cp, vu10, 7, 2)897 end subroutine test_pmxvf64gernp_u1_def898 899!CHECK-LABEL: @test_pmxvf64gernp_u1_def_900! LLVMIR: %[[VAL_348:.*]] = alloca <16 x i8>, i64 1, align 16901! LLVMIR: %[[VAL_349:.*]] = alloca <512 x i1>, i64 1, align 64902! LLVMIR: %[[VAL_350:.*]] = alloca <256 x i1>, i64 1, align 32903! LLVMIR: %[[VAL_351:.*]] = load <256 x i1>, ptr %[[VAL_350]], align 32904! LLVMIR: %[[VAL_352:.*]] = load <16 x i8>, ptr %[[VAL_348]], align 16905! LLVMIR: %[[VAL_353:.*]] = load <512 x i1>, ptr %[[VAL_349]], align 64906! LLVMIR: %[[VAL_354:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gernp(<512 x i1> %[[VAL_353]], <256 x i1> %[[VAL_351]], <16 x i8> %[[VAL_352]], i32 7, i32 2)907! LLVMIR: store <512 x i1> %[[VAL_354]], ptr %[[VAL_349]], align 64908 909 subroutine test_pmxvf64gernp_u1_non_def()910 use, intrinsic :: mma911 implicit none912 vector(unsigned(1)) vu10913 __vector_pair :: cp914 __vector_quad :: cq915 call mma_pmxvf64gernp(cq, cp, vu10, 7_2, 2_1)916 end subroutine test_pmxvf64gernp_u1_non_def917 918!CHECK-LABEL: @test_pmxvf64gernp_u1_non_def_919! LLVMIR: %[[VAL_355:.*]] = alloca <16 x i8>, i64 1, align 16920! LLVMIR: %[[VAL_356:.*]] = alloca <512 x i1>, i64 1, align 64921! LLVMIR: %[[VAL_357:.*]] = alloca <256 x i1>, i64 1, align 32922! LLVMIR: %[[VAL_358:.*]] = load <256 x i1>, ptr %[[VAL_357]], align 32923! LLVMIR: %[[VAL_359:.*]] = load <16 x i8>, ptr %[[VAL_355]], align 16924! LLVMIR: %[[VAL_360:.*]] = load <512 x i1>, ptr %[[VAL_356]], align 64925! LLVMIR: %[[VAL_361:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gernp(<512 x i1> %[[VAL_360]], <256 x i1> %[[VAL_358]], <16 x i8> %[[VAL_359]], i32 7, i32 2)926! LLVMIR: store <512 x i1> %[[VAL_361]], ptr %[[VAL_356]], align 64927 928 subroutine test_pmxvf64gernp_r8_def()929 use, intrinsic :: mma930 implicit none931 vector(real(8)) vr80932 __vector_pair :: cp933 __vector_quad :: cq934 call mma_pmxvf64gernp(cq, cp, vr80, 7, 2)935 end subroutine test_pmxvf64gernp_r8_def936 937!CHECK-LABEL: @test_pmxvf64gernp_r8_def_938! LLVMIR: %[[VAL_362:.*]] = alloca <2 x double>, i64 1, align 16939! LLVMIR: %[[VAL_363:.*]] = alloca <512 x i1>, i64 1, align 64940! LLVMIR: %[[VAL_364:.*]] = alloca <256 x i1>, i64 1, align 32941! LLVMIR: %[[VAL_365:.*]] = load <256 x i1>, ptr %[[VAL_364]], align 32942! LLVMIR: %[[VAL_366:.*]] = load <2 x double>, ptr %[[VAL_362]], align 16943! LLVMIR: %[[VAL_367:.*]] = load <512 x i1>, ptr %[[VAL_363]], align 64944! LLVMIR: %[[VAL_368:.*]] = bitcast <2 x double> %[[VAL_366]] to <16 x i8>945! LLVMIR: %[[VAL_369:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gernp(<512 x i1> %[[VAL_367]], <256 x i1> %[[VAL_365]], <16 x i8> %[[VAL_368]], i32 7, i32 2)946! LLVMIR: store <512 x i1> %[[VAL_369]], ptr %[[VAL_363]], align 64947 948 subroutine test_pmxvf64gernp_r8_non_def()949 use, intrinsic :: mma950 implicit none951 vector(real(8)) vr80952 __vector_pair :: cp953 __vector_quad :: cq954 call mma_pmxvf64gernp(cq, cp, vr80, 7_2, 2_1)955 end subroutine test_pmxvf64gernp_r8_non_def956 957!CHECK-LABEL: @test_pmxvf64gernp_r8_non_def_958! LLVMIR: %[[VAL_370:.*]] = alloca <2 x double>, i64 1, align 16959! LLVMIR: %[[VAL_371:.*]] = alloca <512 x i1>, i64 1, align 64960! LLVMIR: %[[VAL_372:.*]] = alloca <256 x i1>, i64 1, align 32961! LLVMIR: %[[VAL_373:.*]] = load <256 x i1>, ptr %[[VAL_372]], align 32962! LLVMIR: %[[VAL_374:.*]] = load <2 x double>, ptr %[[VAL_370]], align 16963! LLVMIR: %[[VAL_375:.*]] = load <512 x i1>, ptr %[[VAL_371]], align 64964! LLVMIR: %[[VAL_376:.*]] = bitcast <2 x double> %[[VAL_374]] to <16 x i8>965! LLVMIR: %[[VAL_377:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gernp(<512 x i1> %[[VAL_375]], <256 x i1> %[[VAL_373]], <16 x i8> %[[VAL_376]], i32 7, i32 2)966! LLVMIR: store <512 x i1> %[[VAL_377]], ptr %[[VAL_371]], align 64967 968 subroutine test_pmxvf64gerpn_u1_def()969 use, intrinsic :: mma970 implicit none971 vector(unsigned(1)) vu10972 __vector_pair :: cp973 __vector_quad :: cq974 call mma_pmxvf64gerpn(cq, cp, vu10, 7, 2)975 end subroutine test_pmxvf64gerpn_u1_def976 977!CHECK-LABEL: @test_pmxvf64gerpn_u1_def_978! LLVMIR: %[[VAL_378:.*]] = alloca <16 x i8>, i64 1, align 16979! LLVMIR: %[[VAL_379:.*]] = alloca <512 x i1>, i64 1, align 64980! LLVMIR: %[[VAL_380:.*]] = alloca <256 x i1>, i64 1, align 32981! LLVMIR: %[[VAL_381:.*]] = load <256 x i1>, ptr %[[VAL_380]], align 32982! LLVMIR: %[[VAL_382:.*]] = load <16 x i8>, ptr %[[VAL_378]], align 16983! LLVMIR: %[[VAL_383:.*]] = load <512 x i1>, ptr %[[VAL_379]], align 64984! LLVMIR: %[[VAL_384:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gerpn(<512 x i1> %[[VAL_383]], <256 x i1> %[[VAL_381]], <16 x i8> %[[VAL_382]], i32 7, i32 2)985! LLVMIR: store <512 x i1> %[[VAL_384]], ptr %[[VAL_379]], align 64986 987 subroutine test_pmxvf64gerpn_u1_non_def()988 use, intrinsic :: mma989 implicit none990 vector(unsigned(1)) vu10991 __vector_pair :: cp992 __vector_quad :: cq993 call mma_pmxvf64gerpn(cq, cp, vu10, 7_2, 2_1)994 end subroutine test_pmxvf64gerpn_u1_non_def995 996!CHECK-LABEL: @test_pmxvf64gerpn_u1_non_def_997! LLVMIR: %[[VAL_385:.*]] = alloca <16 x i8>, i64 1, align 16998! LLVMIR: %[[VAL_386:.*]] = alloca <512 x i1>, i64 1, align 64999! LLVMIR: %[[VAL_387:.*]] = alloca <256 x i1>, i64 1, align 321000! LLVMIR: %[[VAL_388:.*]] = load <256 x i1>, ptr %[[VAL_387]], align 321001! LLVMIR: %[[VAL_389:.*]] = load <16 x i8>, ptr %[[VAL_385]], align 161002! LLVMIR: %[[VAL_390:.*]] = load <512 x i1>, ptr %[[VAL_386]], align 641003! LLVMIR: %[[VAL_391:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gerpn(<512 x i1> %[[VAL_390]], <256 x i1> %[[VAL_388]], <16 x i8> %[[VAL_389]], i32 7, i32 2)1004! LLVMIR: store <512 x i1> %[[VAL_391]], ptr %[[VAL_386]], align 641005 1006 subroutine test_pmxvf64gerpn_r8_def()1007 use, intrinsic :: mma1008 implicit none1009 vector(real(8)) vr801010 __vector_pair :: cp1011 __vector_quad :: cq1012 call mma_pmxvf64gerpn(cq, cp, vr80, 7, 2)1013 end subroutine test_pmxvf64gerpn_r8_def1014 1015!CHECK-LABEL: @test_pmxvf64gerpn_r8_def_1016! LLVMIR: %[[VAL_392:.*]] = alloca <2 x double>, i64 1, align 161017! LLVMIR: %[[VAL_393:.*]] = alloca <512 x i1>, i64 1, align 641018! LLVMIR: %[[VAL_394:.*]] = alloca <256 x i1>, i64 1, align 321019! LLVMIR: %[[VAL_395:.*]] = load <256 x i1>, ptr %[[VAL_394]], align 321020! LLVMIR: %[[VAL_396:.*]] = load <2 x double>, ptr %[[VAL_392]], align 161021! LLVMIR: %[[VAL_397:.*]] = load <512 x i1>, ptr %[[VAL_393]], align 641022! LLVMIR: %[[VAL_398:.*]] = bitcast <2 x double> %[[VAL_396]] to <16 x i8>1023! LLVMIR: %[[VAL_399:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gerpn(<512 x i1> %[[VAL_397]], <256 x i1> %[[VAL_395]], <16 x i8> %[[VAL_398]], i32 7, i32 2)1024! LLVMIR: store <512 x i1> %[[VAL_399]], ptr %[[VAL_393]], align 641025 1026 subroutine test_pmxvf64gerpn_r8_non_def()1027 use, intrinsic :: mma1028 implicit none1029 vector(real(8)) vr801030 __vector_pair :: cp1031 __vector_quad :: cq1032 call mma_pmxvf64gerpn(cq, cp, vr80, 7_2, 2_1)1033 end subroutine test_pmxvf64gerpn_r8_non_def1034 1035!CHECK-LABEL: @test_pmxvf64gerpn_r8_non_def_1036! LLVMIR: %[[VAL_400:.*]] = alloca <2 x double>, i64 1, align 161037! LLVMIR: %[[VAL_401:.*]] = alloca <512 x i1>, i64 1, align 641038! LLVMIR: %[[VAL_402:.*]] = alloca <256 x i1>, i64 1, align 321039! LLVMIR: %[[VAL_403:.*]] = load <256 x i1>, ptr %[[VAL_402]], align 321040! LLVMIR: %[[VAL_404:.*]] = load <2 x double>, ptr %[[VAL_400]], align 161041! LLVMIR: %[[VAL_405:.*]] = load <512 x i1>, ptr %[[VAL_401]], align 641042! LLVMIR: %[[VAL_406:.*]] = bitcast <2 x double> %[[VAL_404]] to <16 x i8>1043! LLVMIR: %[[VAL_407:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gerpn(<512 x i1> %[[VAL_405]], <256 x i1> %[[VAL_403]], <16 x i8> %[[VAL_406]], i32 7, i32 2)1044! LLVMIR: store <512 x i1> %[[VAL_407]], ptr %[[VAL_401]], align 641045 1046 subroutine test_pmxvf64gerpp_u1_def()1047 use, intrinsic :: mma1048 implicit none1049 vector(unsigned(1)) vu101050 __vector_pair :: cp1051 __vector_quad :: cq1052 call mma_pmxvf64gerpp(cq, cp, vu10, 7, 2)1053 end subroutine test_pmxvf64gerpp_u1_def1054 1055!CHECK-LABEL: @test_pmxvf64gerpp_u1_def_1056! LLVMIR: %[[VAL_408:.*]] = alloca <16 x i8>, i64 1, align 161057! LLVMIR: %[[VAL_409:.*]] = alloca <512 x i1>, i64 1, align 641058! LLVMIR: %[[VAL_410:.*]] = alloca <256 x i1>, i64 1, align 321059! LLVMIR: %[[VAL_411:.*]] = load <256 x i1>, ptr %[[VAL_410]], align 321060! LLVMIR: %[[VAL_412:.*]] = load <16 x i8>, ptr %[[VAL_408]], align 161061! LLVMIR: %[[VAL_413:.*]] = load <512 x i1>, ptr %[[VAL_409]], align 641062! LLVMIR: %[[VAL_414:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gerpp(<512 x i1> %[[VAL_413]], <256 x i1> %[[VAL_411]], <16 x i8> %[[VAL_412]], i32 7, i32 2)1063! LLVMIR: store <512 x i1> %[[VAL_414]], ptr %[[VAL_409]], align 641064 1065 subroutine test_pmxvf64gerpp_u1_non_def()1066 use, intrinsic :: mma1067 implicit none1068 vector(unsigned(1)) vu101069 __vector_pair :: cp1070 __vector_quad :: cq1071 call mma_pmxvf64gerpp(cq, cp, vu10, 7_2, 2_1)1072 end subroutine test_pmxvf64gerpp_u1_non_def1073 1074!CHECK-LABEL: @test_pmxvf64gerpp_u1_non_def_1075! LLVMIR: %[[VAL_415:.*]] = alloca <16 x i8>, i64 1, align 161076! LLVMIR: %[[VAL_416:.*]] = alloca <512 x i1>, i64 1, align 641077! LLVMIR: %[[VAL_417:.*]] = alloca <256 x i1>, i64 1, align 321078! LLVMIR: %[[VAL_418:.*]] = load <256 x i1>, ptr %[[VAL_417]], align 321079! LLVMIR: %[[VAL_419:.*]] = load <16 x i8>, ptr %[[VAL_415]], align 161080! LLVMIR: %[[VAL_420:.*]] = load <512 x i1>, ptr %[[VAL_416]], align 641081! LLVMIR: %[[VAL_421:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gerpp(<512 x i1> %[[VAL_420]], <256 x i1> %[[VAL_418]], <16 x i8> %[[VAL_419]], i32 7, i32 2)1082! LLVMIR: store <512 x i1> %[[VAL_421]], ptr %[[VAL_416]], align 641083 1084 subroutine test_pmxvf64gerpp_r8_def()1085 use, intrinsic :: mma1086 implicit none1087 vector(real(8)) vr801088 __vector_pair :: cp1089 __vector_quad :: cq1090 call mma_pmxvf64gerpp(cq, cp, vr80, 7, 2)1091 end subroutine test_pmxvf64gerpp_r8_def1092 1093!CHECK-LABEL: @test_pmxvf64gerpp_r8_def_1094! LLVMIR: %[[VAL_422:.*]] = alloca <2 x double>, i64 1, align 161095! LLVMIR: %[[VAL_423:.*]] = alloca <512 x i1>, i64 1, align 641096! LLVMIR: %[[VAL_424:.*]] = alloca <256 x i1>, i64 1, align 321097! LLVMIR: %[[VAL_425:.*]] = load <256 x i1>, ptr %[[VAL_424]], align 321098! LLVMIR: %[[VAL_426:.*]] = load <2 x double>, ptr %[[VAL_422]], align 161099! LLVMIR: %[[VAL_427:.*]] = load <512 x i1>, ptr %[[VAL_423]], align 641100! LLVMIR: %[[VAL_428:.*]] = bitcast <2 x double> %[[VAL_426]] to <16 x i8>1101! LLVMIR: %[[VAL_429:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gerpp(<512 x i1> %[[VAL_427]], <256 x i1> %[[VAL_425]], <16 x i8> %[[VAL_428]], i32 7, i32 2)1102! LLVMIR: store <512 x i1> %[[VAL_429]], ptr %[[VAL_423]], align 641103 1104 subroutine test_pmxvf64gerpp_r8_non_def()1105 use, intrinsic :: mma1106 implicit none1107 vector(real(8)) vr801108 __vector_pair :: cp1109 __vector_quad :: cq1110 call mma_pmxvf64gerpp(cq, cp, vr80, 7_2, 2_1)1111 end subroutine test_pmxvf64gerpp_r8_non_def1112 1113!CHECK-LABEL: @test_pmxvf64gerpp_r8_non_def_1114! LLVMIR: %[[VAL_430:.*]] = alloca <2 x double>, i64 1, align 161115! LLVMIR: %[[VAL_431:.*]] = alloca <512 x i1>, i64 1, align 641116! LLVMIR: %[[VAL_432:.*]] = alloca <256 x i1>, i64 1, align 321117! LLVMIR: %[[VAL_433:.*]] = load <256 x i1>, ptr %[[VAL_432]], align 321118! LLVMIR: %[[VAL_434:.*]] = load <2 x double>, ptr %[[VAL_430]], align 161119! LLVMIR: %[[VAL_435:.*]] = load <512 x i1>, ptr %[[VAL_431]], align 641120! LLVMIR: %[[VAL_436:.*]] = bitcast <2 x double> %[[VAL_434]] to <16 x i8>1121! LLVMIR: %[[VAL_437:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvf64gerpp(<512 x i1> %[[VAL_435]], <256 x i1> %[[VAL_433]], <16 x i8> %[[VAL_436]], i32 7, i32 2)1122! LLVMIR: store <512 x i1> %[[VAL_437]], ptr %[[VAL_431]], align 641123 1124 subroutine test_pmxvi16ger2_u1_def()1125 use, intrinsic :: mma1126 implicit none1127 vector(unsigned(1)) vu10, vu111128 __vector_quad :: cq1129 call mma_pmxvi16ger2(cq, vu10, vu11, 7, 7, 2)1130 end subroutine test_pmxvi16ger2_u1_def1131 1132!CHECK-LABEL: @test_pmxvi16ger2_u1_def_1133! LLVMIR: %[[VAL_438:.*]] = alloca <16 x i8>, i64 1, align 161134! LLVMIR: %[[VAL_439:.*]] = alloca <16 x i8>, i64 1, align 161135! LLVMIR: %[[VAL_440:.*]] = alloca <512 x i1>, i64 1, align 641136! LLVMIR: %[[VAL_441:.*]] = load <16 x i8>, ptr %[[VAL_439]], align 161137! LLVMIR: %[[VAL_442:.*]] = load <16 x i8>, ptr %[[VAL_438]], align 161138! LLVMIR: %[[VAL_443:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2(<16 x i8> %[[VAL_441]], <16 x i8> %[[VAL_442]], i32 7, i32 7, i32 2)1139! LLVMIR: store <512 x i1> %[[VAL_443]], ptr %[[VAL_440]], align 641140 1141 subroutine test_pmxvi16ger2_u1_non_def()1142 use, intrinsic :: mma1143 implicit none1144 vector(unsigned(1)) vu10, vu111145 __vector_quad :: cq1146 call mma_pmxvi16ger2(cq, vu10, vu11, 7_2, 7_1, 2_8)1147 end subroutine test_pmxvi16ger2_u1_non_def1148 1149!CHECK-LABEL: @test_pmxvi16ger2_u1_non_def_1150! LLVMIR: %[[VAL_444:.*]] = alloca <16 x i8>, i64 1, align 161151! LLVMIR: %[[VAL_445:.*]] = alloca <16 x i8>, i64 1, align 161152! LLVMIR: %[[VAL_446:.*]] = alloca <512 x i1>, i64 1, align 641153! LLVMIR: %[[VAL_447:.*]] = load <16 x i8>, ptr %[[VAL_445]], align 161154! LLVMIR: %[[VAL_448:.*]] = load <16 x i8>, ptr %[[VAL_444]], align 161155! LLVMIR: %[[VAL_449:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2(<16 x i8> %[[VAL_447]], <16 x i8> %[[VAL_448]], i32 7, i32 7, i32 2)1156! LLVMIR: store <512 x i1> %[[VAL_449]], ptr %[[VAL_446]], align 641157 1158 subroutine test_pmxvi16ger2_i2_def()1159 use, intrinsic :: mma1160 implicit none1161 vector(integer(2)) vi20, vi211162 __vector_quad :: cq1163 call mma_pmxvi16ger2(cq, vi20, vi21, 7, 7, 2)1164 end subroutine test_pmxvi16ger2_i2_def1165 1166!CHECK-LABEL: @test_pmxvi16ger2_i2_def_1167! LLVMIR: %[[VAL_450:.*]] = alloca <8 x i16>, i64 1, align 161168! LLVMIR: %[[VAL_451:.*]] = alloca <8 x i16>, i64 1, align 161169! LLVMIR: %[[VAL_452:.*]] = alloca <512 x i1>, i64 1, align 641170! LLVMIR: %[[VAL_453:.*]] = load <8 x i16>, ptr %[[VAL_451]], align 161171! LLVMIR: %[[VAL_454:.*]] = load <8 x i16>, ptr %[[VAL_450]], align 161172! LLVMIR: %[[VAL_455:.*]] = bitcast <8 x i16> %[[VAL_453]] to <16 x i8>1173! LLVMIR: %[[VAL_456:.*]] = bitcast <8 x i16> %[[VAL_454]] to <16 x i8>1174! LLVMIR: %[[VAL_457:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2(<16 x i8> %[[VAL_455]], <16 x i8> %[[VAL_456]], i32 7, i32 7, i32 2)1175! LLVMIR: store <512 x i1> %[[VAL_457]], ptr %[[VAL_452]], align 641176 1177 subroutine test_pmxvi16ger2_i2_non_def()1178 use, intrinsic :: mma1179 implicit none1180 vector(integer(2)) vi20, vi211181 __vector_quad :: cq1182 call mma_pmxvi16ger2(cq, vi20, vi21, 7_2, 7_1, 2_8)1183 end subroutine test_pmxvi16ger2_i2_non_def1184 1185!CHECK-LABEL: @test_pmxvi16ger2_i2_non_def_1186! LLVMIR: %[[VAL_458:.*]] = alloca <8 x i16>, i64 1, align 161187! LLVMIR: %[[VAL_459:.*]] = alloca <8 x i16>, i64 1, align 161188! LLVMIR: %[[VAL_460:.*]] = alloca <512 x i1>, i64 1, align 641189! LLVMIR: %[[VAL_461:.*]] = load <8 x i16>, ptr %[[VAL_459]], align 161190! LLVMIR: %[[VAL_462:.*]] = load <8 x i16>, ptr %[[VAL_458]], align 161191! LLVMIR: %[[VAL_463:.*]] = bitcast <8 x i16> %[[VAL_461]] to <16 x i8>1192! LLVMIR: %[[VAL_464:.*]] = bitcast <8 x i16> %[[VAL_462]] to <16 x i8>1193! LLVMIR: %[[VAL_465:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2(<16 x i8> %[[VAL_463]], <16 x i8> %[[VAL_464]], i32 7, i32 7, i32 2)1194! LLVMIR: store <512 x i1> %[[VAL_465]], ptr %[[VAL_460]], align 641195 1196 subroutine test_pmxvi16ger2pp_u1_def()1197 use, intrinsic :: mma1198 implicit none1199 vector(unsigned(1)) vu10, vu111200 __vector_quad :: cq1201 call mma_pmxvi16ger2pp(cq, vu10, vu11, 7, 7, 2)1202 end subroutine test_pmxvi16ger2pp_u1_def1203 1204!CHECK-LABEL: @test_pmxvi16ger2pp_u1_def_1205! LLVMIR: %[[VAL_466:.*]] = alloca <16 x i8>, i64 1, align 161206! LLVMIR: %[[VAL_467:.*]] = alloca <16 x i8>, i64 1, align 161207! LLVMIR: %[[VAL_468:.*]] = alloca <512 x i1>, i64 1, align 641208! LLVMIR: %[[VAL_469:.*]] = load <16 x i8>, ptr %[[VAL_467]], align 161209! LLVMIR: %[[VAL_470:.*]] = load <16 x i8>, ptr %[[VAL_466]], align 161210! LLVMIR: %[[VAL_471:.*]] = load <512 x i1>, ptr %[[VAL_468]], align 641211! LLVMIR: %[[VAL_472:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2pp(<512 x i1> %[[VAL_471]], <16 x i8> %[[VAL_469]], <16 x i8> %[[VAL_470]], i32 7, i32 7, i32 2)1212! LLVMIR: store <512 x i1> %[[VAL_472]], ptr %[[VAL_468]], align 641213 1214 subroutine test_pmxvi16ger2pp_u1_non_def()1215 use, intrinsic :: mma1216 implicit none1217 vector(unsigned(1)) vu10, vu111218 __vector_quad :: cq1219 call mma_pmxvi16ger2pp(cq, vu10, vu11, 7_2, 7_1, 2_8)1220 end subroutine test_pmxvi16ger2pp_u1_non_def1221 1222!CHECK-LABEL: @test_pmxvi16ger2pp_u1_non_def_1223! LLVMIR: %[[VAL_473:.*]] = alloca <16 x i8>, i64 1, align 161224! LLVMIR: %[[VAL_474:.*]] = alloca <16 x i8>, i64 1, align 161225! LLVMIR: %[[VAL_475:.*]] = alloca <512 x i1>, i64 1, align 641226! LLVMIR: %[[VAL_476:.*]] = load <16 x i8>, ptr %[[VAL_474]], align 161227! LLVMIR: %[[VAL_477:.*]] = load <16 x i8>, ptr %[[VAL_473]], align 161228! LLVMIR: %[[VAL_478:.*]] = load <512 x i1>, ptr %[[VAL_475]], align 641229! LLVMIR: %[[VAL_479:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2pp(<512 x i1> %[[VAL_478]], <16 x i8> %[[VAL_476]], <16 x i8> %[[VAL_477]], i32 7, i32 7, i32 2)1230! LLVMIR: store <512 x i1> %[[VAL_479]], ptr %[[VAL_475]], align 641231 1232 subroutine test_pmxvi16ger2pp_i2_def()1233 use, intrinsic :: mma1234 implicit none1235 vector(integer(2)) vi20, vi211236 __vector_quad :: cq1237 call mma_pmxvi16ger2pp(cq, vi20, vi21, 7, 7, 2)1238 end subroutine test_pmxvi16ger2pp_i2_def1239 1240!CHECK-LABEL: @test_pmxvi16ger2pp_i2_def_1241! LLVMIR: %[[VAL_480:.*]] = alloca <8 x i16>, i64 1, align 161242! LLVMIR: %[[VAL_481:.*]] = alloca <8 x i16>, i64 1, align 161243! LLVMIR: %[[VAL_482:.*]] = alloca <512 x i1>, i64 1, align 641244! LLVMIR: %[[VAL_483:.*]] = load <8 x i16>, ptr %[[VAL_481]], align 161245! LLVMIR: %[[VAL_484:.*]] = load <8 x i16>, ptr %[[VAL_480]], align 161246! LLVMIR: %[[VAL_485:.*]] = load <512 x i1>, ptr %[[VAL_482]], align 641247! LLVMIR: %[[VAL_486:.*]] = bitcast <8 x i16> %[[VAL_483]] to <16 x i8>1248! LLVMIR: %[[VAL_487:.*]] = bitcast <8 x i16> %[[VAL_484]] to <16 x i8>1249! LLVMIR: %[[VAL_488:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2pp(<512 x i1> %[[VAL_485]], <16 x i8> %[[VAL_486]], <16 x i8> %[[VAL_487]], i32 7, i32 7, i32 2)1250! LLVMIR: store <512 x i1> %[[VAL_488]], ptr %[[VAL_482]], align 641251 1252 subroutine test_pmxvi16ger2pp_i2_non_def()1253 use, intrinsic :: mma1254 implicit none1255 vector(integer(2)) vi20, vi211256 __vector_quad :: cq1257 call mma_pmxvi16ger2pp(cq, vi20, vi21, 7_2, 7_1, 2_8)1258 end subroutine test_pmxvi16ger2pp_i2_non_def1259 1260!CHECK-LABEL: @test_pmxvi16ger2pp_i2_non_def_1261! LLVMIR: %[[VAL_489:.*]] = alloca <8 x i16>, i64 1, align 161262! LLVMIR: %[[VAL_490:.*]] = alloca <8 x i16>, i64 1, align 161263! LLVMIR: %[[VAL_491:.*]] = alloca <512 x i1>, i64 1, align 641264! LLVMIR: %[[VAL_492:.*]] = load <8 x i16>, ptr %[[VAL_490]], align 161265! LLVMIR: %[[VAL_493:.*]] = load <8 x i16>, ptr %[[VAL_489]], align 161266! LLVMIR: %[[VAL_494:.*]] = load <512 x i1>, ptr %[[VAL_491]], align 641267! LLVMIR: %[[VAL_495:.*]] = bitcast <8 x i16> %[[VAL_492]] to <16 x i8>1268! LLVMIR: %[[VAL_496:.*]] = bitcast <8 x i16> %[[VAL_493]] to <16 x i8>1269! LLVMIR: %[[VAL_497:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2pp(<512 x i1> %[[VAL_494]], <16 x i8> %[[VAL_495]], <16 x i8> %[[VAL_496]], i32 7, i32 7, i32 2)1270! LLVMIR: store <512 x i1> %[[VAL_497]], ptr %[[VAL_491]], align 641271 1272 subroutine test_pmxvi16ger2s_u1_def()1273 use, intrinsic :: mma1274 implicit none1275 vector(unsigned(1)) vu10, vu111276 __vector_quad :: cq1277 call mma_pmxvi16ger2s(cq, vu10, vu11, 7, 7, 2)1278 end subroutine test_pmxvi16ger2s_u1_def1279 1280!CHECK-LABEL: @test_pmxvi16ger2s_u1_def_1281! LLVMIR: %[[VAL_498:.*]] = alloca <16 x i8>, i64 1, align 161282! LLVMIR: %[[VAL_499:.*]] = alloca <16 x i8>, i64 1, align 161283! LLVMIR: %[[VAL_500:.*]] = alloca <512 x i1>, i64 1, align 641284! LLVMIR: %[[VAL_501:.*]] = load <16 x i8>, ptr %[[VAL_499]], align 161285! LLVMIR: %[[VAL_502:.*]] = load <16 x i8>, ptr %[[VAL_498]], align 161286! LLVMIR: %[[VAL_503:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2s(<16 x i8> %[[VAL_501]], <16 x i8> %[[VAL_502]], i32 7, i32 7, i32 2)1287! LLVMIR: store <512 x i1> %[[VAL_503]], ptr %[[VAL_500]], align 641288 1289 subroutine test_pmxvi16ger2s_u1_non_def()1290 use, intrinsic :: mma1291 implicit none1292 vector(unsigned(1)) vu10, vu111293 __vector_quad :: cq1294 call mma_pmxvi16ger2s(cq, vu10, vu11, 7_2, 7_1, 2_8)1295 end subroutine test_pmxvi16ger2s_u1_non_def1296 1297!CHECK-LABEL: @test_pmxvi16ger2s_u1_non_def_1298! LLVMIR: %[[VAL_504:.*]] = alloca <16 x i8>, i64 1, align 161299! LLVMIR: %[[VAL_505:.*]] = alloca <16 x i8>, i64 1, align 161300! LLVMIR: %[[VAL_506:.*]] = alloca <512 x i1>, i64 1, align 641301! LLVMIR: %[[VAL_507:.*]] = load <16 x i8>, ptr %[[VAL_505]], align 161302! LLVMIR: %[[VAL_508:.*]] = load <16 x i8>, ptr %[[VAL_504]], align 161303! LLVMIR: %[[VAL_509:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2s(<16 x i8> %[[VAL_507]], <16 x i8> %[[VAL_508]], i32 7, i32 7, i32 2)1304! LLVMIR: store <512 x i1> %[[VAL_509]], ptr %[[VAL_506]], align 641305 1306 subroutine test_pmxvi16ger2s_i2_def()1307 use, intrinsic :: mma1308 implicit none1309 vector(integer(2)) vi20, vi211310 __vector_quad :: cq1311 call mma_pmxvi16ger2s(cq, vi20, vi21, 7, 7, 2)1312 end subroutine test_pmxvi16ger2s_i2_def1313 1314!CHECK-LABEL: @test_pmxvi16ger2s_i2_def_1315! LLVMIR: %[[VAL_510:.*]] = alloca <8 x i16>, i64 1, align 161316! LLVMIR: %[[VAL_511:.*]] = alloca <8 x i16>, i64 1, align 161317! LLVMIR: %[[VAL_512:.*]] = alloca <512 x i1>, i64 1, align 641318! LLVMIR: %[[VAL_513:.*]] = load <8 x i16>, ptr %[[VAL_511]], align 161319! LLVMIR: %[[VAL_514:.*]] = load <8 x i16>, ptr %[[VAL_510]], align 161320! LLVMIR: %[[VAL_515:.*]] = bitcast <8 x i16> %[[VAL_513]] to <16 x i8>1321! LLVMIR: %[[VAL_516:.*]] = bitcast <8 x i16> %[[VAL_514]] to <16 x i8>1322! LLVMIR: %[[VAL_517:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2s(<16 x i8> %[[VAL_515]], <16 x i8> %[[VAL_516]], i32 7, i32 7, i32 2)1323! LLVMIR: store <512 x i1> %[[VAL_517]], ptr %[[VAL_512]], align 641324 1325 subroutine test_pmxvi16ger2s_i2_non_def()1326 use, intrinsic :: mma1327 implicit none1328 vector(integer(2)) vi20, vi211329 __vector_quad :: cq1330 call mma_pmxvi16ger2s(cq, vi20, vi21, 7_2, 7_1, 2_8)1331 end subroutine test_pmxvi16ger2s_i2_non_def1332 1333!CHECK-LABEL: @test_pmxvi16ger2s_i2_non_def_1334! LLVMIR: %[[VAL_518:.*]] = alloca <8 x i16>, i64 1, align 161335! LLVMIR: %[[VAL_519:.*]] = alloca <8 x i16>, i64 1, align 161336! LLVMIR: %[[VAL_520:.*]] = alloca <512 x i1>, i64 1, align 641337! LLVMIR: %[[VAL_521:.*]] = load <8 x i16>, ptr %[[VAL_519]], align 161338! LLVMIR: %[[VAL_522:.*]] = load <8 x i16>, ptr %[[VAL_518]], align 161339! LLVMIR: %[[VAL_523:.*]] = bitcast <8 x i16> %[[VAL_521]] to <16 x i8>1340! LLVMIR: %[[VAL_524:.*]] = bitcast <8 x i16> %[[VAL_522]] to <16 x i8>1341! LLVMIR: %[[VAL_525:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2s(<16 x i8> %[[VAL_523]], <16 x i8> %[[VAL_524]], i32 7, i32 7, i32 2)1342! LLVMIR: store <512 x i1> %[[VAL_525]], ptr %[[VAL_520]], align 641343 1344 subroutine test_pmxvi16ger2spp_u1_def()1345 use, intrinsic :: mma1346 implicit none1347 vector(unsigned(1)) vu10, vu111348 __vector_quad :: cq1349 call mma_pmxvi16ger2spp(cq, vu10, vu11, 7, 7, 2)1350 end subroutine test_pmxvi16ger2spp_u1_def1351 1352!CHECK-LABEL: @test_pmxvi16ger2spp_u1_def_1353! LLVMIR: %[[VAL_526:.*]] = alloca <16 x i8>, i64 1, align 161354! LLVMIR: %[[VAL_527:.*]] = alloca <16 x i8>, i64 1, align 161355! LLVMIR: %[[VAL_528:.*]] = alloca <512 x i1>, i64 1, align 641356! LLVMIR: %[[VAL_529:.*]] = load <16 x i8>, ptr %[[VAL_527]], align 161357! LLVMIR: %[[VAL_530:.*]] = load <16 x i8>, ptr %[[VAL_526]], align 161358! LLVMIR: %[[VAL_531:.*]] = load <512 x i1>, ptr %[[VAL_528]], align 641359! LLVMIR: %[[VAL_532:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2spp(<512 x i1> %[[VAL_531]], <16 x i8> %[[VAL_529]], <16 x i8> %[[VAL_530]], i32 7, i32 7, i32 2)1360! LLVMIR: store <512 x i1> %[[VAL_532]], ptr %[[VAL_528]], align 641361 1362 subroutine test_pmxvi16ger2spp_u1_non_def()1363 use, intrinsic :: mma1364 implicit none1365 vector(unsigned(1)) vu10, vu111366 __vector_quad :: cq1367 call mma_pmxvi16ger2spp(cq, vu10, vu11, 7_2, 7_1, 2_8)1368 end subroutine test_pmxvi16ger2spp_u1_non_def1369 1370!CHECK-LABEL: @test_pmxvi16ger2spp_u1_non_def_1371! LLVMIR: %[[VAL_533:.*]] = alloca <16 x i8>, i64 1, align 161372! LLVMIR: %[[VAL_534:.*]] = alloca <16 x i8>, i64 1, align 161373! LLVMIR: %[[VAL_535:.*]] = alloca <512 x i1>, i64 1, align 641374! LLVMIR: %[[VAL_536:.*]] = load <16 x i8>, ptr %[[VAL_534]], align 161375! LLVMIR: %[[VAL_537:.*]] = load <16 x i8>, ptr %[[VAL_533]], align 161376! LLVMIR: %[[VAL_538:.*]] = load <512 x i1>, ptr %[[VAL_535]], align 641377! LLVMIR: %[[VAL_539:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2spp(<512 x i1> %[[VAL_538]], <16 x i8> %[[VAL_536]], <16 x i8> %[[VAL_537]], i32 7, i32 7, i32 2)1378! LLVMIR: store <512 x i1> %[[VAL_539]], ptr %[[VAL_535]], align 641379 1380 subroutine test_pmxvi16ger2spp_i2_def()1381 use, intrinsic :: mma1382 implicit none1383 vector(integer(2)) vi20, vi211384 __vector_quad :: cq1385 call mma_pmxvi16ger2spp(cq, vi20, vi21, 7, 7, 2)1386 end subroutine test_pmxvi16ger2spp_i2_def1387 1388!CHECK-LABEL: @test_pmxvi16ger2spp_i2_def_1389! LLVMIR: %[[VAL_540:.*]] = alloca <8 x i16>, i64 1, align 161390! LLVMIR: %[[VAL_541:.*]] = alloca <8 x i16>, i64 1, align 161391! LLVMIR: %[[VAL_542:.*]] = alloca <512 x i1>, i64 1, align 641392! LLVMIR: %[[VAL_543:.*]] = load <8 x i16>, ptr %[[VAL_541]], align 161393! LLVMIR: %[[VAL_544:.*]] = load <8 x i16>, ptr %[[VAL_540]], align 161394! LLVMIR: %[[VAL_545:.*]] = load <512 x i1>, ptr %[[VAL_542]], align 641395! LLVMIR: %[[VAL_546:.*]] = bitcast <8 x i16> %[[VAL_543]] to <16 x i8>1396! LLVMIR: %[[VAL_547:.*]] = bitcast <8 x i16> %[[VAL_544]] to <16 x i8>1397! LLVMIR: %[[VAL_548:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2spp(<512 x i1> %[[VAL_545]], <16 x i8> %[[VAL_546]], <16 x i8> %[[VAL_547]], i32 7, i32 7, i32 2)1398! LLVMIR: store <512 x i1> %[[VAL_548]], ptr %[[VAL_542]], align 641399 1400 subroutine test_pmxvi16ger2spp_i2_non_def()1401 use, intrinsic :: mma1402 implicit none1403 vector(integer(2)) vi20, vi211404 __vector_quad :: cq1405 call mma_pmxvi16ger2spp(cq, vi20, vi21, 7_2, 7_1, 2_8)1406 end subroutine test_pmxvi16ger2spp_i2_non_def1407 1408!CHECK-LABEL: @test_pmxvi16ger2spp_i2_non_def_1409! LLVMIR: %[[VAL_549:.*]] = alloca <8 x i16>, i64 1, align 161410! LLVMIR: %[[VAL_550:.*]] = alloca <8 x i16>, i64 1, align 161411! LLVMIR: %[[VAL_551:.*]] = alloca <512 x i1>, i64 1, align 641412! LLVMIR: %[[VAL_552:.*]] = load <8 x i16>, ptr %[[VAL_550]], align 161413! LLVMIR: %[[VAL_553:.*]] = load <8 x i16>, ptr %[[VAL_549]], align 161414! LLVMIR: %[[VAL_554:.*]] = load <512 x i1>, ptr %[[VAL_551]], align 641415! LLVMIR: %[[VAL_555:.*]] = bitcast <8 x i16> %[[VAL_552]] to <16 x i8>1416! LLVMIR: %[[VAL_556:.*]] = bitcast <8 x i16> %[[VAL_553]] to <16 x i8>1417! LLVMIR: %[[VAL_557:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi16ger2spp(<512 x i1> %[[VAL_554]], <16 x i8> %[[VAL_555]], <16 x i8> %[[VAL_556]], i32 7, i32 7, i32 2)1418! LLVMIR: store <512 x i1> %[[VAL_557]], ptr %[[VAL_551]], align 641419 1420 1421 subroutine test_pmxvi4ger8_def()1422 use, intrinsic :: mma1423 implicit none1424 vector(unsigned(1)) vu10, vu111425 __vector_quad :: cq1426 call mma_pmxvi4ger8(cq, vu10, vu11, 7, 7, 2)1427 end subroutine test_pmxvi4ger8_def1428 1429!CHECK-LABEL: @test_pmxvi4ger8_def_1430! LLVMIR: %[[VAL_558:.*]] = alloca <16 x i8>, i64 1, align 161431! LLVMIR: %[[VAL_559:.*]] = alloca <16 x i8>, i64 1, align 161432! LLVMIR: %[[VAL_560:.*]] = alloca <512 x i1>, i64 1, align 641433! LLVMIR: %[[VAL_561:.*]] = load <16 x i8>, ptr %[[VAL_559]], align 161434! LLVMIR: %[[VAL_562:.*]] = load <16 x i8>, ptr %[[VAL_558]], align 161435! LLVMIR: %[[VAL_563:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi4ger8(<16 x i8> %[[VAL_561]], <16 x i8> %[[VAL_562]], i32 7, i32 7, i32 2)1436! LLVMIR: store <512 x i1> %[[VAL_563]], ptr %[[VAL_560]], align 641437 1438 subroutine test_pmxvi4ger8_non_def()1439 use, intrinsic :: mma1440 implicit none1441 vector(unsigned(1)) vu10, vu111442 __vector_quad :: cq1443 call mma_pmxvi4ger8(cq, vu10, vu11, 7_2, 7_1, 2_8)1444 end subroutine test_pmxvi4ger8_non_def1445 1446!CHECK-LABEL: @test_pmxvi4ger8_non_def_1447! LLVMIR: %[[VAL_564:.*]] = alloca <16 x i8>, i64 1, align 161448! LLVMIR: %[[VAL_565:.*]] = alloca <16 x i8>, i64 1, align 161449! LLVMIR: %[[VAL_566:.*]] = alloca <512 x i1>, i64 1, align 641450! LLVMIR: %[[VAL_567:.*]] = load <16 x i8>, ptr %[[VAL_565]], align 161451! LLVMIR: %[[VAL_568:.*]] = load <16 x i8>, ptr %[[VAL_564]], align 161452! LLVMIR: %[[VAL_569:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi4ger8(<16 x i8> %[[VAL_567]], <16 x i8> %[[VAL_568]], i32 7, i32 7, i32 2)1453! LLVMIR: store <512 x i1> %[[VAL_569]], ptr %[[VAL_566]], align 641454 1455 subroutine test_pmxvi4ger8pp_def()1456 use, intrinsic :: mma1457 implicit none1458 vector(unsigned(1)) vu10, vu111459 __vector_quad :: cq1460 call mma_pmxvi4ger8pp(cq, vu10, vu11, 7, 7, 2)1461 end subroutine test_pmxvi4ger8pp_def1462 1463!CHECK-LABEL: @test_pmxvi4ger8pp_def_1464! LLVMIR: %[[VAL_570:.*]] = alloca <16 x i8>, i64 1, align 161465! LLVMIR: %[[VAL_571:.*]] = alloca <16 x i8>, i64 1, align 161466! LLVMIR: %[[VAL_572:.*]] = alloca <512 x i1>, i64 1, align 641467! LLVMIR: %[[VAL_573:.*]] = load <16 x i8>, ptr %[[VAL_571]], align 161468! LLVMIR: %[[VAL_574:.*]] = load <16 x i8>, ptr %[[VAL_570]], align 161469! LLVMIR: %[[VAL_575:.*]] = load <512 x i1>, ptr %[[VAL_572]], align 641470! LLVMIR: %[[VAL_576:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi4ger8pp(<512 x i1> %[[VAL_575]], <16 x i8> %[[VAL_573]], <16 x i8> %[[VAL_574]], i32 7, i32 7, i32 2)1471! LLVMIR: store <512 x i1> %[[VAL_576]], ptr %[[VAL_572]], align 641472 1473 subroutine test_pmxvi4ger8pp_non_def()1474 use, intrinsic :: mma1475 implicit none1476 vector(unsigned(1)) vu10, vu111477 __vector_quad :: cq1478 call mma_pmxvi4ger8pp(cq, vu10, vu11, 7_2, 7_1, 2_8)1479 end subroutine test_pmxvi4ger8pp_non_def1480 1481!CHECK-LABEL: @test_pmxvi4ger8pp_non_def_1482! LLVMIR: %[[VAL_577:.*]] = alloca <16 x i8>, i64 1, align 161483! LLVMIR: %[[VAL_578:.*]] = alloca <16 x i8>, i64 1, align 161484! LLVMIR: %[[VAL_579:.*]] = alloca <512 x i1>, i64 1, align 641485! LLVMIR: %[[VAL_580:.*]] = load <16 x i8>, ptr %[[VAL_578]], align 161486! LLVMIR: %[[VAL_581:.*]] = load <16 x i8>, ptr %[[VAL_577]], align 161487! LLVMIR: %[[VAL_582:.*]] = load <512 x i1>, ptr %[[VAL_579]], align 641488! LLVMIR: %[[VAL_583:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi4ger8pp(<512 x i1> %[[VAL_582]], <16 x i8> %[[VAL_580]], <16 x i8> %[[VAL_581]], i32 7, i32 7, i32 2)1489! LLVMIR: store <512 x i1> %[[VAL_583]], ptr %[[VAL_579]], align 641490 1491 subroutine test_pmxvi8ger4_u1_def()1492 use, intrinsic :: mma1493 implicit none1494 vector(unsigned(1)) vu10, vu111495 __vector_quad :: cq1496 call mma_pmxvi8ger4(cq, vu10, vu11, 7, 7, 2)1497 end subroutine test_pmxvi8ger4_u1_def1498 1499!CHECK-LABEL: @test_pmxvi8ger4_u1_def_1500! LLVMIR: %[[VAL_584:.*]] = alloca <16 x i8>, i64 1, align 161501! LLVMIR: %[[VAL_585:.*]] = alloca <16 x i8>, i64 1, align 161502! LLVMIR: %[[VAL_586:.*]] = alloca <512 x i1>, i64 1, align 641503! LLVMIR: %[[VAL_587:.*]] = load <16 x i8>, ptr %[[VAL_585]], align 161504! LLVMIR: %[[VAL_588:.*]] = load <16 x i8>, ptr %[[VAL_584]], align 161505! LLVMIR: %[[VAL_589:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi8ger4(<16 x i8> %[[VAL_587]], <16 x i8> %[[VAL_588]], i32 7, i32 7, i32 2)1506! LLVMIR: store <512 x i1> %[[VAL_589]], ptr %[[VAL_586]], align 641507 1508 subroutine test_pmxvi8ger4_u1_non_def()1509 use, intrinsic :: mma1510 implicit none1511 vector(unsigned(1)) vu10, vu111512 __vector_quad :: cq1513 call mma_pmxvi8ger4(cq, vu10, vu11, 7_2, 7_1, 2_8)1514 end subroutine test_pmxvi8ger4_u1_non_def1515 1516!CHECK-LABEL: @test_pmxvi8ger4_u1_non_def_1517! LLVMIR: %[[VAL_590:.*]] = alloca <16 x i8>, i64 1, align 161518! LLVMIR: %[[VAL_591:.*]] = alloca <16 x i8>, i64 1, align 161519! LLVMIR: %[[VAL_592:.*]] = alloca <512 x i1>, i64 1, align 641520! LLVMIR: %[[VAL_593:.*]] = load <16 x i8>, ptr %[[VAL_591]], align 161521! LLVMIR: %[[VAL_594:.*]] = load <16 x i8>, ptr %[[VAL_590]], align 161522! LLVMIR: %[[VAL_595:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi8ger4(<16 x i8> %[[VAL_593]], <16 x i8> %[[VAL_594]], i32 7, i32 7, i32 2)1523! LLVMIR: store <512 x i1> %[[VAL_595]], ptr %[[VAL_592]], align 641524 1525 subroutine test_pmxvi8ger4_i1_def()1526 use, intrinsic :: mma1527 implicit none1528 vector(integer(1)) vi10, vi111529 __vector_quad :: cq1530 call mma_pmxvi8ger4(cq, vi10, vi11, 7, 7, 2)1531 end subroutine test_pmxvi8ger4_i1_def1532 1533!CHECK-LABEL: @test_pmxvi8ger4_i1_def_1534! LLVMIR: %[[VAL_596:.*]] = alloca <16 x i8>, i64 1, align 161535! LLVMIR: %[[VAL_597:.*]] = alloca <16 x i8>, i64 1, align 161536! LLVMIR: %[[VAL_598:.*]] = alloca <512 x i1>, i64 1, align 641537! LLVMIR: %[[VAL_599:.*]] = load <16 x i8>, ptr %[[VAL_597]], align 161538! LLVMIR: %[[VAL_600:.*]] = load <16 x i8>, ptr %[[VAL_596]], align 161539! LLVMIR: %[[VAL_601:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi8ger4(<16 x i8> %[[VAL_599]], <16 x i8> %[[VAL_600]], i32 7, i32 7, i32 2)1540! LLVMIR: store <512 x i1> %[[VAL_601]], ptr %[[VAL_598]], align 641541 1542 subroutine test_pmxvi8ger4_i1_non_def()1543 use, intrinsic :: mma1544 implicit none1545 vector(integer(1)) vi10, vi111546 __vector_quad :: cq1547 call mma_pmxvi8ger4(cq, vi10, vi11, 7_2, 7_1, 2_8)1548 end subroutine test_pmxvi8ger4_i1_non_def1549 1550!CHECK-LABEL: @test_pmxvi8ger4_i1_non_def_1551! LLVMIR: %[[VAL_602:.*]] = alloca <16 x i8>, i64 1, align 161552! LLVMIR: %[[VAL_603:.*]] = alloca <16 x i8>, i64 1, align 161553! LLVMIR: %[[VAL_604:.*]] = alloca <512 x i1>, i64 1, align 641554! LLVMIR: %[[VAL_605:.*]] = load <16 x i8>, ptr %[[VAL_603]], align 161555! LLVMIR: %[[VAL_606:.*]] = load <16 x i8>, ptr %[[VAL_602]], align 161556! LLVMIR: %[[VAL_607:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi8ger4(<16 x i8> %[[VAL_605]], <16 x i8> %[[VAL_606]], i32 7, i32 7, i32 2)1557! LLVMIR: store <512 x i1> %[[VAL_607]], ptr %[[VAL_604]], align 641558 1559 subroutine test_pmxvi8ger4pp_u1_def()1560 use, intrinsic :: mma1561 implicit none1562 vector(unsigned(1)) vu10, vu111563 __vector_quad :: cq1564 call mma_pmxvi8ger4pp(cq, vu10, vu11, 7, 7, 2)1565 end subroutine test_pmxvi8ger4pp_u1_def1566 1567!CHECK-LABEL: @test_pmxvi8ger4pp_u1_def_1568! LLVMIR: %[[VAL_608:.*]] = alloca <16 x i8>, i64 1, align 161569! LLVMIR: %[[VAL_609:.*]] = alloca <16 x i8>, i64 1, align 161570! LLVMIR: %[[VAL_610:.*]] = alloca <512 x i1>, i64 1, align 641571! LLVMIR: %[[VAL_611:.*]] = load <16 x i8>, ptr %[[VAL_609]], align 161572! LLVMIR: %[[VAL_612:.*]] = load <16 x i8>, ptr %[[VAL_608]], align 161573! LLVMIR: %[[VAL_613:.*]] = load <512 x i1>, ptr %[[VAL_610]], align 641574! LLVMIR: %[[VAL_614:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi8ger4pp(<512 x i1> %[[VAL_613]], <16 x i8> %[[VAL_611]], <16 x i8> %[[VAL_612]], i32 7, i32 7, i32 2)1575! LLVMIR: store <512 x i1> %[[VAL_614]], ptr %[[VAL_610]], align 641576 1577 subroutine test_pmxvi8ger4pp_u1_non_def()1578 use, intrinsic :: mma1579 implicit none1580 vector(unsigned(1)) vu10, vu111581 __vector_quad :: cq1582 call mma_pmxvi8ger4pp(cq, vu10, vu11, 7_2, 7_1, 2_8)1583 end subroutine test_pmxvi8ger4pp_u1_non_def1584 1585!CHECK-LABEL: @test_pmxvi8ger4pp_u1_non_def_1586! LLVMIR: %[[VAL_615:.*]] = alloca <16 x i8>, i64 1, align 161587! LLVMIR: %[[VAL_616:.*]] = alloca <16 x i8>, i64 1, align 161588! LLVMIR: %[[VAL_617:.*]] = alloca <512 x i1>, i64 1, align 641589! LLVMIR: %[[VAL_618:.*]] = load <16 x i8>, ptr %[[VAL_616]], align 161590! LLVMIR: %[[VAL_619:.*]] = load <16 x i8>, ptr %[[VAL_615]], align 161591! LLVMIR: %[[VAL_620:.*]] = load <512 x i1>, ptr %[[VAL_617]], align 641592! LLVMIR: %[[VAL_621:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi8ger4pp(<512 x i1> %[[VAL_620]], <16 x i8> %[[VAL_618]], <16 x i8> %[[VAL_619]], i32 7, i32 7, i32 2)1593! LLVMIR: store <512 x i1> %[[VAL_621]], ptr %[[VAL_617]], align 641594 1595 subroutine test_pmxvi8ger4pp_i1_def()1596 use, intrinsic :: mma1597 implicit none1598 vector(integer(1)) vi10, vi111599 __vector_quad :: cq1600 call mma_pmxvi8ger4pp(cq, vi10, vi11, 7, 7, 2)1601 end subroutine test_pmxvi8ger4pp_i1_def1602 1603!CHECK-LABEL: @test_pmxvi8ger4pp_i1_def_1604! LLVMIR: %[[VAL_622:.*]] = alloca <16 x i8>, i64 1, align 161605! LLVMIR: %[[VAL_623:.*]] = alloca <16 x i8>, i64 1, align 161606! LLVMIR: %[[VAL_624:.*]] = alloca <512 x i1>, i64 1, align 641607! LLVMIR: %[[VAL_625:.*]] = load <16 x i8>, ptr %[[VAL_623]], align 161608! LLVMIR: %[[VAL_626:.*]] = load <16 x i8>, ptr %[[VAL_622]], align 161609! LLVMIR: %[[VAL_627:.*]] = load <512 x i1>, ptr %[[VAL_624]], align 641610! LLVMIR: %[[VAL_628:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi8ger4pp(<512 x i1> %[[VAL_627]], <16 x i8> %[[VAL_625]], <16 x i8> %[[VAL_626]], i32 7, i32 7, i32 2)1611! LLVMIR: store <512 x i1> %[[VAL_628]], ptr %[[VAL_624]], align 641612 1613 subroutine test_pmxvi8ger4pp_i1_non_def()1614 use, intrinsic :: mma1615 implicit none1616 vector(integer(1)) vi10, vi111617 __vector_quad :: cq1618 call mma_pmxvi8ger4pp(cq, vi10, vi11, 7_2, 7_1, 2_8)1619 end subroutine test_pmxvi8ger4pp_i1_non_def1620 1621!CHECK-LABEL: @test_pmxvi8ger4pp_i1_non_def_1622! LLVMIR: %[[VAL_629:.*]] = alloca <16 x i8>, i64 1, align 161623! LLVMIR: %[[VAL_630:.*]] = alloca <16 x i8>, i64 1, align 161624! LLVMIR: %[[VAL_631:.*]] = alloca <512 x i1>, i64 1, align 641625! LLVMIR: %[[VAL_632:.*]] = load <16 x i8>, ptr %[[VAL_630]], align 161626! LLVMIR: %[[VAL_633:.*]] = load <16 x i8>, ptr %[[VAL_629]], align 161627! LLVMIR: %[[VAL_634:.*]] = load <512 x i1>, ptr %[[VAL_631]], align 641628! LLVMIR: %[[VAL_635:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi8ger4pp(<512 x i1> %[[VAL_634]], <16 x i8> %[[VAL_632]], <16 x i8> %[[VAL_633]], i32 7, i32 7, i32 2)1629! LLVMIR: store <512 x i1> %[[VAL_635]], ptr %[[VAL_631]], align 641630 1631 subroutine test_pmxvi8ger4spp_u1_def()1632 use, intrinsic :: mma1633 implicit none1634 vector(unsigned(1)) vu10, vu111635 __vector_quad :: cq1636 call mma_pmxvi8ger4spp(cq, vu10, vu11, 7, 7, 2)1637 end subroutine test_pmxvi8ger4spp_u1_def1638 1639!CHECK-LABEL: @test_pmxvi8ger4spp_u1_def_1640! LLVMIR: %[[VAL_636:.*]] = alloca <16 x i8>, i64 1, align 161641! LLVMIR: %[[VAL_637:.*]] = alloca <16 x i8>, i64 1, align 161642! LLVMIR: %[[VAL_638:.*]] = alloca <512 x i1>, i64 1, align 641643! LLVMIR: %[[VAL_639:.*]] = load <16 x i8>, ptr %[[VAL_637]], align 161644! LLVMIR: %[[VAL_640:.*]] = load <16 x i8>, ptr %[[VAL_636]], align 161645! LLVMIR: %[[VAL_641:.*]] = load <512 x i1>, ptr %[[VAL_638]], align 641646! LLVMIR: %[[VAL_642:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi8ger4spp(<512 x i1> %[[VAL_641]], <16 x i8> %[[VAL_639]], <16 x i8> %[[VAL_640]], i32 7, i32 7, i32 2)1647! LLVMIR: store <512 x i1> %[[VAL_642]], ptr %[[VAL_638]], align 641648 1649 subroutine test_pmxvi8ger4spp_u1_non_def()1650 use, intrinsic :: mma1651 implicit none1652 vector(unsigned(1)) vu10, vu111653 __vector_quad :: cq1654 call mma_pmxvi8ger4spp(cq, vu10, vu11, 7_2, 7_1, 2_8)1655 end subroutine test_pmxvi8ger4spp_u1_non_def1656 1657!CHECK-LABEL: @test_pmxvi8ger4spp_u1_non_def_1658! LLVMIR: %[[VAL_643:.*]] = alloca <16 x i8>, i64 1, align 161659! LLVMIR: %[[VAL_644:.*]] = alloca <16 x i8>, i64 1, align 161660! LLVMIR: %[[VAL_645:.*]] = alloca <512 x i1>, i64 1, align 641661! LLVMIR: %[[VAL_646:.*]] = load <16 x i8>, ptr %[[VAL_644]], align 161662! LLVMIR: %[[VAL_647:.*]] = load <16 x i8>, ptr %[[VAL_643]], align 161663! LLVMIR: %[[VAL_648:.*]] = load <512 x i1>, ptr %[[VAL_645]], align 641664! LLVMIR: %[[VAL_649:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi8ger4spp(<512 x i1> %[[VAL_648]], <16 x i8> %[[VAL_646]], <16 x i8> %[[VAL_647]], i32 7, i32 7, i32 2)1665! LLVMIR: store <512 x i1> %[[VAL_649]], ptr %[[VAL_645]], align 641666 1667 subroutine test_pmxvi8ger4spp_i1_def()1668 use, intrinsic :: mma1669 implicit none1670 vector(integer(1)) vi10, vi111671 __vector_quad :: cq1672 call mma_pmxvi8ger4spp(cq, vi10, vi11, 7, 7, 2)1673 end subroutine test_pmxvi8ger4spp_i1_def1674 1675!CHECK-LABEL: @test_pmxvi8ger4spp_i1_def_1676! LLVMIR: %[[VAL_650:.*]] = alloca <16 x i8>, i64 1, align 161677! LLVMIR: %[[VAL_651:.*]] = alloca <16 x i8>, i64 1, align 161678! LLVMIR: %[[VAL_652:.*]] = alloca <512 x i1>, i64 1, align 641679! LLVMIR: %[[VAL_653:.*]] = load <16 x i8>, ptr %[[VAL_651]], align 161680! LLVMIR: %[[VAL_654:.*]] = load <16 x i8>, ptr %[[VAL_650]], align 161681! LLVMIR: %[[VAL_655:.*]] = load <512 x i1>, ptr %[[VAL_652]], align 641682! LLVMIR: %[[VAL_656:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi8ger4spp(<512 x i1> %[[VAL_655]], <16 x i8> %[[VAL_653]], <16 x i8> %[[VAL_654]], i32 7, i32 7, i32 2)1683! LLVMIR: store <512 x i1> %[[VAL_656]], ptr %[[VAL_652]], align 641684 1685 subroutine test_pmxvi8ger4spp_i1_non_def()1686 use, intrinsic :: mma1687 implicit none1688 vector(integer(1)) vi10, vi111689 __vector_quad :: cq1690 call mma_pmxvi8ger4spp(cq, vi10, vi11, 7_2, 7_1, 2_8)1691 end subroutine test_pmxvi8ger4spp_i1_non_def1692 1693!CHECK-LABEL: @test_pmxvi8ger4spp_i1_non_def_1694! LLVMIR: %[[VAL_657:.*]] = alloca <16 x i8>, i64 1, align 161695! LLVMIR: %[[VAL_658:.*]] = alloca <16 x i8>, i64 1, align 161696! LLVMIR: %[[VAL_659:.*]] = alloca <512 x i1>, i64 1, align 641697! LLVMIR: %[[VAL_660:.*]] = load <16 x i8>, ptr %[[VAL_658]], align 161698! LLVMIR: %[[VAL_661:.*]] = load <16 x i8>, ptr %[[VAL_657]], align 161699! LLVMIR: %[[VAL_662:.*]] = load <512 x i1>, ptr %[[VAL_659]], align 641700! LLVMIR: %[[VAL_663:.*]] = call <512 x i1> @llvm.ppc.mma.pmxvi8ger4spp(<512 x i1> %[[VAL_662]], <16 x i8> %[[VAL_660]], <16 x i8> %[[VAL_661]], i32 7, i32 7, i32 2)1701! LLVMIR: store <512 x i1> %[[VAL_663]], ptr %[[VAL_659]], align 641702