857 lines · plain
1! RUN: %flang_fc1 -flang-experimental-hlfir -triple powerpc64le-unknown-unknown -target-cpu pwr10 -emit-llvm %s -o - | FileCheck --check-prefixes="LLVMIR" %s2! REQUIRES: target=powerpc{{.*}}3 4 subroutine test_xvbf16ger2()5 use, intrinsic :: mma6 implicit none7 vector(unsigned(1)) vu10, vu118 __vector_quad :: cq9 call mma_xvbf16ger2(cq, vu10, vu11)10 end subroutine test_xvbf16ger211 12!CHECK-LABEL: @test_xvbf16ger2_13! LLVMIR: %[[VAL_0:.*]] = alloca <16 x i8>, i64 1, align 1614! LLVMIR: %[[VAL_1:.*]] = alloca <16 x i8>, i64 1, align 1615! LLVMIR: %[[VAL_2:.*]] = alloca <512 x i1>, i64 1, align 6416! LLVMIR: %[[VAL_3:.*]] = load <16 x i8>, ptr %[[VAL_1]], align 1617! LLVMIR: %[[VAL_4:.*]] = load <16 x i8>, ptr %[[VAL_0]], align 1618! LLVMIR: %[[VAL_5:.*]] = call <512 x i1> @llvm.ppc.mma.xvbf16ger2(<16 x i8> %[[VAL_3]], <16 x i8> %[[VAL_4]])19! LLVMIR: store <512 x i1> %[[VAL_5]], ptr %[[VAL_2]], align 6420 21 22 subroutine test_xvbf16ger2nn()23 use, intrinsic :: mma24 implicit none25 vector(unsigned(1)) vu10, vu1126 __vector_quad :: cq27 call mma_xvbf16ger2nn(cq, vu10, vu11)28 end subroutine test_xvbf16ger2nn29 30!CHECK-LABEL: @test_xvbf16ger2nn_31! LLVMIR: %[[VAL_6:.*]] = alloca <16 x i8>, i64 1, align 1632! LLVMIR: %[[VAL_7:.*]] = alloca <16 x i8>, i64 1, align 1633! LLVMIR: %[[VAL_8:.*]] = alloca <512 x i1>, i64 1, align 6434! LLVMIR: %[[VAL_9:.*]] = load <16 x i8>, ptr %[[VAL_7]], align 1635! LLVMIR: %[[VAL_10:.*]] = load <16 x i8>, ptr %[[VAL_6]], align 1636! LLVMIR: %[[VAL_11:.*]] = load <512 x i1>, ptr %[[VAL_8]], align 6437! LLVMIR: %[[VAL_12:.*]] = call <512 x i1> @llvm.ppc.mma.xvbf16ger2nn(<512 x i1> %[[VAL_11]], <16 x i8> %[[VAL_9]], <16 x i8> %[[VAL_10]])38! LLVMIR: store <512 x i1> %[[VAL_12]], ptr %[[VAL_8]], align 6439 40 subroutine test_xvbf16ger2np()41 use, intrinsic :: mma42 implicit none43 vector(unsigned(1)) vu10, vu1144 __vector_quad :: cq45 call mma_xvbf16ger2np(cq, vu10, vu11)46 end subroutine test_xvbf16ger2np47 48!CHECK-LABEL: @test_xvbf16ger2np_49! LLVMIR: %[[VAL_13:.*]] = alloca <16 x i8>, i64 1, align 1650! LLVMIR: %[[VAL_14:.*]] = alloca <16 x i8>, i64 1, align 1651! LLVMIR: %[[VAL_15:.*]] = alloca <512 x i1>, i64 1, align 6452! LLVMIR: %[[VAL_16:.*]] = load <16 x i8>, ptr %[[VAL_14]], align 1653! LLVMIR: %[[VAL_17:.*]] = load <16 x i8>, ptr %[[VAL_13]], align 1654! LLVMIR: %[[VAL_18:.*]] = load <512 x i1>, ptr %[[VAL_15]], align 6455! LLVMIR: %[[VAL_19:.*]] = call <512 x i1> @llvm.ppc.mma.xvbf16ger2np(<512 x i1> %[[VAL_18]], <16 x i8> %[[VAL_16]], <16 x i8> %[[VAL_17]])56! LLVMIR: store <512 x i1> %[[VAL_19]], ptr %[[VAL_15]], align 6457 58 subroutine test_xvbf16ger2pn()59 use, intrinsic :: mma60 implicit none61 vector(unsigned(1)) vu10, vu1162 __vector_quad :: cq63 call mma_xvbf16ger2pn(cq, vu10, vu11)64 end subroutine test_xvbf16ger2pn65 66!CHECK-LABEL: @test_xvbf16ger2pn_67! LLVMIR: %[[VAL_20:.*]] = alloca <16 x i8>, i64 1, align 1668! LLVMIR: %[[VAL_21:.*]] = alloca <16 x i8>, i64 1, align 1669! LLVMIR: %[[VAL_22:.*]] = alloca <512 x i1>, i64 1, align 6470! LLVMIR: %[[VAL_23:.*]] = load <16 x i8>, ptr %[[VAL_21]], align 1671! LLVMIR: %[[VAL_24:.*]] = load <16 x i8>, ptr %[[VAL_20]], align 1672! LLVMIR: %[[VAL_25:.*]] = load <512 x i1>, ptr %[[VAL_22]], align 6473! LLVMIR: %[[VAL_26:.*]] = call <512 x i1> @llvm.ppc.mma.xvbf16ger2pn(<512 x i1> %[[VAL_25]], <16 x i8> %[[VAL_23]], <16 x i8> %[[VAL_24]])74! LLVMIR: store <512 x i1> %[[VAL_26]], ptr %[[VAL_22]], align 6475 76 subroutine test_xvbf16ger2pp()77 use, intrinsic :: mma78 implicit none79 vector(unsigned(1)) vu10, vu1180 __vector_quad :: cq81 call mma_xvbf16ger2pp(cq, vu10, vu11)82 end subroutine test_xvbf16ger2pp83 84!CHECK-LABEL: @test_xvbf16ger2pp_85! LLVMIR: %[[VAL_27:.*]] = alloca <16 x i8>, i64 1, align 1686! LLVMIR: %[[VAL_28:.*]] = alloca <16 x i8>, i64 1, align 1687! LLVMIR: %[[VAL_29:.*]] = alloca <512 x i1>, i64 1, align 6488! LLVMIR: %[[VAL_30:.*]] = load <16 x i8>, ptr %[[VAL_28]], align 1689! LLVMIR: %[[VAL_31:.*]] = load <16 x i8>, ptr %[[VAL_27]], align 1690! LLVMIR: %[[VAL_32:.*]] = load <512 x i1>, ptr %[[VAL_29]], align 6491! LLVMIR: %[[VAL_33:.*]] = call <512 x i1> @llvm.ppc.mma.xvbf16ger2pp(<512 x i1> %[[VAL_32]], <16 x i8> %[[VAL_30]], <16 x i8> %[[VAL_31]])92! LLVMIR: store <512 x i1> %[[VAL_33]], ptr %[[VAL_29]], align 6493 94 subroutine test_xvf16ger2()95 use, intrinsic :: mma96 implicit none97 vector(unsigned(1)) vu10, vu1198 __vector_quad :: cq99 call mma_xvf16ger2(cq, vu10, vu11)100 end subroutine test_xvf16ger2101 102!CHECK-LABEL: @test_xvf16ger2_103! LLVMIR: %[[VAL_34:.*]] = alloca <16 x i8>, i64 1, align 16104! LLVMIR: %[[VAL_35:.*]] = alloca <16 x i8>, i64 1, align 16105! LLVMIR: %[[VAL_36:.*]] = alloca <512 x i1>, i64 1, align 64106! LLVMIR: %[[VAL_37:.*]] = load <16 x i8>, ptr %[[VAL_35]], align 16107! LLVMIR: %[[VAL_38:.*]] = load <16 x i8>, ptr %[[VAL_34]], align 16108! LLVMIR: %[[VAL_39:.*]] = call <512 x i1> @llvm.ppc.mma.xvf16ger2(<16 x i8> %[[VAL_37]], <16 x i8> %[[VAL_38]])109! LLVMIR: store <512 x i1> %[[VAL_39]], ptr %[[VAL_36]], align 64110 111 subroutine test_xvf16ger2nn()112 use, intrinsic :: mma113 implicit none114 vector(unsigned(1)) vu10, vu11115 __vector_quad :: cq116 call mma_xvf16ger2nn(cq, vu10, vu11)117 end subroutine test_xvf16ger2nn118 119!CHECK-LABEL: @test_xvf16ger2nn_120! LLVMIR: %[[VAL_40:.*]] = alloca <16 x i8>, i64 1, align 16121! LLVMIR: %[[VAL_41:.*]] = alloca <16 x i8>, i64 1, align 16122! LLVMIR: %[[VAL_42:.*]] = alloca <512 x i1>, i64 1, align 64123! LLVMIR: %[[VAL_43:.*]] = load <16 x i8>, ptr %[[VAL_41]], align 16124! LLVMIR: %[[VAL_44:.*]] = load <16 x i8>, ptr %[[VAL_40]], align 16125! LLVMIR: %[[VAL_45:.*]] = load <512 x i1>, ptr %[[VAL_42]], align 64126! LLVMIR: %[[VAL_46:.*]] = call <512 x i1> @llvm.ppc.mma.xvf16ger2nn(<512 x i1> %[[VAL_45]], <16 x i8> %[[VAL_43]], <16 x i8> %[[VAL_44]])127! LLVMIR: store <512 x i1> %[[VAL_46]], ptr %[[VAL_42]], align 64128 129 subroutine test_xvf16ger2np()130 use, intrinsic :: mma131 implicit none132 vector(unsigned(1)) vu10, vu11133 __vector_quad :: cq134 call mma_xvf16ger2np(cq, vu10, vu11)135 end subroutine test_xvf16ger2np136 137!CHECK-LABEL: @test_xvf16ger2np_138! LLVMIR: %[[VAL_47:.*]] = alloca <16 x i8>, i64 1, align 16139! LLVMIR: %[[VAL_48:.*]] = alloca <16 x i8>, i64 1, align 16140! LLVMIR: %[[VAL_49:.*]] = alloca <512 x i1>, i64 1, align 64141! LLVMIR: %[[VAL_50:.*]] = load <16 x i8>, ptr %[[VAL_48]], align 16142! LLVMIR: %[[VAL_51:.*]] = load <16 x i8>, ptr %[[VAL_47]], align 16143! LLVMIR: %[[VAL_52:.*]] = load <512 x i1>, ptr %[[VAL_49]], align 64144! LLVMIR: %[[VAL_53:.*]] = call <512 x i1> @llvm.ppc.mma.xvf16ger2np(<512 x i1> %[[VAL_52]], <16 x i8> %[[VAL_50]], <16 x i8> %[[VAL_51]])145! LLVMIR: store <512 x i1> %[[VAL_53]], ptr %[[VAL_49]], align 64146 147 subroutine test_xvf16ger2pn()148 use, intrinsic :: mma149 implicit none150 vector(unsigned(1)) vu10, vu11151 __vector_quad :: cq152 call mma_xvf16ger2pn(cq, vu10, vu11)153 end subroutine test_xvf16ger2pn154 155!CHECK-LABEL: @test_xvf16ger2pn_156! LLVMIR: %[[VAL_54:.*]] = alloca <16 x i8>, i64 1, align 16157! LLVMIR: %[[VAL_55:.*]] = alloca <16 x i8>, i64 1, align 16158! LLVMIR: %[[VAL_56:.*]] = alloca <512 x i1>, i64 1, align 64159! LLVMIR: %[[VAL_57:.*]] = load <16 x i8>, ptr %[[VAL_55]], align 16160! LLVMIR: %[[VAL_58:.*]] = load <16 x i8>, ptr %[[VAL_54]], align 16161! LLVMIR: %[[VAL_59:.*]] = load <512 x i1>, ptr %[[VAL_56]], align 64162! LLVMIR: %[[VAL_60:.*]] = call <512 x i1> @llvm.ppc.mma.xvf16ger2pn(<512 x i1> %[[VAL_59]], <16 x i8> %[[VAL_57]], <16 x i8> %[[VAL_58]])163! LLVMIR: store <512 x i1> %[[VAL_60]], ptr %[[VAL_56]], align 64164 165 subroutine test_xvf16ger2pp()166 use, intrinsic :: mma167 implicit none168 vector(unsigned(1)) vu10, vu11169 __vector_quad :: cq170 call mma_xvf16ger2pp(cq, vu10, vu11)171 end subroutine test_xvf16ger2pp172 173!CHECK-LABEL: @test_xvf16ger2pp_174! LLVMIR: %[[VAL_61:.*]] = alloca <16 x i8>, i64 1, align 16175! LLVMIR: %[[VAL_62:.*]] = alloca <16 x i8>, i64 1, align 16176! LLVMIR: %[[VAL_63:.*]] = alloca <512 x i1>, i64 1, align 64177! LLVMIR: %[[VAL_64:.*]] = load <16 x i8>, ptr %[[VAL_62]], align 16178! LLVMIR: %[[VAL_65:.*]] = load <16 x i8>, ptr %[[VAL_61]], align 16179! LLVMIR: %[[VAL_66:.*]] = load <512 x i1>, ptr %[[VAL_63]], align 64180! LLVMIR: %[[VAL_67:.*]] = call <512 x i1> @llvm.ppc.mma.xvf16ger2pp(<512 x i1> %[[VAL_66]], <16 x i8> %[[VAL_64]], <16 x i8> %[[VAL_65]])181! LLVMIR: store <512 x i1> %[[VAL_67]], ptr %[[VAL_63]], align 64182 183 subroutine test_xvf32ger_u1()184 use, intrinsic :: mma185 implicit none186 vector(unsigned(1)) vu10, vu11187 __vector_quad :: cq188 call mma_xvf32ger(cq, vu10, vu11)189 end subroutine test_xvf32ger_u1190 191!CHECK-LABEL: @test_xvf32ger_u1_192! LLVMIR: %[[VAL_68:.*]] = alloca <16 x i8>, i64 1, align 16193! LLVMIR: %[[VAL_69:.*]] = alloca <16 x i8>, i64 1, align 16194! LLVMIR: %[[VAL_70:.*]] = alloca <512 x i1>, i64 1, align 64195! LLVMIR: %[[VAL_71:.*]] = load <16 x i8>, ptr %[[VAL_69]], align 16196! LLVMIR: %[[VAL_72:.*]] = load <16 x i8>, ptr %[[VAL_68]], align 16197! LLVMIR: %[[VAL_73:.*]] = call <512 x i1> @llvm.ppc.mma.xvf32ger(<16 x i8> %[[VAL_71]], <16 x i8> %[[VAL_72]])198! LLVMIR: store <512 x i1> %[[VAL_73]], ptr %[[VAL_70]], align 64199 200 201 subroutine test_xvf32ger_r4()202 use, intrinsic :: mma203 implicit none204 vector(real(4)) vr40, vr41205 __vector_quad :: cq206 call mma_xvf32ger(cq, vr40, vr41)207 end subroutine test_xvf32ger_r4208 209!CHECK-LABEL: @test_xvf32ger_r4_210! LLVMIR: %[[VAL_74:.*]] = alloca <4 x float>, i64 1, align 16211! LLVMIR: %[[VAL_75:.*]] = alloca <4 x float>, i64 1, align 16212! LLVMIR: %[[VAL_76:.*]] = alloca <512 x i1>, i64 1, align 64213! LLVMIR: %[[VAL_77:.*]] = load <4 x float>, ptr %[[VAL_75]], align 16214! LLVMIR: %[[VAL_78:.*]] = load <4 x float>, ptr %[[VAL_74]], align 16215! LLVMIR: %[[VAL_79:.*]] = bitcast <4 x float> %[[VAL_77]] to <16 x i8>216! LLVMIR: %[[VAL_80:.*]] = bitcast <4 x float> %[[VAL_78]] to <16 x i8>217! LLVMIR: %[[VAL_81:.*]] = call <512 x i1> @llvm.ppc.mma.xvf32ger(<16 x i8> %[[VAL_79]], <16 x i8> %[[VAL_80]])218! LLVMIR: store <512 x i1> %[[VAL_81]], ptr %[[VAL_76]], align 64219 220 subroutine test_xvf32gernn_u1()221 use, intrinsic :: mma222 implicit none223 vector(unsigned(1)) vu10, vu11224 __vector_quad :: cq225 call mma_xvf32gernn(cq, vu10, vu11)226 end subroutine test_xvf32gernn_u1227 228!CHECK-LABEL: @test_xvf32gernn_u1_229! LLVMIR: %[[VAL_82:.*]] = alloca <16 x i8>, i64 1, align 16230! LLVMIR: %[[VAL_83:.*]] = alloca <16 x i8>, i64 1, align 16231! LLVMIR: %[[VAL_84:.*]] = alloca <512 x i1>, i64 1, align 64232! LLVMIR: %[[VAL_85:.*]] = load <16 x i8>, ptr %[[VAL_83]], align 16233! LLVMIR: %[[VAL_86:.*]] = load <16 x i8>, ptr %[[VAL_82]], align 16234! LLVMIR: %[[VAL_87:.*]] = load <512 x i1>, ptr %[[VAL_84]], align 64235! LLVMIR: %[[VAL_88:.*]] = call <512 x i1> @llvm.ppc.mma.xvf32gernn(<512 x i1> %[[VAL_87]], <16 x i8> %[[VAL_85]], <16 x i8> %[[VAL_86]])236! LLVMIR: store <512 x i1> %[[VAL_88]], ptr %[[VAL_84]], align 64237 238 subroutine test_xvf32gernn_r4()239 use, intrinsic :: mma240 implicit none241 vector(real(4)) vr40, vr41242 __vector_quad :: cq243 call mma_xvf32gernn(cq, vr40, vr41)244 end subroutine test_xvf32gernn_r4245 246!CHECK-LABEL: @test_xvf32gernn_r4_247! LLVMIR: %[[VAL_89:.*]] = alloca <4 x float>, i64 1, align 16248! LLVMIR: %[[VAL_90:.*]] = alloca <4 x float>, i64 1, align 16249! LLVMIR: %[[VAL_91:.*]] = alloca <512 x i1>, i64 1, align 64250! LLVMIR: %[[VAL_92:.*]] = load <4 x float>, ptr %[[VAL_90]], align 16251! LLVMIR: %[[VAL_93:.*]] = load <4 x float>, ptr %[[VAL_89]], align 16252! LLVMIR: %[[VAL_94:.*]] = load <512 x i1>, ptr %[[VAL_91]], align 64253! LLVMIR: %[[VAL_95:.*]] = bitcast <4 x float> %[[VAL_92]] to <16 x i8>254! LLVMIR: %[[VAL_96:.*]] = bitcast <4 x float> %[[VAL_93]] to <16 x i8>255! LLVMIR: %[[VAL_97:.*]] = call <512 x i1> @llvm.ppc.mma.xvf32gernn(<512 x i1> %[[VAL_94]], <16 x i8> %[[VAL_95]], <16 x i8> %[[VAL_96]])256! LLVMIR: store <512 x i1> %[[VAL_97]], ptr %[[VAL_91]], align 64257 258 subroutine test_xvf32gernp_u1()259 use, intrinsic :: mma260 implicit none261 vector(unsigned(1)) vu10, vu11262 __vector_quad :: cq263 call mma_xvf32gernp(cq, vu10, vu11)264 end subroutine test_xvf32gernp_u1265 266!CHECK-LABEL: @test_xvf32gernp_u1_267! LLVMIR: %[[VAL_98:.*]] = alloca <16 x i8>, i64 1, align 16268! LLVMIR: %[[VAL_99:.*]] = alloca <16 x i8>, i64 1, align 16269! LLVMIR: %[[VAL_100:.*]] = alloca <512 x i1>, i64 1, align 64270! LLVMIR: %[[VAL_101:.*]] = load <16 x i8>, ptr %[[VAL_99]], align 16271! LLVMIR: %[[VAL_102:.*]] = load <16 x i8>, ptr %[[VAL_98]], align 16272! LLVMIR: %[[VAL_103:.*]] = load <512 x i1>, ptr %[[VAL_100]], align 64273! LLVMIR: %[[VAL_104:.*]] = call <512 x i1> @llvm.ppc.mma.xvf32gernp(<512 x i1> %[[VAL_103]], <16 x i8> %[[VAL_101]], <16 x i8> %[[VAL_102]])274! LLVMIR: store <512 x i1> %[[VAL_104]], ptr %[[VAL_100]], align 64275 276 subroutine test_xvf32gernp_r4()277 use, intrinsic :: mma278 implicit none279 vector(real(4)) vr40, vr41280 __vector_quad :: cq281 call mma_xvf32gernp(cq, vr40, vr41)282 end subroutine test_xvf32gernp_r4283 284!CHECK-LABEL: @test_xvf32gernp_r4_285! LLVMIR: %[[VAL_105:.*]] = alloca <4 x float>, i64 1, align 16286! LLVMIR: %[[VAL_106:.*]] = alloca <4 x float>, i64 1, align 16287! LLVMIR: %[[VAL_107:.*]] = alloca <512 x i1>, i64 1, align 64288! LLVMIR: %[[VAL_108:.*]] = load <4 x float>, ptr %[[VAL_106]], align 16289! LLVMIR: %[[VAL_109:.*]] = load <4 x float>, ptr %[[VAL_105]], align 16290! LLVMIR: %[[VAL_110:.*]] = load <512 x i1>, ptr %[[VAL_107]], align 64291! LLVMIR: %[[VAL_111:.*]] = bitcast <4 x float> %[[VAL_108]] to <16 x i8>292! LLVMIR: %[[VAL_112:.*]] = bitcast <4 x float> %[[VAL_109]] to <16 x i8>293! LLVMIR: %[[VAL_113:.*]] = call <512 x i1> @llvm.ppc.mma.xvf32gernp(<512 x i1> %[[VAL_110]], <16 x i8> %[[VAL_111]], <16 x i8> %[[VAL_112]])294! LLVMIR: store <512 x i1> %[[VAL_113]], ptr %[[VAL_107]], align 64295 296 subroutine test_xvf32gerpn_u1()297 use, intrinsic :: mma298 implicit none299 vector(unsigned(1)) vu10, vu11300 __vector_quad :: cq301 call mma_xvf32gerpn(cq, vu10, vu11)302 end subroutine test_xvf32gerpn_u1303 304!CHECK-LABEL: @test_xvf32gerpn_u1_305! LLVMIR: %[[VAL_114:.*]] = alloca <16 x i8>, i64 1, align 16306! LLVMIR: %[[VAL_115:.*]] = alloca <16 x i8>, i64 1, align 16307! LLVMIR: %[[VAL_116:.*]] = alloca <512 x i1>, i64 1, align 64308! LLVMIR: %[[VAL_117:.*]] = load <16 x i8>, ptr %[[VAL_115]], align 16309! LLVMIR: %[[VAL_118:.*]] = load <16 x i8>, ptr %[[VAL_114]], align 16310! LLVMIR: %[[VAL_119:.*]] = load <512 x i1>, ptr %[[VAL_116]], align 64311! LLVMIR: %[[VAL_120:.*]] = call <512 x i1> @llvm.ppc.mma.xvf32gerpn(<512 x i1> %[[VAL_119]], <16 x i8> %[[VAL_117]], <16 x i8> %[[VAL_118]])312! LLVMIR: store <512 x i1> %[[VAL_120]], ptr %[[VAL_116]], align 64313 314 subroutine test_xvf32gerpn_r4()315 use, intrinsic :: mma316 implicit none317 vector(real(4)) vr40, vr41318 __vector_quad :: cq319 call mma_xvf32gerpn(cq, vr40, vr41)320 end subroutine test_xvf32gerpn_r4321 322!CHECK-LABEL: @test_xvf32gerpn_r4_323! LLVMIR: %[[VAL_121:.*]] = alloca <4 x float>, i64 1, align 16324! LLVMIR: %[[VAL_122:.*]] = alloca <4 x float>, i64 1, align 16325! LLVMIR: %[[VAL_123:.*]] = alloca <512 x i1>, i64 1, align 64326! LLVMIR: %[[VAL_124:.*]] = load <4 x float>, ptr %[[VAL_122]], align 16327! LLVMIR: %[[VAL_125:.*]] = load <4 x float>, ptr %[[VAL_121]], align 16328! LLVMIR: %[[VAL_126:.*]] = load <512 x i1>, ptr %[[VAL_123]], align 64329! LLVMIR: %[[VAL_127:.*]] = bitcast <4 x float> %[[VAL_124]] to <16 x i8>330! LLVMIR: %[[VAL_128:.*]] = bitcast <4 x float> %[[VAL_125]] to <16 x i8>331! LLVMIR: %[[VAL_129:.*]] = call <512 x i1> @llvm.ppc.mma.xvf32gerpn(<512 x i1> %[[VAL_126]], <16 x i8> %[[VAL_127]], <16 x i8> %[[VAL_128]])332! LLVMIR: store <512 x i1> %[[VAL_129]], ptr %[[VAL_123]], align 64333 334 subroutine test_xvf32gerpp_u1()335 use, intrinsic :: mma336 implicit none337 vector(unsigned(1)) vu10, vu11338 __vector_quad :: cq339 call mma_xvf32gerpp(cq, vu10, vu11)340 end subroutine test_xvf32gerpp_u1341 342!CHECK-LABEL: @test_xvf32gerpp_u1_343! LLVMIR: %[[VAL_130:.*]] = alloca <16 x i8>, i64 1, align 16344! LLVMIR: %[[VAL_131:.*]] = alloca <16 x i8>, i64 1, align 16345! LLVMIR: %[[VAL_132:.*]] = alloca <512 x i1>, i64 1, align 64346! LLVMIR: %[[VAL_133:.*]] = load <16 x i8>, ptr %[[VAL_131]], align 16347! LLVMIR: %[[VAL_134:.*]] = load <16 x i8>, ptr %[[VAL_130]], align 16348! LLVMIR: %[[VAL_135:.*]] = load <512 x i1>, ptr %[[VAL_132]], align 64349! LLVMIR: %[[VAL_136:.*]] = call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %[[VAL_135]], <16 x i8> %[[VAL_133]], <16 x i8> %[[VAL_134]])350! LLVMIR: store <512 x i1> %[[VAL_136]], ptr %[[VAL_132]], align 64351 352 353 subroutine test_xvf32gerpp_r4()354 use, intrinsic :: mma355 implicit none356 vector(real(4)) vr40, vr41357 __vector_quad :: cq358 call mma_xvf32gerpp(cq, vr40, vr41)359 end subroutine test_xvf32gerpp_r4360 361!CHECK-LABEL: @test_xvf32gerpp_r4_362! LLVMIR: %[[VAL_137:.*]] = alloca <4 x float>, i64 1, align 16363! LLVMIR: %[[VAL_138:.*]] = alloca <4 x float>, i64 1, align 16364! LLVMIR: %[[VAL_139:.*]] = alloca <512 x i1>, i64 1, align 64365! LLVMIR: %[[VAL_140:.*]] = load <4 x float>, ptr %[[VAL_138]], align 16366! LLVMIR: %[[VAL_141:.*]] = load <4 x float>, ptr %[[VAL_137]], align 16367! LLVMIR: %[[VAL_142:.*]] = load <512 x i1>, ptr %[[VAL_139]], align 64368! LLVMIR: %[[VAL_143:.*]] = bitcast <4 x float> %[[VAL_140]] to <16 x i8>369! LLVMIR: %[[VAL_144:.*]] = bitcast <4 x float> %[[VAL_141]] to <16 x i8>370! LLVMIR: %[[VAL_145:.*]] = call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %[[VAL_142]], <16 x i8> %[[VAL_143]], <16 x i8> %[[VAL_144]])371! LLVMIR: store <512 x i1> %[[VAL_145]], ptr %[[VAL_139]], align 64372 373 subroutine test_xvf64ger_u1()374 use, intrinsic :: mma375 implicit none376 vector(unsigned(1)) vu10377 __vector_quad :: cq378 __vector_pair :: cp379 call mma_xvf64ger(cq, cp, vu10)380 end subroutine test_xvf64ger_u1381 382!CHECK-LABEL: @test_xvf64ger_u1_383! LLVMIR: %[[VAL_146:.*]] = alloca <16 x i8>, i64 1, align 16384! LLVMIR: %[[VAL_147:.*]] = alloca <512 x i1>, i64 1, align 64385! LLVMIR: %[[VAL_148:.*]] = alloca <256 x i1>, i64 1, align 32386! LLVMIR: %[[VAL_149:.*]] = load <256 x i1>, ptr %[[VAL_148]], align 32387! LLVMIR: %[[VAL_150:.*]] = load <16 x i8>, ptr %[[VAL_146]], align 16388! LLVMIR: %[[VAL_151:.*]] = call <512 x i1> @llvm.ppc.mma.xvf64ger(<256 x i1> %[[VAL_149]], <16 x i8> %[[VAL_150]])389! LLVMIR: store <512 x i1> %[[VAL_151]], ptr %[[VAL_147]], align 64390 391 subroutine test_xvf64ger_r8()392 use, intrinsic :: mma393 implicit none394 vector(real(8)) vr80395 __vector_quad :: cq396 __vector_pair :: cp397 call mma_xvf64ger(cq, cp, vr80)398 end subroutine test_xvf64ger_r8399 400!CHECK-LABEL: @test_xvf64ger_r8_401! LLVMIR: %[[VAL_152:.*]] = alloca <2 x double>, i64 1, align 16402! LLVMIR: %[[VAL_153:.*]] = alloca <512 x i1>, i64 1, align 64403! LLVMIR: %[[VAL_154:.*]] = alloca <256 x i1>, i64 1, align 32404! LLVMIR: %[[VAL_155:.*]] = load <256 x i1>, ptr %[[VAL_154]], align 32405! LLVMIR: %[[VAL_156:.*]] = load <2 x double>, ptr %[[VAL_152]], align 16406! LLVMIR: %[[VAL_157:.*]] = bitcast <2 x double> %[[VAL_156]] to <16 x i8>407! LLVMIR: %[[VAL_158:.*]] = call <512 x i1> @llvm.ppc.mma.xvf64ger(<256 x i1> %[[VAL_155]], <16 x i8> %[[VAL_157]])408! LLVMIR: store <512 x i1> %[[VAL_158]], ptr %[[VAL_153]], align 64409 410 411 subroutine test_xvf64gernn_u1()412 use, intrinsic :: mma413 implicit none414 vector(unsigned(1)) vu10415 __vector_quad :: cq416 __vector_pair :: cp417 call mma_xvf64gernn(cq, cp, vu10)418 end subroutine test_xvf64gernn_u1419 420!CHECK-LABEL: @test_xvf64gernn_u1_421! LLVMIR: %[[VAL_159:.*]] = alloca <16 x i8>, i64 1, align 16422! LLVMIR: %[[VAL_160:.*]] = alloca <512 x i1>, i64 1, align 64423! LLVMIR: %[[VAL_161:.*]] = alloca <256 x i1>, i64 1, align 32424! LLVMIR: %[[VAL_162:.*]] = load <256 x i1>, ptr %[[VAL_161]], align 32425! LLVMIR: %[[VAL_163:.*]] = load <16 x i8>, ptr %[[VAL_159]], align 16426! LLVMIR: %[[VAL_164:.*]] = load <512 x i1>, ptr %[[VAL_160]], align 64427! LLVMIR: %[[VAL_165:.*]] = call <512 x i1> @llvm.ppc.mma.xvf64gernn(<512 x i1> %[[VAL_164]], <256 x i1> %[[VAL_162]], <16 x i8> %[[VAL_163]])428! LLVMIR: store <512 x i1> %[[VAL_165]], ptr %[[VAL_160]], align 64429 430 431 subroutine test_xvf64gernn_r8()432 use, intrinsic :: mma433 implicit none434 vector(real(8)) vr80435 __vector_quad :: cq436 __vector_pair :: cp437 call mma_xvf64gernn(cq, cp, vr80)438 end subroutine test_xvf64gernn_r8439 440!CHECK-LABEL: @test_xvf64gernn_r8_441! LLVMIR: %[[VAL_166:.*]] = alloca <2 x double>, i64 1, align 16442! LLVMIR: %[[VAL_167:.*]] = alloca <512 x i1>, i64 1, align 64443! LLVMIR: %[[VAL_168:.*]] = alloca <256 x i1>, i64 1, align 32444! LLVMIR: %[[VAL_169:.*]] = load <256 x i1>, ptr %[[VAL_168]], align 32445! LLVMIR: %[[VAL_170:.*]] = load <2 x double>, ptr %[[VAL_166]], align 16446! LLVMIR: %[[VAL_171:.*]] = load <512 x i1>, ptr %[[VAL_167]], align 64447! LLVMIR: %[[VAL_172:.*]] = bitcast <2 x double> %[[VAL_170]] to <16 x i8>448! LLVMIR: %[[VAL_173:.*]] = call <512 x i1> @llvm.ppc.mma.xvf64gernn(<512 x i1> %[[VAL_171]], <256 x i1> %[[VAL_169]], <16 x i8> %[[VAL_172]])449! LLVMIR: store <512 x i1> %[[VAL_173]], ptr %[[VAL_167]], align 64450 451 subroutine test_xvf64gernp_u1()452 use, intrinsic :: mma453 implicit none454 vector(unsigned(1)) vu10455 __vector_quad :: cq456 __vector_pair :: cp457 call mma_xvf64gernp(cq, cp, vu10)458 end subroutine test_xvf64gernp_u1459 460!CHECK-LABEL: @test_xvf64gernp_u1_461! LLVMIR: %[[VAL_174:.*]] = alloca <16 x i8>, i64 1, align 16462! LLVMIR: %[[VAL_175:.*]] = alloca <512 x i1>, i64 1, align 64463! LLVMIR: %[[VAL_176:.*]] = alloca <256 x i1>, i64 1, align 32464! LLVMIR: %[[VAL_177:.*]] = load <256 x i1>, ptr %[[VAL_176]], align 32465! LLVMIR: %[[VAL_178:.*]] = load <16 x i8>, ptr %[[VAL_174]], align 16466! LLVMIR: %[[VAL_179:.*]] = load <512 x i1>, ptr %[[VAL_175]], align 64467! LLVMIR: %[[VAL_180:.*]] = call <512 x i1> @llvm.ppc.mma.xvf64gernp(<512 x i1> %[[VAL_179]], <256 x i1> %[[VAL_177]], <16 x i8> %[[VAL_178]])468! LLVMIR: store <512 x i1> %[[VAL_180]], ptr %[[VAL_175]], align 64469 470 subroutine test_xvf64gernp_r8()471 use, intrinsic :: mma472 implicit none473 vector(unsigned(1)) vr80474 __vector_quad :: cq475 __vector_pair :: cp476 call mma_xvf64gernp(cq, cp, vr80)477 end subroutine test_xvf64gernp_r8478 479!CHECK-LABEL: @test_xvf64gernp_r8_480! LLVMIR: %[[VAL_181:.*]] = alloca <16 x i8>, i64 1, align 16481! LLVMIR: %[[VAL_182:.*]] = alloca <512 x i1>, i64 1, align 64482! LLVMIR: %[[VAL_183:.*]] = alloca <256 x i1>, i64 1, align 32483! LLVMIR: %[[VAL_184:.*]] = load <256 x i1>, ptr %[[VAL_183]], align 32484! LLVMIR: %[[VAL_185:.*]] = load <16 x i8>, ptr %[[VAL_181]], align 16485! LLVMIR: %[[VAL_186:.*]] = load <512 x i1>, ptr %[[VAL_182]], align 64486! LLVMIR: %[[VAL_187:.*]] = call <512 x i1> @llvm.ppc.mma.xvf64gernp(<512 x i1> %[[VAL_186]], <256 x i1> %[[VAL_184]], <16 x i8> %[[VAL_185]])487! LLVMIR: store <512 x i1> %[[VAL_187]], ptr %[[VAL_182]], align 64488 489 subroutine test_xvf64gerpn_u1()490 use, intrinsic :: mma491 implicit none492 vector(unsigned(1)) vu10493 __vector_quad :: cq494 __vector_pair :: cp495 call mma_xvf64gerpn(cq, cp, vu10)496 end subroutine test_xvf64gerpn_u1497 498!CHECK-LABEL: @test_xvf64gerpn_u1_499! LLVMIR: %[[VAL_188:.*]] = alloca <16 x i8>, i64 1, align 16500! LLVMIR: %[[VAL_189:.*]] = alloca <512 x i1>, i64 1, align 64501! LLVMIR: %[[VAL_190:.*]] = alloca <256 x i1>, i64 1, align 32502! LLVMIR: %[[VAL_191:.*]] = load <256 x i1>, ptr %[[VAL_190]], align 32503! LLVMIR: %[[VAL_192:.*]] = load <16 x i8>, ptr %[[VAL_188]], align 16504! LLVMIR: %[[VAL_193:.*]] = load <512 x i1>, ptr %[[VAL_189]], align 64505! LLVMIR: %[[VAL_194:.*]] = call <512 x i1> @llvm.ppc.mma.xvf64gerpn(<512 x i1> %[[VAL_193]], <256 x i1> %[[VAL_191]], <16 x i8> %[[VAL_192]])506! LLVMIR: store <512 x i1> %[[VAL_194]], ptr %[[VAL_189]], align 64507 508 subroutine test_xvf64gerpn_r8()509 use, intrinsic :: mma510 implicit none511 vector(real(8)) vr80512 __vector_quad :: cq513 __vector_pair :: cp514 call mma_xvf64gerpn(cq, cp, vr80)515 end subroutine test_xvf64gerpn_r8516 517!CHECK-LABEL: @test_xvf64gerpn_r8_518! LLVMIR: %[[VAL_195:.*]] = alloca <2 x double>, i64 1, align 16519! LLVMIR: %[[VAL_196:.*]] = alloca <512 x i1>, i64 1, align 64520! LLVMIR: %[[VAL_197:.*]] = alloca <256 x i1>, i64 1, align 32521! LLVMIR: %[[VAL_198:.*]] = load <256 x i1>, ptr %[[VAL_197]], align 32522! LLVMIR: %[[VAL_199:.*]] = load <2 x double>, ptr %[[VAL_195]], align 16523! LLVMIR: %[[VAL_200:.*]] = load <512 x i1>, ptr %[[VAL_196]], align 64524! LLVMIR: %[[VAL_201:.*]] = bitcast <2 x double> %[[VAL_199]] to <16 x i8>525! LLVMIR: %[[VAL_202:.*]] = call <512 x i1> @llvm.ppc.mma.xvf64gerpn(<512 x i1> %[[VAL_200]], <256 x i1> %[[VAL_198]], <16 x i8> %[[VAL_201]])526! LLVMIR: store <512 x i1> %[[VAL_202]], ptr %[[VAL_196]], align 64527 528 subroutine test_xvf64gerpp_u1()529 use, intrinsic :: mma530 implicit none531 vector(unsigned(1)) vu10532 __vector_quad :: cq533 __vector_pair :: cp534 call mma_xvf64gerpp(cq, cp, vu10)535 end subroutine test_xvf64gerpp_u1536 537!CHECK-LABEL: @test_xvf64gerpp_u1_538! LLVMIR: %[[VAL_203:.*]] = alloca <16 x i8>, i64 1, align 16539! LLVMIR: %[[VAL_204:.*]] = alloca <512 x i1>, i64 1, align 64540! LLVMIR: %[[VAL_205:.*]] = alloca <256 x i1>, i64 1, align 32541! LLVMIR: %[[VAL_206:.*]] = load <256 x i1>, ptr %[[VAL_205]], align 32542! LLVMIR: %[[VAL_207:.*]] = load <16 x i8>, ptr %[[VAL_203]], align 16543! LLVMIR: %[[VAL_208:.*]] = load <512 x i1>, ptr %[[VAL_204]], align 64544! LLVMIR: %[[VAL_209:.*]] = call <512 x i1> @llvm.ppc.mma.xvf64gerpp(<512 x i1> %[[VAL_208]], <256 x i1> %[[VAL_206]], <16 x i8> %[[VAL_207]])545! LLVMIR: store <512 x i1> %[[VAL_209]], ptr %[[VAL_204]], align 64546 547 548 subroutine test_xvf64gerpp_r8()549 use, intrinsic :: mma550 implicit none551 vector(real(8)) vr80552 __vector_quad :: cq553 __vector_pair :: cp554 call mma_xvf64gerpp(cq, cp, vr80)555 end subroutine test_xvf64gerpp_r8556 557!CHECK-LABEL: @test_xvf64gerpp_r8_558! LLVMIR: %[[VAL_210:.*]] = alloca <2 x double>, i64 1, align 16559! LLVMIR: %[[VAL_211:.*]] = alloca <512 x i1>, i64 1, align 64560! LLVMIR: %[[VAL_212:.*]] = alloca <256 x i1>, i64 1, align 32561! LLVMIR: %[[VAL_213:.*]] = load <256 x i1>, ptr %[[VAL_212]], align 32562! LLVMIR: %[[VAL_214:.*]] = load <2 x double>, ptr %[[VAL_210]], align 16563! LLVMIR: %[[VAL_215:.*]] = load <512 x i1>, ptr %[[VAL_211]], align 64564! LLVMIR: %[[VAL_216:.*]] = bitcast <2 x double> %[[VAL_214]] to <16 x i8>565! LLVMIR: %[[VAL_217:.*]] = call <512 x i1> @llvm.ppc.mma.xvf64gerpp(<512 x i1> %[[VAL_215]], <256 x i1> %[[VAL_213]], <16 x i8> %[[VAL_216]])566! LLVMIR: store <512 x i1> %[[VAL_217]], ptr %[[VAL_211]], align 64567 568 subroutine test_xvi16ger2_u1()569 use, intrinsic :: mma570 implicit none571 vector(unsigned(1)) vu10, vu11572 __vector_quad :: cq573 call mma_xvi16ger2(cq, vu10, vu11)574 end subroutine test_xvi16ger2_u1575 576!CHECK-LABEL: @test_xvi16ger2_u1_577! LLVMIR: %[[VAL_218:.*]] = alloca <16 x i8>, i64 1, align 16578! LLVMIR: %[[VAL_219:.*]] = alloca <16 x i8>, i64 1, align 16579! LLVMIR: %[[VAL_220:.*]] = alloca <512 x i1>, i64 1, align 64580! LLVMIR: %[[VAL_221:.*]] = load <16 x i8>, ptr %[[VAL_219]], align 16581! LLVMIR: %[[VAL_222:.*]] = load <16 x i8>, ptr %[[VAL_218]], align 16582! LLVMIR: %[[VAL_223:.*]] = call <512 x i1> @llvm.ppc.mma.xvi16ger2(<16 x i8> %[[VAL_221]], <16 x i8> %[[VAL_222]])583! LLVMIR: store <512 x i1> %[[VAL_223]], ptr %[[VAL_220]], align 64584 585 subroutine test_xvi16ger2_i2()586 use, intrinsic :: mma587 implicit none588 vector(integer(2)) vi20, vi21589 __vector_quad :: cq590 call mma_xvi16ger2(cq, vi20, vi21)591 end subroutine test_xvi16ger2_i2592 593!CHECK-LABEL: @test_xvi16ger2_i2_594! LLVMIR: %[[VAL_224:.*]] = alloca <8 x i16>, i64 1, align 16595! LLVMIR: %[[VAL_225:.*]] = alloca <8 x i16>, i64 1, align 16596! LLVMIR: %[[VAL_226:.*]] = alloca <512 x i1>, i64 1, align 64597! LLVMIR: %[[VAL_227:.*]] = load <8 x i16>, ptr %[[VAL_225]], align 16598! LLVMIR: %[[VAL_228:.*]] = load <8 x i16>, ptr %[[VAL_224]], align 16599! LLVMIR: %[[VAL_229:.*]] = bitcast <8 x i16> %[[VAL_227]] to <16 x i8>600! LLVMIR: %[[VAL_230:.*]] = bitcast <8 x i16> %[[VAL_228]] to <16 x i8>601! LLVMIR: %[[VAL_231:.*]] = call <512 x i1> @llvm.ppc.mma.xvi16ger2(<16 x i8> %[[VAL_229]], <16 x i8> %[[VAL_230]])602! LLVMIR: store <512 x i1> %[[VAL_231]], ptr %[[VAL_226]], align 64603 604 subroutine test_xvi16ger2pp_u1()605 use, intrinsic :: mma606 implicit none607 vector(unsigned(1)) vu10, vu11608 __vector_quad :: cq609 call mma_xvi16ger2pp(cq, vu10, vu11)610 end subroutine test_xvi16ger2pp_u1611 612!CHECK-LABEL: @test_xvi16ger2pp_u1_613! LLVMIR: %[[VAL_232:.*]] = alloca <16 x i8>, i64 1, align 16614! LLVMIR: %[[VAL_233:.*]] = alloca <16 x i8>, i64 1, align 16615! LLVMIR: %[[VAL_234:.*]] = alloca <512 x i1>, i64 1, align 64616! LLVMIR: %[[VAL_235:.*]] = load <16 x i8>, ptr %[[VAL_233]], align 16617! LLVMIR: %[[VAL_236:.*]] = load <16 x i8>, ptr %[[VAL_232]], align 16618! LLVMIR: %[[VAL_237:.*]] = load <512 x i1>, ptr %[[VAL_234]], align 64619! LLVMIR: %[[VAL_238:.*]] = call <512 x i1> @llvm.ppc.mma.xvi16ger2pp(<512 x i1> %[[VAL_237]], <16 x i8> %[[VAL_235]], <16 x i8> %[[VAL_236]])620! LLVMIR: store <512 x i1> %[[VAL_238]], ptr %[[VAL_234]], align 64621 622 subroutine test_xvi16ger2pp_i2()623 use, intrinsic :: mma624 implicit none625 vector(integer(2)) vi20, vi21626 __vector_quad :: cq627 call mma_xvi16ger2pp(cq, vi20, vi21)628 end subroutine test_xvi16ger2pp_i2629 630!CHECK-LABEL: @test_xvi16ger2pp_i2_631! LLVMIR: %[[VAL_239:.*]] = alloca <8 x i16>, i64 1, align 16632! LLVMIR: %[[VAL_240:.*]] = alloca <8 x i16>, i64 1, align 16633! LLVMIR: %[[VAL_241:.*]] = alloca <512 x i1>, i64 1, align 64634! LLVMIR: %[[VAL_242:.*]] = load <8 x i16>, ptr %[[VAL_240]], align 16635! LLVMIR: %[[VAL_243:.*]] = load <8 x i16>, ptr %[[VAL_239]], align 16636! LLVMIR: %[[VAL_244:.*]] = load <512 x i1>, ptr %[[VAL_241]], align 64637! LLVMIR: %[[VAL_245:.*]] = bitcast <8 x i16> %[[VAL_242]] to <16 x i8>638! LLVMIR: %[[VAL_246:.*]] = bitcast <8 x i16> %[[VAL_243]] to <16 x i8>639! LLVMIR: %[[VAL_247:.*]] = call <512 x i1> @llvm.ppc.mma.xvi16ger2pp(<512 x i1> %[[VAL_244]], <16 x i8> %[[VAL_245]], <16 x i8> %[[VAL_246]])640! LLVMIR: store <512 x i1> %[[VAL_247]], ptr %[[VAL_241]], align 64641 642 subroutine test_xvi16ger2s_u1()643 use, intrinsic :: mma644 implicit none645 vector(unsigned(1)) vu10, vu11646 __vector_quad :: cq647 call mma_xvi16ger2s(cq, vu10, vu11)648 end subroutine test_xvi16ger2s_u1649 650!CHECK-LABEL: @test_xvi16ger2s_u1_651! LLVMIR: %[[VAL_248:.*]] = alloca <16 x i8>, i64 1, align 16652! LLVMIR: %[[VAL_249:.*]] = alloca <16 x i8>, i64 1, align 16653! LLVMIR: %[[VAL_250:.*]] = alloca <512 x i1>, i64 1, align 64654! LLVMIR: %[[VAL_251:.*]] = load <16 x i8>, ptr %[[VAL_249]], align 16655! LLVMIR: %[[VAL_252:.*]] = load <16 x i8>, ptr %[[VAL_248]], align 16656! LLVMIR: %[[VAL_253:.*]] = call <512 x i1> @llvm.ppc.mma.xvi16ger2s(<16 x i8> %[[VAL_251]], <16 x i8> %[[VAL_252]])657! LLVMIR: store <512 x i1> %[[VAL_253]], ptr %[[VAL_250]], align 64658 659 subroutine test_xvi16ger2s_i2()660 use, intrinsic :: mma661 implicit none662 vector(integer(2)) vi20, vi21663 __vector_quad :: cq664 call mma_xvi16ger2s(cq, vi20, vi21)665 end subroutine test_xvi16ger2s_i2666 667!CHECK-LABEL: @test_xvi16ger2s_i2_668! LLVMIR: %[[VAL_254:.*]] = alloca <8 x i16>, i64 1, align 16669! LLVMIR: %[[VAL_255:.*]] = alloca <8 x i16>, i64 1, align 16670! LLVMIR: %[[VAL_256:.*]] = alloca <512 x i1>, i64 1, align 64671! LLVMIR: %[[VAL_257:.*]] = load <8 x i16>, ptr %[[VAL_255]], align 16672! LLVMIR: %[[VAL_258:.*]] = load <8 x i16>, ptr %[[VAL_254]], align 16673! LLVMIR: %[[VAL_259:.*]] = bitcast <8 x i16> %[[VAL_257]] to <16 x i8>674! LLVMIR: %[[VAL_260:.*]] = bitcast <8 x i16> %[[VAL_258]] to <16 x i8>675! LLVMIR: %[[VAL_261:.*]] = call <512 x i1> @llvm.ppc.mma.xvi16ger2s(<16 x i8> %[[VAL_259]], <16 x i8> %[[VAL_260]])676! LLVMIR: store <512 x i1> %[[VAL_261]], ptr %[[VAL_256]], align 64677 678 subroutine test_xvi16ger2spp_u1()679 use, intrinsic :: mma680 implicit none681 vector(unsigned(1)) vu10, vu11682 __vector_quad :: cq683 call mma_xvi16ger2spp(cq, vu10, vu11)684 end subroutine test_xvi16ger2spp_u1685 686!CHECK-LABEL: @test_xvi16ger2spp_u1_687! LLVMIR: %[[VAL_262:.*]] = alloca <16 x i8>, i64 1, align 16688! LLVMIR: %[[VAL_263:.*]] = alloca <16 x i8>, i64 1, align 16689! LLVMIR: %[[VAL_264:.*]] = alloca <512 x i1>, i64 1, align 64690! LLVMIR: %[[VAL_265:.*]] = load <16 x i8>, ptr %[[VAL_263]], align 16691! LLVMIR: %[[VAL_266:.*]] = load <16 x i8>, ptr %[[VAL_262]], align 16692! LLVMIR: %[[VAL_267:.*]] = load <512 x i1>, ptr %[[VAL_264]], align 64693! LLVMIR: %[[VAL_268:.*]] = call <512 x i1> @llvm.ppc.mma.xvi16ger2spp(<512 x i1> %[[VAL_267]], <16 x i8> %[[VAL_265]], <16 x i8> %[[VAL_266]])694! LLVMIR: store <512 x i1> %[[VAL_268]], ptr %[[VAL_264]], align 64695 696 subroutine test_xvi16ger2spp_i2()697 use, intrinsic :: mma698 implicit none699 vector(integer(2)) vi20, vi21700 __vector_quad :: cq701 call mma_xvi16ger2spp(cq, vi20, vi21)702 end subroutine test_xvi16ger2spp_i2703 704!CHECK-LABEL: @test_xvi16ger2spp_i2_705! LLVMIR: %[[VAL_269:.*]] = alloca <8 x i16>, i64 1, align 16706! LLVMIR: %[[VAL_270:.*]] = alloca <8 x i16>, i64 1, align 16707! LLVMIR: %[[VAL_271:.*]] = alloca <512 x i1>, i64 1, align 64708! LLVMIR: %[[VAL_272:.*]] = load <8 x i16>, ptr %[[VAL_270]], align 16709! LLVMIR: %[[VAL_273:.*]] = load <8 x i16>, ptr %[[VAL_269]], align 16710! LLVMIR: %[[VAL_274:.*]] = load <512 x i1>, ptr %[[VAL_271]], align 64711! LLVMIR: %[[VAL_275:.*]] = bitcast <8 x i16> %[[VAL_272]] to <16 x i8>712! LLVMIR: %[[VAL_276:.*]] = bitcast <8 x i16> %[[VAL_273]] to <16 x i8>713! LLVMIR: %[[VAL_277:.*]] = call <512 x i1> @llvm.ppc.mma.xvi16ger2spp(<512 x i1> %[[VAL_274]], <16 x i8> %[[VAL_275]], <16 x i8> %[[VAL_276]])714! LLVMIR: store <512 x i1> %[[VAL_277]], ptr %[[VAL_271]], align 64715 716 subroutine test_xvi4ger8()717 use, intrinsic :: mma718 implicit none719 vector(unsigned(1)) vu10, vu11720 __vector_quad :: cq721 call mma_xvi4ger8(cq, vu10, vu11)722 end subroutine test_xvi4ger8723 724!CHECK-LABEL: @test_xvi4ger8_725! LLVMIR: %[[VAL_278:.*]] = alloca <16 x i8>, i64 1, align 16726! LLVMIR: %[[VAL_279:.*]] = alloca <16 x i8>, i64 1, align 16727! LLVMIR: %[[VAL_280:.*]] = alloca <512 x i1>, i64 1, align 64728! LLVMIR: %[[VAL_281:.*]] = load <16 x i8>, ptr %[[VAL_279]], align 16729! LLVMIR: %[[VAL_282:.*]] = load <16 x i8>, ptr %[[VAL_278]], align 16730! LLVMIR: %[[VAL_283:.*]] = call <512 x i1> @llvm.ppc.mma.xvi4ger8(<16 x i8> %[[VAL_281]], <16 x i8> %[[VAL_282]])731! LLVMIR: store <512 x i1> %[[VAL_283]], ptr %[[VAL_280]], align 64732 733 subroutine test_xvi4ger8pp()734 use, intrinsic :: mma735 implicit none736 vector(unsigned(1)) vu10, vu11737 __vector_quad :: cq738 call mma_xvi4ger8pp(cq, vu10, vu11)739 end subroutine test_xvi4ger8pp740 741!CHECK-LABEL: @test_xvi4ger8pp_742! LLVMIR: %[[VAL_284:.*]] = alloca <16 x i8>, i64 1, align 16743! LLVMIR: %[[VAL_285:.*]] = alloca <16 x i8>, i64 1, align 16744! LLVMIR: %[[VAL_286:.*]] = alloca <512 x i1>, i64 1, align 64745! LLVMIR: %[[VAL_287:.*]] = load <16 x i8>, ptr %[[VAL_285]], align 16746! LLVMIR: %[[VAL_288:.*]] = load <16 x i8>, ptr %[[VAL_284]], align 16747! LLVMIR: %[[VAL_289:.*]] = load <512 x i1>, ptr %[[VAL_286]], align 64748! LLVMIR: %[[VAL_290:.*]] = call <512 x i1> @llvm.ppc.mma.xvi4ger8pp(<512 x i1> %[[VAL_289]], <16 x i8> %[[VAL_287]], <16 x i8> %[[VAL_288]])749! LLVMIR: store <512 x i1> %[[VAL_290]], ptr %[[VAL_286]], align 64750 751 subroutine test_xvi8ger4_u1()752 use, intrinsic :: mma753 implicit none754 vector(unsigned(1)) vu10, vu11755 __vector_quad :: cq756 call mma_xvi8ger4(cq, vu10, vu11)757 end subroutine test_xvi8ger4_u1758 759!CHECK-LABEL: @test_xvi8ger4_u1_760! LLVMIR: %[[VAL_291:.*]] = alloca <16 x i8>, i64 1, align 16761! LLVMIR: %[[VAL_292:.*]] = alloca <16 x i8>, i64 1, align 16762! LLVMIR: %[[VAL_293:.*]] = alloca <512 x i1>, i64 1, align 64763! LLVMIR: %[[VAL_294:.*]] = load <16 x i8>, ptr %[[VAL_292]], align 16764! LLVMIR: %[[VAL_295:.*]] = load <16 x i8>, ptr %[[VAL_291]], align 16765! LLVMIR: %[[VAL_296:.*]] = call <512 x i1> @llvm.ppc.mma.xvi8ger4(<16 x i8> %[[VAL_294]], <16 x i8> %[[VAL_295]])766! LLVMIR: store <512 x i1> %[[VAL_296]], ptr %[[VAL_293]], align 64767 768 769 subroutine test_xvi8ger4_i1()770 use, intrinsic :: mma771 implicit none772 vector(integer(1)) vi10, vi11773 __vector_quad :: cq774 call mma_xvi8ger4(cq, vi10, vi11)775 end subroutine test_xvi8ger4_i1776 777!CHECK-LABEL: @test_xvi8ger4_i1_778! LLVMIR: %[[VAL_297:.*]] = alloca <16 x i8>, i64 1, align 16779! LLVMIR: %[[VAL_298:.*]] = alloca <16 x i8>, i64 1, align 16780! LLVMIR: %[[VAL_299:.*]] = alloca <512 x i1>, i64 1, align 64781! LLVMIR: %[[VAL_300:.*]] = load <16 x i8>, ptr %[[VAL_298]], align 16782! LLVMIR: %[[VAL_301:.*]] = load <16 x i8>, ptr %[[VAL_297]], align 16783! LLVMIR: %[[VAL_302:.*]] = call <512 x i1> @llvm.ppc.mma.xvi8ger4(<16 x i8> %[[VAL_300]], <16 x i8> %[[VAL_301]])784! LLVMIR: store <512 x i1> %[[VAL_302]], ptr %[[VAL_299]], align 64785 786 subroutine test_xvi8ger4pp_u1()787 use, intrinsic :: mma788 implicit none789 vector(unsigned(1)) vu10, vu11790 __vector_quad :: cq791 call mma_xvi8ger4pp(cq, vu10, vu11)792 end subroutine test_xvi8ger4pp_u1793 794!CHECK-LABEL: @test_xvi8ger4pp_u1_795! LLVMIR: %[[VAL_303:.*]] = alloca <16 x i8>, i64 1, align 16796! LLVMIR: %[[VAL_304:.*]] = alloca <16 x i8>, i64 1, align 16797! LLVMIR: %[[VAL_305:.*]] = alloca <512 x i1>, i64 1, align 64798! LLVMIR: %[[VAL_306:.*]] = load <16 x i8>, ptr %[[VAL_304]], align 16799! LLVMIR: %[[VAL_307:.*]] = load <16 x i8>, ptr %[[VAL_303]], align 16800! LLVMIR: %[[VAL_308:.*]] = load <512 x i1>, ptr %[[VAL_305]], align 64801! LLVMIR: %[[VAL_309:.*]] = call <512 x i1> @llvm.ppc.mma.xvi8ger4pp(<512 x i1> %[[VAL_308]], <16 x i8> %[[VAL_306]], <16 x i8> %[[VAL_307]])802! LLVMIR: store <512 x i1> %[[VAL_309]], ptr %[[VAL_305]], align 64803 804 subroutine test_xvi8ger4pp_i1()805 use, intrinsic :: mma806 implicit none807 vector(integer(1)) vi10, vi11808 __vector_quad :: cq809 call mma_xvi8ger4pp(cq, vi10, vi11)810 end subroutine test_xvi8ger4pp_i1811 812!CHECK-LABEL: @test_xvi8ger4pp_i1_813! LLVMIR: %[[VAL_310:.*]] = alloca <16 x i8>, i64 1, align 16814! LLVMIR: %[[VAL_311:.*]] = alloca <16 x i8>, i64 1, align 16815! LLVMIR: %[[VAL_312:.*]] = alloca <512 x i1>, i64 1, align 64816! LLVMIR: %[[VAL_313:.*]] = load <16 x i8>, ptr %[[VAL_311]], align 16817! LLVMIR: %[[VAL_314:.*]] = load <16 x i8>, ptr %[[VAL_310]], align 16818! LLVMIR: %[[VAL_315:.*]] = load <512 x i1>, ptr %[[VAL_312]], align 64819! LLVMIR: %[[VAL_316:.*]] = call <512 x i1> @llvm.ppc.mma.xvi8ger4pp(<512 x i1> %[[VAL_315]], <16 x i8> %[[VAL_313]], <16 x i8> %[[VAL_314]])820! LLVMIR: store <512 x i1> %[[VAL_316]], ptr %[[VAL_312]], align 64821 822 subroutine test_xvi8ger4spp_u1()823 use, intrinsic :: mma824 implicit none825 vector(unsigned(1)) vu10, vu11826 __vector_quad :: cq827 call mma_xvi8ger4spp(cq, vu10, vu11)828 end subroutine test_xvi8ger4spp_u1829 830!CHECK-LABEL: @test_xvi8ger4spp_u1_831! LLVMIR: %[[VAL_317:.*]] = alloca <16 x i8>, i64 1, align 16832! LLVMIR: %[[VAL_318:.*]] = alloca <16 x i8>, i64 1, align 16833! LLVMIR: %[[VAL_319:.*]] = alloca <512 x i1>, i64 1, align 64834! LLVMIR: %[[VAL_320:.*]] = load <16 x i8>, ptr %[[VAL_318]], align 16835! LLVMIR: %[[VAL_321:.*]] = load <16 x i8>, ptr %[[VAL_317]], align 16836! LLVMIR: %[[VAL_322:.*]] = load <512 x i1>, ptr %[[VAL_319]], align 64837! LLVMIR: %[[VAL_323:.*]] = call <512 x i1> @llvm.ppc.mma.xvi8ger4spp(<512 x i1> %[[VAL_322]], <16 x i8> %[[VAL_320]], <16 x i8> %[[VAL_321]])838! LLVMIR: store <512 x i1> %[[VAL_323]], ptr %[[VAL_319]], align 64839 840 subroutine test_xvi8ger4spp_i1()841 use, intrinsic :: mma842 implicit none843 vector(integer(1)) vi10, vi11844 __vector_quad :: cq845 call mma_xvi8ger4spp(cq, vi10, vi11)846 end subroutine test_xvi8ger4spp_i1847 848!CHECK-LABEL: @test_xvi8ger4spp_i1_849! LLVMIR: %[[VAL_324:.*]] = alloca <16 x i8>, i64 1, align 16850! LLVMIR: %[[VAL_325:.*]] = alloca <16 x i8>, i64 1, align 16851! LLVMIR: %[[VAL_326:.*]] = alloca <512 x i1>, i64 1, align 64852! LLVMIR: %[[VAL_327:.*]] = load <16 x i8>, ptr %[[VAL_325]], align 16853! LLVMIR: %[[VAL_328:.*]] = load <16 x i8>, ptr %[[VAL_324]], align 16854! LLVMIR: %[[VAL_329:.*]] = load <512 x i1>, ptr %[[VAL_326]], align 64855! LLVMIR: %[[VAL_330:.*]] = call <512 x i1> @llvm.ppc.mma.xvi8ger4spp(<512 x i1> %[[VAL_329]], <16 x i8> %[[VAL_327]], <16 x i8> %[[VAL_328]])856! LLVMIR: store <512 x i1> %[[VAL_330]], ptr %[[VAL_326]], align 64857