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1! RUN: %flang_fc1 -flang-experimental-hlfir -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefixes="LLVMIR","LLVMIR-LE" %s2! RUN: %flang_fc1 -flang-experimental-hlfir -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefixes="LLVMIR","LLVMIR-BE" %s3! REQUIRES: target=powerpc{{.*}}4 5! CHECK-LABEL: vec_perm_test_i16subroutine vec_perm_test_i1(arg1, arg2, arg3)7 vector(integer(1)) :: arg1, arg2, r8 vector(unsigned(1)) :: arg39 r = vec_perm(arg1, arg2, arg3)10 11! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 1612! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 1613! LLVMIR: %[[arg3:.*]] = load <16 x i8>, ptr %{{.*}}, align 1614! LLVMIR: %[[barg1:.*]] = bitcast <16 x i8> %[[arg1]] to <4 x i32>15! LLVMIR: %[[barg2:.*]] = bitcast <16 x i8> %[[arg2]] to <4 x i32>16! LLVMIR-LE: %[[xor:.*]] = xor <16 x i8> %[[arg3]], splat (i8 -1)17! LLVMIR-LE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg2]], <4 x i32> %[[barg1]], <16 x i8> %[[xor]])18! LLVMIR-BE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg1]], <4 x i32> %[[barg2]], <16 x i8> %[[arg3]])19! LLVMIR: %[[bcall:.*]] = bitcast <4 x i32> %[[call]] to <16 x i8>20! LLVMIR: store <16 x i8> %[[bcall]], ptr %{{.*}}, align 1621end subroutine vec_perm_test_i122 23! CHECK-LABEL: vec_perm_test_i224subroutine vec_perm_test_i2(arg1, arg2, arg3)25 vector(integer(2)) :: arg1, arg2, r26 vector(unsigned(1)) :: arg327 r = vec_perm(arg1, arg2, arg3)28 29! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 1630! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 1631! LLVMIR: %[[arg3:.*]] = load <16 x i8>, ptr %{{.*}}, align 1632! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <4 x i32>33! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <4 x i32>34! LLVMIR-LE: %[[xor:.*]] = xor <16 x i8> %[[arg3]], splat (i8 -1)35! LLVMIR-LE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg2]], <4 x i32> %[[barg1]], <16 x i8> %[[xor]])36! LLVMIR-BE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg1]], <4 x i32> %[[barg2]], <16 x i8> %[[arg3]])37! LLVMIR: %[[bcall:.*]] = bitcast <4 x i32> %[[call]] to <8 x i16>38! LLVMIR: store <8 x i16> %[[bcall]], ptr %{{.*}}, align 1639end subroutine vec_perm_test_i240 41! CHECK-LABEL: vec_perm_test_i442subroutine vec_perm_test_i4(arg1, arg2, arg3)43 vector(integer(4)) :: arg1, arg2, r44 vector(unsigned(1)) :: arg345 r = vec_perm(arg1, arg2, arg3)46 47! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 1648! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 1649! LLVMIR: %[[arg3:.*]] = load <16 x i8>, ptr %{{.*}}, align 1650! LLVMIR-LE: %[[xor:.*]] = xor <16 x i8> %[[arg3]], splat (i8 -1)51! LLVMIR-LE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[arg2]], <4 x i32> %[[arg1]], <16 x i8> %[[xor]])52! LLVMIR-BE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[arg1]], <4 x i32> %[[arg2]], <16 x i8> %[[arg3]])53! LLVMIR: store <4 x i32> %[[call]], ptr %{{.*}}, align 1654end subroutine vec_perm_test_i455 56! CHECK-LABEL: vec_perm_test_i857subroutine vec_perm_test_i8(arg1, arg2, arg3)58 vector(integer(8)) :: arg1, arg2, r59 vector(unsigned(1)) :: arg360 r = vec_perm(arg1, arg2, arg3)61 62! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 1663! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 1664! LLVMIR: %[[arg3:.*]] = load <16 x i8>, ptr %{{.*}}, align 1665! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <4 x i32>66! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <4 x i32>67! LLVMIR-LE: %[[xor:.*]] = xor <16 x i8> %[[arg3]], splat (i8 -1)68! LLVMIR-LE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg2]], <4 x i32> %[[barg1]], <16 x i8> %[[xor]])69! LLVMIR-BE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg1]], <4 x i32> %[[barg2]], <16 x i8> %[[arg3]])70! LLVMIR: %[[bcall:.*]] = bitcast <4 x i32> %[[call]] to <2 x i64>71! LLVMIR: store <2 x i64> %[[bcall]], ptr %{{.*}}, align 1672end subroutine vec_perm_test_i873 74! CHECK-LABEL: vec_perm_test_u175subroutine vec_perm_test_u1(arg1, arg2, arg3)76 vector(unsigned(1)) :: arg1, arg2, r77 vector(unsigned(1)) :: arg378 r = vec_perm(arg1, arg2, arg3)79 80! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 1681! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 1682! LLVMIR: %[[arg3:.*]] = load <16 x i8>, ptr %{{.*}}, align 1683! LLVMIR: %[[barg1:.*]] = bitcast <16 x i8> %[[arg1]] to <4 x i32>84! LLVMIR: %[[barg2:.*]] = bitcast <16 x i8> %[[arg2]] to <4 x i32>85! LLVMIR-LE: %[[xor:.*]] = xor <16 x i8> %[[arg3]], splat (i8 -1)86! LLVMIR-LE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg2]], <4 x i32> %[[barg1]], <16 x i8> %[[xor]])87! LLVMIR-BE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg1]], <4 x i32> %[[barg2]], <16 x i8> %[[arg3]])88! LLVMIR: %[[bcall:.*]] = bitcast <4 x i32> %[[call]] to <16 x i8>89! LLVMIR: store <16 x i8> %[[bcall]], ptr %{{.*}}, align 1690end subroutine vec_perm_test_u191 92! CHECK-LABEL: vec_perm_test_u293subroutine vec_perm_test_u2(arg1, arg2, arg3)94 vector(unsigned(2)) :: arg1, arg2, r95 vector(unsigned(1)) :: arg396 r = vec_perm(arg1, arg2, arg3)97 98! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 1699! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16100! LLVMIR: %[[arg3:.*]] = load <16 x i8>, ptr %{{.*}}, align 16101! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <4 x i32>102! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <4 x i32>103! LLVMIR-LE: %[[xor:.*]] = xor <16 x i8> %[[arg3]], splat (i8 -1)104! LLVMIR-LE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg2]], <4 x i32> %[[barg1]], <16 x i8> %[[xor]])105! LLVMIR-BE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg1]], <4 x i32> %[[barg2]], <16 x i8> %[[arg3]])106! LLVMIR: %[[bcall:.*]] = bitcast <4 x i32> %[[call]] to <8 x i16>107! LLVMIR: store <8 x i16> %[[bcall]], ptr %{{.*}}, align 16108end subroutine vec_perm_test_u2109 110! CHECK-LABEL: vec_perm_test_u4111subroutine vec_perm_test_u4(arg1, arg2, arg3)112 vector(unsigned(4)) :: arg1, arg2, r113 vector(unsigned(1)) :: arg3114 r = vec_perm(arg1, arg2, arg3)115 116! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16117! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16118! LLVMIR: %[[arg3:.*]] = load <16 x i8>, ptr %{{.*}}, align 16119! LLVMIR-LE: %[[xor:.*]] = xor <16 x i8> %[[arg3]], splat (i8 -1)120! LLVMIR-LE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[arg2]], <4 x i32> %[[arg1]], <16 x i8> %[[xor]])121! LLVMIR-BE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[arg1]], <4 x i32> %[[arg2]], <16 x i8> %[[arg3]])122! LLVMIR: store <4 x i32> %[[call]], ptr %{{.*}}, align 16123end subroutine vec_perm_test_u4124 125! CHECK-LABEL: vec_perm_test_u8126subroutine vec_perm_test_u8(arg1, arg2, arg3)127 vector(unsigned(8)) :: arg1, arg2, r128 vector(unsigned(1)) :: arg3129 r = vec_perm(arg1, arg2, arg3)130 131! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16132! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16133! LLVMIR: %[[arg3:.*]] = load <16 x i8>, ptr %{{.*}}, align 16134! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <4 x i32>135! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <4 x i32>136! LLVMIR-LE: %[[xor:.*]] = xor <16 x i8> %[[arg3]], splat (i8 -1)137! LLVMIR-LE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg2]], <4 x i32> %[[barg1]], <16 x i8> %[[xor]])138! LLVMIR-BE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg1]], <4 x i32> %[[barg2]], <16 x i8> %[[arg3]])139! LLVMIR: %[[bcall:.*]] = bitcast <4 x i32> %[[call]] to <2 x i64>140! LLVMIR: store <2 x i64> %[[bcall]], ptr %{{.*}}, align 16141end subroutine vec_perm_test_u8142 143! CHECK-LABEL: vec_perm_test_r4144subroutine vec_perm_test_r4(arg1, arg2, arg3)145 vector(real(4)) :: arg1, arg2, r146 vector(unsigned(1)) :: arg3147 r = vec_perm(arg1, arg2, arg3)148 149! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16150! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16151! LLVMIR: %[[arg3:.*]] = load <16 x i8>, ptr %{{.*}}, align 16152! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <4 x i32>153! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <4 x i32>154! LLVMIR-LE: %[[xor:.*]] = xor <16 x i8> %[[arg3]], splat (i8 -1)155! LLVMIR-LE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg2]], <4 x i32> %[[barg1]], <16 x i8> %[[xor]])156! LLVMIR-BE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg1]], <4 x i32> %[[barg2]], <16 x i8> %[[arg3]])157! LLVMIR: %[[bcall:.*]] = bitcast <4 x i32> %[[call]] to <4 x float>158! LLVMIR: store <4 x float> %[[bcall]], ptr %{{.*}}, align 16159end subroutine vec_perm_test_r4160 161! CHECK-LABEL: vec_perm_test_r8162subroutine vec_perm_test_r8(arg1, arg2, arg3)163 vector(real(8)) :: arg1, arg2, r164 vector(unsigned(1)) :: arg3165 r = vec_perm(arg1, arg2, arg3)166 167! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16168! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16169! LLVMIR: %[[arg3:.*]] = load <16 x i8>, ptr %{{.*}}, align 16170! LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <4 x i32>171! LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <4 x i32>172! LLVMIR-LE: %[[xor:.*]] = xor <16 x i8> %[[arg3]], splat (i8 -1)173! LLVMIR-LE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg2]], <4 x i32> %[[barg1]], <16 x i8> %[[xor]])174! LLVMIR-BE: %[[call:.*]] = call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> %[[barg1]], <4 x i32> %[[barg2]], <16 x i8> %[[arg3]])175! LLVMIR: %[[bcall:.*]] = bitcast <4 x i32> %[[call]] to <2 x double>176! LLVMIR: store <2 x double> %[[bcall]], ptr %{{.*}}, align 16177end subroutine vec_perm_test_r8178 179! CHECK-LABEL: vec_permi_test_i8i1180subroutine vec_permi_test_i8i1(arg1, arg2, arg3)181 vector(integer(8)) :: arg1, arg2, r182 r = vec_permi(arg1, arg2, 3_1)183 184! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16185! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16186! LLVMIR: %[[shuf:.*]] = shufflevector <2 x i64> %[[arg1]], <2 x i64> %[[arg2]], <2 x i32> <i32 1, i32 3>187! LLVMIR: store <2 x i64> %[[shuf]], ptr %{{.*}}, align 16188end subroutine vec_permi_test_i8i1189 190! CHECK-LABEL: vec_permi_test_i8i2191subroutine vec_permi_test_i8i2(arg1, arg2, arg3)192 vector(integer(8)) :: arg1, arg2, r193 r = vec_permi(arg1, arg2, 2_2)194 195! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16196! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16197! LLVMIR: %[[shuf:.*]] = shufflevector <2 x i64> %[[arg1]], <2 x i64> %[[arg2]], <2 x i32> <i32 1, i32 2>198! LLVMIR: store <2 x i64> %[[shuf]], ptr %{{.*}}, align 16199end subroutine vec_permi_test_i8i2200 201! CHECK-LABEL: vec_permi_test_i8i4202subroutine vec_permi_test_i8i4(arg1, arg2, arg3)203 vector(integer(8)) :: arg1, arg2, r204 r = vec_permi(arg1, arg2, 1_4)205 206! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16207! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16208! LLVMIR: %[[shuf:.*]] = shufflevector <2 x i64> %[[arg1]], <2 x i64> %[[arg2]], <2 x i32> <i32 0, i32 3>209! LLVMIR: store <2 x i64> %[[shuf]], ptr %{{.*}}, align 16210end subroutine vec_permi_test_i8i4211 212! CHECK-LABEL: vec_permi_test_i8i8213subroutine vec_permi_test_i8i8(arg1, arg2, arg3)214 vector(integer(8)) :: arg1, arg2, r215 r = vec_permi(arg1, arg2, 0_8)216 217! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16218! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16219! LLVMIR: %[[shuf:.*]] = shufflevector <2 x i64> %[[arg1]], <2 x i64> %[[arg2]], <2 x i32> <i32 0, i32 2>220! LLVMIR: store <2 x i64> %[[shuf]], ptr %{{.*}}, align 16221end subroutine vec_permi_test_i8i8222 223! CHECK-LABEL: vec_permi_test_u8i1224subroutine vec_permi_test_u8i1(arg1, arg2, arg3)225 vector(unsigned(8)) :: arg1, arg2, r226 r = vec_permi(arg1, arg2, 3_1)227 228! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16229! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16230! LLVMIR: %[[shuf:.*]] = shufflevector <2 x i64> %[[arg1]], <2 x i64> %[[arg2]], <2 x i32> <i32 1, i32 3>231! LLVMIR: store <2 x i64> %[[shuf]], ptr %{{.*}}, align 16232end subroutine vec_permi_test_u8i1233 234! CHECK-LABEL: vec_permi_test_u8i2235subroutine vec_permi_test_u8i2(arg1, arg2, arg3)236 vector(unsigned(8)) :: arg1, arg2, r237 r = vec_permi(arg1, arg2, 2_2)238 239! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16240! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16241! LLVMIR: %[[shuf:.*]] = shufflevector <2 x i64> %[[arg1]], <2 x i64> %[[arg2]], <2 x i32> <i32 1, i32 2>242! LLVMIR: store <2 x i64> %[[shuf]], ptr %{{.*}}, align 16243end subroutine vec_permi_test_u8i2244 245! CHECK-LABEL: vec_permi_test_u8i4246subroutine vec_permi_test_u8i4(arg1, arg2, arg3)247 vector(unsigned(8)) :: arg1, arg2, r248 r = vec_permi(arg1, arg2, 1_4)249 250! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16251! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16252! LLVMIR: %[[shuf:.*]] = shufflevector <2 x i64> %[[arg1]], <2 x i64> %[[arg2]], <2 x i32> <i32 0, i32 3>253! LLVMIR: store <2 x i64> %[[shuf]], ptr %{{.*}}, align 16254end subroutine vec_permi_test_u8i4255 256! CHECK-LABEL: vec_permi_test_u8i8257subroutine vec_permi_test_u8i8(arg1, arg2, arg3)258 vector(unsigned(8)) :: arg1, arg2, r259 r = vec_permi(arg1, arg2, 0_8)260 261! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16262! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16263! LLVMIR: %[[shuf:.*]] = shufflevector <2 x i64> %[[arg1]], <2 x i64> %[[arg2]], <2 x i32> <i32 0, i32 2>264! LLVMIR: store <2 x i64> %[[shuf]], ptr %{{.*}}, align 16265end subroutine vec_permi_test_u8i8266 267! CHECK-LABEL: vec_permi_test_r4i1268subroutine vec_permi_test_r4i1(arg1, arg2, arg3)269 vector(real(4)) :: arg1, arg2, r270 r = vec_permi(arg1, arg2, 3_1)271 272! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16273! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16274! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <2 x double>275! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <2 x double>276! LLVMIR: %[[shuf:.*]] = shufflevector <2 x double> %[[barg1]], <2 x double> %[[barg2]], <2 x i32> <i32 1, i32 3>277! LLVMIR: %[[bshuf:.*]] = bitcast <2 x double> %[[shuf]] to <4 x float>278! LLVMIR: store <4 x float> %[[bshuf]], ptr %{{.*}}, align 16279end subroutine vec_permi_test_r4i1280 281! CHECK-LABEL: vec_permi_test_r4i2282subroutine vec_permi_test_r4i2(arg1, arg2, arg3)283 vector(real(4)) :: arg1, arg2, r284 r = vec_permi(arg1, arg2, 2_2)285 286! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16287! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16288! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <2 x double>289! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <2 x double>290! LLVMIR: %[[shuf:.*]] = shufflevector <2 x double> %[[barg1]], <2 x double> %[[barg2]], <2 x i32> <i32 1, i32 2>291! LLVMIR: %[[bshuf:.*]] = bitcast <2 x double> %[[shuf]] to <4 x float>292! LLVMIR: store <4 x float> %[[bshuf]], ptr %{{.*}}, align 16293end subroutine vec_permi_test_r4i2294 295! CHECK-LABEL: vec_permi_test_r4i4296subroutine vec_permi_test_r4i4(arg1, arg2, arg3)297 vector(real(4)) :: arg1, arg2, r298 r = vec_permi(arg1, arg2, 1_4)299 300! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16301! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16302! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <2 x double>303! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <2 x double>304! LLVMIR: %[[shuf:.*]] = shufflevector <2 x double> %[[barg1]], <2 x double> %[[barg2]], <2 x i32> <i32 0, i32 3>305! LLVMIR: %[[bshuf:.*]] = bitcast <2 x double> %[[shuf]] to <4 x float>306! LLVMIR: store <4 x float> %[[bshuf]], ptr %{{.*}}, align 16307end subroutine vec_permi_test_r4i4308 309! CHECK-LABEL: vec_permi_test_r4i8310subroutine vec_permi_test_r4i8(arg1, arg2, arg3)311 vector(real(4)) :: arg1, arg2, r312 r = vec_permi(arg1, arg2, 0_8)313 314! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16315! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16316! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <2 x double>317! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <2 x double>318! LLVMIR: %[[shuf:.*]] = shufflevector <2 x double> %[[barg1]], <2 x double> %[[barg2]], <2 x i32> <i32 0, i32 2>319! LLVMIR: %[[bshuf:.*]] = bitcast <2 x double> %[[shuf]] to <4 x float>320! LLVMIR: store <4 x float> %[[bshuf]], ptr %{{.*}}, align 16321end subroutine vec_permi_test_r4i8322 323! CHECK-LABEL: vec_permi_test_r8i1324subroutine vec_permi_test_r8i1(arg1, arg2, arg3)325 vector(real(8)) :: arg1, arg2, r326 r = vec_permi(arg1, arg2, 3_1)327 328! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16329! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16330! LLVMIR: %[[shuf:.*]] = shufflevector <2 x double> %[[arg1]], <2 x double> %[[arg2]], <2 x i32> <i32 1, i32 3>331! LLVMIR: store <2 x double> %[[shuf]], ptr %{{.*}}, align 16332end subroutine vec_permi_test_r8i1333 334! CHECK-LABEL: vec_permi_test_r8i2335subroutine vec_permi_test_r8i2(arg1, arg2, arg3)336 vector(real(8)) :: arg1, arg2, r337 r = vec_permi(arg1, arg2, 2_2)338 339! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16340! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16341! LLVMIR: %[[shuf:.*]] = shufflevector <2 x double> %[[arg1]], <2 x double> %[[arg2]], <2 x i32> <i32 1, i32 2>342! LLVMIR: store <2 x double> %[[shuf]], ptr %{{.*}}, align 16343end subroutine vec_permi_test_r8i2344 345! CHECK-LABEL: vec_permi_test_r8i4346subroutine vec_permi_test_r8i4(arg1, arg2, arg3)347 vector(real(8)) :: arg1, arg2, r348 r = vec_permi(arg1, arg2, 1_4)349 350! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16351! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16352! LLVMIR: %[[shuf:.*]] = shufflevector <2 x double> %[[arg1]], <2 x double> %[[arg2]], <2 x i32> <i32 0, i32 3>353! LLVMIR: store <2 x double> %[[shuf]], ptr %{{.*}}, align 16354end subroutine vec_permi_test_r8i4355 356! CHECK-LABEL: vec_permi_test_r8i8357subroutine vec_permi_test_r8i8(arg1, arg2, arg3)358 vector(real(8)) :: arg1, arg2, r359 r = vec_permi(arg1, arg2, 0_8)360 361! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 16362! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 16363! LLVMIR: %[[shuf:.*]] = shufflevector <2 x double> %[[arg1]], <2 x double> %[[arg2]], <2 x i32> <i32 0, i32 2>364! LLVMIR: store <2 x double> %[[shuf]], ptr %{{.*}}, align 16365end subroutine vec_permi_test_r8i8366