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1! RUN: %flang_fc1 -flang-experimental-hlfir -emit-llvm %s -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="LLVMIR","LLVM" %s2!3! RUN: %flang_fc1 -flang-experimental-hlfir -emit-llvm %s -triple ppc64-unknown-aix -o - | FileCheck --check-prefixes="BE-LLVMIR","LLVM" %s4! REQUIRES: target=powerpc{{.*}}5 6!----------------------7! vec_sld8!----------------------9 10! LLVM-LABEL: vec_sld_test_i1i111subroutine vec_sld_test_i1i1(arg1, arg2)12 vector(integer(1)) :: arg1, arg2, r13 r = vec_sld(arg1, arg2, 3_1)14 15! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 1616! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 1617! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>18! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 1619 20! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 1621! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 1622! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>23! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 1624end subroutine vec_sld_test_i1i125 26! LLVM-LABEL: vec_sld_test_i1i227subroutine vec_sld_test_i1i2(arg1, arg2)28 vector(integer(1)) :: arg1, arg2, r29 r = vec_sld(arg1, arg2, 3_2)30 31! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 1632! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 1633! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>34! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 1635 36! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 1637! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 1638! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>39! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 1640end subroutine vec_sld_test_i1i241 42! LLVM-LABEL: vec_sld_test_i1i443subroutine vec_sld_test_i1i4(arg1, arg2)44 vector(integer(1)) :: arg1, arg2, r45 r = vec_sld(arg1, arg2, 3_4)46 47! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 1648! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 1649! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>50! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 1651 52! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 1653! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 1654! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>55! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 1656end subroutine vec_sld_test_i1i457 58! LLVM-LABEL: vec_sld_test_i1i859subroutine vec_sld_test_i1i8(arg1, arg2)60 vector(integer(1)) :: arg1, arg2, r61 r = vec_sld(arg1, arg2, 3_8)62 63! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 1664! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 1665! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>66! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 1667 68! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 1669! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 1670! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>71! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 1672end subroutine vec_sld_test_i1i873 74! LLVM-LABEL: vec_sld_test_i2i175subroutine vec_sld_test_i2i1(arg1, arg2)76 vector(integer(2)) :: arg1, arg2, r77 r = vec_sld(arg1, arg2, 3_1)78 79! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 1680! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 1681! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>82! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>83! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>84! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>85! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 1686 87! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 1688! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 1689! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>90! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>91! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>92! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>93! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 1694end subroutine vec_sld_test_i2i195 96! LLVM-LABEL: vec_sld_test_i2i297subroutine vec_sld_test_i2i2(arg1, arg2)98 vector(integer(2)) :: arg1, arg2, r99 r = vec_sld(arg1, arg2, 8_2)100 101! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16102! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16103! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>104! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>105! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>106! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>107! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16108 109! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16110! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16111! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>112! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>113! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>114! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>115! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16116end subroutine vec_sld_test_i2i2117 118! LLVM-LABEL: vec_sld_test_i2i4119subroutine vec_sld_test_i2i4(arg1, arg2)120 vector(integer(2)) :: arg1, arg2, r121 r = vec_sld(arg1, arg2, 3_4)122 123! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16124! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16125! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>126! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>127! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>128! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>129! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16130 131! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16132! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16133! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>134! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>135! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>136! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>137! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16138end subroutine vec_sld_test_i2i4139 140! LLVM-LABEL: vec_sld_test_i2i8141subroutine vec_sld_test_i2i8(arg1, arg2)142 vector(integer(2)) :: arg1, arg2, r143 r = vec_sld(arg1, arg2, 11_8)144 145! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16146! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16147! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>148! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>149! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20>150! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>151! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16152 153! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16154! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16155! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>156! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>157! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26>158! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>159! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16160end subroutine vec_sld_test_i2i8161 162! LLVM-LABEL: vec_sld_test_i4i1163subroutine vec_sld_test_i4i1(arg1, arg2)164 vector(integer(4)) :: arg1, arg2, r165 r = vec_sld(arg1, arg2, 3_1)166 167! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16168! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16169! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>170! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>171! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>172! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>173! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16174 175! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16176! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16177! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>178! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>179! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>180! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>181! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16182end subroutine vec_sld_test_i4i1183 184! LLVM-LABEL: vec_sld_test_i4i2185subroutine vec_sld_test_i4i2(arg1, arg2)186 vector(integer(4)) :: arg1, arg2, r187 r = vec_sld(arg1, arg2, 3_2)188 189! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16190! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16191! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>192! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>193! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>194! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>195! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16196 197! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16198! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16199! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>200! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>201! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>202! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>203! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16204end subroutine vec_sld_test_i4i2205 206! LLVM-LABEL: vec_sld_test_i4i4207subroutine vec_sld_test_i4i4(arg1, arg2)208 vector(integer(4)) :: arg1, arg2, r209 r = vec_sld(arg1, arg2, 3_4)210 211! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16212! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16213! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>214! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>215! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>216! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>217! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16218 219! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16220! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16221! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>222! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>223! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>224! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>225! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16226end subroutine vec_sld_test_i4i4227 228! LLVM-LABEL: vec_sld_test_i4i8229subroutine vec_sld_test_i4i8(arg1, arg2)230 vector(integer(4)) :: arg1, arg2, r231 r = vec_sld(arg1, arg2, 3_8)232 233! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16234! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16235! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>236! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>237! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>238! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>239! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16240 241! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16242! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16243! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>244! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>245! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>246! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>247! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16248end subroutine vec_sld_test_i4i8249 250! LLVM-LABEL: vec_sld_test_u1i1251subroutine vec_sld_test_u1i1(arg1, arg2)252 vector(unsigned(1)) :: arg1, arg2, r253 r = vec_sld(arg1, arg2, 3_1)254 255! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16256! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16257! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>258! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16259 260! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16261! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16262! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>263! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16264end subroutine vec_sld_test_u1i1265 266! LLVM-LABEL: vec_sld_test_u1i2267subroutine vec_sld_test_u1i2(arg1, arg2)268 vector(unsigned(1)) :: arg1, arg2, r269 r = vec_sld(arg1, arg2, 3_2)270 271! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16272! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16273! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>274! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16275 276! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16277! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16278! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>279! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16280end subroutine vec_sld_test_u1i2281 282! LLVM-LABEL: vec_sld_test_u1i4283subroutine vec_sld_test_u1i4(arg1, arg2)284 vector(unsigned(1)) :: arg1, arg2, r285 r = vec_sld(arg1, arg2, 3_1)286 287! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16288! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16289! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>290! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16291 292! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16293! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16294! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>295! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16296end subroutine vec_sld_test_u1i4297 298! LLVM-LABEL: vec_sld_test_u1i8299subroutine vec_sld_test_u1i8(arg1, arg2)300 vector(unsigned(1)) :: arg1, arg2, r301 r = vec_sld(arg1, arg2, 3_1)302 303! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16304! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16305! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>306! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16307 308! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16309! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16310! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>311! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16312end subroutine vec_sld_test_u1i8313 314! LLVM-LABEL: vec_sld_test_u2i1315subroutine vec_sld_test_u2i1(arg1, arg2)316 vector(unsigned(2)) :: arg1, arg2, r317 r = vec_sld(arg1, arg2, 3_1)318 319! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16320! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16321! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>322! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>323! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>324! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>325! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16326 327! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16328! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16329! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>330! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>331! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>332! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>333! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16334end subroutine vec_sld_test_u2i1335 336! LLVM-LABEL: vec_sld_test_u2i2337subroutine vec_sld_test_u2i2(arg1, arg2)338 vector(unsigned(2)) :: arg1, arg2, r339 r = vec_sld(arg1, arg2, 3_2)340 341! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16342! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16343! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>344! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>345! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>346! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>347! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16348 349! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16350! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16351! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>352! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>353! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>354! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>355! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16356end subroutine vec_sld_test_u2i2357 358! LLVM-LABEL: vec_sld_test_u2i4359subroutine vec_sld_test_u2i4(arg1, arg2)360 vector(unsigned(2)) :: arg1, arg2, r361 r = vec_sld(arg1, arg2, 3_4)362 363! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16364! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16365! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>366! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>367! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>368! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>369! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16370 371! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16372! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16373! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>374! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>375! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>376! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>377! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16378end subroutine vec_sld_test_u2i4379 380! LLVM-LABEL: vec_sld_test_u2i8381subroutine vec_sld_test_u2i8(arg1, arg2)382 vector(unsigned(2)) :: arg1, arg2, r383 r = vec_sld(arg1, arg2, 3_8)384 385! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16386! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16387! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>388! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>389! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>390! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>391! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16392 393! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16394! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16395! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>396! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>397! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>398! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>399! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16400end subroutine vec_sld_test_u2i8401 402! LLVM-LABEL: vec_sld_test_u4i1403subroutine vec_sld_test_u4i1(arg1, arg2)404 vector(unsigned(4)) :: arg1, arg2, r405 r = vec_sld(arg1, arg2, 3_1)406 407! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16408! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16409! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>410! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>411! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>412! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>413! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16414 415! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16416! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16417! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>418! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>419! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>420! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>421! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16422end subroutine vec_sld_test_u4i1423 424! LLVM-LABEL: vec_sld_test_u4i2425subroutine vec_sld_test_u4i2(arg1, arg2)426 vector(unsigned(4)) :: arg1, arg2, r427 r = vec_sld(arg1, arg2, 3_2)428 429! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16430! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16431! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>432! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>433! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>434! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>435! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16436 437! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16438! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16439! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>440! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>441! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>442! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>443! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16444end subroutine vec_sld_test_u4i2445 446! LLVM-LABEL: vec_sld_test_u4i4447subroutine vec_sld_test_u4i4(arg1, arg2)448 vector(unsigned(4)) :: arg1, arg2, r449 r = vec_sld(arg1, arg2, 3_4)450 451! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16452! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16453! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>454! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>455! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>456! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>457! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16458 459! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16460! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16461! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>462! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>463! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>464! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>465! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16466end subroutine vec_sld_test_u4i4467 468! LLVM-LABEL: vec_sld_test_u4i8469subroutine vec_sld_test_u4i8(arg1, arg2)470 vector(unsigned(4)) :: arg1, arg2, r471 r = vec_sld(arg1, arg2, 3_8)472 473! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16474! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16475! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>476! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>477! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>478! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>479! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16480 481! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16482! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16483! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>484! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>485! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>486! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>487! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16488end subroutine vec_sld_test_u4i8489 490! LLVM-LABEL: vec_sld_test_r4i1491subroutine vec_sld_test_r4i1(arg1, arg2)492 vector(real(4)) :: arg1, arg2, r493 r = vec_sld(arg1, arg2, 3_1)494 495! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16496! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16497! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>498! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>499! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>500! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>501! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16502 503! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16504! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16505! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>506! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>507! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>508! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>509! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16510end subroutine vec_sld_test_r4i1511 512! LLVM-LABEL: vec_sld_test_r4i2513subroutine vec_sld_test_r4i2(arg1, arg2)514 vector(real(4)) :: arg1, arg2, r515 r = vec_sld(arg1, arg2, 3_2)516 517! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16518! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16519! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>520! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>521! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>522! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>523! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16524 525! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16526! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16527! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>528! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>529! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>530! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>531! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16532end subroutine vec_sld_test_r4i2533 534! LLVM-LABEL: vec_sld_test_r4i4535subroutine vec_sld_test_r4i4(arg1, arg2)536 vector(real(4)) :: arg1, arg2, r537 r = vec_sld(arg1, arg2, 3_4)538 539! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16540! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16541! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>542! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>543! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>544! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>545! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16546 547! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16548! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16549! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>550! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>551! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>552! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>553! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16554end subroutine vec_sld_test_r4i4555 556! LLVM-LABEL: vec_sld_test_r4i8557subroutine vec_sld_test_r4i8(arg1, arg2)558 vector(real(4)) :: arg1, arg2, r559 r = vec_sld(arg1, arg2, 1_8)560 561! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16562! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16563! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>564! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>565! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30>566! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>567! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16568 569! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16570! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 16571! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>572! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>573! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16>574! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>575! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 16576end subroutine vec_sld_test_r4i8577 578!----------------------579! vec_sldw580!----------------------581! LLVM-LABEL: vec_sldw_test_i1i1582subroutine vec_sldw_test_i1i1(arg1, arg2)583 vector(integer(1)) :: arg1, arg2, r584 r = vec_sldw(arg1, arg2, 3_1)585 586! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16587! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16588! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>589! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16590 591! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16592! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16593! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>594! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16595end subroutine vec_sldw_test_i1i1596 597! LLVM-LABEL: vec_sldw_test_i1i2598subroutine vec_sldw_test_i1i2(arg1, arg2)599 vector(integer(1)) :: arg1, arg2, r600 r = vec_sldw(arg1, arg2, 3_2)601 602! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16603! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16604! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>605! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16606 607! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16608! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16609! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>610! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16611end subroutine vec_sldw_test_i1i2612 613! LLVM-LABEL: vec_sldw_test_i1i4614subroutine vec_sldw_test_i1i4(arg1, arg2)615 vector(integer(1)) :: arg1, arg2, r616 r = vec_sldw(arg1, arg2, 3_4)617 618! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16619! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16620! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>621! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16622 623! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16624! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16625! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>626! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16627end subroutine vec_sldw_test_i1i4628 629! LLVM-LABEL: vec_sldw_test_i1i8630subroutine vec_sldw_test_i1i8(arg1, arg2)631 vector(integer(1)) :: arg1, arg2, r632 r = vec_sldw(arg1, arg2, 3_8)633 634! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16635! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16636! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>637! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16638 639! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16640! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16641! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>642! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16643end subroutine vec_sldw_test_i1i8644 645! LLVM-LABEL: vec_sldw_test_i2i1646subroutine vec_sldw_test_i2i1(arg1, arg2)647 vector(integer(2)) :: arg1, arg2, r648 r = vec_sldw(arg1, arg2, 3_1)649 650! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16651! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16652! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>653! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>654! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>655! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>656! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16657 658! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16659! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16660! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>661! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>662! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>663! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>664! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16665end subroutine vec_sldw_test_i2i1666 667! LLVM-LABEL: vec_sldw_test_i2i2668subroutine vec_sldw_test_i2i2(arg1, arg2)669 vector(integer(2)) :: arg1, arg2, r670 r = vec_sldw(arg1, arg2, 3_2)671 672! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16673! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16674! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>675! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>676! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>677! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>678! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16679 680! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16681! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16682! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>683! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>684! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>685! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>686! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16687end subroutine vec_sldw_test_i2i2688 689! LLVM-LABEL: vec_sldw_test_i2i4690subroutine vec_sldw_test_i2i4(arg1, arg2)691 vector(integer(2)) :: arg1, arg2, r692 r = vec_sldw(arg1, arg2, 3_4)693 694! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16695! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16696! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>697! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>698! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>699! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>700! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16701 702! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16703! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16704! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>705! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>706! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>707! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>708! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16709end subroutine vec_sldw_test_i2i4710 711! LLVM-LABEL: vec_sldw_test_i2i8712subroutine vec_sldw_test_i2i8(arg1, arg2)713 vector(integer(2)) :: arg1, arg2, r714 r = vec_sldw(arg1, arg2, 3_8)715 716! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16717! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16718! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>719! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>720! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>721! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>722! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16723 724! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16725! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16726! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>727! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>728! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>729! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>730! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16731end subroutine vec_sldw_test_i2i8732 733! LLVM-LABEL: vec_sldw_test_i4i1734subroutine vec_sldw_test_i4i1(arg1, arg2)735 vector(integer(4)) :: arg1, arg2, r736 r = vec_sldw(arg1, arg2, 3_1)737 738! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16739! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16740! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>741! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>742! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>743! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>744! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16745 746! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16747! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16748! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>749! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>750! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>751! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>752! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16753end subroutine vec_sldw_test_i4i1754 755! LLVM-LABEL: vec_sldw_test_i4i2756subroutine vec_sldw_test_i4i2(arg1, arg2)757 vector(integer(4)) :: arg1, arg2, r758 r = vec_sldw(arg1, arg2, 3_2)759 760! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16761! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16762! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>763! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>764! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>765! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>766! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16767 768! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16769! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16770! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>771! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>772! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>773! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>774! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16775end subroutine vec_sldw_test_i4i2776 777! LLVM-LABEL: vec_sldw_test_i4i4778subroutine vec_sldw_test_i4i4(arg1, arg2)779 vector(integer(4)) :: arg1, arg2, r780 r = vec_sldw(arg1, arg2, 3_4)781 782! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16783! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16784! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>785! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>786! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>787! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>788! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16789 790! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16791! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16792! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>793! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>794! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>795! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>796! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16797end subroutine vec_sldw_test_i4i4798 799! LLVM-LABEL: vec_sldw_test_i4i8800subroutine vec_sldw_test_i4i8(arg1, arg2)801 vector(integer(4)) :: arg1, arg2, r802 r = vec_sldw(arg1, arg2, 3_8)803 804! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16805! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16806! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>807! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>808! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>809! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>810! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16811 812! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16813! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 16814! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>815! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>816! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>817! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>818! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 16819end subroutine vec_sldw_test_i4i8820 821! LLVM-LABEL: vec_sldw_test_i8i1822subroutine vec_sldw_test_i8i1(arg1, arg2)823 vector(integer(8)) :: arg1, arg2, r824 r = vec_sldw(arg1, arg2, 3_1)825 826! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16827! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16828! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>829! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>830! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>831! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>832! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16833 834! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16835! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16836! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>837! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>838! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>839! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>840! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16841end subroutine vec_sldw_test_i8i1842 843! LLVM-LABEL: vec_sldw_test_i8i2844subroutine vec_sldw_test_i8i2(arg1, arg2)845 vector(integer(8)) :: arg1, arg2, r846 r = vec_sldw(arg1, arg2, 3_2)847 848! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16849! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16850! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>851! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>852! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>853! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>854! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16855 856! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16857! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16858! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>859! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>860! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>861! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>862! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16863end subroutine vec_sldw_test_i8i2864 865! LLVM-LABEL: vec_sldw_test_i8i4866subroutine vec_sldw_test_i8i4(arg1, arg2)867 vector(integer(8)) :: arg1, arg2, r868 r = vec_sldw(arg1, arg2, 3_4)869 870! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16871! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16872! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>873! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>874! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>875! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>876! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16877 878! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16879! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16880! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>881! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>882! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>883! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>884! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16885end subroutine vec_sldw_test_i8i4886 887! LLVM-LABEL: vec_sldw_test_i8i8888subroutine vec_sldw_test_i8i8(arg1, arg2)889 vector(integer(8)) :: arg1, arg2, r890 r = vec_sldw(arg1, arg2, 3_8)891 892! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16893! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16894! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>895! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>896! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>897! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>898! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16899 900! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 16901! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 16902! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>903! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>904! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>905! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>906! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 16907 908end subroutine vec_sldw_test_i8i8909 910! LLVM-LABEL: vec_sldw_test_u1i1911subroutine vec_sldw_test_u1i1(arg1, arg2)912 vector(unsigned(1)) :: arg1, arg2, r913 r = vec_sldw(arg1, arg2, 3_1)914 915! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16916! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16917! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>918! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16919 920! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16921! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16922! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>923! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16924end subroutine vec_sldw_test_u1i1925 926! LLVM-LABEL: vec_sldw_test_u1i2927subroutine vec_sldw_test_u1i2(arg1, arg2)928 vector(unsigned(1)) :: arg1, arg2, r929 r = vec_sldw(arg1, arg2, 3_2)930 931! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16932! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16933! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>934! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16935 936! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16937! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16938! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>939! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16940end subroutine vec_sldw_test_u1i2941 942! LLVM-LABEL: vec_sldw_test_u1i4943subroutine vec_sldw_test_u1i4(arg1, arg2)944 vector(unsigned(1)) :: arg1, arg2, r945 r = vec_sldw(arg1, arg2, 3_4)946 947! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16948! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16949! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>950! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16951 952! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16953! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16954! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>955! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16956end subroutine vec_sldw_test_u1i4957 958! LLVM-LABEL: vec_sldw_test_u1i8959subroutine vec_sldw_test_u1i8(arg1, arg2)960 vector(unsigned(1)) :: arg1, arg2, r961 r = vec_sldw(arg1, arg2, 3_8)962 963! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16964! LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16965! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg2]], <16 x i8> %[[arg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>966! LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16967 968! BE-LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16969! BE-LLVMIR: %[[arg2:.*]] = load <16 x i8>, ptr %{{.*}}, align 16970! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[arg1]], <16 x i8> %[[arg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>971! BE-LLVMIR: store <16 x i8> %[[r]], ptr %{{.*}}, align 16972end subroutine vec_sldw_test_u1i8973 974! LLVM-LABEL: vec_sldw_test_u2i1975subroutine vec_sldw_test_u2i1(arg1, arg2)976 vector(unsigned(2)) :: arg1, arg2, r977 r = vec_sldw(arg1, arg2, 3_1)978 979! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16980! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16981! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>982! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>983! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>984! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>985! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16986 987! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16988! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 16989! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>990! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>991! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>992! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>993! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 16994end subroutine vec_sldw_test_u2i1995 996! LLVM-LABEL: vec_sldw_test_u2i2997subroutine vec_sldw_test_u2i2(arg1, arg2)998 vector(unsigned(2)) :: arg1, arg2, r999 r = vec_sldw(arg1, arg2, 3_2)1000 1001! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 161002! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 161003! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>1004! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>1005! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1006! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>1007! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 161008 1009! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 161010! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 161011! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>1012! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>1013! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1014! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>1015! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 161016end subroutine vec_sldw_test_u2i21017 1018! LLVM-LABEL: vec_sldw_test_u2i41019subroutine vec_sldw_test_u2i4(arg1, arg2)1020 vector(unsigned(2)) :: arg1, arg2, r1021 r = vec_sldw(arg1, arg2, 3_4)1022 1023! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 161024! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 161025! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>1026! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>1027! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1028! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>1029! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 161030 1031! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 161032! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 161033! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>1034! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>1035! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1036! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>1037! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 161038end subroutine vec_sldw_test_u2i41039 1040! LLVM-LABEL: vec_sldw_test_u2i81041subroutine vec_sldw_test_u2i8(arg1, arg2)1042 vector(unsigned(2)) :: arg1, arg2, r1043 r = vec_sldw(arg1, arg2, 3_8)1044 1045! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 161046! LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 161047! LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>1048! LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>1049! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1050! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>1051! LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 161052 1053! BE-LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 161054! BE-LLVMIR: %[[arg2:.*]] = load <8 x i16>, ptr %{{.*}}, align 161055! BE-LLVMIR: %[[barg1:.*]] = bitcast <8 x i16> %[[arg1]] to <16 x i8>1056! BE-LLVMIR: %[[barg2:.*]] = bitcast <8 x i16> %[[arg2]] to <16 x i8>1057! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1058! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <8 x i16>1059! BE-LLVMIR: store <8 x i16> %[[br]], ptr %{{.*}}, align 161060end subroutine vec_sldw_test_u2i81061 1062! LLVM-LABEL: vec_sldw_test_u4i11063subroutine vec_sldw_test_u4i1(arg1, arg2)1064 vector(unsigned(4)) :: arg1, arg2, r1065 r = vec_sldw(arg1, arg2, 3_1)1066 1067! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 161068! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 161069! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>1070! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>1071! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1072! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>1073! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 161074 1075! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 161076! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 161077! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>1078! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>1079! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1080! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>1081! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 161082end subroutine vec_sldw_test_u4i11083 1084! LLVM-LABEL: vec_sldw_test_u4i21085subroutine vec_sldw_test_u4i2(arg1, arg2)1086 vector(unsigned(4)) :: arg1, arg2, r1087 r = vec_sldw(arg1, arg2, 3_2)1088 1089! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 161090! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 161091! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>1092! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>1093! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1094! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>1095! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 161096 1097! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 161098! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 161099! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>1100! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>1101! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1102! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>1103! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 161104end subroutine vec_sldw_test_u4i21105 1106! LLVM-LABEL: vec_sldw_test_u4i41107subroutine vec_sldw_test_u4i4(arg1, arg2)1108 vector(unsigned(4)) :: arg1, arg2, r1109 r = vec_sldw(arg1, arg2, 3_4)1110 1111! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 161112! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 161113! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>1114! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>1115! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1116! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>1117! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 161118 1119! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 161120! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 161121! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>1122! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>1123! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1124! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>1125! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 161126end subroutine vec_sldw_test_u4i41127 1128! LLVM-LABEL: vec_sldw_test_u4i81129subroutine vec_sldw_test_u4i8(arg1, arg2)1130 vector(unsigned(4)) :: arg1, arg2, r1131 r = vec_sldw(arg1, arg2, 3_8)1132 1133! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 161134! LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 161135! LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>1136! LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>1137! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1138! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>1139! LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 161140 1141! BE-LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 161142! BE-LLVMIR: %[[arg2:.*]] = load <4 x i32>, ptr %{{.*}}, align 161143! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x i32> %[[arg1]] to <16 x i8>1144! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x i32> %[[arg2]] to <16 x i8>1145! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1146! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x i32>1147! BE-LLVMIR: store <4 x i32> %[[br]], ptr %{{.*}}, align 161148end subroutine vec_sldw_test_u4i81149 1150! LLVM-LABEL: vec_sldw_test_u8i11151subroutine vec_sldw_test_u8i1(arg1, arg2)1152 vector(unsigned(8)) :: arg1, arg2, r1153 r = vec_sldw(arg1, arg2, 3_1)1154 1155! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 161156! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 161157! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>1158! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>1159! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1160! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>1161! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 161162 1163! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 161164! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 161165! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>1166! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>1167! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1168! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>1169! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 161170end subroutine vec_sldw_test_u8i11171 1172! LLVM-LABEL: vec_sldw_test_u8i21173subroutine vec_sldw_test_u8i2(arg1, arg2)1174 vector(unsigned(8)) :: arg1, arg2, r1175 r = vec_sldw(arg1, arg2, 3_2)1176 1177! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 161178! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 161179! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>1180! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>1181! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1182! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>1183! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 161184 1185! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 161186! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 161187! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>1188! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>1189! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1190! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>1191! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 161192end subroutine vec_sldw_test_u8i21193 1194! LLVM-LABEL: vec_sldw_test_u8i41195subroutine vec_sldw_test_u8i4(arg1, arg2)1196 vector(unsigned(8)) :: arg1, arg2, r1197 r = vec_sldw(arg1, arg2, 3_4)1198 1199! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 161200! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 161201! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>1202! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>1203! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1204! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>1205! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 161206 1207! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 161208! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 161209! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>1210! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>1211! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1212! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>1213! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 161214end subroutine vec_sldw_test_u8i41215 1216! LLVM-LABEL: vec_sldw_test_u8i81217subroutine vec_sldw_test_u8i8(arg1, arg2)1218 vector(unsigned(8)) :: arg1, arg2, r1219 r = vec_sldw(arg1, arg2, 3_8)1220 1221! LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 161222! LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 161223! LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>1224! LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>1225! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1226! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>1227! LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 161228 1229! BE-LLVMIR: %[[arg1:.*]] = load <2 x i64>, ptr %{{.*}}, align 161230! BE-LLVMIR: %[[arg2:.*]] = load <2 x i64>, ptr %{{.*}}, align 161231! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x i64> %[[arg1]] to <16 x i8>1232! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x i64> %[[arg2]] to <16 x i8>1233! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1234! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x i64>1235! BE-LLVMIR: store <2 x i64> %[[br]], ptr %{{.*}}, align 161236end subroutine vec_sldw_test_u8i81237 1238! LLVM-LABEL: vec_sldw_test_r4i11239subroutine vec_sldw_test_r4i1(arg1, arg2)1240 vector(real(4)) :: arg1, arg2, r1241 r = vec_sldw(arg1, arg2, 3_1)1242 1243! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 161244! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 161245! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>1246! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>1247! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1248! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>1249! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 161250 1251! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 161252! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 161253! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>1254! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>1255! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1256! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>1257! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 161258end subroutine vec_sldw_test_r4i11259 1260! LLVM-LABEL: vec_sldw_test_r4i21261subroutine vec_sldw_test_r4i2(arg1, arg2)1262 vector(real(4)) :: arg1, arg2, r1263 r = vec_sldw(arg1, arg2, 3_2)1264 1265! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 161266! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 161267! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>1268! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>1269! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1270! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>1271! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 161272 1273! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 161274! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 161275! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>1276! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>1277! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1278! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>1279! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 161280end subroutine vec_sldw_test_r4i21281 1282! LLVM-LABEL: vec_sldw_test_r4i41283subroutine vec_sldw_test_r4i4(arg1, arg2)1284 vector(real(4)) :: arg1, arg2, r1285 r = vec_sldw(arg1, arg2, 3_4)1286 1287! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 161288! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 161289! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>1290! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>1291! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1292! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>1293! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 161294 1295! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 161296! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 161297! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>1298! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>1299! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1300! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>1301! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 161302end subroutine vec_sldw_test_r4i41303 1304! LLVM-LABEL: vec_sldw_test_r4i81305subroutine vec_sldw_test_r4i8(arg1, arg2)1306 vector(real(4)) :: arg1, arg2, r1307 r = vec_sldw(arg1, arg2, 3_8)1308 1309! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 161310! LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 161311! LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>1312! LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>1313! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1314! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>1315! LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 161316 1317! BE-LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 161318! BE-LLVMIR: %[[arg2:.*]] = load <4 x float>, ptr %{{.*}}, align 161319! BE-LLVMIR: %[[barg1:.*]] = bitcast <4 x float> %[[arg1]] to <16 x i8>1320! BE-LLVMIR: %[[barg2:.*]] = bitcast <4 x float> %[[arg2]] to <16 x i8>1321! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1322! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <4 x float>1323! BE-LLVMIR: store <4 x float> %[[br]], ptr %{{.*}}, align 161324end subroutine vec_sldw_test_r4i81325 1326! LLVM-LABEL: vec_sldw_test_r8i11327subroutine vec_sldw_test_r8i1(arg1, arg2)1328 vector(real(8)) :: arg1, arg2, r1329 r = vec_sldw(arg1, arg2, 3_1)1330 1331! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 161332! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 161333! LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8>1334! LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8>1335! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1336! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double>1337! LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 161338 1339! BE-LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 161340! BE-LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 161341! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8>1342! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8>1343! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1344! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double>1345! BE-LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 161346end subroutine vec_sldw_test_r8i11347 1348! LLVM-LABEL: vec_sldw_test_r8i21349subroutine vec_sldw_test_r8i2(arg1, arg2)1350 vector(real(8)) :: arg1, arg2, r1351 r = vec_sldw(arg1, arg2, 3_2)1352 1353! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 161354! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 161355! LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8>1356! LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8>1357! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1358! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double>1359! LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 161360 1361! BE-LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 161362! BE-LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 161363! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8>1364! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8>1365! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1366! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double>1367! BE-LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 161368end subroutine vec_sldw_test_r8i21369 1370! LLVM-LABEL: vec_sldw_test_r8i41371subroutine vec_sldw_test_r8i4(arg1, arg2)1372 vector(real(8)) :: arg1, arg2, r1373 r = vec_sldw(arg1, arg2, 3_4)1374 1375! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 161376! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 161377! LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8>1378! LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8>1379! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1380! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double>1381! LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 161382 1383! BE-LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 161384! BE-LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 161385! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8>1386! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8>1387! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1388! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double>1389! BE-LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 161390end subroutine vec_sldw_test_r8i41391 1392! LLVM-LABEL: vec_sldw_test_r8i81393subroutine vec_sldw_test_r8i8(arg1, arg2)1394 vector(real(8)) :: arg1, arg2, r1395 r = vec_sldw(arg1, arg2, 3_8)1396 1397! LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 161398! LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 161399! LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8>1400! LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8>1401! LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg2]], <16 x i8> %[[barg1]], <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>1402! LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double>1403! LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 161404 1405! BE-LLVMIR: %[[arg1:.*]] = load <2 x double>, ptr %{{.*}}, align 161406! BE-LLVMIR: %[[arg2:.*]] = load <2 x double>, ptr %{{.*}}, align 161407! BE-LLVMIR: %[[barg1:.*]] = bitcast <2 x double> %[[arg1]] to <16 x i8>1408! BE-LLVMIR: %[[barg2:.*]] = bitcast <2 x double> %[[arg2]] to <16 x i8>1409! BE-LLVMIR: %[[r:.*]] = shufflevector <16 x i8> %[[barg1]], <16 x i8> %[[barg2]], <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>1410! BE-LLVMIR: %[[br:.*]] = bitcast <16 x i8> %[[r]] to <2 x double>1411! BE-LLVMIR: store <2 x double> %[[br]], ptr %{{.*}}, align 161412end subroutine vec_sldw_test_r8i81413