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1! RUN: %flang_fc1 -flang-experimental-hlfir -emit-llvm %s -o - | FileCheck --check-prefixes="LLVMIR" %s2! REQUIRES: target=powerpc{{.*}}3 4!----------------------5! vec_st6!----------------------7 8! CHECK-LABEL: vec_st_vi1i2vi19subroutine vec_st_vi1i2vi1(arg1, arg2, arg3)10 vector(integer(1)) :: arg1, arg311 integer(2) :: arg212 call vec_st(arg1, arg2, arg3)13 14! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 1615! LLVMIR: %[[arg2:.*]] = load i16, ptr %{{.*}}, align 216! LLVMIR: %[[arg3:.*]] = getelementptr i8, ptr %{{.*}}, i16 %517! LLVMIR: %[[bcArg1:.*]] = bitcast <16 x i8> %[[arg1]] to <4 x i32>18! LLVMIR: call void @llvm.ppc.altivec.stvx(<4 x i32> %[[bcArg1]], ptr %[[arg3]])19end subroutine vec_st_vi1i2vi120 21! CHECK-LABEL: vec_st_vi2i2vi222subroutine vec_st_vi2i2vi2(arg1, arg2, arg3)23 vector(integer(2)) :: arg1, arg324 integer(2) :: arg225 call vec_st(arg1, arg2, arg3)26 27! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 1628! LLVMIR: %[[arg2:.*]] = load i16, ptr %{{.*}}, align 229! LLVMIR: %[[arg3:.*]] = getelementptr i8, ptr %{{.*}}, i16 %530! LLVMIR: %[[bcArg1:.*]] = bitcast <8 x i16> %[[arg1]] to <4 x i32>31! LLVMIR: call void @llvm.ppc.altivec.stvx(<4 x i32> %[[bcArg1]], ptr %[[arg3]])32end subroutine vec_st_vi2i2vi233 34! CHECK-LABEL: vec_st_vi4i2vi435subroutine vec_st_vi4i2vi4(arg1, arg2, arg3)36 vector(integer(4)) :: arg1, arg337 integer(2) :: arg238 call vec_st(arg1, arg2, arg3)39 40! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 1641! LLVMIR: %[[arg2:.*]] = load i16, ptr %{{.*}}, align 242! LLVMIR: %[[arg3:.*]] = getelementptr i8, ptr %{{.*}}, i16 %543! LLVMIR: call void @llvm.ppc.altivec.stvx(<4 x i32> %[[arg1]], ptr %[[arg3]])44end subroutine vec_st_vi4i2vi445 46! CHECK-LABEL: vec_st_vu1i4vu147subroutine vec_st_vu1i4vu1(arg1, arg2, arg3)48 vector(unsigned(1)) :: arg1, arg349 integer(4) :: arg250 call vec_st(arg1, arg2, arg3)51 52! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 1653! LLVMIR: %[[arg2:.*]] = load i32, ptr %{{.*}}, align 454! LLVMIR: %[[arg3:.*]] = getelementptr i8, ptr %{{.*}}, i32 %555! LLVMIR: %[[bcArg1:.*]] = bitcast <16 x i8> %[[arg1]] to <4 x i32>56! LLVMIR: call void @llvm.ppc.altivec.stvx(<4 x i32> %[[bcArg1]], ptr %[[arg3]])57end subroutine vec_st_vu1i4vu158 59! CHECK-LABEL: vec_st_vu2i4vu260subroutine vec_st_vu2i4vu2(arg1, arg2, arg3)61 vector(unsigned(2)) :: arg1, arg362 integer(4) :: arg263 call vec_st(arg1, arg2, arg3)64 65! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 1666! LLVMIR: %[[arg2:.*]] = load i32, ptr %{{.*}}, align 467! LLVMIR: %[[arg3:.*]] = getelementptr i8, ptr %{{.*}}, i32 %568! LLVMIR: %[[bcArg1:.*]] = bitcast <8 x i16> %[[arg1]] to <4 x i32>69! LLVMIR: call void @llvm.ppc.altivec.stvx(<4 x i32> %[[bcArg1]], ptr %[[arg3]])70end subroutine vec_st_vu2i4vu271 72! CHECK-LABEL: vec_st_vu4i4vu473subroutine vec_st_vu4i4vu4(arg1, arg2, arg3)74 vector(unsigned(4)) :: arg1, arg375 integer(4) :: arg276 call vec_st(arg1, arg2, arg3)77 78! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 1679! LLVMIR: %[[arg2:.*]] = load i32, ptr %{{.*}}, align 480! LLVMIR: %[[arg3:.*]] = getelementptr i8, ptr %{{.*}}, i32 %581! LLVMIR: call void @llvm.ppc.altivec.stvx(<4 x i32> %[[arg1]], ptr %[[arg3]])82end subroutine vec_st_vu4i4vu483 84! CHECK-LABEL: vec_st_vi4i4via485subroutine vec_st_vi4i4via4(arg1, arg2, arg3, i)86 vector(integer(4)) :: arg1, arg3(5)87 integer(4) :: arg2, i88 call vec_st(arg1, arg2, arg3(i))89 90! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 491! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i6492! LLVMIR: %[[iextsub:.*]] = sub nsw i64 %[[iext]], 193! LLVMIR: %[[iextmul:.*]] = mul nsw i64 %[[iextsub]], 194! LLVMIR: %[[iextmul2:.*]] = mul nsw i64 %[[iextmul]], 195! LLVMIR: %[[iextadd:.*]] = add nsw i64 %[[iextmul2]], 096! LLVMIR: %[[gep1:.*]] = getelementptr <4 x i32>, ptr %2, i64 %[[iextadd]]97! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %0, align 1698! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 499! LLVMIR: %[[gep2:.*]] = getelementptr i8, ptr %[[gep1]], i32 %[[arg2]]100! LLVMIR: call void @llvm.ppc.altivec.stvx(<4 x i32> %[[arg1]], ptr %[[gep2]])101end subroutine vec_st_vi4i4via4102 103!----------------------104! vec_ste105!----------------------106 107! CHECK-LABEL: vec_ste_vi1i2i1108subroutine vec_ste_vi1i2i1(arg1, arg2, arg3)109 vector(integer(1)) :: arg1110 integer(2) :: arg2111 integer(1) :: arg3112 call vec_ste(arg1, arg2, arg3)113 114! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16115! LLVMIR: %[[arg2:.*]] = load i16, ptr %{{.*}}, align 2116! LLVMIR: %[[arg3:.*]] = getelementptr i8, ptr %{{.*}}, i16 %5117! LLVMIR: call void @llvm.ppc.altivec.stvebx(<16 x i8> %[[arg1]], ptr %[[arg3]])118end subroutine vec_ste_vi1i2i1119 120! CHECK-LABEL: vec_ste_vi2i2i2121subroutine vec_ste_vi2i2i2(arg1, arg2, arg3)122 vector(integer(2)) :: arg1123 integer(2) :: arg2124 integer(2) :: arg3125 call vec_ste(arg1, arg2, arg3)126 127! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16128! LLVMIR: %[[arg2:.*]] = load i16, ptr %{{.*}}, align 2129! LLVMIR: %[[arg3:.*]] = getelementptr i8, ptr %{{.*}}, i16 %5130! LLVMIR: call void @llvm.ppc.altivec.stvehx(<8 x i16> %[[arg1]], ptr %[[arg3]])131end subroutine vec_ste_vi2i2i2132 133! CHECK-LABEL: vec_ste_vi4i2i4134subroutine vec_ste_vi4i2i4(arg1, arg2, arg3)135 vector(integer(4)) :: arg1136 integer(2) :: arg2137 integer(4) :: arg3138 call vec_ste(arg1, arg2, arg3)139 140! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16141! LLVMIR: %[[arg2:.*]] = load i16, ptr %{{.*}}, align 2142! LLVMIR: %[[arg3:.*]] = getelementptr i8, ptr %{{.*}}, i16 %5143! LLVMIR: call void @llvm.ppc.altivec.stvewx(<4 x i32> %[[arg1]], ptr %[[arg3]])144end subroutine vec_ste_vi4i2i4145 146! CHECK-LABEL: vec_ste_vu1i4u1147subroutine vec_ste_vu1i4u1(arg1, arg2, arg3)148 vector(unsigned(1)) :: arg1149 integer(4) :: arg2150 integer(1) :: arg3151 call vec_ste(arg1, arg2, arg3)152 153! LLVMIR: %[[arg1:.*]] = load <16 x i8>, ptr %{{.*}}, align 16154! LLVMIR: %[[arg2:.*]] = load i32, ptr %{{.*}}, align 4155! LLVMIR: %[[arg3:.*]] = getelementptr i8, ptr %{{.*}}, i32 %5156! LLVMIR: call void @llvm.ppc.altivec.stvebx(<16 x i8> %[[arg1]], ptr %[[arg3]])157end subroutine vec_ste_vu1i4u1158 159! CHECK-LABEL: vec_ste_vu2i4u2160subroutine vec_ste_vu2i4u2(arg1, arg2, arg3)161 vector(unsigned(2)) :: arg1162 integer(4) :: arg2163 integer(2) :: arg3164 call vec_ste(arg1, arg2, arg3)165 166! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %{{.*}}, align 16167! LLVMIR: %[[arg2:.*]] = load i32, ptr %{{.*}}, align 4168! LLVMIR: %[[arg3:.*]] = getelementptr i8, ptr %{{.*}}, i32 %5169! LLVMIR: call void @llvm.ppc.altivec.stvehx(<8 x i16> %[[arg1]], ptr %[[arg3]])170end subroutine vec_ste_vu2i4u2171 172! CHECK-LABEL: vec_ste_vu4i4u4173subroutine vec_ste_vu4i4u4(arg1, arg2, arg3)174 vector(unsigned(4)) :: arg1175 integer(4) :: arg2176 integer(4) :: arg3177 call vec_ste(arg1, arg2, arg3)178 179! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %{{.*}}, align 16180! LLVMIR: %[[arg2:.*]] = load i32, ptr %{{.*}}, align 4181! LLVMIR: %[[arg3:.*]] = getelementptr i8, ptr %{{.*}}, i32 %5182! LLVMIR: call void @llvm.ppc.altivec.stvewx(<4 x i32> %[[arg1]], ptr %[[arg3]])183end subroutine vec_ste_vu4i4u4184 185! CHECK-LABEL: vec_ste_vr4i4r4186subroutine vec_ste_vr4i4r4(arg1, arg2, arg3)187 vector(real(4)) :: arg1188 integer(4) :: arg2189 real(4) :: arg3190 call vec_ste(arg1, arg2, arg3)191 192! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %0, align 16193! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 4194! LLVMIR: %[[pos:.*]] = getelementptr i8, ptr %2, i32 %[[arg2]]195! LLVMIR: %[[bc:.*]] = bitcast <4 x float> %[[arg1]] to <4 x i32>196! LLVMIR: call void @llvm.ppc.altivec.stvewx(<4 x i32> %[[bc]], ptr %[[pos]])197 198end subroutine vec_ste_vr4i4r4199 200! CHECK-LABEL: vec_ste_vi4i4ia4201subroutine vec_ste_vi4i4ia4(arg1, arg2, arg3, i)202 vector(integer(4)) :: arg1203 integer(4) :: arg2, i204 integer(4) :: arg3(5)205 call vec_ste(arg1, arg2, arg3(i))206 207! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4208! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64209! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1210! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1211! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1212! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0213! LLVMIR: %[[gep1:.*]] = getelementptr i32, ptr %2, i64 %[[iadd]]214! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %0, align 16215! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 4216! LLVMIR: %[[gep2:.*]] = getelementptr i8, ptr %[[gep1]], i32 %[[arg2]]217! LLVMIR: call void @llvm.ppc.altivec.stvewx(<4 x i32> %[[arg1]], ptr %[[gep2]])218end subroutine vec_ste_vi4i4ia4219 220!----------------------221! vec_stxv222!----------------------223 224! CHECK-LABEL: vec_stxv_test_vr4i2r4225subroutine vec_stxv_test_vr4i2r4(arg1, arg2, arg3)226 vector(real(4)) :: arg1227 integer(2) :: arg2228 real(4) :: arg3229 call vec_stxv(arg1, arg2, arg3)230 231! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16232! LLVMIR: %[[arg2:.*]] = load i16, ptr %{{.*}}, align 2233! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %{{.*}}, i16 %[[arg2]]234! LLVMIR: store <4 x float> %[[arg1]], ptr %[[addr]], align 16235end subroutine vec_stxv_test_vr4i2r4236 237! CHECK-LABEL: vec_stxv_test_vi4i8ia4238subroutine vec_stxv_test_vi4i8ia4(arg1, arg2, arg3, i)239 vector(integer(4)) :: arg1240 integer(8) :: arg2241 integer(4) :: arg3(10)242 integer(4) :: i243 call vec_stxv(arg1, arg2, arg3(i))244 245! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4246! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64247! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1248! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1249! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1250! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0251! LLVMIR: %[[gep1:.*]] = getelementptr i32, ptr %2, i64 %[[iadd]]252! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %0, align 16253! LLVMIR: %[[arg2:.*]] = load i64, ptr %1, align 8254! LLVMIR: %[[gep2:.*]] = getelementptr i8, ptr %[[gep1]], i64 %[[arg2]]255! LLVMIR: store <4 x i32> %[[arg1]], ptr %[[gep2]], align 16256end subroutine vec_stxv_test_vi4i8ia4257 258! CHECK-LABEL: vec_stxv_test_vi2i4vi2259subroutine vec_stxv_test_vi2i4vi2(arg1, arg2, arg3)260 vector(integer(2)) :: arg1261 integer(4) :: arg2262 vector(integer(2)) :: arg3263 call vec_stxv(arg1, arg2, arg3)264 265! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %0, align 16266! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 4267! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %2, i32 %[[arg2]]268! LLVMIR: store <8 x i16> %[[arg1]], ptr %[[addr]], align 16269end subroutine vec_stxv_test_vi2i4vi2270 271! CHECK-LABEL: vec_stxv_test_vi4i4vai4272subroutine vec_stxv_test_vi4i4vai4(arg1, arg2, arg3, i)273 vector(integer(4)) :: arg1274 integer(4) :: arg2275 vector(integer(4)) :: arg3(20)276 integer(4) :: i277 call vec_stxv(arg1, arg2, arg3(i))278 279! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4280! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64281! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1282! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1283! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1284! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0285! LLVMIR: %[[gep1:.*]] = getelementptr <4 x i32>, ptr %2, i64 %[[iadd]]286! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %0, align 16287! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 4288! LLVMIR: %[[gep2:.*]] = getelementptr i8, ptr %[[gep1]], i32 %[[arg2]]289! LLVMIR: store <4 x i32> %[[arg1]], ptr %[[gep2]], align 16290end subroutine vec_stxv_test_vi4i4vai4291 292!----------------------293! vec_xst294!----------------------295 296! CHECK-LABEL: vec_xst_test_vr4i2r4297subroutine vec_xst_test_vr4i2r4(arg1, arg2, arg3)298 vector(real(4)) :: arg1299 integer(2) :: arg2300 real(4) :: arg3301 call vec_xst(arg1, arg2, arg3)302 303 304! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16305! LLVMIR: %[[arg2:.*]] = load i16, ptr %{{.*}}, align 2306! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %{{.*}}, i16 %[[arg2]]307! LLVMIR: store <4 x float> %[[arg1]], ptr %[[addr]], align 16308end subroutine vec_xst_test_vr4i2r4309 310! CHECK-LABEL: vec_xst_test_vi4i8ia4311subroutine vec_xst_test_vi4i8ia4(arg1, arg2, arg3, i)312 vector(integer(4)) :: arg1313 integer(8) :: arg2314 integer(4) :: arg3(10)315 integer(4) :: i316 call vec_xst(arg1, arg2, arg3(i))317 318! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4319! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64320! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1321! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1322! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1323! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0324! LLVMIR: %[[gep1:.*]] = getelementptr i32, ptr %2, i64 %[[iadd]]325! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %0, align 16326! LLVMIR: %[[arg2:.*]] = load i64, ptr %1, align 8327! LLVMIR: %[[gep2:.*]] = getelementptr i8, ptr %[[gep1]], i64 %[[arg2]]328! LLVMIR: store <4 x i32> %[[arg1]], ptr %[[gep2]], align 16329end subroutine vec_xst_test_vi4i8ia4330 331! CHECK-LABEL: vec_xst_test_vi2i4vi2332subroutine vec_xst_test_vi2i4vi2(arg1, arg2, arg3)333 vector(integer(2)) :: arg1334 integer(4) :: arg2335 vector(integer(2)) :: arg3336 call vec_xst(arg1, arg2, arg3)337 338! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %0, align 16339! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 4340! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %2, i32 %[[arg2]]341! LLVMIR: store <8 x i16> %[[arg1]], ptr %[[addr]], align 16342end subroutine vec_xst_test_vi2i4vi2343 344! CHECK-LABEL: vec_xst_test_vi4i4vai4345subroutine vec_xst_test_vi4i4vai4(arg1, arg2, arg3, i)346 vector(integer(4)) :: arg1347 integer(4) :: arg2348 vector(integer(4)) :: arg3(20)349 integer(4) :: i350 call vec_xst(arg1, arg2, arg3(i))351 352! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4353! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64354! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1355! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1356! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1357! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0358! LLVMIR: %[[gep1:.*]] = getelementptr <4 x i32>, ptr %2, i64 %[[iadd]]359! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %0, align 16360! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 4361! LLVMIR: %[[gep2:.*]] = getelementptr i8, ptr %[[gep1]], i32 %[[arg2]]362! LLVMIR: store <4 x i32> %[[arg1]], ptr %[[gep2]], align 16363end subroutine vec_xst_test_vi4i4vai4364 365!----------------------366! vec_xst_be367!----------------------368 369! CHECK-LABEL: vec_xst_be_test_vr4i2r4370subroutine vec_xst_be_test_vr4i2r4(arg1, arg2, arg3)371 vector(real(4)) :: arg1372 integer(2) :: arg2373 real(4) :: arg3374 call vec_xst_be(arg1, arg2, arg3)375 376! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16377! LLVMIR: %[[arg2:.*]] = load i16, ptr %{{.*}}, align 2378! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %{{.*}}, i16 %[[arg2]]379! LLVMIR: %[[shf:.*]] = shufflevector <4 x float> %[[arg1]], <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>380! LLVMIR: store <4 x float> %[[shf]], ptr %[[addr]], align 16381end subroutine vec_xst_be_test_vr4i2r4382 383! CHECK-LABEL: vec_xst_be_test_vi4i8ia4384subroutine vec_xst_be_test_vi4i8ia4(arg1, arg2, arg3, i)385 vector(integer(4)) :: arg1386 integer(8) :: arg2387 integer(4) :: arg3(10)388 integer(4) :: i389 call vec_xst_be(arg1, arg2, arg3(i))390 391! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4392! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64393! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1394! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1395! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1396! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0397! LLVMIR: %[[gep1:.*]] = getelementptr i32, ptr %2, i64 %[[iadd]]398! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %0, align 16399! LLVMIR: %[[arg2:.*]] = load i64, ptr %1, align 8400! LLVMIR: %[[gep2:.*]] = getelementptr i8, ptr %[[gep1]], i64 %[[arg2]]401! LLVMIR: %[[src:.*]] = shufflevector <4 x i32> %[[arg1]], <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>402! LLVMIR: store <4 x i32> %[[src]], ptr %[[gep2]], align 16403end subroutine vec_xst_be_test_vi4i8ia4404 405! CHECK-LABEL: vec_xst_be_test_vi2i4vi2406subroutine vec_xst_be_test_vi2i4vi2(arg1, arg2, arg3)407 vector(integer(2)) :: arg1408 integer(4) :: arg2409 vector(integer(2)) :: arg3410 call vec_xst_be(arg1, arg2, arg3)411 412! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %0, align 16413! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 4414! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %2, i32 %[[arg2]]415! LLVMIR: %[[src:.*]] = shufflevector <8 x i16> %[[arg1]], <8 x i16> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>416! LLVMIR: store <8 x i16> %[[src]], ptr %[[addr]], align 16417end subroutine vec_xst_be_test_vi2i4vi2418 419! CHECK-LABEL: vec_xst_be_test_vi4i4vai4420subroutine vec_xst_be_test_vi4i4vai4(arg1, arg2, arg3, i)421 vector(integer(4)) :: arg1422 integer(4) :: arg2423 vector(integer(4)) :: arg3(20)424 integer(4) :: i425 call vec_xst_be(arg1, arg2, arg3(i))426 427! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4428! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64429! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1430! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1431! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1432! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0433! LLVMIR: %[[gep1:.*]] = getelementptr <4 x i32>, ptr %2, i64 %[[iadd]]434! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %0, align 16435! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 4436! LLVMIR: %[[gep2:.*]] = getelementptr i8, ptr %[[gep1]], i32 %[[arg2]]437! LLVMIR: %[[src:.*]] = shufflevector <4 x i32> %[[arg1]], <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>438! LLVMIR: store <4 x i32> %[[src]], ptr %[[gep2]], align 16439end subroutine vec_xst_be_test_vi4i4vai4440 441!----------------------442! vec_xstd2443!----------------------444 445! CHECK-LABEL: vec_xstd2_test_vr4i2r4446subroutine vec_xstd2_test_vr4i2r4(arg1, arg2, arg3)447 vector(real(4)) :: arg1448 integer(2) :: arg2449 real(4) :: arg3450 call vec_xstd2(arg1, arg2, arg3)451 452 453! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16454! LLVMIR: %[[arg2:.*]] = load i16, ptr %{{.*}}, align 2455! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %{{.*}}, i16 %[[arg2]]456! LLVMIR: %[[src:.*]] = bitcast <4 x float> %[[arg1]] to <2 x i64>457! LLVMIR: store <2 x i64> %[[src]], ptr %[[addr]], align 16458end subroutine vec_xstd2_test_vr4i2r4459 460! CHECK-LABEL: vec_xstd2_test_vi4i8ia4461subroutine vec_xstd2_test_vi4i8ia4(arg1, arg2, arg3, i)462 vector(integer(4)) :: arg1463 integer(8) :: arg2464 integer(4) :: arg3(10)465 integer(4) :: i466 call vec_xstd2(arg1, arg2, arg3(i))467 468! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4469! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64470! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1471! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1472! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1473! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0474! LLVMIR: %[[gep1:.*]] = getelementptr i32, ptr %2, i64 %[[iadd]]475! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %0, align 16476! LLVMIR: %[[arg2:.*]] = load i64, ptr %1, align 8477! LLVMIR: %[[gep2:.*]] = getelementptr i8, ptr %[[gep1]], i64 %[[arg2]]478! LLVMIR: %[[src:.*]] = bitcast <4 x i32> %[[arg1]] to <2 x i64>479! LLVMIR: store <2 x i64> %[[src]], ptr %[[gep2]], align 16480end subroutine vec_xstd2_test_vi4i8ia4481 482! CHECK-LABEL: vec_xstd2_test_vi2i4vi2483subroutine vec_xstd2_test_vi2i4vi2(arg1, arg2, arg3)484 vector(integer(2)) :: arg1485 integer(4) :: arg2486 vector(integer(2)) :: arg3487 call vec_xstd2(arg1, arg2, arg3)488 489! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %0, align 16490! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 4491! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %2, i32 %[[arg2]]492! LLVMIR: %[[src:.*]] = bitcast <8 x i16> %[[arg1]] to <2 x i64>493! LLVMIR: store <2 x i64> %[[src]], ptr %[[addr]], align 16494end subroutine vec_xstd2_test_vi2i4vi2495 496! CHECK-LABEL: vec_xstd2_test_vi4i4vai4497subroutine vec_xstd2_test_vi4i4vai4(arg1, arg2, arg3, i)498 vector(integer(4)) :: arg1499 integer(4) :: arg2500 vector(integer(4)) :: arg3(20)501 integer(4) :: i502 call vec_xstd2(arg1, arg2, arg3(i))503 504! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4505! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64506! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1507! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1508! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1509! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0510! LLVMIR: %[[gep1:.*]] = getelementptr <4 x i32>, ptr %2, i64 %[[iadd]]511! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %0, align 16512! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 4513! LLVMIR: %[[gep2:.*]] = getelementptr i8, ptr %[[gep1]], i32 %[[arg2]]514! LLVMIR: %[[src:.*]] = bitcast <4 x i32> %[[arg1]] to <2 x i64>515! LLVMIR: store <2 x i64> %[[src]], ptr %[[gep2]], align 16516end subroutine vec_xstd2_test_vi4i4vai4517 518!----------------------519! vec_xstw4520!----------------------521 522! CHECK-LABEL: vec_xstw4_test_vr4i2r4523subroutine vec_xstw4_test_vr4i2r4(arg1, arg2, arg3)524 vector(real(4)) :: arg1525 integer(2) :: arg2526 real(4) :: arg3527 call vec_xstw4(arg1, arg2, arg3)528 529 530! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %{{.*}}, align 16531! LLVMIR: %[[arg2:.*]] = load i16, ptr %{{.*}}, align 2532! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %{{.*}}, i16 %[[arg2]]533! LLVMIR: store <4 x float> %[[arg1]], ptr %[[addr]], align 16534end subroutine vec_xstw4_test_vr4i2r4535 536! CHECK-LABEL: vec_xstw4_test_vi4i8ia4537subroutine vec_xstw4_test_vi4i8ia4(arg1, arg2, arg3, i)538 vector(integer(4)) :: arg1539 integer(8) :: arg2540 integer(4) :: arg3(10)541 integer(4) :: i542 call vec_xstw4(arg1, arg2, arg3(i))543 544! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4545! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64546! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1547! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1548! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1549! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0550! LLVMIR: %[[gep1:.*]] = getelementptr i32, ptr %2, i64 %[[iadd]]551! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %0, align 16552! LLVMIR: %[[arg2:.*]] = load i64, ptr %1, align 8553! LLVMIR: %[[gep2:.*]] = getelementptr i8, ptr %[[gep1]], i64 %[[arg2]]554! LLVMIR: store <4 x i32> %[[arg1]], ptr %[[gep2]], align 16555end subroutine vec_xstw4_test_vi4i8ia4556 557! CHECK-LABEL: vec_xstw4_test_vi2i4vi2558subroutine vec_xstw4_test_vi2i4vi2(arg1, arg2, arg3)559 vector(integer(2)) :: arg1560 integer(4) :: arg2561 vector(integer(2)) :: arg3562 call vec_xstw4(arg1, arg2, arg3)563 564! LLVMIR: %[[arg1:.*]] = load <8 x i16>, ptr %0, align 16565! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 4566! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %2, i32 %[[arg2]]567! LLVMIR: %[[src:.*]] = bitcast <8 x i16> %[[arg1]] to <4 x i32>568! LLVMIR: store <4 x i32> %[[src]], ptr %[[addr]], align 16569end subroutine vec_xstw4_test_vi2i4vi2570 571! CHECK-LABEL: vec_xstw4_test_vi4i4vai4572subroutine vec_xstw4_test_vi4i4vai4(arg1, arg2, arg3, i)573 vector(integer(4)) :: arg1574 integer(4) :: arg2575 vector(integer(4)) :: arg3(20)576 integer(4) :: i577 call vec_xstw4(arg1, arg2, arg3(i))578 579! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4580! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64581! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1582! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1583! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1584! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0585! LLVMIR: %[[gep1:.*]] = getelementptr <4 x i32>, ptr %2, i64 %[[iadd]]586! LLVMIR: %[[arg1:.*]] = load <4 x i32>, ptr %0, align 16587! LLVMIR: %[[arg2:.*]] = load i32, ptr %1, align 4588! LLVMIR: %[[gep2:.*]] = getelementptr i8, ptr %[[gep1]], i32 %[[arg2]]589! LLVMIR: store <4 x i32> %[[arg1]], ptr %[[gep2]], align 16590end subroutine vec_xstw4_test_vi4i4vai4591