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1//===----------------------------------------------------------------------===//2// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.3// See https://llvm.org/LICENSE.txt for license information.4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception5//6//===----------------------------------------------------------------------===//7 8#if __CLC_FPSIZE == 329 10_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE __clc_asinh(__CLC_GENTYPE x) {11  __CLC_UINTN ux = __CLC_AS_UINTN(x);12  __CLC_UINTN ax = ux & EXSIGNBIT_SP32;13  __CLC_UINTN xsgn = ax ^ ux;14 15  // |x| <= 216  __CLC_GENTYPE t = x * x;17  __CLC_GENTYPE a =18      __clc_mad(t,19                __clc_mad(t,20                          __clc_mad(t,21                                    __clc_mad(t, -1.177198915954942694e-4f,22                                              -4.162727710583425360e-2f),23                                    -5.063201055468483248e-1f),24                          -1.480204186473758321f),25                -1.152965835871758072f);26  __CLC_GENTYPE b =27      __clc_mad(t,28                __clc_mad(t,29                          __clc_mad(t,30                                    __clc_mad(t, 6.284381367285534560e-2f,31                                              1.260024978680227945f),32                                    6.582362487198468066f),33                          11.99423176003939087f),34                6.917795026025976739f);35 36  __CLC_GENTYPE q = MATH_DIVIDE(a, b);37  __CLC_GENTYPE z1 = __clc_mad(x * t, q, x);38 39  // |x| > 240 41  // Arguments greater than 1/sqrt(epsilon) in magnitude are42  // approximated by asinh(x) = ln(2) + ln(abs(x)), with sign of x43  // Arguments such that 4.0 <= abs(x) <= 1/sqrt(epsilon) are44  // approximated by asinhf(x) = ln(abs(x) + sqrt(x*x+1))45  // with the sign of x (see Abramowitz and Stegun 4.6.20)46 47  __CLC_GENTYPE absx = __clc_fabs(x);48  __CLC_INTN hi = ax > 0x46000000U;49  __CLC_GENTYPE y = __clc_sqrt(absx * absx + 1.0f) + absx;50  y = hi ? absx : y;51  __CLC_GENTYPE r = __clc_log(y) + (hi ? 0x1.62e430p-1f : 0.0f);52  __CLC_GENTYPE z2 = __CLC_AS_GENTYPE(xsgn | __CLC_AS_UINTN(r));53 54  __CLC_GENTYPE z = ax <= 0x40000000 ? z1 : z2;55  z = __clc_select(z, x, ax < 0x39800000U || __clc_isinf(x) || __clc_isnan(x));56 57  return z;58}59 60#elif __CLC_FPSIZE == 6461 62#define NA0 -0.12845379283524906084997e063#define NA1 -0.21060688498409799700819e064#define NA2 -0.10188951822578188309186e065#define NA3 -0.13891765817243625541799e-166#define NA4 -0.10324604871728082428024e-367 68#define DA0 0.77072275701149440164511e069#define DA1 0.16104665505597338100747e170#define DA2 0.11296034614816689554875e171#define DA3 0.30079351943799465092429e072#define DA4 0.235224464765951442265117e-173 74#define NB0 -0.12186605129448852495563e075#define NB1 -0.19777978436593069928318e076#define NB2 -0.94379072395062374824320e-177#define NB3 -0.12620141363821680162036e-178#define NB4 -0.903396794842691998748349e-479 80#define DB0 0.73119630776696495279434e081#define DB1 0.15157170446881616648338e182#define DB2 0.10524909506981282725413e183#define DB3 0.27663713103600182193817e084#define DB4 0.21263492900663656707646e-185 86#define NC0 -0.81210026327726247622500e-187#define NC1 -0.12327355080668808750232e088#define NC2 -0.53704925162784720405664e-189#define NC3 -0.63106739048128554465450e-290#define NC4 -0.35326896180771371053534e-491 92#define DC0 0.48726015805581794231182e093#define DC1 0.95890837357081041150936e094#define DC2 0.62322223426940387752480e095#define DC3 0.15028684818508081155141e096#define DC4 0.10302171620320141529445e-197 98#define ND0 -0.4638179204422665073e-199#define ND1 -0.7162729496035415183e-1100#define ND2 -0.3247795155696775148e-1101#define ND3 -0.4225785421291932164e-2102#define ND4 -0.3808984717603160127e-4103#define ND5 0.8023464184964125826e-6104 105#define DD0 0.2782907534642231184e0106#define DD1 0.5549945896829343308e0107#define DD2 0.3700732511330698879e0108#define DD3 0.9395783438240780722e-1109#define DD4 0.7200057974217143034e-2110 111#define NE0 -0.121224194072430701e-4112#define NE1 -0.273145455834305218e-3113#define NE2 -0.152866982560895737e-2114#define NE3 -0.292231744584913045e-2115#define NE4 -0.174670900236060220e-2116#define NE5 -0.891754209521081538e-12117 118#define DE0 0.499426632161317606e-4119#define DE1 0.139591210395547054e-2120#define DE2 0.107665231109108629e-1121#define DE3 0.325809818749873406e-1122#define DE4 0.415222526655158363e-1123#define DE5 0.186315628774716763e-1124 125#define NF0 -0.195436610112717345e-4126#define NF1 -0.233315515113382977e-3127#define NF2 -0.645380957611087587e-3128#define NF3 -0.478948863920281252e-3129#define NF4 -0.805234112224091742e-12130#define NF5 0.246428598194879283e-13131 132#define DF0 0.822166621698664729e-4133#define DF1 0.135346265620413852e-2134#define DF2 0.602739242861830658e-2135#define DF3 0.972227795510722956e-2136#define DF4 0.510878800983771167e-2137 138#define NG0 -0.209689451648100728e-6139#define NG1 -0.219252358028695992e-5140#define NG2 -0.551641756327550939e-5141#define NG3 -0.382300259826830258e-5142#define NG4 -0.421182121910667329e-17143#define NG5 0.492236019998237684e-19144 145#define DG0 0.889178444424237735e-6146#define DG1 0.131152171690011152e-4147#define DG2 0.537955850185616847e-4148#define DG3 0.814966175170941864e-4149#define DG4 0.407786943832260752e-4150 151#define NH0 -0.178284193496441400e-6152#define NH1 -0.928734186616614974e-6153#define NH2 -0.923318925566302615e-6154#define NH3 -0.776417026702577552e-19155#define NH4 0.290845644810826014e-21156 157#define DH0 0.786694697277890964e-6158#define DH1 0.685435665630965488e-5159#define DH2 0.153780175436788329e-4160#define DH3 0.984873520613417917e-5161 162#define NI0 -0.538003743384069117e-10163#define NI1 -0.273698654196756169e-9164#define NI2 -0.268129826956403568e-9165#define NI3 -0.804163374628432850e-29166 167#define DI0 0.238083376363471960e-9168#define DI1 0.203579344621125934e-8169#define DI2 0.450836980450693209e-8170#define DI3 0.286005148753497156e-8171 172_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE __clc_asinh(__CLC_GENTYPE x) {173  const __CLC_GENTYPE rteps = 0x1.6a09e667f3bcdp-27;174  const __CLC_GENTYPE recrteps = 0x1.6a09e667f3bcdp+26;175 176  // log2_lead and log2_tail sum to an extra-precise version of log(2)177  const __CLC_GENTYPE log2_lead = 0x1.62e42ep-1;178  const __CLC_GENTYPE log2_tail = 0x1.efa39ef35793cp-25;179 180  __CLC_GENTYPE absx = __clc_fabs(x);181 182  __CLC_GENTYPE t = x * x;183  __CLC_GENTYPE pn, tn, pd, td;184 185  // XXX we are betting here that we can evaluate 8 pairs of186  // polys faster than we can grab 12 coefficients from a table187  // This also uses fewer registers188 189  // |x| >= 8190  pn = __clc_fma(t, __clc_fma(t, __clc_fma(t, NI3, NI2), NI1), NI0);191  pd = __clc_fma(t, __clc_fma(t, __clc_fma(t, DI3, DI2), DI1), DI0);192 193  tn = __clc_fma(194      t, __clc_fma(t, __clc_fma(t, __clc_fma(t, NH4, NH3), NH2), NH1), NH0);195  td = __clc_fma(t, __clc_fma(t, __clc_fma(t, DH3, DH2), DH1), DH0);196  pn = absx < 8.0 ? tn : pn;197  pd = absx < 8.0 ? td : pd;198 199  tn = __clc_fma(200      t,201      __clc_fma(t, __clc_fma(t, __clc_fma(t, __clc_fma(t, NG5, NG4), NG3), NG2),202                NG1),203      NG0);204  td = __clc_fma(205      t, __clc_fma(t, __clc_fma(t, __clc_fma(t, DG4, DG3), DG2), DG1), DG0);206  pn = absx < 4.0 ? tn : pn;207  pd = absx < 4.0 ? td : pd;208 209  tn = __clc_fma(210      t,211      __clc_fma(t, __clc_fma(t, __clc_fma(t, __clc_fma(t, NF5, NF4), NF3), NF2),212                NF1),213      NF0);214  td = __clc_fma(215      t, __clc_fma(t, __clc_fma(t, __clc_fma(t, DF4, DF3), DF2), DF1), DF0);216  pn = absx < 2.0 ? tn : pn;217  pd = absx < 2.0 ? td : pd;218 219  tn = __clc_fma(220      t,221      __clc_fma(t, __clc_fma(t, __clc_fma(t, __clc_fma(t, NE5, NE4), NE3), NE2),222                NE1),223      NE0);224  td = __clc_fma(225      t,226      __clc_fma(t, __clc_fma(t, __clc_fma(t, __clc_fma(t, DE5, DE4), DE3), DE2),227                DE1),228      DE0);229  pn = absx < 1.5 ? tn : pn;230  pd = absx < 1.5 ? td : pd;231 232  tn = __clc_fma(233      t,234      __clc_fma(t, __clc_fma(t, __clc_fma(t, __clc_fma(t, ND5, ND4), ND3), ND2),235                ND1),236      ND0);237  td = __clc_fma(238      t, __clc_fma(t, __clc_fma(t, __clc_fma(t, DD4, DD3), DD2), DD1), DD0);239  pn = absx <= 1.0 ? tn : pn;240  pd = absx <= 1.0 ? td : pd;241 242  tn = __clc_fma(243      t, __clc_fma(t, __clc_fma(t, __clc_fma(t, NC4, NC3), NC2), NC1), NC0);244  td = __clc_fma(245      t, __clc_fma(t, __clc_fma(t, __clc_fma(t, DC4, DC3), DC2), DC1), DC0);246  pn = absx < 0.75 ? tn : pn;247  pd = absx < 0.75 ? td : pd;248 249  tn = __clc_fma(250      t, __clc_fma(t, __clc_fma(t, __clc_fma(t, NB4, NB3), NB2), NB1), NB0);251  td = __clc_fma(252      t, __clc_fma(t, __clc_fma(t, __clc_fma(t, DB4, DB3), DB2), DB1), DB0);253  pn = absx < 0.5 ? tn : pn;254  pd = absx < 0.5 ? td : pd;255 256  tn = __clc_fma(257      t, __clc_fma(t, __clc_fma(t, __clc_fma(t, NA4, NA3), NA2), NA1), NA0);258  td = __clc_fma(259      t, __clc_fma(t, __clc_fma(t, __clc_fma(t, DA4, DA3), DA2), DA1), DA0);260  pn = absx < 0.25 ? tn : pn;261  pd = absx < 0.25 ? td : pd;262 263  __CLC_GENTYPE pq = MATH_DIVIDE(pn, pd);264 265  // |x| <= 1266  __CLC_GENTYPE result1 = __clc_fma(absx * t, pq, absx);267 268  // Other ranges269  __CLC_LONGN xout = absx <= 32.0 || absx > recrteps;270  __CLC_GENTYPE y = absx + __clc_sqrt(__clc_fma(absx, absx, 1.0));271  y = xout ? absx : y;272 273  __CLC_GENTYPE r1, r2;274  __CLC_INTN xexp;275  __clc_ep_log(y, &xexp, &r1, &r2);276 277  __CLC_GENTYPE dxexp = __CLC_CONVERT_GENTYPE(278      __CLC_CONVERT_LONGN(xexp) + (xout ? (__CLC_LONGN)1 : (__CLC_LONGN)0));279  r1 = __clc_fma(dxexp, log2_lead, r1);280  r2 = __clc_fma(dxexp, log2_tail, r2);281 282  // 1 < x <= 32283  __CLC_GENTYPE v2 = (pq + 0.25) / t;284  __CLC_GENTYPE r = v2 + r1;285  __CLC_GENTYPE s = ((r1 - r) + v2) + r2;286  __CLC_GENTYPE v1 = r + s;287  v2 = (r - v1) + s;288  __CLC_GENTYPE result2 = v1 + v2;289 290  // x > 32291  __CLC_GENTYPE result3 = r1 + r2;292 293  __CLC_GENTYPE ret = absx > 1.0 ? result2 : result1;294  ret = absx > 32.0 ? result3 : ret;295  ret = x < 0.0 ? -ret : ret;296 297  // NaN, +-Inf, or x small enough that asinh(x) = x298  ret = __clc_select(299      ret, x,300      __CLC_CONVERT_LONGN(__clc_isnan(x) || __clc_isinf(x) || absx < rteps));301  return ret;302}303 304#elif __CLC_FPSIZE == 16305 306_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE __clc_asinh(__CLC_GENTYPE x) {307  return __CLC_CONVERT_GENTYPE(__clc_asinh(__CLC_CONVERT_FLOATN(x)));308}309 310#endif311