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1//===----------------------------------------------------------------------===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// Computes pow using log and exp10//11//   x^y = exp(y * log(x))12//13// We take care not to lose precision in the intermediate steps14//15// When computing log, calculate it in splits:16//17//   r = f * (p_invead + p_inv_tail)18//   r = rh + rt19//20// Calculate log polynomial using r, in end addition, do:21//22//   poly = poly + ((rh-r) + rt)23//24//   lth = -r25//   ltt = ((xexp * log2_t) - poly) + logT26//   lt = lth + ltt27//28//   lh = (xexp * log2_h) + logH29//   l = lh + lt30//31// Calculate final log answer as gh and gt:32//33//   gh = l & higher-half bits34//   gt = (((ltt - (lt - lth)) + ((lh - l) + lt)) + (l - gh))35//36//   yh = y & higher-half bits37//   yt = y - yh38//39// Before entering computation of exp:40//41//   vs = ((yt*gt + yt*gh) + yh*gt)42//   v = vs + yh*gh43//   vt = ((yh*gh - v) + vs)44//45// In calculation of exp, add vt to r that is used for poly.46//47// At the end of exp, do48//49//   ((((expT * poly) + expT) + expH*poly) + expH)50//51//===----------------------------------------------------------------------===//52 53#if __CLC_FPSIZE == 3254 55_CLC_DEF _CLC_OVERLOAD __CLC_GENTYPE __clc_pow(__CLC_GENTYPE x,56                                               __CLC_GENTYPE y) {57  __CLC_GENTYPE absx = __clc_fabs(x);58  __CLC_INTN ix = __CLC_AS_INTN(x);59  __CLC_INTN ax = __CLC_AS_INTN(absx);60  __CLC_INTN xpos = ix == ax;61 62  __CLC_INTN iy = __CLC_AS_INTN(y);63  __CLC_INTN ay = __CLC_AS_INTN(__clc_fabs(y));64  __CLC_INTN ypos = iy == ay;65 66  /* Extra precise log calculation67   *  First handle case that x is close to 168   */69  __CLC_GENTYPE r = 1.0f - absx;70  __CLC_INTN near1 = __clc_fabs(r) < 0x1.0p-4f;71  __CLC_GENTYPE r2 = r * r;72 73  /* Coefficients are just 1/3, 1/4, 1/5 and 1/6 */74  __CLC_GENTYPE poly = __clc_mad(75      r,76      __clc_mad(r,77                __clc_mad(r, __clc_mad(r, 0x1.24924ap-3f, 0x1.555556p-3f),78                          0x1.99999ap-3f),79                0x1.000000p-2f),80      0x1.555556p-2f);81 82  poly *= r2 * r;83 84  __CLC_GENTYPE lth_near1 = -r2 * 0.5f;85  __CLC_GENTYPE ltt_near1 = -poly;86  __CLC_GENTYPE lt_near1 = lth_near1 + ltt_near1;87  __CLC_GENTYPE lh_near1 = -r;88  __CLC_GENTYPE l_near1 = lh_near1 + lt_near1;89 90  /* Computations for x not near 1 */91  __CLC_INTN m = __CLC_CONVERT_INTN(ax >> EXPSHIFTBITS_SP32) - EXPBIAS_SP32;92  __CLC_GENTYPE mf = __CLC_CONVERT_GENTYPE(m);93  __CLC_INTN ixs = __CLC_AS_INTN(__CLC_AS_GENTYPE(ax | 0x3f800000) - 1.0f);94  __CLC_GENTYPE mfs = __CLC_CONVERT_GENTYPE((ixs >> EXPSHIFTBITS_SP32) - 253);95  __CLC_INTN c = m == -127;96  __CLC_INTN ixn = c ? ixs : ax;97  __CLC_GENTYPE mfn = c ? mfs : mf;98 99  __CLC_INTN indx = (ixn & 0x007f0000) + ((ixn & 0x00008000) << 1);100 101  /* F - Y */102  __CLC_GENTYPE f = __CLC_AS_GENTYPE(0x3f000000 | indx) -103                    __CLC_AS_GENTYPE(0x3f000000 | (ixn & MANTBITS_SP32));104 105  indx = indx >> 16;106  __CLC_GENTYPE rh = f * __CLC_USE_TABLE(log_inv_tbl_ep_head, indx);107  __CLC_GENTYPE rt = f * __CLC_USE_TABLE(log_inv_tbl_ep_tail, indx);108  r = rh + rt;109 110  poly = __clc_mad(r, __clc_mad(r, 0x1.0p-2f, 0x1.555556p-2f), 0x1.0p-1f) *111         (r * r);112  poly += (rh - r) + rt;113 114  const __CLC_GENTYPE LOG2_HEAD = 0x1.62e000p-1f;  /* 0.693115234 */115  const __CLC_GENTYPE LOG2_TAIL = 0x1.0bfbe8p-15f; /* 0.0000319461833 */116  __CLC_GENTYPE logel = __CLC_USE_TABLE(loge_tbl_lo, indx);117  __CLC_GENTYPE logeh = __CLC_USE_TABLE(loge_tbl_hi, indx);118  __CLC_GENTYPE lth = -r;119  __CLC_GENTYPE ltt = __clc_mad(mfn, LOG2_TAIL, -poly) + logeh;120  __CLC_GENTYPE lt = lth + ltt;121  __CLC_GENTYPE lh = __clc_mad(mfn, LOG2_HEAD, logel);122  __CLC_GENTYPE l = lh + lt;123 124  /* Select near 1 or not */125  lth = near1 ? lth_near1 : lth;126  ltt = near1 ? ltt_near1 : ltt;127  lt = near1 ? lt_near1 : lt;128  lh = near1 ? lh_near1 : lh;129  l = near1 ? l_near1 : l;130 131  __CLC_GENTYPE gh = __CLC_AS_GENTYPE(__CLC_AS_UINTN(l) & 0xfffff000);132  __CLC_GENTYPE gt = ((ltt - (lt - lth)) + ((lh - l) + lt)) + (l - gh);133 134  __CLC_GENTYPE yh = __CLC_AS_GENTYPE(__CLC_AS_UINTN(iy) & 0xfffff000);135 136  __CLC_GENTYPE yt = y - yh;137 138  __CLC_GENTYPE ylogx_s = __clc_mad(gt, yh, __clc_mad(gh, yt, yt * gt));139  __CLC_GENTYPE ylogx = __clc_mad(yh, gh, ylogx_s);140  __CLC_GENTYPE ylogx_t = __clc_mad(yh, gh, -ylogx) + ylogx_s;141 142  /* Extra precise exp of ylogx */143  /* 64/log2 : 92.332482616893657 */144  const __CLC_GENTYPE R_64_BY_LOG2 = 0x1.715476p+6f;145  __CLC_INTN n = __CLC_CONVERT_INTN(ylogx * R_64_BY_LOG2);146  __CLC_GENTYPE nf = __CLC_CONVERT_GENTYPE(n);147 148  __CLC_INTN j = n & 0x3f;149  m = n >> 6;150  __CLC_INTN m2 = m << EXPSHIFTBITS_SP32;151 152  /* log2/64 lead: 0.0108032227 */153  const __CLC_GENTYPE R_LOG2_BY_64_LD = 0x1.620000p-7f;154  /* log2/64 tail: 0.0000272020388 */155  const __CLC_GENTYPE R_LOG2_BY_64_TL = 0x1.c85fdep-16f;156  r = __clc_mad(nf, -R_LOG2_BY_64_TL, __clc_mad(nf, -R_LOG2_BY_64_LD, ylogx)) +157      ylogx_t;158 159  /* Truncated Taylor series for e^r */160  poly = __clc_mad(__clc_mad(__clc_mad(r, 0x1.555556p-5f, 0x1.555556p-3f), r,161                             0x1.000000p-1f),162                   r * r, r);163 164  __CLC_GENTYPE exp_head = __CLC_USE_TABLE(exp_tbl_ep_head, j);165  __CLC_GENTYPE exp_tail = __CLC_USE_TABLE(exp_tbl_ep_tail, j);166 167  __CLC_GENTYPE expylogx =168      __clc_mad(exp_head, poly, __clc_mad(exp_tail, poly, exp_tail)) + exp_head;169  __CLC_GENTYPE sexpylogx =170      expylogx * __CLC_AS_GENTYPE((__CLC_UINTN)0x1 << (m + 149));171  __CLC_GENTYPE texpylogx = __CLC_AS_GENTYPE(__CLC_AS_INTN(expylogx) + m2);172  expylogx = m < -125 ? sexpylogx : texpylogx;173 174  /* Result is +-Inf if (ylogx + ylogx_t) > 128*log2 */175  expylogx =176      __clc_select(expylogx, __CLC_AS_GENTYPE((__CLC_UINTN)PINFBITPATT_SP32),177                   ylogx > 0x1.62e430p+6f ||178                       (ylogx == 0x1.62e430p+6f && ylogx_t > -0x1.05c610p-22f));179 180  /* Result is 0 if ylogx < -149*log2 */181  expylogx = ylogx < -0x1.9d1da0p+6f ? 0.0f : expylogx;182 183  /* Classify y:184   *   inty = 0 means not an integer.185   *   inty = 1 means odd integer.186   *   inty = 2 means even integer.187   */188 189  __CLC_INTN yexp =190      __CLC_CONVERT_INTN(ay >> EXPSHIFTBITS_SP32) - EXPBIAS_SP32 + 1;191  __CLC_INTN mask = ((__CLC_INTN)1 << (24 - yexp)) - 1;192  __CLC_INTN yodd = ((iy >> (24 - yexp)) & 0x1) != 0;193  __CLC_INTN inty = yodd ? 1 : 2;194  inty = (iy & mask) != 0 ? 0 : inty;195  inty = yexp < 1 ? 0 : inty;196  inty = yexp > 24 ? 2 : inty;197 198  __CLC_GENTYPE signval =199      __CLC_AS_GENTYPE((__CLC_AS_UINTN(expylogx) ^ SIGNBIT_SP32));200  expylogx = ((inty == 1) && !xpos) ? signval : expylogx;201  __CLC_INTN ret = __CLC_AS_INTN(expylogx);202 203  /* Corner case handling */204  ret = (!xpos && (inty == 0)) ? QNANBITPATT_SP32 : ret;205  ret = ax < 0x3f800000 && iy == (__CLC_INTN)NINFBITPATT_SP32 ? PINFBITPATT_SP32206                                                              : ret;207  ret = ax > 0x3f800000 && iy == (__CLC_INTN)NINFBITPATT_SP32 ? 0 : ret;208  ret = ax < 0x3f800000 && iy == (__CLC_INTN)PINFBITPATT_SP32 ? 0 : ret;209  ret = ax > 0x3f800000 && iy == (__CLC_INTN)PINFBITPATT_SP32 ? PINFBITPATT_SP32210                                                              : ret;211  __CLC_BIT_INTN x_is_ninf = ix == (__CLC_INTN)NINFBITPATT_SP32;212  __CLC_BIT_INTN x_is_pinf = ix == (__CLC_INTN)PINFBITPATT_SP32;213  __CLC_INTN xinf =214      xpos ? (__CLC_INTN)PINFBITPATT_SP32 : (__CLC_INTN)NINFBITPATT_SP32;215 216  ret = ((ax == 0) && !ypos && (inty == 1)) ? xinf : ret;217  ret = ((ax == 0) && !ypos && (inty != 1)) ? PINFBITPATT_SP32 : ret;218  __CLC_INTN xzero = xpos ? (__CLC_INTN)0 : (__CLC_INTN)0x80000000;219  ret = ((ax == 0) && ypos && (inty == 1)) ? xzero : ret;220  ret = ((ax == 0) && ypos && (inty != 1)) ? 0 : ret;221  ret = ((ax == 0) && (iy == (__CLC_INTN)NINFBITPATT_SP32)) ? PINFBITPATT_SP32222                                                            : ret;223  ret = (ix == (__CLC_INTN)0xbf800000 && ay == PINFBITPATT_SP32) ? 0x3f800000224                                                                 : ret;225  ret = (x_is_ninf && !ypos && (inty == 1)) ? (__CLC_INTN)0x80000000 : ret;226  ret = (x_is_ninf && !ypos && (inty != 1)) ? 0 : ret;227  ret = (x_is_ninf && ypos && (inty == 1)) ? (__CLC_INTN)NINFBITPATT_SP32 : ret;228  ret = (x_is_ninf && ypos && (inty != 1)) ? (__CLC_INTN)PINFBITPATT_SP32 : ret;229  ret = (x_is_pinf && !ypos) ? 0 : ret;230  ret = (x_is_pinf && ypos) ? PINFBITPATT_SP32 : ret;231  ret = (ax > PINFBITPATT_SP32) ? ix : ret;232  ret = (ay > PINFBITPATT_SP32) ? iy : ret;233  ret = ay == 0 ? 0x3f800000 : ret;234  ret = ix == 0x3f800000 ? 0x3f800000 : ret;235 236  return __CLC_AS_GENTYPE(ret);237}238 239#elif __CLC_FPSIZE == 64240 241_CLC_DEF _CLC_OVERLOAD __CLC_GENTYPE __clc_pow(__CLC_GENTYPE x,242                                               __CLC_GENTYPE y) {243  const __CLC_GENTYPE real_log2_tail = 5.76999904754328540596e-08;244  const __CLC_GENTYPE real_log2_lead = 6.93147122859954833984e-01;245 246  __CLC_LONGN ux = __CLC_AS_LONGN(x);247  __CLC_LONGN ax = __CLC_AS_LONGN(__clc_fabs(x));248  __CLC_BIT_INTN xpos = ax == ux;249 250  __CLC_LONGN uy = __CLC_AS_LONGN(y);251  __CLC_LONGN ay = __CLC_AS_LONGN(__clc_fabs(y));252  __CLC_BIT_INTN ypos = ay == uy;253 254  // Extended precision log255  __CLC_GENTYPE v, vt;256  {257    __CLC_INTN exp = __CLC_CONVERT_INTN(ax >> 52) - 1023;258    __CLC_INTN mask_exp_1023 = exp == (__CLC_INTN)-1023;259    __CLC_GENTYPE xexp = __CLC_CONVERT_GENTYPE(exp);260    __CLC_LONGN mantissa = ax & 0x000FFFFFFFFFFFFFL;261 262    __CLC_LONGN temp_ux =263        __CLC_AS_LONGN(__CLC_AS_GENTYPE(0x3ff0000000000000L | mantissa) - 1.0);264    exp = __CLC_CONVERT_INTN((temp_ux & 0x7FF0000000000000L) >> 52) - 2045;265    __CLC_GENTYPE xexp1 = __CLC_CONVERT_GENTYPE(exp);266    __CLC_LONGN mantissa1 = temp_ux & 0x000FFFFFFFFFFFFFL;267 268    xexp = __CLC_CONVERT_LONGN(mask_exp_1023) ? xexp1 : xexp;269    mantissa = __CLC_CONVERT_LONGN(mask_exp_1023) ? mantissa1 : mantissa;270 271    __CLC_LONGN rax = (mantissa & 0x000ff00000000000) +272                      ((mantissa & 0x0000080000000000) << 1);273    __CLC_INTN index = __CLC_CONVERT_INTN(rax >> 44);274 275    __CLC_GENTYPE F = __CLC_AS_GENTYPE(rax | 0x3FE0000000000000L);276    __CLC_GENTYPE Y = __CLC_AS_GENTYPE(mantissa | 0x3FE0000000000000L);277    __CLC_GENTYPE f = F - Y;278    __CLC_GENTYPE log_h = __CLC_USE_TABLE(log_f_inv_tbl_head, index);279    __CLC_GENTYPE log_t = __CLC_USE_TABLE(log_f_inv_tbl_tail, index);280    __CLC_GENTYPE f_inv = (log_h + log_t) * f;281    __CLC_GENTYPE r1 =282        __CLC_AS_GENTYPE(__CLC_AS_ULONGN(f_inv) & 0xfffffffff8000000L);283    __CLC_GENTYPE r2 = __clc_fma(-F, r1, f) * (log_h + log_t);284    __CLC_GENTYPE r = r1 + r2;285 286    __CLC_GENTYPE poly = __clc_fma(287        r,288        __clc_fma(r,289                  __clc_fma(r, __clc_fma(r, 1.0 / 7.0, 1.0 / 6.0), 1.0 / 5.0),290                  1.0 / 4.0),291        1.0 / 3.0);292    poly = poly * r * r * r;293 294    __CLC_GENTYPE hr1r1 = 0.5 * r1 * r1;295    __CLC_GENTYPE poly0h = r1 + hr1r1;296    __CLC_GENTYPE poly0t = r1 - poly0h + hr1r1;297    poly = __clc_fma(r1, r2, __clc_fma(0.5 * r2, r2, poly)) + r2 + poly0t;298 299    log_h = __CLC_USE_TABLE(powlog_tbl_head, index);300    log_t = __CLC_USE_TABLE(powlog_tbl_tail, index);301 302    __CLC_GENTYPE resT_t = __clc_fma(xexp, real_log2_tail, +log_t) - poly;303    __CLC_GENTYPE resT = resT_t - poly0h;304    __CLC_GENTYPE resH = __clc_fma(xexp, real_log2_lead, log_h);305    __CLC_GENTYPE resT_h = poly0h;306 307    __CLC_GENTYPE H = resT + resH;308    __CLC_GENTYPE H_h =309        __CLC_AS_GENTYPE(__CLC_AS_ULONGN(H) & 0xfffffffff8000000L);310    __CLC_GENTYPE T =311        (resH - H + resT) + (resT_t - (resT + resT_h)) + (H - H_h);312    H = H_h;313 314    __CLC_GENTYPE y_head =315        __CLC_AS_GENTYPE(__CLC_AS_ULONGN(uy) & 0xfffffffff8000000L);316    __CLC_GENTYPE y_tail = y - y_head;317 318    __CLC_GENTYPE temp = __clc_fma(y_tail, H, __clc_fma(y_head, T, y_tail * T));319    v = __clc_fma(y_head, H, temp);320    vt = __clc_fma(y_head, H, -v) + temp;321  }322 323  // Now calculate exp of (v,vt)324 325  __CLC_GENTYPE expv;326  {327    const __CLC_GENTYPE max_exp_arg = 709.782712893384;328    const __CLC_GENTYPE min_exp_arg = -745.1332191019411;329    const __CLC_GENTYPE sixtyfour_by_lnof2 = 92.33248261689366;330    const __CLC_GENTYPE lnof2_by_64_head = 0.010830424260348081;331    const __CLC_GENTYPE lnof2_by_64_tail = -4.359010638708991e-10;332 333    // If v is so large that we need to return INFINITY, or so small that we334    // need to return 0, set v to known values that will produce that result. Do335    // not try to continue the computation with the original v and patch it up336    // afterwards because v may be so large that temp is out of range of int, in337    // which case that conversion, and a value based on that conversion being338    // passed to __clc_ldexp, results in undefined behavior.339    v = v > max_exp_arg ? 1000.0 : v;340    v = v < min_exp_arg ? -1000.0 : v;341 342    __CLC_GENTYPE temp = v * sixtyfour_by_lnof2;343    __CLC_INTN n = __CLC_CONVERT_INTN(temp);344    __CLC_GENTYPE dn = __CLC_CONVERT_GENTYPE(n);345    __CLC_INTN j = n & 0x0000003f;346    __CLC_INTN m = n >> 6;347 348    __CLC_GENTYPE f1 = __CLC_USE_TABLE(two_to_jby64_ep_tbl_head, j);349    __CLC_GENTYPE f2 = __CLC_USE_TABLE(two_to_jby64_ep_tbl_tail, j);350    __CLC_GENTYPE f = f1 + f2;351 352    __CLC_GENTYPE r1 = __clc_fma(dn, -lnof2_by_64_head, v);353    __CLC_GENTYPE r2 = dn * lnof2_by_64_tail;354    __CLC_GENTYPE r = (r1 + r2) + vt;355 356    __CLC_GENTYPE q =357        __clc_fma(r,358                  __clc_fma(r,359                            __clc_fma(r,360                                      __clc_fma(r, 1.38889490863777199667e-03,361                                                8.33336798434219616221e-03),362                                      4.16666666662260795726e-02),363                            1.66666666665260878863e-01),364                  5.00000000000000008883e-01);365    q = __clc_fma(r * r, q, r);366 367    expv = __clc_fma(f, q, f2) + f1;368    expv = __clc_ldexp(expv, m);369  }370 371  // See whether y is an integer.372  // inty = 0 means not an integer.373  // inty = 1 means odd integer.374  // inty = 2 means even integer.375 376  __CLC_LONGN inty;377  {378    __CLC_INTN yexp =379        __CLC_CONVERT_INTN(ay >> EXPSHIFTBITS_DP64) - EXPBIAS_DP64 + 1;380    inty = __CLC_CONVERT_LONGN(yexp < 1 ? 0 : 2);381    inty = __CLC_CONVERT_LONGN(yexp > 53) ? 2 : inty;382    __CLC_LONGN mask = ((__CLC_LONGN)1L << (53 - yexp)) - 1L;383    __CLC_LONGN inty1 = (((ay & ~mask) >> (53 - yexp)) & 1L) == 1L ? 1L : 2L;384    inty1 = (ay & mask) != 0 ? 0 : inty1;385    inty = __CLC_CONVERT_LONGN(!(yexp < 1) && !(yexp > 53)) ? inty1 : inty;386  }387 388  expv *= (inty == 1) && !xpos ? -1.0 : 1.0;389 390  __CLC_LONGN ret = __CLC_AS_LONGN(expv);391 392  // Now all the edge cases393  __CLC_BIT_INTN x_is_ninf = ux == (__CLC_LONGN)NINFBITPATT_DP64;394  __CLC_BIT_INTN x_is_pinf = ux == (__CLC_LONGN)PINFBITPATT_DP64;395  __CLC_BIT_INTN y_is_ninf = uy == (__CLC_LONGN)NINFBITPATT_DP64;396  __CLC_BIT_INTN y_is_pinf = uy == (__CLC_LONGN)PINFBITPATT_DP64;397  ret = !xpos && (inty == 0) ? QNANBITPATT_DP64 : ret;398  ret = ax < 0x3ff0000000000000L && y_is_ninf ? PINFBITPATT_DP64 : ret;399  ret = ax > 0x3ff0000000000000L && y_is_ninf ? 0L : ret;400  ret = ax < 0x3ff0000000000000L && y_is_pinf ? 0L : ret;401  ret = ax > 0x3ff0000000000000L && y_is_pinf ? PINFBITPATT_DP64 : ret;402  __CLC_LONGN xinf =403      xpos ? (__CLC_LONGN)PINFBITPATT_DP64 : (__CLC_LONGN)NINFBITPATT_DP64;404  ret = ((ax == 0L) && !ypos && (inty == 1)) ? xinf : ret;405  ret = ((ax == 0L) && !ypos && (inty != 1)) ? PINFBITPATT_DP64 : ret;406  __CLC_LONGN xzero = xpos ? (__CLC_LONGN)0L : (__CLC_LONGN)0x8000000000000000L;407  ret = ((ax == 0L) && ypos && (inty == 1)) ? xzero : ret;408  ret = ((ax == 0L) && ypos && (inty != 1)) ? 0L : ret;409  ret = ((ax == 0L) && y_is_ninf) ? PINFBITPATT_DP64 : ret;410  ret = ((ux == (__CLC_LONGN)0xbff0000000000000L) && (ay == PINFBITPATT_DP64))411            ? 0x3ff0000000000000L412            : ret;413  ret = (x_is_ninf && !ypos && (inty == 1)) ? (__CLC_LONGN)0x8000000000000000L414                                            : ret;415  ret = (x_is_ninf && !ypos && (inty != 1)) ? 0L : ret;416  ret =417      (x_is_ninf && ypos && (inty == 1)) ? (__CLC_LONGN)NINFBITPATT_DP64 : ret;418  ret =419      (x_is_ninf && ypos && (inty != 1)) ? (__CLC_LONGN)PINFBITPATT_DP64 : ret;420  ret = x_is_pinf && !ypos ? 0L : ret;421  ret = x_is_pinf && ypos ? PINFBITPATT_DP64 : ret;422  ret = ax > PINFBITPATT_DP64 ? ux : ret;423  ret = ay > PINFBITPATT_DP64 ? uy : ret;424  ret = ay == 0L ? 0x3ff0000000000000L : ret;425  ret = ux == 0x3ff0000000000000L ? 0x3ff0000000000000L : ret;426 427  return __CLC_AS_GENTYPE(ret);428}429 430#elif __CLC_FPSIZE == 16431 432_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE __clc_pow(__CLC_GENTYPE x,433                                               __CLC_GENTYPE y) {434  return __CLC_CONVERT_GENTYPE(435      __clc_pow(__CLC_CONVERT_FLOATN(x), __CLC_CONVERT_FLOATN(y)));436}437 438#endif439