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1//===----------------------------------------------------------------------===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// Computes pow using log and exp10//11// x^y = exp(y * log(x))12//13// We take care not to lose precision in the intermediate steps14//15// When computing log, calculate it in splits:16//17// r = f * (p_invead + p_inv_tail)18// r = rh + rt19//20// Calculate log polynomial using r, in end addition, do:21//22// poly = poly + ((rh-r) + rt)23//24// lth = -r25// ltt = ((xexp * log2_t) - poly) + logT26// lt = lth + ltt27//28// lh = (xexp * log2_h) + logH29// l = lh + lt30//31// Calculate final log answer as gh and gt:32//33// gh = l & higher-half bits34// gt = (((ltt - (lt - lth)) + ((lh - l) + lt)) + (l - gh))35//36// yh = y & higher-half bits37// yt = y - yh38//39// Before entering computation of exp:40//41// vs = ((yt*gt + yt*gh) + yh*gt)42// v = vs + yh*gh43// vt = ((yh*gh - v) + vs)44//45// In calculation of exp, add vt to r that is used for poly.46//47// At the end of exp, do48//49// ((((expT * poly) + expT) + expH*poly) + expH)50//51//===----------------------------------------------------------------------===//52 53#if __CLC_FPSIZE == 3254 55_CLC_DEF _CLC_OVERLOAD __CLC_GENTYPE __clc_powr(__CLC_GENTYPE x,56 __CLC_GENTYPE y) {57 __CLC_GENTYPE absx = __clc_fabs(x);58 __CLC_INTN ix = __CLC_AS_INTN(x);59 __CLC_INTN ax = __CLC_AS_INTN(absx);60 __CLC_INTN xpos = ix == ax;61 62 __CLC_INTN iy = __CLC_AS_INTN(y);63 __CLC_INTN ay = __CLC_AS_INTN(__clc_fabs(y));64 __CLC_INTN ypos = iy == ay;65 66 // Extra precise log calculation67 // First handle case that x is close to 168 __CLC_GENTYPE r = 1.0f - absx;69 __CLC_INTN near1 = __clc_fabs(r) < 0x1.0p-4f;70 __CLC_GENTYPE r2 = r * r;71 72 // Coefficients are just 1/3, 1/4, 1/5 and 1/673 __CLC_GENTYPE poly = __clc_mad(74 r,75 __clc_mad(r,76 __clc_mad(r, __clc_mad(r, 0x1.24924ap-3f, 0x1.555556p-3f),77 0x1.99999ap-3f),78 0x1.000000p-2f),79 0x1.555556p-2f);80 81 poly *= r2 * r;82 83 __CLC_GENTYPE lth_near1 = -r2 * 0.5f;84 __CLC_GENTYPE ltt_near1 = -poly;85 __CLC_GENTYPE lt_near1 = lth_near1 + ltt_near1;86 __CLC_GENTYPE lh_near1 = -r;87 __CLC_GENTYPE l_near1 = lh_near1 + lt_near1;88 89 // Computations for x not near 190 __CLC_INTN m = __CLC_CONVERT_INTN(ax >> EXPSHIFTBITS_SP32) - EXPBIAS_SP32;91 __CLC_GENTYPE mf = __CLC_CONVERT_GENTYPE(m);92 __CLC_INTN ixs = __CLC_AS_INTN(__CLC_AS_GENTYPE(ax | 0x3f800000) - 1.0f);93 __CLC_GENTYPE mfs = __CLC_CONVERT_GENTYPE((ixs >> EXPSHIFTBITS_SP32) - 253);94 __CLC_INTN c = m == -127;95 __CLC_INTN ixn = c ? ixs : ax;96 __CLC_GENTYPE mfn = c ? mfs : mf;97 98 __CLC_INTN indx = (ixn & 0x007f0000) + ((ixn & 0x00008000) << 1);99 100 // F - Y101 __CLC_GENTYPE f = __CLC_AS_GENTYPE(0x3f000000 | indx) -102 __CLC_AS_GENTYPE(0x3f000000 | (ixn & MANTBITS_SP32));103 104 indx = indx >> 16;105 __CLC_GENTYPE rh = f * __CLC_USE_TABLE(log_inv_tbl_ep_head, indx);106 __CLC_GENTYPE rt = f * __CLC_USE_TABLE(log_inv_tbl_ep_tail, indx);107 r = rh + rt;108 109 poly = __clc_mad(r, __clc_mad(r, 0x1.0p-2f, 0x1.555556p-2f), 0x1.0p-1f) *110 (r * r);111 poly += (rh - r) + rt;112 113 const __CLC_GENTYPE LOG2_HEAD = 0x1.62e000p-1f; // 0.693115234114 const __CLC_GENTYPE LOG2_TAIL = 0x1.0bfbe8p-15f; // 0.0000319461833115 __CLC_GENTYPE logel = __CLC_USE_TABLE(loge_tbl_lo, indx);116 __CLC_GENTYPE logeh = __CLC_USE_TABLE(loge_tbl_hi, indx);117 __CLC_GENTYPE lth = -r;118 __CLC_GENTYPE ltt = __clc_mad(mfn, LOG2_TAIL, -poly) + logeh;119 __CLC_GENTYPE lt = lth + ltt;120 __CLC_GENTYPE lh = __clc_mad(mfn, LOG2_HEAD, logel);121 __CLC_GENTYPE l = lh + lt;122 123 // Select near 1 or not124 lth = near1 ? lth_near1 : lth;125 ltt = near1 ? ltt_near1 : ltt;126 lt = near1 ? lt_near1 : lt;127 lh = near1 ? lh_near1 : lh;128 l = near1 ? l_near1 : l;129 130 __CLC_GENTYPE gh = __CLC_AS_GENTYPE(__CLC_AS_UINTN(l) & 0xfffff000);131 __CLC_GENTYPE gt = ((ltt - (lt - lth)) + ((lh - l) + lt)) + (l - gh);132 133 __CLC_GENTYPE yh = __CLC_AS_GENTYPE(__CLC_AS_UINTN(iy) & 0xfffff000);134 135 __CLC_GENTYPE yt = y - yh;136 137 __CLC_GENTYPE ylogx_s = __clc_mad(gt, yh, __clc_mad(gh, yt, yt * gt));138 __CLC_GENTYPE ylogx = __clc_mad(yh, gh, ylogx_s);139 __CLC_GENTYPE ylogx_t = __clc_mad(yh, gh, -ylogx) + ylogx_s;140 141 // Extra precise exp of ylogx142 // 64/log2 : 92.332482616893657143 const __CLC_GENTYPE R_64_BY_LOG2 = 0x1.715476p+6f;144 __CLC_INTN n = __CLC_CONVERT_INTN(ylogx * R_64_BY_LOG2);145 __CLC_GENTYPE nf = __CLC_CONVERT_GENTYPE(n);146 147 __CLC_INTN j = n & 0x3f;148 m = n >> 6;149 __CLC_INTN m2 = m << EXPSHIFTBITS_SP32;150 // log2/64 lead: 0.0108032227151 const __CLC_GENTYPE R_LOG2_BY_64_LD = 0x1.620000p-7f;152 // log2/64 tail: 0.0000272020388153 const __CLC_GENTYPE R_LOG2_BY_64_TL = 0x1.c85fdep-16f;154 r = __clc_mad(nf, -R_LOG2_BY_64_TL, __clc_mad(nf, -R_LOG2_BY_64_LD, ylogx)) +155 ylogx_t;156 157 // Truncated Taylor series for e^r158 poly = __clc_mad(__clc_mad(__clc_mad(r, 0x1.555556p-5f, 0x1.555556p-3f), r,159 0x1.000000p-1f),160 r * r, r);161 162 __CLC_GENTYPE exp_head = __CLC_USE_TABLE(exp_tbl_ep_head, j);163 __CLC_GENTYPE exp_tail = __CLC_USE_TABLE(exp_tbl_ep_tail, j);164 165 __CLC_GENTYPE expylogx =166 __clc_mad(exp_head, poly, __clc_mad(exp_tail, poly, exp_tail)) + exp_head;167 __CLC_GENTYPE sexpylogx =168 expylogx * __CLC_AS_GENTYPE((__CLC_INTN)0x1 << (m + 149));169 __CLC_GENTYPE texpylogx = __CLC_AS_GENTYPE(__CLC_AS_INTN(expylogx) + m2);170 expylogx = m < -125 ? sexpylogx : texpylogx;171 172 // Result is +-Inf if (ylogx + ylogx_t) > 128*log2173 expylogx =174 __clc_select(expylogx, __CLC_AS_GENTYPE((__CLC_UINTN)PINFBITPATT_SP32),175 (ylogx > 0x1.62e430p+6f) ||176 (ylogx == 0x1.62e430p+6f && ylogx_t > -0x1.05c610p-22f));177 178 // Result is 0 if ylogx < -149*log2179 expylogx = ylogx < -0x1.9d1da0p+6f ? 0.0f : expylogx;180 181 // Classify y:182 // inty = 0 means not an integer.183 // inty = 1 means odd integer.184 // inty = 2 means even integer.185 186 __CLC_INTN yexp = (__CLC_INTN)(ay >> EXPSHIFTBITS_SP32) - EXPBIAS_SP32 + 1;187 __CLC_INTN mask = ((__CLC_INTN)1 << (24 - yexp)) - 1;188 __CLC_INTN yodd = ((iy >> (24 - yexp)) & 0x1) != 0;189 __CLC_INTN inty = yodd ? 1 : 2;190 inty = (iy & mask) != 0 ? 0 : inty;191 inty = yexp < 1 ? 0 : inty;192 inty = yexp > 24 ? 2 : inty;193 194 __CLC_GENTYPE signval =195 __CLC_AS_GENTYPE((__CLC_AS_UINTN(expylogx) ^ SIGNBIT_SP32));196 expylogx = ((inty == 1) && !xpos) ? signval : expylogx;197 __CLC_INTN ret = __CLC_AS_INTN(expylogx);198 199 // Corner case handling200 __CLC_BIT_INTN y_is_ninf = iy == (__CLC_INTN)NINFBITPATT_SP32;201 __CLC_BIT_INTN y_is_pinf = iy == (__CLC_INTN)PINFBITPATT_SP32;202 __CLC_BIT_INTN x_is_inf = ax == (__CLC_INTN)PINFBITPATT_SP32;203 204 ret = ax < 0x3f800000 && y_is_ninf ? PINFBITPATT_SP32 : ret;205 ret = ax < 0x3f800000 && y_is_pinf ? 0 : ret;206 ret = ax == 0x3f800000 && ay < PINFBITPATT_SP32 ? 0x3f800000 : ret;207 ret = ax == 0x3f800000 && ay == PINFBITPATT_SP32 ? QNANBITPATT_SP32 : ret;208 ret = ax > 0x3f800000 && y_is_ninf ? 0 : ret;209 ret = ax > 0x3f800000 && y_is_pinf ? PINFBITPATT_SP32 : ret;210 ret = ((ix < PINFBITPATT_SP32) && (ay == 0)) ? 0x3f800000 : ret;211 ret = (x_is_inf && !ypos) ? 0 : ret;212 ret = (x_is_inf && ypos) ? PINFBITPATT_SP32 : ret;213 ret = (x_is_inf && y_is_pinf) ? PINFBITPATT_SP32 : ret;214 ret = (x_is_inf && (ay == 0)) ? QNANBITPATT_SP32 : ret;215 ret = ((ax == 0) && !ypos) ? PINFBITPATT_SP32 : ret;216 ret = ((ax == 0) && ypos) ? 0 : ret;217 ret = ((ax == 0) && (ay == 0)) ? QNANBITPATT_SP32 : ret;218 ret = ((ax != 0) && !xpos) ? QNANBITPATT_SP32 : ret;219 ret = ax > PINFBITPATT_SP32 ? ix : ret;220 ret = ay > PINFBITPATT_SP32 ? iy : ret;221 222 return __CLC_AS_GENTYPE(ret);223}224 225#elif __CLC_FPSIZE == 64226 227_CLC_DEF _CLC_OVERLOAD __CLC_GENTYPE __clc_powr(__CLC_GENTYPE x,228 __CLC_GENTYPE y) {229 const __CLC_GENTYPE real_log2_tail = 5.76999904754328540596e-08;230 const __CLC_GENTYPE real_log2_lead = 6.93147122859954833984e-01;231 232 __CLC_LONGN ux = __CLC_AS_LONGN(x);233 __CLC_LONGN ax = __CLC_AS_LONGN(__clc_fabs(x));234 __CLC_BIT_INTN xpos = ax == ux;235 236 __CLC_LONGN uy = __CLC_AS_LONGN(y);237 __CLC_LONGN ay = __CLC_AS_LONGN(__clc_fabs(y));238 __CLC_BIT_INTN ypos = ay == uy;239 240 // Extended precision log241 __CLC_GENTYPE v, vt;242 {243 __CLC_INTN exp = __CLC_CONVERT_INTN(ax >> 52) - 1023;244 __CLC_INTN mask_exp_1023 = exp == (__CLC_INTN)-1023;245 __CLC_GENTYPE xexp = __CLC_CONVERT_GENTYPE(exp);246 __CLC_LONGN mantissa = ax & 0x000FFFFFFFFFFFFFL;247 248 __CLC_LONGN temp_ux =249 __CLC_AS_LONGN(__CLC_AS_GENTYPE(0x3ff0000000000000L | mantissa) - 1.0);250 exp = __CLC_CONVERT_INTN((temp_ux & 0x7FF0000000000000L) >> 52) - 2045;251 __CLC_GENTYPE xexp1 = __CLC_CONVERT_GENTYPE(exp);252 __CLC_LONGN mantissa1 = temp_ux & 0x000FFFFFFFFFFFFFL;253 254 xexp = __CLC_CONVERT_LONGN(mask_exp_1023) ? xexp1 : xexp;255 mantissa = __CLC_CONVERT_LONGN(mask_exp_1023) ? mantissa1 : mantissa;256 257 __CLC_LONGN rax = (mantissa & 0x000ff00000000000) +258 ((mantissa & 0x0000080000000000) << 1);259 __CLC_INTN index = __CLC_CONVERT_INTN(rax >> 44);260 261 __CLC_GENTYPE F = __CLC_AS_GENTYPE(rax | 0x3FE0000000000000L);262 __CLC_GENTYPE Y = __CLC_AS_GENTYPE(mantissa | 0x3FE0000000000000L);263 __CLC_GENTYPE f = F - Y;264 __CLC_GENTYPE log_h = __CLC_USE_TABLE(log_f_inv_tbl_head, index);265 __CLC_GENTYPE log_t = __CLC_USE_TABLE(log_f_inv_tbl_tail, index);266 __CLC_GENTYPE f_inv = (log_h + log_t) * f;267 __CLC_GENTYPE r1 =268 __CLC_AS_GENTYPE(__CLC_AS_ULONGN(f_inv) & 0xfffffffff8000000L);269 __CLC_GENTYPE r2 = __clc_fma(-F, r1, f) * (log_h + log_t);270 __CLC_GENTYPE r = r1 + r2;271 272 __CLC_GENTYPE poly = __clc_fma(273 r,274 __clc_fma(r,275 __clc_fma(r, __clc_fma(r, 1.0 / 7.0, 1.0 / 6.0), 1.0 / 5.0),276 1.0 / 4.0),277 1.0 / 3.0);278 poly = poly * r * r * r;279 280 __CLC_GENTYPE hr1r1 = 0.5 * r1 * r1;281 __CLC_GENTYPE poly0h = r1 + hr1r1;282 __CLC_GENTYPE poly0t = r1 - poly0h + hr1r1;283 poly = __clc_fma(r1, r2, __clc_fma(0.5 * r2, r2, poly)) + r2 + poly0t;284 285 log_h = __CLC_USE_TABLE(powlog_tbl_head, index);286 log_t = __CLC_USE_TABLE(powlog_tbl_tail, index);287 288 __CLC_GENTYPE resT_t = __clc_fma(xexp, real_log2_tail, +log_t) - poly;289 __CLC_GENTYPE resT = resT_t - poly0h;290 __CLC_GENTYPE resH = __clc_fma(xexp, real_log2_lead, log_h);291 __CLC_GENTYPE resT_h = poly0h;292 293 __CLC_GENTYPE H = resT + resH;294 __CLC_GENTYPE H_h =295 __CLC_AS_GENTYPE(__CLC_AS_ULONGN(H) & 0xfffffffff8000000L);296 __CLC_GENTYPE T =297 (resH - H + resT) + (resT_t - (resT + resT_h)) + (H - H_h);298 H = H_h;299 300 __CLC_GENTYPE y_head =301 __CLC_AS_GENTYPE(__CLC_AS_ULONGN(uy) & 0xfffffffff8000000L);302 __CLC_GENTYPE y_tail = y - y_head;303 304 __CLC_GENTYPE temp = __clc_fma(y_tail, H, __clc_fma(y_head, T, y_tail * T));305 v = __clc_fma(y_head, H, temp);306 vt = __clc_fma(y_head, H, -v) + temp;307 }308 309 // Now calculate exp of (v,vt)310 311 __CLC_GENTYPE expv;312 {313 const __CLC_GENTYPE max_exp_arg = 709.782712893384;314 const __CLC_GENTYPE min_exp_arg = -745.1332191019411;315 const __CLC_GENTYPE sixtyfour_by_lnof2 = 92.33248261689366;316 const __CLC_GENTYPE lnof2_by_64_head = 0.010830424260348081;317 const __CLC_GENTYPE lnof2_by_64_tail = -4.359010638708991e-10;318 319 // If v is so large that we need to return INFINITY, or so small that we320 // need to return 0, set v to known values that will produce that result. Do321 // not try to continue the computation with the original v and patch it up322 // afterwards because v may be so large that temp is out of range of int, in323 // which case that conversion, and a value based on that conversion being324 // passed to __clc_ldexp, results in undefined behavior.325 v = v > max_exp_arg ? 1000.0 : v;326 v = v < min_exp_arg ? -1000.0 : v;327 328 __CLC_GENTYPE temp = v * sixtyfour_by_lnof2;329 __CLC_INTN n = __CLC_CONVERT_INTN(temp);330 __CLC_GENTYPE dn = __CLC_CONVERT_GENTYPE(n);331 __CLC_INTN j = n & 0x0000003f;332 __CLC_INTN m = n >> 6;333 334 __CLC_GENTYPE f1 = __CLC_USE_TABLE(two_to_jby64_ep_tbl_head, j);335 __CLC_GENTYPE f2 = __CLC_USE_TABLE(two_to_jby64_ep_tbl_tail, j);336 __CLC_GENTYPE f = f1 + f2;337 338 __CLC_GENTYPE r1 = __clc_fma(dn, -lnof2_by_64_head, v);339 __CLC_GENTYPE r2 = dn * lnof2_by_64_tail;340 __CLC_GENTYPE r = (r1 + r2) + vt;341 342 __CLC_GENTYPE q =343 __clc_fma(r,344 __clc_fma(r,345 __clc_fma(r,346 __clc_fma(r, 1.38889490863777199667e-03,347 8.33336798434219616221e-03),348 4.16666666662260795726e-02),349 1.66666666665260878863e-01),350 5.00000000000000008883e-01);351 q = __clc_fma(r * r, q, r);352 353 expv = __clc_fma(f, q, f2) + f1;354 expv = __clc_ldexp(expv, m);355 }356 357 // See whether y is an integer.358 // inty = 0 means not an integer.359 // inty = 1 means odd integer.360 // inty = 2 means even integer.361 362 __CLC_LONGN inty;363 {364 __CLC_INTN yexp =365 __CLC_CONVERT_INTN(ay >> EXPSHIFTBITS_DP64) - EXPBIAS_DP64 + 1;366 inty = __CLC_CONVERT_LONGN(yexp < 1 ? 0 : 2);367 inty = __CLC_CONVERT_LONGN(yexp > 53) ? 2 : inty;368 __CLC_LONGN mask = ((__CLC_LONGN)1L << (53 - yexp)) - 1L;369 __CLC_LONGN inty1 = (((ay & ~mask) >> (53 - yexp)) & 1L) == 1L ? 1L : 2L;370 inty1 = (ay & mask) != 0 ? 0 : inty1;371 inty = __CLC_CONVERT_LONGN(!(yexp < 1) && !(yexp > 53)) ? inty1 : inty;372 }373 374 expv *= ((inty == 1) && !xpos) ? -1.0 : 1.0;375 376 __CLC_LONGN ret = __CLC_AS_LONGN(expv);377 378 // Now all the edge cases379 __CLC_BIT_INTN y_is_ninf = uy == (__CLC_LONGN)NINFBITPATT_DP64;380 __CLC_BIT_INTN y_is_pinf = uy == (__CLC_LONGN)PINFBITPATT_DP64;381 __CLC_BIT_INTN x_is_inf = ax == (__CLC_LONGN)PINFBITPATT_DP64;382 383 ret = ax < 0x3ff0000000000000L && y_is_ninf ? PINFBITPATT_DP64 : ret;384 ret = ax < 0x3ff0000000000000L && y_is_pinf ? 0L : ret;385 ret = ax == 0x3ff0000000000000L && ay < PINFBITPATT_DP64 ? 0x3ff0000000000000L386 : ret;387 ret = ax == 0x3ff0000000000000L && ay == PINFBITPATT_DP64 ? QNANBITPATT_DP64388 : ret;389 ret = ax > 0x3ff0000000000000L && y_is_ninf ? 0L : ret;390 ret = ax > 0x3ff0000000000000L && y_is_pinf ? PINFBITPATT_DP64 : ret;391 ret = ux < PINFBITPATT_DP64 && ay == 0L ? 0x3ff0000000000000L : ret;392 ret = (x_is_inf && !ypos) ? 0L : ret;393 ret = (x_is_inf && ypos) ? PINFBITPATT_DP64 : ret;394 ret = (x_is_inf && y_is_pinf) ? PINFBITPATT_DP64 : ret;395 ret = ((ax == PINFBITPATT_DP64) && (ay == 0L)) ? QNANBITPATT_DP64 : ret;396 ret = ((ax == 0L) && !ypos) ? PINFBITPATT_DP64 : ret;397 ret = ((ax == 0L) && ypos) ? 0L : ret;398 ret = ((ax == 0L) && (ay == 0L)) ? QNANBITPATT_DP64 : ret;399 ret = ((ax != 0L) && !xpos) ? QNANBITPATT_DP64 : ret;400 ret = ax > PINFBITPATT_DP64 ? ux : ret;401 ret = ay > PINFBITPATT_DP64 ? uy : ret;402 403 return __CLC_AS_GENTYPE(ret);404}405 406#elif __CLC_FPSIZE == 16407 408_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE __clc_powr(__CLC_GENTYPE x,409 __CLC_GENTYPE y) {410 return __CLC_CONVERT_GENTYPE(411 __clc_powr(__CLC_CONVERT_FLOATN(x), __CLC_CONVERT_FLOATN(y)));412}413 414#endif415