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1// REQUIRES: aarch642// RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t.o3// RUN: echo "SECTIONS { \4// RUN: .text : { *(.text) *(.text.*) *(.newisd) } \5// RUN: .text2 : { *.(newos) } \6// RUN: .data : { *(.data) } }" > %t.script7// RUN: ld.lld --script %t.script -fix-cortex-a53-843419 -verbose %t.o -o %t2 2>&1 \8// RUN: | FileCheck -check-prefix=CHECK-PRINT %s9// RUN: llvm-objdump --no-print-imm-hex --triple=aarch64-linux-gnu -d %t2 | FileCheck %s10 11// Test cases for Cortex-A53 Erratum 843419 that involve interactions12// between the generated patches and the address of sections.13 14// See ARM-EPM-048406 Cortex_A53_MPCore_Software_Developers_Errata_Notice.pdf15// for full erratum details.16// In Summary17// 1.)18// ADRP (0xff8 or 0xffc).19// 2.)20// - load or store single register or either integer or vector registers.21// - STP or STNP of either vector or vector registers.22// - Advanced SIMD ST1 store instruction.23// - Must not write Rn.24// 3.) optional instruction, can't be a branch, must not write Rn, may read Rn.25// 4.) A load or store instruction from the Load/Store register unsigned26// immediate class using Rn as the base register.27 28// An aarch64 section can contain ranges of literal data embedded within the29// code, these ranges are encoded with mapping symbols. This tests that we30// can match the erratum sequence in code, but not data.31// - We can handle more than one patch per code range (denoted by mapping32// symbols).33// - We can handle a patch in more than range of code, with literal data34// inbetween.35// - We can handle redundant mapping symbols (two or more consecutive mapping36// symbols with the same type).37// - We can ignore erratum sequences in multiple literal data ranges.38 39// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at FF8 in unpatched output.40// CHECK: <t3_ff8_ldr>:41// CHECK-NEXT: ff8: d0000020 adrp x0, 0x600042// CHECK-NEXT: ffc: f9400021 ldr x1, [x1]43// CHECK-NEXT: 1000: 14000ff9 b 0x4fe444// CHECK-NEXT: 1004: d65f03c0 ret45 .section .text.01, "ax", %progbits46 .balign 409647 .space 4096 - 848 .globl t3_ff8_ldr49 .type t3_ff8_ldr, %function50t3_ff8_ldr:51 adrp x0, dat52 ldr x1, [x1, #0]53 ldr x0, [x0, :got_lo12:dat]54 ret55 56 // create a redundant mapping symbol as we are already in a $x range57 // some object producers unconditionally generate a mapping symbol on58 // every symbol so we need to handle the case of $x $x.59 .local $x.99960$x.999:61// CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 1FFC in unpatched output.62// CHECK: <t3_ffc_ldrsimd>:63// CHECK-NEXT: 1ffc: b0000020 adrp x0, 0x600064// CHECK-NEXT: 2000: bd400021 ldr s1, [x1]65// CHECK-NEXT: 2004: 14000bfa b 0x4fec66// CHECK-NEXT: 2008: d65f03c0 ret67 .globl t3_ffc_ldrsimd68 .type t3_ffc_ldrsimd, %function69 .space 4096 - 1270t3_ffc_ldrsimd:71 adrp x0, dat72 ldr s1, [x1, #0]73 ldr x2, [x0, :got_lo12:dat]74 ret75 76// Inline data containing bit pattern of erratum sequence, expect no patch.77 .globl t3_ffc_ldralldata78 .type t3_ff8_ldralldata, %function79 .space 4096 - 2080t3_ff8_ldralldata:81 // 0x90000000 = adrp x0, #082 .byte 0x0083 .byte 0x0084 .byte 0x0085 .byte 0x9086 // 0xf9400021 = ldr x1, [x1]87 .byte 0x2188 .byte 0x0089 .byte 0x4090 .byte 0xf991 // 0xf9400000 = ldr x0, [x0]92 .byte 0x0093 .byte 0x0094 .byte 0x4095 .byte 0xf996 // Check that we can recognise the erratum sequence post literal data.97 98// CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 3FF8 in unpatched output.99// CHECK: <t3_ffc_ldr>:100// CHECK-NEXT: 3ff8: f0000000 adrp x0, 0x6000101// CHECK-NEXT: 3ffc: f9400021 ldr x1, [x1]102// CHECK-NEXT: 4000: 140003fd b 0x4ff4103// CHECK-NEXT: 4004: d65f03c0 ret104 .space 4096 - 12105 .globl t3_ffc_ldr106 .type t3_ffc_ldr, %function107 t3_ffc_ldr:108 adrp x0, dat109 ldr x1, [x1, #0]110 ldr x0, [x0, :got_lo12:dat]111 ret112 113// CHECK: <__CortexA53843419_1000>:114// CHECK-NEXT: 4fe4: f9400c00 ldr x0, [x0, #24]115// CHECK-NEXT: 4fe8: 17fff007 b 0x1004116// CHECK: <__CortexA53843419_2004>:117// CHECK-NEXT: 4fec: f9400c02 ldr x2, [x0, #24]118// CHECK-NEXT: 4ff0: 17fff406 b 0x2008119// CHECK: <__CortexA53843419_4000>:120// CHECK-NEXT: 4ff4: f9400c00 ldr x0, [x0, #24]121// CHECK-NEXT: 4ff8: 17fffc03 b 0x4004122 123 .section .text.02, "ax", %progbits124 .space 4096 - 36125 126 // Start a new InputSectionDescription (see Linker Script) so the127 // start address will be affected by any patches added to previous128 // InputSectionDescription.129 130// CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 4FFC in unpatched output131// CHECK: <t3_ffc_str>:132// CHECK-NEXT: 4ffc: d0000000 adrp x0, 0x6000133// CHECK-NEXT: 5000: f9000021 str x1, [x1]134// CHECK-NEXT: 5004: 140003fb b 0x5ff0135// CHECK-NEXT: 5008: d65f03c0 ret136 137 .section .newisd, "ax", %progbits138 .globl t3_ffc_str139 .type t3_ffc_str, %function140t3_ffc_str:141 adrp x0, dat142 str x1, [x1, #0]143 ldr x0, [x0, :got_lo12:dat]144 ret145 .space 4096 - 28146 147// CHECK: <__CortexA53843419_5004>:148// CHECK-NEXT: 5ff0: f9400c00 ldr x0, [x0, #24]149// CHECK-NEXT: 5ff4: 17fffc05 b 0x5008150 151 // Start a new OutputSection (see Linker Script) so the152 // start address will be affected by any patches added to previous153 // InputSectionDescription.154 155//CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 5FF8 in unpatched output156// CHECK: <t3_ff8_str>:157// CHECK-NEXT: 5ff8: b0000000 adrp x0, 0x6000158// CHECK-NEXT: 5ffc: f9000021 str x1, [x1]159// CHECK-NEXT: 6000: 14000003 b 0x600c160// CHECK-NEXT: 6004: d65f03c0 ret161 162 .section .newos, "ax", %progbits163 .globl t3_ff8_str164 .type t3_ff8_str, %function165t3_ff8_str:166 adrp x0, dat167 str x1, [x1, #0]168 ldr x0, [x0, :got_lo12:dat]169 ret170 .globl _start171 .type _start, %function172_start:173 ret174 175// CHECK: <__CortexA53843419_6000>:176// CHECK-NEXT: 600c: f9400c00 ldr x0, [x0, #24]177// CHECK-NEXT: 6010: 17fffffd b 0x6004178 179 .data180 .globl dat181dat: .word 0182