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1// REQUIRES: aarch642// RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t.o3// RUN: ld.lld -fix-cortex-a53-843419 -verbose -t %t.o -o /dev/null | FileCheck %s4// Test cases for Cortex-A53 Erratum 843419 that we don't expect to recognize5// as needing a patch as one or more of the conditions isn't satisfied.6// See ARM-EPM-048406 Cortex_A53_MPCore_Software_Developers_Errata_Notice.pdf7// for full erratum details.8// In Summary9// 1.)10// ADRP (0xff8 or 0xffc)11// 2.)12// - load or store single register or either integer or vector registers13// - STP or STNP of either vector or vector registers14// - Advanced SIMD ST1 store instruction15// Must not write Rn16// 3.) optional instruction, can't be a branch, must not write Rn, may read Rn17// 4.) A load or store instruction from the Load/Store register unsigned18// immediate class using Rn as the base register19 20// Expect no patches detected.21// CHECK-NOT: detected cortex-a53-843419 erratum sequence22 23// erratum sequence but adrp (address & 0xfff) is not 0xff8 or 0xffc24 .section .text.01, "ax", %progbits25 .balign 409626 .globl t3_0_ldr27 .type t3_ff8_ldr, %function28t3_0_ldr:29 adrp x0, dat30 ldr x1, [x1, #0]31 ldr x0, [x0, :got_lo12:dat]32 ret33 34 .section .text.02, "ax", %progbits35 .balign 409636 .globl t3_ff4_ldr37 .space 4096 - 1238 .type t3_ff4_ldr, %function39t3_ff4_ldr:40 adrp x0, dat41 ldr x1, [x1, #0]42 ldr x0, [x0, :got_lo12:dat]43 ret44 45// Close matches for erratum sequence, with adrp at correct address but46// instruction 2 is a load or store but not one that matches the erratum47// conditions, but with a similar encoding to an instruction that does.48 49 // ldp is not part of sequence, although stp is.50 .section .text.03, "ax", %progbits51 .balign 409652 .globl t3_ff8_ldp53 .type t3_ff8_ldp, %function54 .space 4096 - 855t3_ff8_ldp:56 adrp x16, dat57 ldp x1,x2, [x3, #0]58 ldr x13, [x16, :got_lo12:dat]59 ret60 61 // st2 is not part of sequence although st1 is.62 .section .text.04, "ax", %progbits63 .balign 409664 .globl t3_ffc_st265 .type t3_ffc_st2, %function66 .space 4096 - 467t3_ffc_st2:68 adrp x16, dat69 st2 { v0.16b, v1.16b }, [x1]70 ldr x13, [x16, :got_lo12:dat]71 ret72 73 // st3 is not part of sequence although st1 is.74 .section .text.05, "ax", %progbits75 .balign 409676 .globl t3_ffc_st377 .type t3_ffc_st3, %function78 .space 4096 - 479t3_ffc_st3:80 adrp x16, dat81 st3 { v0.16b, v1.16b, v2.16b }, [x1], x282 ldr x13, [x16, :got_lo12:dat]83 ret84 85 // ld1 is not part of sequence although st1 is.86 .section .text.06, "ax", %progbits87 .balign 409688 .globl t3_ffc_ld289 .type t3_ffc_st3, %function90 .space 4096 - 491t3_ffc_ld1:92 adrp x16, dat93 ld1 { v0.16b }, [x2], x394 ldr x13, [x16, :got_lo12:dat]95 ret96 97 // ldnp is not part of sequence although stnp is.98 .section .text.07, "ax", %progbits99 .balign 4096100 .globl t4_ff8_ldnp101 .type t4_ff8_ldnp, %function102 .space 4096 - 8103t4_ff8_ldnp:104 adrp x7, dat105 ldnp x1,x2, [x3, #0]106 nop107 ldr x10, [x7, :got_lo12:dat]108 ret109 110// Close match for erratum sequence, with adrp at correct address but111// instruction 2 writes to Rn, with Rn as either destination or as the112// transfer register but with writeback.113 114 // ldr instruction writes to Rn115 .section .text.08, "ax", %progbits116 .balign 4096117 .globl t3_ff8_ldr118 .type t3_ff8_ldr, %function119 .space 4096 - 8120t3_ff8_ldr:121 adrp x0, dat122 ldr x0, [x1, #0]123 ldr x0, [x0, :got_lo12:dat]124 ret125 126 // str instruction writes to Rn via writeback (pre index)127 .section .text.09, "ax", %progbits128 .balign 4096129 .globl t3_ff8_str130 .type t3_ff8_str, %function131 .space 4096 - 8132t3_ff8_str:133 adrp x0, dat134 str x1, [x0, #4]!135 ldr x0, [x0, :got_lo12:dat]136 ret137 138 // ldr instruction writes to Rn via writeback (post index)139 .section .text.09, "ax", %progbits140 .balign 4096141 .globl t3_ffc_ldr142 .type t3_ffc_ldr, %function143 .space 4096 - 8144t3_ffc_ldr:145 adrp x0, dat146 ldr x1, [x0], 0x8147 ldr x0, [x0, :got_lo12:dat]148 ret149 150 // stp writes to Rn via writeback (pre index)151 .section .text.10, "ax", %progbits152 .balign 4096153 .globl t4_ffc_stppre154 .type t4_ffc_stppre, %function155 .space 4096 - 4156t4_ffc_stppre:157 adrp x16, dat158 stp x1,x2, [x16, #16]!159 mul x3, x16, x16160 ldr x14, [x16, #8]161 ret162 163 // stp writes to Rn via writeback (post index)164 .section .text.11, "ax", %progbits165 .balign 4096166 .globl t4_ff8_stppost167 .type t4_ff8_stppost, %function168 .space 4096 - 8169t4_ff8_stppost:170 adrp x16, dat171 stp x1,x2, [x16], #16172 mul x3, x16, x16173 ldr x14, [x16, #8]174 ret175 176 // st1 writes to Rn via writeback177 .section .text.12, "ax", %progbits178 .balign 4096179 .globl t3_ff8_st1180 .type t3_ff8_st1, %function181 .space 4096 - 8182t3_ff8_st1:183 adrp x16, dat184 st1 { v0.16b}, [x16], x2185 ldr x13, [x16, :got_lo12:dat]186 ret187 188// Close match for erratum sequence, but with optional instruction 3 a branch189 190 // function call via immediate191 .section .text.13, "ax", %progbits192 .balign 4096193 .globl t4_ffc_blimm194 .type t4_ffc_blimm, %function195 .space 4096 - 4196t4_ffc_blimm:197 adrp x7, dat198 stnp x1,x2, [x3, #0]199 bl t4_ffc_blimm200 ldr x10, [x7, :got_lo12:dat]201 ret202 203 // function call via register204 .section .text.14, "ax", %progbits205 .balign 4096206 .globl t4_ffc_blreg207 .type t4_ffc_blreg, %function208 .space 4096 - 4209t4_ffc_blreg:210 adrp x7, dat211 stnp x1,x2, [x3, #0]212 blr x4213 ldr x10, [x7, :got_lo12:dat]214 ret215 216 // Unconditional branch immediate217 .section .text.15, "ax", %progbits218 .balign 4096219 .globl t4_ffc_branchimm220 .type t4_ffc_branchimm, %function221 .space 4096 - 4222t4_ffc_branchimm:223 adrp x7, dat224 stnp x1,x2, [x3, #0]225 b t4_ffc_branchimm226 ldr x10, [x7, :got_lo12:dat]227 ret228 229 // Unconditional branch register230 .section .text.16, "ax", %progbits231 .balign 4096232 .globl t4_ffc_branchreg233 .type t4_ffc_branchreg, %function234 .space 4096 - 4235t4_ffc_branchreg:236 adrp x7, dat237 stnp x1,x2, [x3, #0]238 br x4239 ldr x10, [x7, :got_lo12:dat]240 ret241 242 // Conditional branch243 .section .text.17, "ax", %progbits244 .balign 4096245 .globl t4_ffc_branchcond246 .type t4_ffc_branchcond, %function247 .space 4096 - 4248t4_ffc_branchcond:249 adrp x7, dat250 stnp x1,x2, [x3, #0]251 cbz x5, t4_ffc_branchcond252 ldr x10, [x7, :got_lo12:dat]253 ret254 255 // Conditional branch immediate256 .section .text.18, "ax", %progbits257 .balign 4096258 .globl t4_ffc_branchcondimm259 .type t4_ffc_branchcondimm, %function260 .space 4096 - 4261t4_ffc_branchcondimm:262 adrp x7, dat263 stnp x1,x2, [x3, #0]264 beq t4_ffc_branchcondimm265 ldr x10, [x7, :got_lo12:dat]266 ret267 268// Bitpattern matches erratum sequence but either all or part of the sequence269// is in inline literal data270 .section .text.19, "ax", %progbits271 .balign 4096272 .globl t3_ffc_ldrtraildata273 .type t3_ff8_ldrtraildata, %function274 .space 4096 - 8275t3_ff8_ldrtraildata:276 adrp x0, dat277 ldr x1, [x1, #0]278 // 0xf9400000 = ldr x0, [x0]279 .byte 0x00280 .byte 0x00281 .byte 0x40282 .byte 0xf9283 ldr x0, [x0, :got_lo12:dat]284 ret285 286 .section .text.20, "ax", %progbits287 .balign 4096288 .globl t3_ffc_ldrpredata289 .type t3_ff8_ldrpredata, %function290 .space 4096 - 8291t3_ff8_ldrpredata:292 // 0x90000000 = adrp x0, #0293 .byte 0x00294 .byte 0x00295 .byte 0x00296 .byte 0x90297 ldr x1, [x1, #0]298 ldr x0, [x0, :got_lo12:dat]299 ret300 301 .section .text.21, "ax", %progbits302 .balign 4096303 .globl t3_ffc_ldralldata304 .type t3_ff8_ldralldata, %function305 .space 4096 - 8306t3_ff8_ldralldata:307 // 0x90000000 = adrp x0, #0308 .byte 0x00309 .byte 0x00310 .byte 0x00311 .byte 0x90312 // 0xf9400021 = ldr x1, [x1]313 .byte 0x21314 .byte 0x00315 .byte 0x40316 .byte 0xf9317 // 0xf9400000 = ldr x0, [x0]318 .byte 0x00319 .byte 0x00320 .byte 0x40321 .byte 0xf9322 323 ret324 325 .text326 .globl _start327 .type _start, %function328_start:329 ret330 331 332 333 334 335// Bitpattern matches erratum sequence but section is not executable336 .data337 .globl dat338dat: .word 0339