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1// REQUIRES: arm2// RUN: split-file %s %t3// RUN: llvm-mc --triple=armv7a-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %t/asm4// RUN: ld.lld --script %t/lds %t.o -o %t25// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --triple=armv7a-none-eabi %t2 | FileCheck %s6 7/// Test the long range encoding of R_ARM_ALU_PC_Gx sequences. We can encode an 8-bit8/// immediate rotated right by an even 4-bit field.9 10//--- lds11SECTIONS {12 .text.0 0x0100000 : AT(0x0100000) { *(.text.0) }13 .text.1 0x0800000 : AT(0x0800000) { *(.text.1) }14 .text.2 0xf0f0000 : AT(0xf0f0000) { *(.text.2) }15}16 17//--- asm18 .section .text.0, "ax", %progbits19dat1:20 .word 021 22 .section .text.1, "ax", %progbits23 .global _start24 .type _start, %function25_start:26 .inst 0xe24f0008 // sub r0, pc, #827 .inst 0xe2400004 // sub r0, r0, #428 .reloc 0, R_ARM_ALU_PC_G0_NC, dat129 .reloc 4, R_ARM_ALU_PC_G1, dat130 31 .inst 0xe24f1008 // sub r1, pc, #832 .inst 0xe2411004 // sub r1, r1, #433 .inst 0xe2411000 // sub r1, r1, #034 .reloc 8, R_ARM_ALU_PC_G0_NC, dat235 .reloc 12, R_ARM_ALU_PC_G1_NC, dat236 .reloc 16, R_ARM_ALU_PC_G2, dat237 38 .inst 0xe24f0008 // sub r0, pc, #839 .inst 0xe2400004 // sub r0, r0, #440 .inst 0xe2400000 // sub r0, r0, #041 .reloc 20, R_ARM_ALU_PC_G0_NC, dat142 .reloc 24, R_ARM_ALU_PC_G1_NC, dat143 .reloc 28, R_ARM_ALU_PC_G2, dat144 45 .inst 0xe24f0008 // sub r0, pc, #846 .inst 0xe2400004 // sub r0, r0, #447 .inst 0xe5900000 // ldr r0, [r0, #0]48 .reloc 32, R_ARM_ALU_PC_G0_NC, dat249 .reloc 36, R_ARM_ALU_PC_G1_NC, dat250 .reloc 40, R_ARM_LDR_PC_G2, dat251 52 .inst 0xe24f0008 // sub r0, pc, #853 .inst 0xe5100004 // ldr r0, [r0, #-4]54 .reloc 44, R_ARM_ALU_PC_G0_NC, dat155 .reloc 48, R_ARM_LDR_PC_G1, dat156 57 .inst 0xe24f0008 // sub r0, pc, #858 .inst 0xe2400004 // sub r0, r0, #459 .inst 0xe5900000 // ldr r0, [r0, #0]60 .reloc 52, R_ARM_ALU_PC_G0_NC, dat161 .reloc 56, R_ARM_ALU_PC_G1_NC, dat162 .reloc 60, R_ARM_LDR_PC_G2, dat163 64 .inst 0xe24f0008 // sub r0, pc, #865 .inst 0xe14000d4 // ldrd r0, [r0, #-4]66 .reloc 64, R_ARM_ALU_PC_G0_NC, dat167 .reloc 68, R_ARM_LDRS_PC_G1, dat168 69 .section .text.2, "ax", %progbits70dat2:71 .word 072 73// CHECK: 00100000 <dat1>:74// CHECK-NEXT: 100000: andeq r0, r0, r075 76// CHECK: 00800000 <_start>:77// CHECK-NEXT: 800000: sub r0, pc, #112, #1678// CHECK-NEXT: 800004: sub r0, r0, #879 80// CHECK-NEXT: 800008: add r1, pc, #232, #1281// CHECK-NEXT: 80000c: add r1, r1, #97894482// CHECK-NEXT: 800010: add r1, r1, #408083 84// CHECK-NEXT: 800014: sub r0, pc, #112, #1685// CHECK-NEXT: 800018: sub r0, r0, #2886// CHECK-NEXT: 80001c: sub r0, r0, #087 88// CHECK-NEXT: 800020: add r0, pc, #232, #1289// CHECK-NEXT: 800024: add r0, r0, #97894490// CHECK-NEXT: 800028: ldr r0, [r0, #4056]91 92// CHECK-NEXT: 80002c: sub r0, pc, #112, #1693// CHECK-NEXT: 800030: ldr r0, [r0, #-52]94 95// CHECK-NEXT: 800034: sub r0, pc, #112, #1696// CHECK-NEXT: 800038: sub r0, r0, #6097// CHECK-NEXT: 80003c: ldr r0, [r0, #-0]98 99// CHECK-NEXT: 800040: sub r0, pc, #112, #16100// CHECK-NEXT: 800044: ldrd r0, r1, [r0, #-72]101 102// CHECK: 0f0f0000 <dat2>:103// CHECK-NEXT: f0f0000: andeq r0, r0, r0104