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1// REQUIRES: arm2// RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabihf --arm-add-build-attributes %s -o %t.o3// RUN: ld.lld --fix-cortex-a8 -verbose %t.o -o %t2 2>&1 | FileCheck %s4// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x29004 --stop-address=0x29024 --no-show-raw-insn | FileCheck --check-prefix=CHECK-PATCHES %s5// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x21ffa --stop-address=0x22002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE1 %s6// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x22ffa --stop-address=0x23002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE2 %s7// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x23ffa --stop-address=0x24002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE3 %s8// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x24ff4 --stop-address=0x25002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE4 %s9// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x25ffa --stop-address=0x26002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE5 %s10// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x26ffa --stop-address=0x27002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE6 %s11// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x27ffa --stop-address=0x28002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE7 %s12// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x28ff4 --stop-address=0x29002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE8 %s13// RUN: ld.lld --fix-cortex-a8 -verbose -r %t.o -o %t3 2>&1 | FileCheck --check-prefix=CHECK-RELOCATABLE-LLD %s14// RUN: llvm-objdump --no-print-imm-hex --no-show-raw-insn -d %t3 --start-address=0xffa --stop-address=0x1002 | FileCheck --check-prefix=CHECK-RELOCATABLE %s15 16// CHECK: ld.lld: detected cortex-a8-657419 erratum sequence starting at 22FFE in unpatched output17// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 23FFE in unpatched output18// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 24FFE in unpatched output19// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 25FFE in unpatched output20// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 26FFE in unpatched output21// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 27FFE in unpatched output22// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 28FFE in unpatched output23 24/// We do not detect errors when doing a relocatable link as we don't know what25/// the final addresses are.26// CHECK-RELOCATABLE-LLD-NOT: ld.lld: detected cortex-a8-657419 erratum sequence27 28/// Basic tests for the -fix-cortex-a8 erratum fix. The full details of the29/// erratum and the patch are in ARMErrataFix.cpp . The test creates an30/// instance of the erratum every 4KiB (32-bit non-branch, followed by 32-bit31/// branch instruction, where the branch instruction spans two 4 KiB regions,32/// and the branch destination is in the first 4KiB region.33///34/// Test each 32-bit branch b.w, bcc.w, bl, blx. For b.w, bcc.w, and bl we35/// check the relocated and non-relocated forms. The blx instruction36/// always has a relocation in assembler.37 .syntax unified38 .thumb39 .text40 .global _start41 .type _start, %function42 .balign 409643 .thumb_func44_start:45 nop.w46 .space 408647 .thumb_func48 .global target49 .type target, %function50target:51/// 32-bit Branch spans 2 4KiB regions, preceded by a 32-bit non branch52/// instruction, expect a patch.53 nop.w54 b.w target55 56// CALLSITE1: 00021ffa <target>:57// CALLSITE1-NEXT: 21ffa: nop.w58// CALLSITE1-NEXT: 21ffe: b.w 0x29004 <__CortexA8657417_21FFE>59/// Expect no patch when doing a relocatable link ld -r.60// CHECK-RELOCATABLE: 00000ffa <target>:61// CHECK-RELOCATABLE-NEXT: ffa: nop.w62// CHECK-RELOCATABLE-NEXT: ffe: b.w {{.+}} @ imm = #-463 64 .space 408865 .type target2, %function66 .local target267target2:68/// 32-bit Branch and link spans 2 4KiB regions, preceded by a 32-bit69/// non branch instruction, expect a patch.70 nop.w71 bl target272 73// CALLSITE2: 00022ffa <target2>:74// CALLSITE2-NEXT: 22ffa: nop.w75// CALLSITE2-NEXT: 22ffe: bl 0x29008 <__CortexA8657417_22FFE>76 77 .space 408878 .type target3, %function79 .local target380target3:81/// 32-bit conditional branch spans 2 4KiB regions, preceded by a 32-bit82/// non branch instruction, expect a patch.83 nop.w84 beq.w target385 86// CALLSITE3: 00023ffa <target3>:87// CALLSITE3-NEXT: 23ffa: nop.w88// CALLSITE3-NEXT: 23ffe: beq.w 0x2900c <__CortexA8657417_23FFE>89 90 .space 408291 .type target4, %function92 .local target493 .arm94target4:95 bx lr96 .space 297 .thumb98/// 32-bit Branch link and exchange spans 2 4KiB regions, preceded by a99/// 32-bit non branch instruction, blx always goes via relocation. Expect100/// a patch.101 nop.w102 blx target4103 104/// Target = 0x19010 __CortexA8657417_15FFE105// CALLSITE4: 00024ff4 <target4>:106// CALLSITE4-NEXT: 24ff4: bx lr107// CALLSITE4: 24ff8: 00 00 .short 0x0000108// CALLSITE4: 24ffa: nop.w109// CALLSITE4-NEXT: 24ffe: blx 0x29010 <__CortexA8657417_24FFE>110 111/// Separate sections for source and destination of branches to force112/// a relocation.113 .section .text.0, "ax", %progbits114 .balign 2115 .global target5116 .type target5, %function117target5:118 nop.w119 .section .text.1, "ax", %progbits120 .space 4084121/// 32-bit branch spans 2 4KiB regions, preceded by a 32-bit non branch122/// instruction, expect a patch. Branch to global symbol so goes via a123/// relocation.124 nop.w125 b.w target5126 127/// Target = 0x19014 __CortexA8657417_16FFE128// CALLSITE5: 25ffa: nop.w129// CALLSITE5-NEXT: 25ffe: b.w 0x29014 <__CortexA8657417_25FFE>130 131 .section .text.2, "ax", %progbits132 .balign 2133 .global target6134 .type target6, %function135target6:136 nop.w137 .section .text.3, "ax", %progbits138 .space 4084139/// 32-bit branch and link spans 2 4KiB regions, preceded by a 32-bit140/// non branch instruction, expect a patch. Branch to global symbol so141/// goes via a relocation.142 nop.w143 bl target6144 145/// Target = 0x19018 __CortexA8657417_17FFE146// CALLSITE6: 26ffa: nop.w147// CALLSITE6-NEXT: 26ffe: bl 0x29018 <__CortexA8657417_26FFE>148 149 .section .text.4, "ax", %progbits150 .global target7151 .type target7, %function152target7:153 nop.w154 .section .text.5, "ax", %progbits155 .space 4084156/// 32-bit conditional branch spans 2 4KiB regions, preceded by a 32-bit157/// non branch instruction, expect a patch. Branch to global symbol so158/// goes via a relocation.159 nop.w160 bne.w target7161 162// CALLSITE7: 27ffa: nop.w163// CALLSITE7-NEXT: 27ffe: bne.w 0x2901c <__CortexA8657417_27FFE>164 165 .section .text.6, "ax", %progbits166 .space 4080167 .arm168 .global target8169 .type target8, %function170target8:171 bx lr172 173 .section .text.7, "ax", %progbits174 .space 2175 .thumb176/// 32-bit Branch link spans 2 4KiB regions, preceded by a 32-bit non branch177/// instruction, expect a patch. The target of the BL is in ARM state so we178/// expect it to be turned into a BLX. The patch must be in ARM state to179/// avoid a state change thunk.180 nop.w181 bl target8182 183// CALLSITE8: 00028ff4 <target8>:184// CALLSITE8-NEXT: 28ff4: bx lr185// CALLSITE8: 28ff8: 00 00 .short 0x0000186// CALLSITE8: 28ffa: nop.w187// CALLSITE8-NEXT: 28ffe: blx 0x29020 <__CortexA8657417_28FFE>188 189// CHECK-PATCHES: 00029004 <__CortexA8657417_21FFE>:190// CHECK-PATCHES-NEXT: 29004: b.w 0x21ffa <target>191 192// CHECK-PATCHES: 00029008 <__CortexA8657417_22FFE>:193// CHECK-PATCHES-NEXT: 29008: b.w 0x22ffa <target2>194 195// CHECK-PATCHES: 0002900c <__CortexA8657417_23FFE>:196// CHECK-PATCHES-NEXT: 2900c: b.w 0x23ffa <target3>197 198// CHECK-PATCHES: 00029010 <__CortexA8657417_24FFE>:199// CHECK-PATCHES-NEXT: 29010: b 0x24ff4 <target4>200 201// CHECK-PATCHES: 00029014 <__CortexA8657417_25FFE>:202// CHECK-PATCHES-NEXT: 29014: b.w 0x25002 <target5>203 204// CHECK-PATCHES: 00029018 <__CortexA8657417_26FFE>:205// CHECK-PATCHES-NEXT: 29018: b.w 0x26002 <target6>206 207// CHECK-PATCHES: 0002901c <__CortexA8657417_27FFE>:208// CHECK-PATCHES-NEXT: 2901c: b.w 0x27002 <target7>209 210// CHECK-PATCHES: 00029020 <__CortexA8657417_28FFE>:211// CHECK-PATCHES-NEXT: 29020: b 0x28ff4 <target8>212