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1// REQUIRES: arm2// RUN: rm -rf %t && split-file %s %t && cd %t3// RUN: llvm-mc -filetype=obj -arm-add-build-attributes -triple=armv6m-none-eabi asm -o v6m.o4// RUN: ld.lld --script=lds v6m.o -o v6m5// RUN: llvm-objdump --no-print-imm-hex --no-show-raw-insn -d v6m --triple=armv6m-none-eabi | FileCheck %s6 7// RUN: llvm-mc -filetype=obj -arm-add-build-attributes -triple=armv8m.base-none-eabi asm -o v8m.o8// RUN: ld.lld --script=lds v8m.o -o v8m9// RUN: llvm-objdump --no-print-imm-hex --no-show-raw-insn -d v8m --triple=armv8m.base-none-eabi | FileCheck --check-prefix=CHECKV8BASE %s10 11/// Test that short thunks are not generated for v6-m as this architecture12/// does not have the B.w instruction.13 14//--- asm15 .syntax unified16 17 .section .text_low, "ax", %progbits18 .thumb19 .type _start, %function20 .balign 421 .globl _start22_start:23 bl far24 .space 0x1000 - (. - _start)25 26/// Thunks will be inserted here. They are in short thunk range for a B.w27/// instruction. Expect v6-M to use a long thunk as v6-M does not have B.w.28/// Expect v8-m.base to use a short thunk as despite not having Thumb 2 it29/// does have B.w.30 31// CHECK-LABEL: <__Thumbv6MABSLongThunk_far>:32// CHECK-NEXT: 2000: push {r0, r1}33// CHECK-NEXT: ldr r0, [pc, #4]34// CHECK-NEXT: str r0, [sp, #4]35// CHECK-NEXT: pop {r0, pc}36// CHECK-NEXT: 01 20 00 01 .word 0x0100200137 38// CHECKV8BASE-LABEL: <__Thumbv7ABSLongThunk_far>:39// CHECKV8BASE-NEXT: 2000: b.w 0x1002000 <far>40 41 .section .text_high, "ax", %progbits42 .globl far43 .type far, %function44 .balign 445far:46 bx lr47 48//--- lds49 50PHDRS {51 low PT_LOAD FLAGS(0x1 | 0x4);52 high PT_LOAD FLAGS(0x1 | 0x4);53}54SECTIONS {55 .text_low 0x1000 : { *(.text_low) }56 .text_high 0x1002000 : { *(.text_high) }57}58