59 lines · cpp
1//===-- RegisterContext_x86.cpp ---------------------------------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9#include "RegisterContext_x86.h"10 11using namespace lldb_private;12 13// Convert the 8-bit abridged FPU Tag Word (as found in FXSAVE) to the full14// 16-bit FPU Tag Word (as found in FSAVE, and used by gdb protocol). This15// requires knowing the values of the ST(i) registers and the FPU Status Word.16uint16_t lldb_private::AbridgedToFullTagWord(uint8_t abridged_tw, uint16_t sw,17 llvm::ArrayRef<MMSReg> st_regs) {18 // Tag word is using internal FPU register numbering rather than ST(i).19 // Mapping to ST(i): i = FPU regno - TOP (Status Word, bits 11:13).20 // Here we start with FPU reg 7 and go down.21 int st = 7 - ((sw >> 11) & 7);22 uint16_t tw = 0;23 for (uint8_t mask = 0x80; mask != 0; mask >>= 1) {24 tw <<= 2;25 if (abridged_tw & mask) {26 // The register is non-empty, so we need to check the value of ST(i).27 uint16_t exp =28 st_regs[st].comp.sign_exp & 0x7fff; // Discard the sign bit.29 if (exp == 0) {30 if (st_regs[st].comp.mantissa == 0)31 tw |= 1; // Zero32 else33 tw |= 2; // Denormal34 } else if (exp == 0x7fff)35 tw |= 2; // Infinity or NaN36 // 0 if normal number37 } else38 tw |= 3; // Empty register39 40 // Rotate ST down.41 st = (st - 1) & 7;42 }43 44 return tw;45}46 47// Convert the 16-bit FPU Tag Word to the abridged 8-bit value, to be written48// into FXSAVE.49uint8_t lldb_private::FullToAbridgedTagWord(uint16_t tw) {50 uint8_t abridged_tw = 0;51 for (uint16_t mask = 0xc000; mask != 0; mask >>= 2) {52 abridged_tw <<= 1;53 // full TW uses 11 for empty registers, aTW uses 054 if ((tw & mask) != mask)55 abridged_tw |= 1;56 }57 return abridged_tw;58}59