216 lines · cpp
1//===-- RegisterInfoPOSIX_loongarch64.cpp --------------------------------===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===---------------------------------------------------------------------===//8 9#include <cassert>10#include <lldb/Utility/Flags.h>11#include <stddef.h>12 13#include "lldb/lldb-defines.h"14#include "llvm/Support/Compiler.h"15 16#include "RegisterInfoPOSIX_loongarch64.h"17 18#define GPR_OFFSET(idx) ((idx)*8 + 0)19#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))20#define FCC_OFFSET(idx) ((idx)*1 + 32 * 8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))21#define FCSR_OFFSET (8 * 1 + 32 * 8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))22#define LSX_OFFSET(idx) \23 ((idx) * 16 + sizeof(RegisterInfoPOSIX_loongarch64::GPR) + \24 sizeof(RegisterInfoPOSIX_loongarch64::FPR))25#define LASX_OFFSET(idx) \26 ((idx) * 32 + sizeof(RegisterInfoPOSIX_loongarch64::GPR) + \27 sizeof(RegisterInfoPOSIX_loongarch64::FPR) + \28 sizeof(RegisterInfoPOSIX_loongarch64::LSX))29 30#define REG_CONTEXT_SIZE \31 (sizeof(RegisterInfoPOSIX_loongarch64::GPR) + \32 sizeof(RegisterInfoPOSIX_loongarch64::FPR) + \33 sizeof(RegisterInfoPOSIX_loongarch64::LSX) + \34 sizeof(RegisterInfoPOSIX_loongarch64::LASX))35 36#define DECLARE_REGISTER_INFOS_LOONGARCH64_STRUCT37#include "RegisterInfos_loongarch64.h"38#undef DECLARE_REGISTER_INFOS_LOONGARCH64_STRUCT39 40const lldb_private::RegisterInfo *41RegisterInfoPOSIX_loongarch64::GetRegisterInfoPtr(42 const lldb_private::ArchSpec &target_arch) {43 switch (target_arch.GetMachine()) {44 case llvm::Triple::loongarch64:45 return g_register_infos_loongarch64;46 default:47 assert(false && "Unhandled target architecture.");48 return nullptr;49 }50}51 52uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterInfoCount(53 const lldb_private::ArchSpec &target_arch) {54 switch (target_arch.GetMachine()) {55 case llvm::Triple::loongarch64:56 return static_cast<uint32_t>(sizeof(g_register_infos_loongarch64) /57 sizeof(g_register_infos_loongarch64[0]));58 default:59 assert(false && "Unhandled target architecture.");60 return 0;61 }62}63 64// Number of register sets provided by this context.65enum {66 k_num_gpr_registers = gpr_last_loongarch - gpr_first_loongarch + 1,67 k_num_fpr_registers = fpr_last_loongarch - fpr_first_loongarch + 1,68 k_num_lsx_registers = lsx_last_loongarch - lsx_first_loongarch + 1,69 k_num_lasx_registers = lasx_last_loongarch - lasx_first_loongarch + 1,70 k_num_register_sets = 471};72 73// LoongArch64 general purpose registers.74static const uint32_t g_gpr_regnums_loongarch64[] = {75 gpr_r0_loongarch, gpr_r1_loongarch, gpr_r2_loongarch,76 gpr_r3_loongarch, gpr_r4_loongarch, gpr_r5_loongarch,77 gpr_r6_loongarch, gpr_r7_loongarch, gpr_r8_loongarch,78 gpr_r9_loongarch, gpr_r10_loongarch, gpr_r11_loongarch,79 gpr_r12_loongarch, gpr_r13_loongarch, gpr_r14_loongarch,80 gpr_r15_loongarch, gpr_r16_loongarch, gpr_r17_loongarch,81 gpr_r18_loongarch, gpr_r19_loongarch, gpr_r20_loongarch,82 gpr_r21_loongarch, gpr_r22_loongarch, gpr_r23_loongarch,83 gpr_r24_loongarch, gpr_r25_loongarch, gpr_r26_loongarch,84 gpr_r27_loongarch, gpr_r28_loongarch, gpr_r29_loongarch,85 gpr_r30_loongarch, gpr_r31_loongarch, gpr_orig_a0_loongarch,86 gpr_pc_loongarch, gpr_badv_loongarch, gpr_reserved0_loongarch,87 gpr_reserved1_loongarch, gpr_reserved2_loongarch, gpr_reserved3_loongarch,88 gpr_reserved4_loongarch, gpr_reserved5_loongarch, gpr_reserved6_loongarch,89 gpr_reserved7_loongarch, gpr_reserved8_loongarch, gpr_reserved9_loongarch,90 LLDB_INVALID_REGNUM};91 92static_assert(((sizeof g_gpr_regnums_loongarch64 /93 sizeof g_gpr_regnums_loongarch64[0]) -94 1) == k_num_gpr_registers,95 "g_gpr_regnums_loongarch64 has wrong number of register infos");96 97// LoongArch64 floating point registers.98static const uint32_t g_fpr_regnums_loongarch64[] = {99 fpr_f0_loongarch, fpr_f1_loongarch, fpr_f2_loongarch,100 fpr_f3_loongarch, fpr_f4_loongarch, fpr_f5_loongarch,101 fpr_f6_loongarch, fpr_f7_loongarch, fpr_f8_loongarch,102 fpr_f9_loongarch, fpr_f10_loongarch, fpr_f11_loongarch,103 fpr_f12_loongarch, fpr_f13_loongarch, fpr_f14_loongarch,104 fpr_f15_loongarch, fpr_f16_loongarch, fpr_f17_loongarch,105 fpr_f18_loongarch, fpr_f19_loongarch, fpr_f20_loongarch,106 fpr_f21_loongarch, fpr_f22_loongarch, fpr_f23_loongarch,107 fpr_f24_loongarch, fpr_f25_loongarch, fpr_f26_loongarch,108 fpr_f27_loongarch, fpr_f28_loongarch, fpr_f29_loongarch,109 fpr_f30_loongarch, fpr_f31_loongarch, fpr_fcc0_loongarch,110 fpr_fcc1_loongarch, fpr_fcc2_loongarch, fpr_fcc3_loongarch,111 fpr_fcc4_loongarch, fpr_fcc5_loongarch, fpr_fcc6_loongarch,112 fpr_fcc7_loongarch, fpr_fcsr_loongarch, LLDB_INVALID_REGNUM};113 114static_assert(((sizeof g_fpr_regnums_loongarch64 /115 sizeof g_fpr_regnums_loongarch64[0]) -116 1) == k_num_fpr_registers,117 "g_fpr_regnums_loongarch64 has wrong number of register infos");118 119// LoongArch64 lsx vector registers.120static const uint32_t g_lsx_regnums_loongarch64[] = {121 lsx_vr0_loongarch, lsx_vr1_loongarch, lsx_vr2_loongarch,122 lsx_vr3_loongarch, lsx_vr4_loongarch, lsx_vr5_loongarch,123 lsx_vr6_loongarch, lsx_vr7_loongarch, lsx_vr8_loongarch,124 lsx_vr9_loongarch, lsx_vr10_loongarch, lsx_vr11_loongarch,125 lsx_vr12_loongarch, lsx_vr13_loongarch, lsx_vr14_loongarch,126 lsx_vr15_loongarch, lsx_vr16_loongarch, lsx_vr17_loongarch,127 lsx_vr18_loongarch, lsx_vr19_loongarch, lsx_vr20_loongarch,128 lsx_vr21_loongarch, lsx_vr22_loongarch, lsx_vr23_loongarch,129 lsx_vr24_loongarch, lsx_vr25_loongarch, lsx_vr26_loongarch,130 lsx_vr27_loongarch, lsx_vr28_loongarch, lsx_vr29_loongarch,131 lsx_vr30_loongarch, lsx_vr31_loongarch, LLDB_INVALID_REGNUM};132 133static_assert(((sizeof g_lsx_regnums_loongarch64 /134 sizeof g_lsx_regnums_loongarch64[0]) -135 1) == k_num_lsx_registers,136 "g_lsx_regnums_loongarch64 has wrong number of register infos");137 138// LoongArch64 lasx vector registers.139static const uint32_t g_lasx_regnums_loongarch64[] = {140 lasx_xr0_loongarch, lasx_xr1_loongarch, lasx_xr2_loongarch,141 lasx_xr3_loongarch, lasx_xr4_loongarch, lasx_xr5_loongarch,142 lasx_xr6_loongarch, lasx_xr7_loongarch, lasx_xr8_loongarch,143 lasx_xr9_loongarch, lasx_xr10_loongarch, lasx_xr11_loongarch,144 lasx_xr12_loongarch, lasx_xr13_loongarch, lasx_xr14_loongarch,145 lasx_xr15_loongarch, lasx_xr16_loongarch, lasx_xr17_loongarch,146 lasx_xr18_loongarch, lasx_xr19_loongarch, lasx_xr20_loongarch,147 lasx_xr21_loongarch, lasx_xr22_loongarch, lasx_xr23_loongarch,148 lasx_xr24_loongarch, lasx_xr25_loongarch, lasx_xr26_loongarch,149 lasx_xr27_loongarch, lasx_xr28_loongarch, lasx_xr29_loongarch,150 lasx_xr30_loongarch, lasx_xr31_loongarch, LLDB_INVALID_REGNUM};151 152static_assert(((sizeof g_lasx_regnums_loongarch64 /153 sizeof g_lasx_regnums_loongarch64[0]) -154 1) == k_num_lasx_registers,155 "g_lasx_regnums_loongarch64 has wrong number of register infos");156 157// Register sets for LoongArch64.158static const lldb_private::RegisterSet159 g_reg_sets_loongarch64[k_num_register_sets] = {160 {"General Purpose Registers", "gpr", k_num_gpr_registers,161 g_gpr_regnums_loongarch64},162 {"Floating Point Registers", "fpr", k_num_fpr_registers,163 g_fpr_regnums_loongarch64},164 {"LSX Vector Registers", "lsx", k_num_lsx_registers,165 g_lsx_regnums_loongarch64},166 {"LASX Vector Registers", "lasx", k_num_lasx_registers,167 g_lasx_regnums_loongarch64}};168 169RegisterInfoPOSIX_loongarch64::RegisterInfoPOSIX_loongarch64(170 const lldb_private::ArchSpec &target_arch, lldb_private::Flags flags)171 : lldb_private::RegisterInfoAndSetInterface(target_arch),172 m_register_info_p(GetRegisterInfoPtr(target_arch)),173 m_register_info_count(GetRegisterInfoCount(target_arch)) {}174 175uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterCount() const {176 return m_register_info_count;177}178 179size_t RegisterInfoPOSIX_loongarch64::GetGPRSize() const {180 return sizeof(struct RegisterInfoPOSIX_loongarch64::GPR);181}182 183size_t RegisterInfoPOSIX_loongarch64::GetFPRSize() const {184 return sizeof(struct RegisterInfoPOSIX_loongarch64::FPR);185}186 187const lldb_private::RegisterInfo *188RegisterInfoPOSIX_loongarch64::GetRegisterInfo() const {189 return m_register_info_p;190}191 192size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetCount() const {193 return k_num_register_sets;194}195 196size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetFromRegisterIndex(197 uint32_t reg_index) const {198 // coverity[unsigned_compare]199 if (reg_index >= gpr_first_loongarch && reg_index <= gpr_last_loongarch)200 return GPRegSet;201 if (reg_index >= fpr_first_loongarch && reg_index <= fpr_last_loongarch)202 return FPRegSet;203 if (reg_index >= lsx_first_loongarch && reg_index <= lsx_last_loongarch)204 return LSXRegSet;205 if (reg_index >= lasx_first_loongarch && reg_index <= lasx_last_loongarch)206 return LASXRegSet;207 return LLDB_INVALID_REGNUM;208}209 210const lldb_private::RegisterSet *211RegisterInfoPOSIX_loongarch64::GetRegisterSet(size_t set_index) const {212 if (set_index < GetRegisterSetCount())213 return &g_reg_sets_loongarch64[set_index];214 return nullptr;215}216