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1//===-- RegisterInfos_mips.h -----------------------------------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===---------------------------------------------------------------------===//8 9#include <cstddef>10 11#include "lldb/Core/dwarf.h"12#include "llvm/Support/Compiler.h"13 14 15#ifdef DECLARE_REGISTER_INFOS_MIPS_STRUCT16 17// Computes the offset of the given GPR in the user data area.18#define GPR_OFFSET(regname) \19 (LLVM_EXTENSION offsetof(UserArea, gpr) + \20 LLVM_EXTENSION offsetof(GPR_linux_mips, regname))21 22// Computes the offset of the given FPR in the extended data area.23#define FPR_OFFSET(regname) \24 (LLVM_EXTENSION offsetof(UserArea, fpr) + \25 LLVM_EXTENSION offsetof(FPR_linux_mips, regname))26 27// Computes the offset of the given MSA in the extended data area.28#define MSA_OFFSET(regname) \29 (LLVM_EXTENSION offsetof(UserArea, msa) + \30 LLVM_EXTENSION offsetof(MSA_linux_mips, regname))31 32// Note that the size and offset will be updated by platform-specific classes.33#define DEFINE_GPR(reg, alt, kind1, kind2, kind3) \34 { \35 #reg, alt, sizeof(((GPR_linux_mips *) NULL)->reg) / 2, \36 GPR_OFFSET(reg), eEncodingUint, eFormatHex, \37 {kind1, kind2, kind3, ptrace_##reg##_mips, \38 gpr_##reg##_mips }, \39 NULL, NULL, NULL, 0 \40 }41 42const uint8_t dwarf_opcode_mips[] = {43 llvm::dwarf::DW_OP_regx, dwarf_sr_mips, llvm::dwarf::DW_OP_lit1,44 llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shl, llvm::dwarf::DW_OP_and,45 llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr};46 47#define DEFINE_FPR(reg, alt, kind1, kind2, kind3) \48 { \49 #reg, alt, sizeof(((FPR_linux_mips *) NULL)->reg), \50 FPR_OFFSET(reg), eEncodingIEEE754, eFormatFloat, \51 {kind1, kind2, kind3, ptrace_##reg##_mips, \52 fpr_##reg##_mips }, \53 NULL, NULL, dwarf_opcode_mips, \54 sizeof(dwarf_opcode_mips) \55 }56 57#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3) \58 { \59 #reg, alt, sizeof(((FPR_linux_mips *) NULL)->reg), \60 FPR_OFFSET(reg), eEncodingUint, eFormatHex, \61 {kind1, kind2, kind3, ptrace_##reg##_mips, \62 fpr_##reg##_mips }, \63 NULL, NULL, NULL, 0 \64 }65 66#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \67 { \68 #reg, alt, sizeof(((MSA_linux_mips *) 0)->reg), \69 MSA_OFFSET(reg), eEncodingVector, eFormatVectorOfUInt8, \70 {kind1, kind2, kind3, kind4, \71 msa_##reg##_mips }, \72 NULL, NULL, NULL, 0 \73 }74 75#define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4) \76 { \77 #reg, alt, sizeof(((MSA_linux_mips *) 0)->reg), \78 MSA_OFFSET(reg), eEncodingUint, eFormatHex, \79 {kind1, kind2, kind3, kind4, \80 msa_##reg##_mips }, \81 NULL, NULL, NULL, 0 \82 }83 84// RegisterKind: EH_Frame, DWARF, Generic, Procss Plugin, LLDB85 86static RegisterInfo g_register_infos_mips[] = {87 DEFINE_GPR(zero, "zero", dwarf_zero_mips, dwarf_zero_mips,88 LLDB_INVALID_REGNUM),89 DEFINE_GPR(r1, "at", dwarf_r1_mips, dwarf_r1_mips, LLDB_INVALID_REGNUM),90 DEFINE_GPR(r2, nullptr, dwarf_r2_mips, dwarf_r2_mips, LLDB_INVALID_REGNUM),91 DEFINE_GPR(r3, nullptr, dwarf_r3_mips, dwarf_r3_mips, LLDB_INVALID_REGNUM),92 DEFINE_GPR(r4, nullptr, dwarf_r4_mips, dwarf_r4_mips,93 LLDB_REGNUM_GENERIC_ARG1),94 DEFINE_GPR(r5, nullptr, dwarf_r5_mips, dwarf_r5_mips,95 LLDB_REGNUM_GENERIC_ARG2),96 DEFINE_GPR(r6, nullptr, dwarf_r6_mips, dwarf_r6_mips,97 LLDB_REGNUM_GENERIC_ARG3),98 DEFINE_GPR(r7, nullptr, dwarf_r7_mips, dwarf_r7_mips,99 LLDB_REGNUM_GENERIC_ARG4),100 DEFINE_GPR(r8, nullptr, dwarf_r8_mips, dwarf_r8_mips, LLDB_INVALID_REGNUM),101 DEFINE_GPR(r9, nullptr, dwarf_r9_mips, dwarf_r9_mips, LLDB_INVALID_REGNUM),102 DEFINE_GPR(r10, nullptr, dwarf_r10_mips, dwarf_r10_mips,103 LLDB_INVALID_REGNUM),104 DEFINE_GPR(r11, nullptr, dwarf_r11_mips, dwarf_r11_mips,105 LLDB_INVALID_REGNUM),106 DEFINE_GPR(r12, nullptr, dwarf_r12_mips, dwarf_r12_mips,107 LLDB_INVALID_REGNUM),108 DEFINE_GPR(r13, nullptr, dwarf_r13_mips, dwarf_r13_mips,109 LLDB_INVALID_REGNUM),110 DEFINE_GPR(r14, nullptr, dwarf_r14_mips, dwarf_r14_mips,111 LLDB_INVALID_REGNUM),112 DEFINE_GPR(r15, nullptr, dwarf_r15_mips, dwarf_r15_mips,113 LLDB_INVALID_REGNUM),114 DEFINE_GPR(r16, nullptr, dwarf_r16_mips, dwarf_r16_mips,115 LLDB_INVALID_REGNUM),116 DEFINE_GPR(r17, nullptr, dwarf_r17_mips, dwarf_r17_mips,117 LLDB_INVALID_REGNUM),118 DEFINE_GPR(r18, nullptr, dwarf_r18_mips, dwarf_r18_mips,119 LLDB_INVALID_REGNUM),120 DEFINE_GPR(r19, nullptr, dwarf_r19_mips, dwarf_r19_mips,121 LLDB_INVALID_REGNUM),122 DEFINE_GPR(r20, nullptr, dwarf_r20_mips, dwarf_r20_mips,123 LLDB_INVALID_REGNUM),124 DEFINE_GPR(r21, nullptr, dwarf_r21_mips, dwarf_r21_mips,125 LLDB_INVALID_REGNUM),126 DEFINE_GPR(r22, nullptr, dwarf_r22_mips, dwarf_r22_mips,127 LLDB_INVALID_REGNUM),128 DEFINE_GPR(r23, nullptr, dwarf_r23_mips, dwarf_r23_mips,129 LLDB_INVALID_REGNUM),130 DEFINE_GPR(r24, nullptr, dwarf_r24_mips, dwarf_r24_mips,131 LLDB_INVALID_REGNUM),132 DEFINE_GPR(r25, nullptr, dwarf_r25_mips, dwarf_r25_mips,133 LLDB_INVALID_REGNUM),134 DEFINE_GPR(r26, nullptr, dwarf_r26_mips, dwarf_r26_mips,135 LLDB_INVALID_REGNUM),136 DEFINE_GPR(r27, nullptr, dwarf_r27_mips, dwarf_r27_mips,137 LLDB_INVALID_REGNUM),138 DEFINE_GPR(gp, "gp", dwarf_gp_mips, dwarf_gp_mips, LLDB_INVALID_REGNUM),139 DEFINE_GPR(sp, "sp", dwarf_sp_mips, dwarf_sp_mips, LLDB_REGNUM_GENERIC_SP),140 DEFINE_GPR(r30, "fp", dwarf_r30_mips, dwarf_r30_mips,141 LLDB_REGNUM_GENERIC_FP),142 DEFINE_GPR(ra, "ra", dwarf_ra_mips, dwarf_ra_mips, LLDB_REGNUM_GENERIC_RA),143 DEFINE_GPR(sr, "status", dwarf_sr_mips, dwarf_sr_mips,144 LLDB_REGNUM_GENERIC_FLAGS),145 DEFINE_GPR(mullo, nullptr, dwarf_lo_mips, dwarf_lo_mips,146 LLDB_INVALID_REGNUM),147 DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips, dwarf_hi_mips,148 LLDB_INVALID_REGNUM),149 DEFINE_GPR(badvaddr, nullptr, dwarf_bad_mips, dwarf_bad_mips,150 LLDB_INVALID_REGNUM),151 DEFINE_GPR(cause, nullptr, dwarf_cause_mips, dwarf_cause_mips,152 LLDB_INVALID_REGNUM),153 DEFINE_GPR(pc, nullptr, dwarf_pc_mips, dwarf_pc_mips,154 LLDB_REGNUM_GENERIC_PC),155 DEFINE_GPR(config5, nullptr, dwarf_config5_mips, dwarf_config5_mips,156 LLDB_INVALID_REGNUM),157 DEFINE_FPR(f0, nullptr, dwarf_f0_mips, dwarf_f0_mips, LLDB_INVALID_REGNUM),158 DEFINE_FPR(f1, nullptr, dwarf_f1_mips, dwarf_f1_mips, LLDB_INVALID_REGNUM),159 DEFINE_FPR(f2, nullptr, dwarf_f2_mips, dwarf_f2_mips, LLDB_INVALID_REGNUM),160 DEFINE_FPR(f3, nullptr, dwarf_f3_mips, dwarf_f3_mips, LLDB_INVALID_REGNUM),161 DEFINE_FPR(f4, nullptr, dwarf_f4_mips, dwarf_f4_mips, LLDB_INVALID_REGNUM),162 DEFINE_FPR(f5, nullptr, dwarf_f5_mips, dwarf_f5_mips, LLDB_INVALID_REGNUM),163 DEFINE_FPR(f6, nullptr, dwarf_f6_mips, dwarf_f6_mips, LLDB_INVALID_REGNUM),164 DEFINE_FPR(f7, nullptr, dwarf_f7_mips, dwarf_f7_mips, LLDB_INVALID_REGNUM),165 DEFINE_FPR(f8, nullptr, dwarf_f8_mips, dwarf_f8_mips, LLDB_INVALID_REGNUM),166 DEFINE_FPR(f9, nullptr, dwarf_f9_mips, dwarf_f9_mips, LLDB_INVALID_REGNUM),167 DEFINE_FPR(f10, nullptr, dwarf_f10_mips, dwarf_f10_mips,168 LLDB_INVALID_REGNUM),169 DEFINE_FPR(f11, nullptr, dwarf_f11_mips, dwarf_f11_mips,170 LLDB_INVALID_REGNUM),171 DEFINE_FPR(f12, nullptr, dwarf_f12_mips, dwarf_f12_mips,172 LLDB_INVALID_REGNUM),173 DEFINE_FPR(f13, nullptr, dwarf_f13_mips, dwarf_f13_mips,174 LLDB_INVALID_REGNUM),175 DEFINE_FPR(f14, nullptr, dwarf_f14_mips, dwarf_f14_mips,176 LLDB_INVALID_REGNUM),177 DEFINE_FPR(f15, nullptr, dwarf_f15_mips, dwarf_f15_mips,178 LLDB_INVALID_REGNUM),179 DEFINE_FPR(f16, nullptr, dwarf_f16_mips, dwarf_f16_mips,180 LLDB_INVALID_REGNUM),181 DEFINE_FPR(f17, nullptr, dwarf_f17_mips, dwarf_f17_mips,182 LLDB_INVALID_REGNUM),183 DEFINE_FPR(f18, nullptr, dwarf_f18_mips, dwarf_f18_mips,184 LLDB_INVALID_REGNUM),185 DEFINE_FPR(f19, nullptr, dwarf_f19_mips, dwarf_f19_mips,186 LLDB_INVALID_REGNUM),187 DEFINE_FPR(f20, nullptr, dwarf_f20_mips, dwarf_f20_mips,188 LLDB_INVALID_REGNUM),189 DEFINE_FPR(f21, nullptr, dwarf_f21_mips, dwarf_f21_mips,190 LLDB_INVALID_REGNUM),191 DEFINE_FPR(f22, nullptr, dwarf_f22_mips, dwarf_f22_mips,192 LLDB_INVALID_REGNUM),193 DEFINE_FPR(f23, nullptr, dwarf_f23_mips, dwarf_f23_mips,194 LLDB_INVALID_REGNUM),195 DEFINE_FPR(f24, nullptr, dwarf_f24_mips, dwarf_f24_mips,196 LLDB_INVALID_REGNUM),197 DEFINE_FPR(f25, nullptr, dwarf_f25_mips, dwarf_f25_mips,198 LLDB_INVALID_REGNUM),199 DEFINE_FPR(f26, nullptr, dwarf_f26_mips, dwarf_f26_mips,200 LLDB_INVALID_REGNUM),201 DEFINE_FPR(f27, nullptr, dwarf_f27_mips, dwarf_f27_mips,202 LLDB_INVALID_REGNUM),203 DEFINE_FPR(f28, nullptr, dwarf_f28_mips, dwarf_f28_mips,204 LLDB_INVALID_REGNUM),205 DEFINE_FPR(f29, nullptr, dwarf_f29_mips, dwarf_f29_mips,206 LLDB_INVALID_REGNUM),207 DEFINE_FPR(f30, nullptr, dwarf_f30_mips, dwarf_f30_mips,208 LLDB_INVALID_REGNUM),209 DEFINE_FPR(f31, nullptr, dwarf_f31_mips, dwarf_f31_mips,210 LLDB_INVALID_REGNUM),211 DEFINE_FPR_INFO(fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips,212 LLDB_INVALID_REGNUM),213 DEFINE_FPR_INFO(fir, nullptr, dwarf_fir_mips, dwarf_fir_mips,214 LLDB_INVALID_REGNUM),215 DEFINE_FPR_INFO(config5, nullptr, dwarf_config5_mips, dwarf_config5_mips,216 LLDB_INVALID_REGNUM),217 DEFINE_MSA(w0, nullptr, dwarf_w0_mips, dwarf_w0_mips, LLDB_INVALID_REGNUM,218 LLDB_INVALID_REGNUM),219 DEFINE_MSA(w1, nullptr, dwarf_w1_mips, dwarf_w1_mips, LLDB_INVALID_REGNUM,220 LLDB_INVALID_REGNUM),221 DEFINE_MSA(w2, nullptr, dwarf_w2_mips, dwarf_w2_mips, LLDB_INVALID_REGNUM,222 LLDB_INVALID_REGNUM),223 DEFINE_MSA(w3, nullptr, dwarf_w3_mips, dwarf_w3_mips, LLDB_INVALID_REGNUM,224 LLDB_INVALID_REGNUM),225 DEFINE_MSA(w4, nullptr, dwarf_w4_mips, dwarf_w4_mips, LLDB_INVALID_REGNUM,226 LLDB_INVALID_REGNUM),227 DEFINE_MSA(w5, nullptr, dwarf_w5_mips, dwarf_w5_mips, LLDB_INVALID_REGNUM,228 LLDB_INVALID_REGNUM),229 DEFINE_MSA(w6, nullptr, dwarf_w6_mips, dwarf_w6_mips, LLDB_INVALID_REGNUM,230 LLDB_INVALID_REGNUM),231 DEFINE_MSA(w7, nullptr, dwarf_w7_mips, dwarf_w7_mips, LLDB_INVALID_REGNUM,232 LLDB_INVALID_REGNUM),233 DEFINE_MSA(w8, nullptr, dwarf_w8_mips, dwarf_w8_mips, LLDB_INVALID_REGNUM,234 LLDB_INVALID_REGNUM),235 DEFINE_MSA(w9, nullptr, dwarf_w9_mips, dwarf_w9_mips, LLDB_INVALID_REGNUM,236 LLDB_INVALID_REGNUM),237 DEFINE_MSA(w10, nullptr, dwarf_w10_mips, dwarf_w10_mips,238 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),239 DEFINE_MSA(w11, nullptr, dwarf_w11_mips, dwarf_w11_mips,240 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),241 DEFINE_MSA(w12, nullptr, dwarf_w12_mips, dwarf_w12_mips,242 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),243 DEFINE_MSA(w13, nullptr, dwarf_w13_mips, dwarf_w13_mips,244 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),245 DEFINE_MSA(w14, nullptr, dwarf_w14_mips, dwarf_w14_mips,246 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),247 DEFINE_MSA(w15, nullptr, dwarf_w15_mips, dwarf_w15_mips,248 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),249 DEFINE_MSA(w16, nullptr, dwarf_w16_mips, dwarf_w16_mips,250 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),251 DEFINE_MSA(w17, nullptr, dwarf_w17_mips, dwarf_w17_mips,252 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),253 DEFINE_MSA(w18, nullptr, dwarf_w18_mips, dwarf_w18_mips,254 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),255 DEFINE_MSA(w19, nullptr, dwarf_w19_mips, dwarf_w19_mips,256 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),257 DEFINE_MSA(w20, nullptr, dwarf_w10_mips, dwarf_w20_mips,258 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),259 DEFINE_MSA(w21, nullptr, dwarf_w21_mips, dwarf_w21_mips,260 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),261 DEFINE_MSA(w22, nullptr, dwarf_w22_mips, dwarf_w22_mips,262 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),263 DEFINE_MSA(w23, nullptr, dwarf_w23_mips, dwarf_w23_mips,264 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),265 DEFINE_MSA(w24, nullptr, dwarf_w24_mips, dwarf_w24_mips,266 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),267 DEFINE_MSA(w25, nullptr, dwarf_w25_mips, dwarf_w25_mips,268 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),269 DEFINE_MSA(w26, nullptr, dwarf_w26_mips, dwarf_w26_mips,270 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),271 DEFINE_MSA(w27, nullptr, dwarf_w27_mips, dwarf_w27_mips,272 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),273 DEFINE_MSA(w28, nullptr, dwarf_w28_mips, dwarf_w28_mips,274 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),275 DEFINE_MSA(w29, nullptr, dwarf_w29_mips, dwarf_w29_mips,276 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),277 DEFINE_MSA(w30, nullptr, dwarf_w30_mips, dwarf_w30_mips,278 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),279 DEFINE_MSA(w31, nullptr, dwarf_w31_mips, dwarf_w31_mips,280 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),281 DEFINE_MSA_INFO(mcsr, nullptr, dwarf_mcsr_mips, dwarf_mcsr_mips,282 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),283 DEFINE_MSA_INFO(mir, nullptr, dwarf_mir_mips, dwarf_mir_mips,284 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),285 DEFINE_MSA_INFO(fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips,286 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),287 DEFINE_MSA_INFO(fir, nullptr, dwarf_fir_mips, dwarf_fir_mips,288 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),289 DEFINE_MSA_INFO(config5, nullptr, dwarf_config5_mips, dwarf_config5_mips,290 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM)};291 292static_assert((sizeof(g_register_infos_mips) /293 sizeof(g_register_infos_mips[0])) == k_num_registers_mips,294 "g_register_infos_mips has wrong number of register infos");295 296#undef GPR_OFFSET297#undef FPR_OFFSET298#undef MSA_OFFSET299#undef DEFINE_GPR300#undef DEFINE_FPR301#undef DEFINE_FPR_INFO302#undef DEFINE_MSA303#undef DEFINE_MSA_INFO304 305#endif // DECLARE_REGISTER_INFOS_MIPS_STRUCT306