487 lines · c
1//===-- RegisterInfos_x86_64.h ----------------------------------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9// This file is meant to be textually included. Do not #include modular10// headers here.11 12// Computes the offset of the given GPR in the user data area.13#define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname))14 15// Computes the offset of the given FPR in the extended data area.16#define FPR_OFFSET(regname) \17 (LLVM_EXTENSION offsetof(UserArea, fpr) + \18 LLVM_EXTENSION offsetof(FPR, fxsave) + \19 LLVM_EXTENSION offsetof(FXSAVE, regname))20 21// Computes the offset of the YMM register assembled from register halves.22// Based on DNBArchImplX86_64.cpp from debugserver23#define YMM_OFFSET(reg_index) \24 (LLVM_EXTENSION offsetof(UserArea, fpr) + \25 LLVM_EXTENSION offsetof(FPR, xsave) + \26 LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + (32 * reg_index))27 28// Guarantees BNDR/BNDC offsets do not overlap with YMM offsets.29#define GDB_REMOTE_OFFSET 12830 31#define BNDR_OFFSET(reg_index) \32 (LLVM_EXTENSION offsetof(UserArea, fpr) + \33 LLVM_EXTENSION offsetof(FPR, xsave) + \34 LLVM_EXTENSION offsetof(XSAVE, mpxr[reg_index]) + GDB_REMOTE_OFFSET)35 36#define BNDC_OFFSET(reg_index) \37 (LLVM_EXTENSION offsetof(UserArea, fpr) + \38 LLVM_EXTENSION offsetof(FPR, xsave) + \39 LLVM_EXTENSION offsetof(XSAVE, mpxc[reg_index]) + GDB_REMOTE_OFFSET)40 41#ifdef DECLARE_REGISTER_INFOS_X86_64_STRUCT42 43// Number of bytes needed to represent a FPR.44#define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg)45 46// Number of bytes needed to represent the i'th FP register.47#define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes)48 49// Number of bytes needed to represent an XMM register.50#define XMM_SIZE sizeof(XMMReg)51 52// Number of bytes needed to represent a YMM register.53#define YMM_SIZE sizeof(YMMReg)54 55// Number of bytes needed to represent MPX registers.56#define BNDR_SIZE sizeof(MPXReg)57#define BNDC_SIZE sizeof(MPXCsr)58 59#define DR_SIZE sizeof(((DBG *)nullptr)->dr[0])60 61// RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB62 63// Note that the size and offset will be updated by platform-specific classes.64#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \65 { \66 #reg, alt, sizeof(((GPR *)nullptr)->reg), \67 GPR_OFFSET(reg), eEncodingUint, eFormatHex, \68 {kind1, kind2, kind3, kind4, \69 lldb_##reg##_x86_64 }, \70 nullptr, nullptr, nullptr, \71 }72 73#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \74 { \75 #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \76 {kind1, kind2, kind3, kind4, \77 lldb_##name##_x86_64 }, \78 nullptr, nullptr, nullptr, \79 }80 81#define DEFINE_FP_ST(reg, i) \82 { \83 #reg #i, nullptr, FP_SIZE, \84 LLVM_EXTENSION FPR_OFFSET( \85 stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \86 {dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, \87 LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \88 nullptr, nullptr, nullptr, \89 }90 91#define DEFINE_FP_MM(reg, i, streg) \92 { \93 #reg #i, nullptr, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]), \94 eEncodingUint, eFormatHex, \95 {dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, \96 LLDB_INVALID_REGNUM, lldb_mm##i##_x86_64 }, \97 RegisterContextPOSIX_x86::g_contained_##streg##_64, \98 RegisterContextPOSIX_x86::g_invalidate_##streg##_64, \99 nullptr, \100 }101 102#define DEFINE_XMM(reg, i) \103 { \104 #reg #i, nullptr, XMM_SIZE, \105 LLVM_EXTENSION FPR_OFFSET( \106 reg[i]), eEncodingVector, eFormatVectorOfUInt8, \107 {dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, \108 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \109 lldb_##reg##i##_x86_64 }, \110 nullptr, nullptr, nullptr, \111 }112 113#define DEFINE_YMM(reg, i) \114 { \115 #reg #i, nullptr, YMM_SIZE, \116 LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \117 {dwarf_##reg##i##h_x86_64, \118 dwarf_##reg##i##h_x86_64, \119 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \120 lldb_##reg##i##_x86_64 }, \121 nullptr, nullptr, nullptr, \122 }123 124#define DEFINE_BNDR(reg, i) \125 { \126 #reg #i, nullptr, BNDR_SIZE, \127 LLVM_EXTENSION BNDR_OFFSET(i), eEncodingVector, eFormatVectorOfUInt64, \128 {dwarf_##reg##i##_x86_64, \129 dwarf_##reg##i##_x86_64, \130 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \131 lldb_##reg##i##_x86_64 }, \132 nullptr, nullptr, nullptr, \133 }134 135#define DEFINE_BNDC(name, i) \136 { \137 #name, nullptr, BNDC_SIZE, \138 LLVM_EXTENSION BNDC_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \139 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \140 LLDB_INVALID_REGNUM, lldb_##name##_x86_64 }, \141 nullptr, nullptr, nullptr, \142 }143 144#define DEFINE_DR(reg, i) \145 { \146 #reg #i, nullptr, DR_SIZE, \147 DR_OFFSET(i), eEncodingUint, eFormatHex, \148 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \149 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \150 lldb_##reg##i##_x86_64 }, \151 nullptr, nullptr, nullptr, \152 }153 154#define DEFINE_GPR_PSEUDO_32(reg32, reg64) \155 { \156 #reg32, nullptr, 4, \157 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \158 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \159 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \160 lldb_##reg32##_x86_64 }, \161 RegisterContextPOSIX_x86::g_contained_##reg64, \162 RegisterContextPOSIX_x86::g_invalidate_##reg64, \163 nullptr, \164 }165 166#define DEFINE_GPR_PSEUDO_16(reg16, reg64) \167 { \168 #reg16, nullptr, 2, \169 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \170 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \171 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \172 lldb_##reg16##_x86_64 }, \173 RegisterContextPOSIX_x86::g_contained_##reg64, \174 RegisterContextPOSIX_x86::g_invalidate_##reg64, \175 nullptr, \176 }177 178#define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \179 { \180 #reg8, nullptr, 1, \181 GPR_OFFSET(reg64) + 1, eEncodingUint, eFormatHex, \182 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \183 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \184 lldb_##reg8##_x86_64 }, \185 RegisterContextPOSIX_x86::g_contained_##reg64, \186 RegisterContextPOSIX_x86::g_invalidate_##reg64, \187 nullptr, \188 }189 190#define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \191 { \192 #reg8, nullptr, 1, \193 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \194 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \195 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \196 lldb_##reg8##_x86_64 }, \197 RegisterContextPOSIX_x86::g_contained_##reg64, \198 RegisterContextPOSIX_x86::g_invalidate_##reg64, \199 nullptr \200 }201 202#define DEFINE_FPR_32(name, reg, kind1, kind2, kind3, kind4, reg64) \203 { \204 #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \205 {kind1, kind2, kind3, kind4, lldb_##name##_x86_64 }, \206 RegisterContextPOSIX_x86::g_contained_##reg64, \207 RegisterContextPOSIX_x86::g_invalidate_##reg64, \208 nullptr, \209 }210 211// clang-format off212static RegisterInfo g_register_infos_x86_64[] = {213// General purpose registers EH_Frame DWARF Generic Process Plugin214// =========================== ================== ================ ========================= ====================215 DEFINE_GPR(rax, nullptr, dwarf_rax_x86_64, dwarf_rax_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),216 DEFINE_GPR(rbx, nullptr, dwarf_rbx_x86_64, dwarf_rbx_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),217 DEFINE_GPR(rcx, nullptr, dwarf_rcx_x86_64, dwarf_rcx_x86_64, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM),218 DEFINE_GPR(rdx, nullptr, dwarf_rdx_x86_64, dwarf_rdx_x86_64, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM),219 DEFINE_GPR(rdi, nullptr, dwarf_rdi_x86_64, dwarf_rdi_x86_64, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM),220 DEFINE_GPR(rsi, nullptr, dwarf_rsi_x86_64, dwarf_rsi_x86_64, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM),221 DEFINE_GPR(rbp, nullptr, dwarf_rbp_x86_64, dwarf_rbp_x86_64, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),222 DEFINE_GPR(rsp, nullptr, dwarf_rsp_x86_64, dwarf_rsp_x86_64, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),223 DEFINE_GPR(r8, nullptr, dwarf_r8_x86_64, dwarf_r8_x86_64, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM),224 DEFINE_GPR(r9, nullptr, dwarf_r9_x86_64, dwarf_r9_x86_64, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM),225 DEFINE_GPR(r10, nullptr, dwarf_r10_x86_64, dwarf_r10_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),226 DEFINE_GPR(r11, nullptr, dwarf_r11_x86_64, dwarf_r11_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),227 DEFINE_GPR(r12, nullptr, dwarf_r12_x86_64, dwarf_r12_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),228 DEFINE_GPR(r13, nullptr, dwarf_r13_x86_64, dwarf_r13_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),229 DEFINE_GPR(r14, nullptr, dwarf_r14_x86_64, dwarf_r14_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),230 DEFINE_GPR(r15, nullptr, dwarf_r15_x86_64, dwarf_r15_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),231 DEFINE_GPR(rip, nullptr, dwarf_rip_x86_64, dwarf_rip_x86_64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),232 DEFINE_GPR(rflags, nullptr, dwarf_rflags_x86_64, dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),233 DEFINE_GPR(cs, nullptr, dwarf_cs_x86_64, dwarf_cs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),234 DEFINE_GPR(fs, nullptr, dwarf_fs_x86_64, dwarf_fs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),235 DEFINE_GPR(gs, nullptr, dwarf_gs_x86_64, dwarf_gs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),236 DEFINE_GPR(ss, nullptr, dwarf_ss_x86_64, dwarf_ss_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),237 DEFINE_GPR(ds, nullptr, dwarf_ds_x86_64, dwarf_ds_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),238 DEFINE_GPR(es, nullptr, dwarf_es_x86_64, dwarf_es_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),239 240 DEFINE_GPR_PSEUDO_32(eax, rax), DEFINE_GPR_PSEUDO_32(ebx, rbx),241 DEFINE_GPR_PSEUDO_32(ecx, rcx), DEFINE_GPR_PSEUDO_32(edx, rdx),242 DEFINE_GPR_PSEUDO_32(edi, rdi), DEFINE_GPR_PSEUDO_32(esi, rsi),243 DEFINE_GPR_PSEUDO_32(ebp, rbp), DEFINE_GPR_PSEUDO_32(esp, rsp),244 DEFINE_GPR_PSEUDO_32(r8d, r8), DEFINE_GPR_PSEUDO_32(r9d, r9),245 DEFINE_GPR_PSEUDO_32(r10d, r10), DEFINE_GPR_PSEUDO_32(r11d, r11),246 DEFINE_GPR_PSEUDO_32(r12d, r12), DEFINE_GPR_PSEUDO_32(r13d, r13),247 DEFINE_GPR_PSEUDO_32(r14d, r14), DEFINE_GPR_PSEUDO_32(r15d, r15),248 DEFINE_GPR_PSEUDO_16(ax, rax), DEFINE_GPR_PSEUDO_16(bx, rbx),249 DEFINE_GPR_PSEUDO_16(cx, rcx), DEFINE_GPR_PSEUDO_16(dx, rdx),250 DEFINE_GPR_PSEUDO_16(di, rdi), DEFINE_GPR_PSEUDO_16(si, rsi),251 DEFINE_GPR_PSEUDO_16(bp, rbp), DEFINE_GPR_PSEUDO_16(sp, rsp),252 DEFINE_GPR_PSEUDO_16(r8w, r8), DEFINE_GPR_PSEUDO_16(r9w, r9),253 DEFINE_GPR_PSEUDO_16(r10w, r10), DEFINE_GPR_PSEUDO_16(r11w, r11),254 DEFINE_GPR_PSEUDO_16(r12w, r12), DEFINE_GPR_PSEUDO_16(r13w, r13),255 DEFINE_GPR_PSEUDO_16(r14w, r14), DEFINE_GPR_PSEUDO_16(r15w, r15),256 DEFINE_GPR_PSEUDO_8H(ah, rax), DEFINE_GPR_PSEUDO_8H(bh, rbx),257 DEFINE_GPR_PSEUDO_8H(ch, rcx), DEFINE_GPR_PSEUDO_8H(dh, rdx),258 DEFINE_GPR_PSEUDO_8L(al, rax), DEFINE_GPR_PSEUDO_8L(bl, rbx),259 DEFINE_GPR_PSEUDO_8L(cl, rcx), DEFINE_GPR_PSEUDO_8L(dl, rdx),260 DEFINE_GPR_PSEUDO_8L(dil, rdi), DEFINE_GPR_PSEUDO_8L(sil, rsi),261 DEFINE_GPR_PSEUDO_8L(bpl, rbp), DEFINE_GPR_PSEUDO_8L(spl, rsp),262 DEFINE_GPR_PSEUDO_8L(r8l, r8), DEFINE_GPR_PSEUDO_8L(r9l, r9),263 DEFINE_GPR_PSEUDO_8L(r10l, r10), DEFINE_GPR_PSEUDO_8L(r11l, r11),264 DEFINE_GPR_PSEUDO_8L(r12l, r12), DEFINE_GPR_PSEUDO_8L(r13l, r13),265 DEFINE_GPR_PSEUDO_8L(r14l, r14), DEFINE_GPR_PSEUDO_8L(r15l, r15),266 267// i387 Floating point registers. EH_frame DWARF Generic Process Plugin reg64268// ====================================== =============== ================== =================== ==================== =====269 DEFINE_FPR(fctrl, fctrl, dwarf_fctrl_x86_64, dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),270 DEFINE_FPR(fstat, fstat, dwarf_fstat_x86_64, dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),271 DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),272 DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),273 DEFINE_FPR_32(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fip),274 DEFINE_FPR_32(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fip),275 DEFINE_FPR(fip, ptr.x86_64.fip, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),276 DEFINE_FPR_32(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fdp),277 DEFINE_FPR_32(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fdp),278 DEFINE_FPR(fdp, ptr.x86_64.fdp, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),279 DEFINE_FPR(mxcsr, mxcsr, dwarf_mxcsr_x86_64, dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),280 DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),281 282 // FP registers.283 DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2),284 DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5),285 DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7),286 287 DEFINE_FP_MM(mm, 0, st0), DEFINE_FP_MM(mm, 1, st1),288 DEFINE_FP_MM(mm, 2, st2), DEFINE_FP_MM(mm, 3, st3),289 DEFINE_FP_MM(mm, 4, st4), DEFINE_FP_MM(mm, 5, st5),290 DEFINE_FP_MM(mm, 6, st6), DEFINE_FP_MM(mm, 7, st7),291 292 // XMM registers293 DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2),294 DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5),295 DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7), DEFINE_XMM(xmm, 8),296 DEFINE_XMM(xmm, 9), DEFINE_XMM(xmm, 10), DEFINE_XMM(xmm, 11),297 DEFINE_XMM(xmm, 12), DEFINE_XMM(xmm, 13), DEFINE_XMM(xmm, 14),298 DEFINE_XMM(xmm, 15),299 300 // Copy of YMM registers assembled from xmm and ymmh301 DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2),302 DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5),303 DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7), DEFINE_YMM(ymm, 8),304 DEFINE_YMM(ymm, 9), DEFINE_YMM(ymm, 10), DEFINE_YMM(ymm, 11),305 DEFINE_YMM(ymm, 12), DEFINE_YMM(ymm, 13), DEFINE_YMM(ymm, 14),306 DEFINE_YMM(ymm, 15),307 308 // MPX registers309 DEFINE_BNDR(bnd, 0),310 DEFINE_BNDR(bnd, 1),311 DEFINE_BNDR(bnd, 2),312 DEFINE_BNDR(bnd, 3),313 314 DEFINE_BNDC(bndcfgu, 0),315 DEFINE_BNDC(bndstatus, 1),316 317 // Debug registers for lldb internal use318 DEFINE_DR(dr, 0), DEFINE_DR(dr, 1), DEFINE_DR(dr, 2), DEFINE_DR(dr, 3),319 DEFINE_DR(dr, 4), DEFINE_DR(dr, 5), DEFINE_DR(dr, 6), DEFINE_DR(dr, 7)};320 321// clang-format on322 323static_assert((sizeof(g_register_infos_x86_64) /324 sizeof(g_register_infos_x86_64[0])) == k_num_registers_x86_64,325 "g_register_infos_x86_64 has wrong number of register infos");326 327#undef FPR_SIZE328#undef FP_SIZE329#undef XMM_SIZE330#undef YMM_SIZE331#undef DEFINE_GPR332#undef DEFINE_FPR333#undef DEFINE_FP334#undef DEFINE_XMM335#undef DEFINE_YMM336#undef DEFINE_BNDR337#undef DEFINE_BNDC338#undef DEFINE_DR339#undef DEFINE_GPR_PSEUDO_32340#undef DEFINE_GPR_PSEUDO_16341#undef DEFINE_GPR_PSEUDO_8H342#undef DEFINE_GPR_PSEUDO_8L343 344#endif // DECLARE_REGISTER_INFOS_X86_64_STRUCT345 346#ifdef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS347 348#define UPDATE_GPR_INFO(reg, reg64) \349 do { \350 g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64); \351 } while (false);352 353#define UPDATE_GPR_INFO_8H(reg, reg64) \354 do { \355 g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64) + 1; \356 } while (false);357 358#define UPDATE_FPR_INFO(reg, reg64) \359 do { \360 g_register_infos[lldb_##reg##_i386].byte_offset = FPR_OFFSET(reg64); \361 } while (false);362 363#define UPDATE_FP_INFO(reg, i) \364 do { \365 g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(stmm[i]); \366 } while (false);367 368#define UPDATE_XMM_INFO(reg, i) \369 do { \370 g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(reg[i]); \371 } while (false);372 373#define UPDATE_YMM_INFO(reg, i) \374 do { \375 g_register_infos[lldb_##reg##i##_i386].byte_offset = YMM_OFFSET(i); \376 } while (false);377 378#define UPDATE_DR_INFO(reg_index) \379 do { \380 g_register_infos[lldb_dr##reg_index##_i386].byte_offset = \381 DR_OFFSET(reg_index); \382 } while (false);383 384// Update the register offsets385UPDATE_GPR_INFO(eax, rax);386UPDATE_GPR_INFO(ebx, rbx);387UPDATE_GPR_INFO(ecx, rcx);388UPDATE_GPR_INFO(edx, rdx);389UPDATE_GPR_INFO(edi, rdi);390UPDATE_GPR_INFO(esi, rsi);391UPDATE_GPR_INFO(ebp, rbp);392UPDATE_GPR_INFO(esp, rsp);393UPDATE_GPR_INFO(eip, rip);394UPDATE_GPR_INFO(eflags, rflags);395UPDATE_GPR_INFO(cs, cs);396UPDATE_GPR_INFO(fs, fs);397UPDATE_GPR_INFO(gs, gs);398UPDATE_GPR_INFO(ss, ss);399UPDATE_GPR_INFO(ds, ds);400UPDATE_GPR_INFO(es, es);401 402UPDATE_GPR_INFO(ax, rax);403UPDATE_GPR_INFO(bx, rbx);404UPDATE_GPR_INFO(cx, rcx);405UPDATE_GPR_INFO(dx, rdx);406UPDATE_GPR_INFO(di, rdi);407UPDATE_GPR_INFO(si, rsi);408UPDATE_GPR_INFO(bp, rbp);409UPDATE_GPR_INFO(sp, rsp);410UPDATE_GPR_INFO_8H(ah, rax);411UPDATE_GPR_INFO_8H(bh, rbx);412UPDATE_GPR_INFO_8H(ch, rcx);413UPDATE_GPR_INFO_8H(dh, rdx);414UPDATE_GPR_INFO(al, rax);415UPDATE_GPR_INFO(bl, rbx);416UPDATE_GPR_INFO(cl, rcx);417UPDATE_GPR_INFO(dl, rdx);418 419UPDATE_FPR_INFO(fctrl, fctrl);420UPDATE_FPR_INFO(fstat, fstat);421UPDATE_FPR_INFO(ftag, ftag);422UPDATE_FPR_INFO(fop, fop);423UPDATE_FPR_INFO(fiseg, ptr.i386_.fiseg);424UPDATE_FPR_INFO(fioff, ptr.i386_.fioff);425UPDATE_FPR_INFO(fooff, ptr.i386_.fooff);426UPDATE_FPR_INFO(foseg, ptr.i386_.foseg);427UPDATE_FPR_INFO(mxcsr, mxcsr);428UPDATE_FPR_INFO(mxcsrmask, mxcsrmask);429 430UPDATE_FP_INFO(st, 0);431UPDATE_FP_INFO(st, 1);432UPDATE_FP_INFO(st, 2);433UPDATE_FP_INFO(st, 3);434UPDATE_FP_INFO(st, 4);435UPDATE_FP_INFO(st, 5);436UPDATE_FP_INFO(st, 6);437UPDATE_FP_INFO(st, 7);438UPDATE_FP_INFO(mm, 0);439UPDATE_FP_INFO(mm, 1);440UPDATE_FP_INFO(mm, 2);441UPDATE_FP_INFO(mm, 3);442UPDATE_FP_INFO(mm, 4);443UPDATE_FP_INFO(mm, 5);444UPDATE_FP_INFO(mm, 6);445UPDATE_FP_INFO(mm, 7);446 447UPDATE_XMM_INFO(xmm, 0);448UPDATE_XMM_INFO(xmm, 1);449UPDATE_XMM_INFO(xmm, 2);450UPDATE_XMM_INFO(xmm, 3);451UPDATE_XMM_INFO(xmm, 4);452UPDATE_XMM_INFO(xmm, 5);453UPDATE_XMM_INFO(xmm, 6);454UPDATE_XMM_INFO(xmm, 7);455 456UPDATE_YMM_INFO(ymm, 0);457UPDATE_YMM_INFO(ymm, 1);458UPDATE_YMM_INFO(ymm, 2);459UPDATE_YMM_INFO(ymm, 3);460UPDATE_YMM_INFO(ymm, 4);461UPDATE_YMM_INFO(ymm, 5);462UPDATE_YMM_INFO(ymm, 6);463UPDATE_YMM_INFO(ymm, 7);464 465UPDATE_DR_INFO(0);466UPDATE_DR_INFO(1);467UPDATE_DR_INFO(2);468UPDATE_DR_INFO(3);469UPDATE_DR_INFO(4);470UPDATE_DR_INFO(5);471UPDATE_DR_INFO(6);472UPDATE_DR_INFO(7);473 474#undef UPDATE_GPR_INFO475#undef UPDATE_GPR_INFO_8H476#undef UPDATE_FPR_INFO477#undef UPDATE_FP_INFO478#undef UPDATE_XMM_INFO479#undef UPDATE_YMM_INFO480#undef UPDATE_DR_INFO481 482#endif // UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS483 484#undef GPR_OFFSET485#undef FPR_OFFSET486#undef YMM_OFFSET487