270 lines · python
1import lldb2from lldbsuite.test.lldbtest import *3from lldbsuite.test.decorators import *4from lldbsuite.test.gdbclientutils import *5from lldbsuite.test.lldbgdbclient import GDBRemoteTestBase6 7 8class TestNestedRegDefinitions(GDBRemoteTestBase):9 @skipIfXmlSupportMissing10 @skipIfRemote11 def test(self):12 """13 Test lldb's parsing of the <architecture> tag in the target.xml register14 description packet.15 """16 17 class MyResponder(MockGDBServerResponder):18 def qXferRead(self, obj, annex, offset, length):19 if annex == "target.xml":20 return (21 """<?xml version="1.0"?><!DOCTYPE target SYSTEM "gdb-target.dtd"><target><architecture>i386:x86-64</architecture><xi:include href="i386-64bit.xml"/></target>""",22 False,23 )24 25 if annex == "i386-64bit.xml":26 return (27 """<?xml version="1.0"?>28<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.29 30 Copying and distribution of this file, with or without modification,31 are permitted in any medium without royalty provided the copyright32 notice and this notice are preserved. -->33 34<!-- I386 64bit -->35 36<!DOCTYPE target SYSTEM "gdb-target.dtd">37<feature name="org.gnu.gdb.i386.64bit">38 <xi:include href="i386-64bit-core.xml"/>39 <xi:include href="i386-64bit-sse.xml"/>40</feature>""",41 False,42 )43 44 if annex == "i386-64bit-core.xml":45 return (46 """<?xml version="1.0"?>47<!-- Copyright (C) 2010-2015 Free Software Foundation, Inc.48 49 Copying and distribution of this file, with or without modification,50 are permitted in any medium without royalty provided the copyright51 notice and this notice are preserved. -->52 53<!DOCTYPE feature SYSTEM "gdb-target.dtd">54<feature name="org.gnu.gdb.i386.core">55 <flags id="i386_eflags" size="4">56 <field name="CF" start="0" end="0"/>57 <field name="" start="1" end="1"/>58 <field name="PF" start="2" end="2"/>59 <field name="AF" start="4" end="4"/>60 <field name="ZF" start="6" end="6"/>61 <field name="SF" start="7" end="7"/>62 <field name="TF" start="8" end="8"/>63 <field name="IF" start="9" end="9"/>64 <field name="DF" start="10" end="10"/>65 <field name="OF" start="11" end="11"/>66 <field name="NT" start="14" end="14"/>67 <field name="RF" start="16" end="16"/>68 <field name="VM" start="17" end="17"/>69 <field name="AC" start="18" end="18"/>70 <field name="VIF" start="19" end="19"/>71 <field name="VIP" start="20" end="20"/>72 <field name="ID" start="21" end="21"/>73 </flags>74 75 <reg name="rax" bitsize="64" type="int64"/>76 <reg name="rbx" bitsize="64" type="int64"/>77 <reg name="rcx" bitsize="64" type="int64"/>78 <reg name="rdx" bitsize="64" type="int64"/>79 <reg name="rsi" bitsize="64" type="int64"/>80 <reg name="rdi" bitsize="64" type="int64"/>81 <reg name="rbp" bitsize="64" type="data_ptr"/>82 <reg name="rsp" bitsize="64" type="data_ptr"/>83 <reg name="r8" bitsize="64" type="int64"/>84 <reg name="r9" bitsize="64" type="int64"/>85 <reg name="r10" bitsize="64" type="int64"/>86 <reg name="r11" bitsize="64" type="int64"/>87 <reg name="r12" bitsize="64" type="int64"/>88 <reg name="r13" bitsize="64" type="int64"/>89 <reg name="r14" bitsize="64" type="int64"/>90 <reg name="r15" bitsize="64" type="int64"/>91 92 <reg name="rip" bitsize="64" type="code_ptr"/>93 <reg name="eflags" bitsize="32" type="i386_eflags"/>94 <reg name="cs" bitsize="32" type="int32"/>95 <reg name="ss" bitsize="32" type="int32"/>96 <reg name="ds" bitsize="32" type="int32"/>97 <reg name="es" bitsize="32" type="int32"/>98 <reg name="fs" bitsize="32" type="int32"/>99 <reg name="gs" bitsize="32" type="int32"/>100 101 <reg name="st0" bitsize="80" type="i387_ext"/>102 <reg name="st1" bitsize="80" type="i387_ext"/>103 <reg name="st2" bitsize="80" type="i387_ext"/>104 <reg name="st3" bitsize="80" type="i387_ext"/>105 <reg name="st4" bitsize="80" type="i387_ext"/>106 <reg name="st5" bitsize="80" type="i387_ext"/>107 <reg name="st6" bitsize="80" type="i387_ext"/>108 <reg name="st7" bitsize="80" type="i387_ext"/>109 110 <reg name="fctrl" bitsize="32" type="int" group="float"/>111 <reg name="fstat" bitsize="32" type="int" group="float"/>112 <reg name="ftag" bitsize="32" type="int" group="float"/>113 <reg name="fiseg" bitsize="32" type="int" group="float"/>114 <reg name="fioff" bitsize="32" type="int" group="float"/>115 <reg name="foseg" bitsize="32" type="int" group="float"/>116 <reg name="fooff" bitsize="32" type="int" group="float"/>117 <reg name="fop" bitsize="32" type="int" group="float"/>118</feature>""",119 False,120 )121 122 if annex == "i386-64bit-sse.xml":123 return (124 """<?xml version="1.0"?>125<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.126 127 Copying and distribution of this file, with or without modification,128 are permitted in any medium without royalty provided the copyright129 notice and this notice are preserved. -->130 131<!DOCTYPE feature SYSTEM "gdb-target.dtd">132<feature name="org.gnu.gdb.i386.64bit.sse">133 <vector id="v4f" type="ieee_single" count="4"/>134 <vector id="v2d" type="ieee_double" count="2"/>135 <vector id="v16i8" type="int8" count="16"/>136 <vector id="v8i16" type="int16" count="8"/>137 <vector id="v4i32" type="int32" count="4"/>138 <vector id="v2i64" type="int64" count="2"/>139 <union id="vec128">140 <field name="v4_float" type="v4f"/>141 <field name="v2_double" type="v2d"/>142 <field name="v16_int8" type="v16i8"/>143 <field name="v8_int16" type="v8i16"/>144 <field name="v4_int32" type="v4i32"/>145 <field name="v2_int64" type="v2i64"/>146 <field name="uint128" type="uint128"/>147 </union>148 <flags id="i386_mxcsr" size="4">149 <field name="IE" start="0" end="0"/>150 <field name="DE" start="1" end="1"/>151 <field name="ZE" start="2" end="2"/>152 <field name="OE" start="3" end="3"/>153 <field name="UE" start="4" end="4"/>154 <field name="PE" start="5" end="5"/>155 <field name="DAZ" start="6" end="6"/>156 <field name="IM" start="7" end="7"/>157 <field name="DM" start="8" end="8"/>158 <field name="ZM" start="9" end="9"/>159 <field name="OM" start="10" end="10"/>160 <field name="UM" start="11" end="11"/>161 <field name="PM" start="12" end="12"/>162 <field name="FZ" start="15" end="15"/>163 </flags>164 165 <reg name="xmm0" bitsize="128" type="vec128" regnum="40"/>166 <reg name="xmm1" bitsize="128" type="vec128"/>167 <reg name="xmm2" bitsize="128" type="vec128"/>168 <reg name="xmm3" bitsize="128" type="vec128"/>169 <reg name="xmm4" bitsize="128" type="vec128"/>170 <reg name="xmm5" bitsize="128" type="vec128"/>171 <reg name="xmm6" bitsize="128" type="vec128"/>172 <reg name="xmm7" bitsize="128" type="vec128"/>173 <reg name="xmm8" bitsize="128" type="vec128"/>174 <reg name="xmm9" bitsize="128" type="vec128"/>175 <reg name="xmm10" bitsize="128" type="vec128"/>176 <reg name="xmm11" bitsize="128" type="vec128"/>177 <reg name="xmm12" bitsize="128" type="vec128"/>178 <reg name="xmm13" bitsize="128" type="vec128"/>179 <reg name="xmm14" bitsize="128" type="vec128"/>180 <reg name="xmm15" bitsize="128" type="vec128"/>181 182 <reg name="mxcsr" bitsize="32" type="i386_mxcsr" group="vector"/>183</feature>""",184 False,185 )186 187 return None, False188 189 def readRegister(self, regnum):190 return ""191 192 def readRegisters(self):193 return "0600000000000000c0b7c00080fffffff021c60080ffffff1a00000000000000020000000000000078b7c00080ffffff203f8ca090ffffff103f8ca090ffffff3025990a80ffffff809698000000000070009f0a80ffffff020000000000000000eae10080ffffff00000000000000001822d74f1a00000078b7c00080ffffff0e12410080ffff004602000008000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f0300000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f0000"194 195 def haltReason(self):196 return "T02thread:dead;threads:dead;"197 198 def qfThreadInfo(self):199 return "mdead"200 201 def qC(self):202 return ""203 204 def qSupported(self, client_supported):205 return "PacketSize=4000;qXfer:features:read+"206 207 def QThreadSuffixSupported(self):208 return "OK"209 210 def QListThreadsInStopReply(self):211 return "OK"212 213 self.server.responder = MyResponder()214 if self.TraceOn():215 self.runCmd("log enable gdb-remote packets")216 self.addTearDownHook(lambda: self.runCmd("log disable gdb-remote packets"))217 218 target = self.dbg.CreateTargetWithFileAndArch(None, None)219 220 process = self.connect(target)221 222 if self.TraceOn():223 interp = self.dbg.GetCommandInterpreter()224 result = lldb.SBCommandReturnObject()225 interp.HandleCommand("target list", result)226 print(result.GetOutput())227 228 rip_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("rip")229 self.assertEqual(rip_valobj.GetValueAsUnsigned(), 0x00FFFF800041120E)230 231 r15_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("r15")232 self.assertEqual(r15_valobj.GetValueAsUnsigned(), 0xFFFFFF8000C0B778)233 234 mxcsr_valobj = (235 process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("mxcsr")236 )237 self.assertEqual(mxcsr_valobj.GetValueAsUnsigned(), 0x00001F80)238 239 gpr_reg_set_name = (240 process.GetThreadAtIndex(0)241 .GetFrameAtIndex(0)242 .GetRegisters()243 .GetValueAtIndex(0)244 .GetName()245 )246 self.assertEqual(gpr_reg_set_name, "general")247 248 float_reg_set_name = (249 process.GetThreadAtIndex(0)250 .GetFrameAtIndex(0)251 .GetRegisters()252 .GetValueAtIndex(1)253 .GetName()254 )255 self.assertEqual(float_reg_set_name, "float")256 257 vector_reg_set_name = (258 process.GetThreadAtIndex(0)259 .GetFrameAtIndex(0)260 .GetRegisters()261 .GetValueAtIndex(2)262 .GetName()263 )264 self.assertEqual(vector_reg_set_name, "vector")265 266 if self.TraceOn():267 print("rip is 0x%x" % rip_valobj.GetValueAsUnsigned())268 print("r15 is 0x%x" % r15_valobj.GetValueAsUnsigned())269 print("mxcsr is 0x%x" % mxcsr_valobj.GetValueAsUnsigned())270