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1..2 **************************************************3 * *4 * Automatically generated file, do not edit! *5 * *6 **************************************************7 8.. _amdgpu_synid_gfx1030_soffset_73dae7:9 10soffset11=======12 13An offset from the base address.14 15* If offset is specified as a register, it supplies an unsigned byte offset.16* If offset is specified as a 21-bit immediate, it supplies a signed byte offset.17 18Note that an *immediate* offset may be specified using either :ref:`simm21<amdgpu_synid_simm21>` operand or :ref:`offset21s<amdgpu_synid_smem_offset21s>` modifier, but not both.19 20*Size:* 1 dword.21 22*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`simm21<amdgpu_synid_simm21>`23