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1..2 **************************************************3 * *4 * Automatically generated file, do not edit! *5 * *6 **************************************************7 8.. _amdgpu_synid_gfx11_soffset_0f304c:9 10soffset11=======12 13An unsigned offset from the base address. May be specified as either a register or a 20-bit immediate.14 15Note that an *immediate* offset may be specified using either :ref:`uimm20<amdgpu_synid_uimm20>` operand or :ref:`offset20u<amdgpu_synid_smem_offset20u>` modifier, but not both.16 17*Size:* 1 dword.18 19*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`uimm20<amdgpu_synid_uimm20>`20