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1lli - directly execute programs from LLVM bitcode2=================================================3 4.. program:: lli5 6SYNOPSIS7--------8 9:program:`lli` [*options*] [*filename*] [*program args*]10 11DESCRIPTION12-----------13 14:program:`lli` directly executes programs in LLVM bitcode format. It takes a program15in LLVM bitcode format and executes it using a just-in-time compiler or an16interpreter.17 18:program:`lli` is *not* an emulator. It will not execute IR of different architectures19and it can only interpret (or JIT-compile) for the host architecture.20 21The JIT compiler takes the same arguments as other tools, like :program:`llc`,22but they don't necessarily work for the interpreter.23 24If `filename` is not specified, then :program:`lli` reads the LLVM bitcode for the25program from standard input.26 27The optional *args* specified on the command line are passed to the program as28arguments.29 30GENERAL OPTIONS31---------------32 33.. option:: -fake-argv0=executable34 35 Override the ``argv[0]`` value passed into the executing program.36 37.. option:: -force-interpreter={false,true}38 39 If set to true, use the interpreter even if a just-in-time compiler is available40 for this architecture. Defaults to false.41 42.. option:: -help43 44 Print a summary of command line options.45 46.. option:: -load=pluginfilename47 48 Causes :program:`lli` to load the plugin (shared object) named *pluginfilename* and use49 it for optimization.50 51.. option:: -stats52 53 Print statistics from the code-generation passes. This is only meaningful for54 the just-in-time compiler, at present.55 56.. option:: -time-passes57 58 Record the amount of time needed for each code-generation pass and print it to59 standard error.60 61.. option:: -version62 63 Print out the version of :program:`lli` and exit without doing anything else.64 65TARGET OPTIONS66--------------67 68.. option:: -mtriple=target triple69 70 Override the target triple specified in the input bitcode file with the71 specified string. This may result in a crash if you pick an72 architecture which is not compatible with the current system.73 74.. option:: -march=arch75 76 Specify the architecture for which to generate assembly, overriding the target77 encoded in the bitcode file. See the output of **llc -help** for a list of78 valid architectures. By default this is inferred from the target triple or79 autodetected to the current architecture.80 81.. option:: -mcpu=cpuname82 83 Specify a specific chip in the current architecture to generate code for.84 By default this is inferred from the target triple and autodetected to85 the current architecture. For a list of available CPUs, use:86 **llvm-as < /dev/null | llc -march=xyz -mcpu=help**87 88.. option:: -mattr=a1,+a2,-a3,...89 90 Override or control specific attributes of the target, such as whether SIMD91 operations are enabled or not. The default set of attributes is set by the92 current CPU. For a list of available attributes, use:93 **llvm-as < /dev/null | llc -march=xyz -mattr=help**94 95FLOATING POINT OPTIONS96----------------------97 98.. option:: -disable-excess-fp-precision99 100 Disable optimizations that may increase floating point precision.101 102.. option:: -enable-no-infs-fp-math103 104 Enable optimizations that assume no Inf values.105 106.. option:: -enable-no-nans-fp-math107 108 Enable optimizations that assume no NAN values.109 110.. option:: -soft-float111 112 Causes :program:`lli` to generate software floating point library calls instead of113 equivalent hardware instructions.114 115CODE GENERATION OPTIONS116-----------------------117 118.. option:: -code-model=model119 120 Choose the code model from:121 122 .. code-block:: text123 124 default: Target default code model125 tiny: Tiny code model126 small: Small code model127 kernel: Kernel code model128 medium: Medium code model129 large: Large code model130 131.. option:: -disable-post-RA-scheduler132 133 Disable scheduling after register allocation.134 135.. option:: -disable-spill-fusing136 137 Disable fusing of spill code into instructions.138 139.. option:: -jit-enable-eh140 141 Exception handling should be enabled in the just-in-time compiler.142 143.. option:: -join-liveintervals144 145 Coalesce copies (default=true).146 147.. option:: -nozero-initialized-in-bss148 149 Don't place zero-initialized symbols into the BSS section.150 151.. option:: -pre-RA-sched=scheduler152 153 Instruction schedulers available (before register allocation):154 155 .. code-block:: text156 157 =default: Best scheduler for the target158 =none: No scheduling: breadth first sequencing159 =simple: Simple two pass scheduling: minimize critical path and maximize processor utilization160 =simple-noitin: Simple two pass scheduling: Same as simple except using generic latency161 =list-burr: Bottom-up register reduction list scheduling162 =list-tdrr: Top-down register reduction list scheduling163 =list-td: Top-down list scheduler164 165.. option:: -regalloc=allocator166 167 Register allocator to use (default=linearscan)168 169 .. code-block:: text170 171 =bigblock: Big-block register allocator172 =linearscan: linear scan register allocator173 =local: local register allocator174 =simple: simple register allocator175 176.. option:: -relocation-model=model177 178 Choose relocation model from:179 180 .. code-block:: text181 182 =default: Target default relocation model183 =static: Non-relocatable code184 =pic: Fully relocatable, position independent code185 =dynamic-no-pic: Relocatable external references, non-relocatable code186 187.. option:: -spiller188 189 Spiller to use (default=local)190 191 .. code-block:: text192 193 =simple: simple spiller194 =local: local spiller195 196.. option:: -x86-asm-syntax=syntax197 198 Choose style of code to emit from X86 backend:199 200 .. code-block:: text201 202 =att: Emit AT&T-style assembly203 =intel: Emit Intel-style assembly204 205EXIT STATUS206-----------207 208If :program:`lli` fails to load the program, it will exit with an exit code of 1.209Otherwise, it will return the exit code of the program it executes.210 211SEE ALSO212--------213 214:manpage:`llc(1)`215