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1 2.. _gmir-opcodes:3 4Generic Opcodes5===============6 7.. contents::8   :local:9 10.. note::11 12  This documentation does not yet fully account for vectors. Many of the13  scalar/integer/floating-point operations can also take vectors.14 15Constants16---------17 18G_IMPLICIT_DEF19^^^^^^^^^^^^^^20 21An undefined value.22 23.. code-block:: none24 25  %0:_(s32) = G_IMPLICIT_DEF26 27G_CONSTANT28^^^^^^^^^^29 30An integer constant.31 32.. code-block:: none33 34  %0:_(s32) = G_CONSTANT i32 135 36G_FCONSTANT37^^^^^^^^^^^38 39A floating point constant.40 41.. code-block:: none42 43  %0:_(s32) = G_FCONSTANT float 1.044 45G_FRAME_INDEX46^^^^^^^^^^^^^47 48The address of an object in the stack frame.49 50.. code-block:: none51 52  %1:_(p0) = G_FRAME_INDEX %stack.0.ptr053 54G_GLOBAL_VALUE55^^^^^^^^^^^^^^56 57The address of a global value.58 59.. code-block:: none60 61  %0(p0) = G_GLOBAL_VALUE @var_local62 63G_PTRAUTH_GLOBAL_VALUE64^^^^^^^^^^^^^^^^^^^^^^65 66The signed address of a global value. Operands: address to be signed (pointer),67key (32-bit imm), address for address discrimination (zero if not needed) and68an extra discriminator (64-bit imm).69 70.. code-block:: none71 72  %0:_(p0) = G_PTRAUTH_GLOBAL_VALUE %1:_(p0), s32, %2:_(p0), s6473 74G_BLOCK_ADDR75^^^^^^^^^^^^76 77The address of a basic block.78 79.. code-block:: none80 81  %0:_(p0) = G_BLOCK_ADDR blockaddress(@test_blockaddress, %ir-block.block)82 83G_CONSTANT_POOL84^^^^^^^^^^^^^^^85 86The address of an object in the constant pool.87 88.. code-block:: none89 90  %0:_(p0) = G_CONSTANT_POOL %const.091 92Integer Extension and Truncation93--------------------------------94 95G_ANYEXT96^^^^^^^^97 98Extend the underlying scalar type of an operation, leaving the high bits99unspecified.100 101.. code-block:: none102 103  %1:_(s32) = G_ANYEXT %0:_(s16)104 105G_SEXT106^^^^^^107 108Sign extend the underlying scalar type of an operation, copying the sign bit109into the newly-created space.110 111.. code-block:: none112 113  %1:_(s32) = G_SEXT %0:_(s16)114 115G_SEXT_INREG116^^^^^^^^^^^^117 118Sign extend the value from an arbitrary bit position, copying the sign bit119into all bits above it. This is equivalent to a shl + ashr pair with an120appropriate shift amount. $sz is an immediate (MachineOperand::isImm()121returns true) to allow targets to have some bitwidths legal and others122lowered. This opcode is particularly useful if the target has sign-extension123instructions that are cheaper than the constituent shifts as the optimizer is124able to make decisions on whether it's better to hang on to the G_SEXT_INREG125or to lower it and optimize the individual shifts.126 127.. code-block:: none128 129  %1:_(s32) = G_SEXT_INREG %0:_(s32), 16130 131G_ZEXT132^^^^^^133 134Zero extend the underlying scalar type of an operation, putting zero bits135into the newly-created space.136 137.. code-block:: none138 139  %1:_(s32) = G_ZEXT %0:_(s16)140 141G_TRUNC142^^^^^^^143 144Truncate the underlying scalar type of an operation. This is equivalent to145G_EXTRACT for scalar types, but acts elementwise on vectors.146 147.. code-block:: none148 149  %1:_(s16) = G_TRUNC %0:_(s32)150 151G_TRUNC_SSAT_S152^^^^^^^^^^^^^^153 154Truncate a signed input to a signed result with saturation.155 156.. code-block:: none157 158  %1:_(s16) = G_TRUNC_SSAT_S %0:_(s32)159 160G_TRUNC_SSAT_U161^^^^^^^^^^^^^^162 163Truncate a signed input to an unsigned result with saturation.164 165.. code-block:: none166 167  %1:_(s16) = G_TRUNC_SSAT_U %0:_(s32)168 169G_TRUNC_USAT_U170^^^^^^^^^^^^^^171 172Truncate a unsigned input to an unsigned result with saturation.173 174.. code-block:: none175 176  %1:_(s16) = G_TRUNC_USAT_U %0:_(s32)177 178Type Conversions179----------------180 181G_INTTOPTR182^^^^^^^^^^183 184Convert an integer to a pointer.185 186.. code-block:: none187 188  %1:_(p0) = G_INTTOPTR %0:_(s32)189 190G_PTRTOINT191^^^^^^^^^^192 193Convert a pointer to an integer.194 195.. code-block:: none196 197  %1:_(s32) = G_PTRTOINT %0:_(p0)198 199G_BITCAST200^^^^^^^^^201 202Reinterpret a value as a new type. This is usually done without203changing any bits but this is not always the case due a subtlety in the204definition of the :ref:`LLVM-IR Bitcast Instruction <i_bitcast>`. It205is allowed to bitcast between pointers with the same size, but206different address spaces.207 208.. code-block:: none209 210  %1:_(s64) = G_BITCAST %0:_(<2 x s32>)211 212G_ADDRSPACE_CAST213^^^^^^^^^^^^^^^^214 215Convert a pointer to an address space to a pointer to another address space.216 217.. code-block:: none218 219  %1:_(p1) = G_ADDRSPACE_CAST %0:_(p0)220 221.. caution::222 223  :ref:`i_addrspacecast` doesn't mention what happens if the cast is simply224  invalid (i.e. if the address spaces are disjoint).225 226Scalar Operations227-----------------228 229G_EXTRACT230^^^^^^^^^231 232Extract a register of the specified size, starting from the block given by233index. This will almost certainly be mapped to sub-register COPYs after234register banks have been selected.235 236.. code-block:: none237 238  %3:_(s32) = G_EXTRACT %2:_(s64), 32239 240G_INSERT241^^^^^^^^242 243Insert a smaller register into a larger one at the specified bit-index.244 245.. code-block:: none246 247  %2:_(s64) = G_INSERT %0:(_s64), %1:_(s32), 0248 249G_MERGE_VALUES250^^^^^^^^^^^^^^251 252Concatenate multiple registers of the same size into a wider register.253The input operands are always ordered from lowest bits to highest:254 255.. code-block:: none256 257  %0:(s32) = G_MERGE_VALUES %bits_0_7:(s8), %bits_8_15:(s8),258                            %bits_16_23:(s8), %bits_24_31:(s8)259 260G_UNMERGE_VALUES261^^^^^^^^^^^^^^^^262 263Extract multiple registers of the specified size, starting from blocks given by264indexes. This will almost certainly be mapped to sub-register COPYs after265register banks have been selected.266The output operands are always ordered from lowest bits to highest:267 268.. code-block:: none269 270  %bits_0_7:(s8), %bits_8_15:(s8),271      %bits_16_23:(s8), %bits_24_31:(s8) = G_UNMERGE_VALUES %0:(s32)272 273G_BSWAP274^^^^^^^275 276Reverse the order of the bytes in a scalar.277 278.. code-block:: none279 280  %1:_(s32) = G_BSWAP %0:_(s32)281 282G_BITREVERSE283^^^^^^^^^^^^284 285Reverse the order of the bits in a scalar.286 287.. code-block:: none288 289  %1:_(s32) = G_BITREVERSE %0:_(s32)290 291G_SBFX, G_UBFX292^^^^^^^^^^^^^^293 294Extract a range of bits from a register.295 296The source operands are registers as follows:297 298- Source299- The least-significant bit for the extraction300- The width of the extraction301 302The least-significant bit (lsb) and width operands are in the range:303 304::305 306      0 <= lsb < lsb + width <= source bitwidth, where all values are unsigned307 308G_SBFX sign-extends the result, while G_UBFX zero-extends the result.309 310.. code-block:: none311 312  ; Extract 5 bits starting at bit 1 from %x and store them in %a.313  ; Sign-extend the result.314  ;315  ; Example:316  ; %x = 0...0000[10110]1 ---> %a = 1...111111[10110]317  %lsb_one = G_CONSTANT i32 1318  %width_five = G_CONSTANT i32 5319  %a:_(s32) = G_SBFX %x, %lsb_one, %width_five320 321  ; Extract 3 bits starting at bit 2 from %x and store them in %b. Zero-extend322  ; the result.323  ;324  ; Example:325  ; %x = 1...11111[100]11 ---> %b = 0...00000[100]326  %lsb_two = G_CONSTANT i32 2327  %width_three = G_CONSTANT i32 3328  %b:_(s32) = G_UBFX %x, %lsb_two, %width_three329 330Integer Operations331-------------------332 333G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR, G_SDIV, G_UDIV, G_SREM, G_UREM334^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^335 336These each perform their respective integer arithmetic on a scalar.337 338.. code-block:: none339 340  %dst:_(s32) = G_ADD %src0:_(s32), %src1:_(s32)341 342The above example adds %src1 to %src0 and stores the result in %dst.343 344G_SDIVREM, G_UDIVREM345^^^^^^^^^^^^^^^^^^^^346 347Perform integer division and remainder thereby producing two results.348 349.. code-block:: none350 351  %div:_(s32), %rem:_(s32) = G_SDIVREM %0:_(s32), %1:_(s32)352 353G_SADDSAT, G_UADDSAT, G_SSUBSAT, G_USUBSAT, G_SSHLSAT, G_USHLSAT354^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^355 356Signed and unsigned addition, subtraction and left shift with saturation.357 358.. code-block:: none359 360  %2:_(s32) = G_SADDSAT %0:_(s32), %1:_(s32)361 362G_SHL, G_LSHR, G_ASHR363^^^^^^^^^^^^^^^^^^^^^364 365Shift the bits of a scalar left or right inserting zeros (sign-bit for G_ASHR).366 367G_ROTR, G_ROTL368^^^^^^^^^^^^^^369 370Rotate the bits right (G_ROTR) or left (G_ROTL).371 372G_ICMP373^^^^^^374 375Perform integer comparison producing non-zero (true) or zero (false). It's376target specific whether a true value is 1, ~0U, or some other non-zero value.377 378G_SCMP379^^^^^^380 381Perform signed 3-way integer comparison producing -1 (smaller), 0 (equal), or 1 (larger).382 383.. code-block:: none384 385  %5:_(s32) = G_SCMP %6, %2386 387 388G_UCMP389^^^^^^390 391Perform unsigned 3-way integer comparison producing -1 (smaller), 0 (equal), or 1 (larger).392 393.. code-block:: none394 395  %7:_(s32) = G_UCMP %2, %6396 397 398G_SELECT399^^^^^^^^400 401Select between two values depending on a zero/non-zero value.402 403.. code-block:: none404 405  %5:_(s32) = G_SELECT %4(s1), %6, %2406 407G_PTR_ADD408^^^^^^^^^409 410Add a scalar offset in addressible units to a pointer. Addressible units are411typically bytes but this may vary between targets.412 413.. code-block:: none414 415  %1:_(p0) = G_PTR_ADD %0:_(p0), %1:_(s32)416 417.. caution::418 419  There are currently no in-tree targets that use this with addressable units420  not equal to 8 bit.421 422G_PTRMASK423^^^^^^^^^^424 425Zero out an arbitrary mask of bits of a pointer. The mask type must be426an integer, and the number of vector elements must match for all427operands. This corresponds to `i_intr_llvm_ptrmask`.428 429.. code-block:: none430 431  %2:_(p0) = G_PTRMASK %0, %1432 433G_SMIN, G_SMAX, G_UMIN, G_UMAX434^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^435 436Take the minimum/maximum of two values.437 438.. code-block:: none439 440  %5:_(s32) = G_SMIN %6, %2441 442G_ABS443^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^444 445Take the absolute value of a signed integer. The absolute value of the minimum446negative value (e.g. the 8-bit value `0x80`) is defined to be itself.447 448.. code-block:: none449 450  %1:_(s32) = G_ABS %0451 452G_UADDO, G_SADDO, G_USUBO, G_SSUBO, G_SMULO, G_UMULO453^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^454 455Perform the requested arithmetic and produce a carry output in addition to the456normal result.457 458.. code-block:: none459 460  %3:_(s32), %4:_(s1) = G_UADDO %0, %1461 462G_UADDE, G_SADDE, G_USUBE, G_SSUBE463^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^464 465Perform the requested arithmetic and consume a carry input in addition to the466normal input. Also produce a carry output in addition to the normal result.467 468.. code-block:: none469 470  %4:_(s32), %5:_(s1) = G_UADDE %0, %1, %3:_(s1)471 472G_UMULH, G_SMULH473^^^^^^^^^^^^^^^^474 475Multiply two numbers at twice the incoming bit width (unsigned or signed) and476return the high half of the result.477 478.. code-block:: none479 480  %3:_(s32) = G_UMULH %0, %1481 482G_CTLZ, G_CTTZ, G_CTPOP483^^^^^^^^^^^^^^^^^^^^^^^484 485Count leading zeros, trailing zeros, or number of set bits.486 487.. code-block:: none488 489  %2:_(s33) = G_CTLZ_ZERO_UNDEF %1490  %2:_(s33) = G_CTTZ_ZERO_UNDEF %1491  %2:_(s33) = G_CTPOP %1492 493G_CTLZ_ZERO_UNDEF, G_CTTZ_ZERO_UNDEF494^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^495 496Count leading zeros or trailing zeros. If the value is zero then the result is497undefined.498 499.. code-block:: none500 501  %2:_(s33) = G_CTLZ_ZERO_UNDEF %1502  %2:_(s33) = G_CTTZ_ZERO_UNDEF %1503 504G_ABDS, G_ABDU505^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^506 507Compute the absolute difference (signed and unsigned), e.g. trunc(abs(ext(x)-ext(y)).508 509.. code-block:: none510 511  %0:_(s33) = G_ABDS %2, %3512  %1:_(s33) = G_ABDU %4, %5513 514G_UAVGFLOOR, G_UAVGCEIL, G_SAVGFLOOR, G_SAVGCEIL515^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^516 517Computes the average of corresponding elements in two vectors (signed and unsigned).518Resulting vector contains values that are either rounded or truncated. e.g. trunc(shr(add(ext(a),ext(b)),1)).519 520.. code-block:: none521 522  %0:_(<4 x i16>) = G_UAVGFLOOR %4:_(<4 x i16>), %5:_(<4 x i16>)523  %1:_(<4 x i16>) = G_UAVGCEIL %6:_(<4 x i16>), %7:_(<4 x i16>)524  %2:_(<4 x i16>) = G_SAVGFLOOR %8:_(<4 x i16>), %9:_(<4 x i16>)525  %3:_(<4 x i16>) = G_SAVGCEIL %10:_(<4 x i16>), %11:_(<4 x i16>)526 527Floating Point Operations528-------------------------529 530G_FCMP531^^^^^^532 533Perform floating point comparison producing non-zero (true) or zero534(false). It's target specific whether a true value is 1, ~0U, or some other535non-zero value.536 537G_FNEG538^^^^^^539 540Floating point negation.541 542G_FPEXT543^^^^^^^544 545Convert a floating point value to a larger type.546 547G_FPTRUNC548^^^^^^^^^549 550Convert a floating point value to a narrower type.551 552G_FPTOSI, G_FPTOUI, G_SITOFP, G_UITOFP553^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^554 555Convert between integer and floating point.556 557G_FPTOSI_SAT, G_FPTOUI_SAT558^^^^^^^^^^^^^^^^^^^^^^^^^^559 560Saturating convert between integer and floating point.561 562G_FABS563^^^^^^564 565Take the absolute value of a floating point value.566 567G_FCOPYSIGN568^^^^^^^^^^^569 570Copy the value of the first operand, replacing the sign bit with that of the571second operand.572 573G_FCANONICALIZE574^^^^^^^^^^^^^^^575 576See :ref:`i_intr_llvm_canonicalize`.577 578G_IS_FPCLASS579^^^^^^^^^^^^580 581Tests if the first operand, which must be floating-point scalar or vector, has582floating-point class specified by the second operand. Returns non-zero (true)583or zero (false). It's target specific whether a true value is 1, ~0U, or some584other non-zero value. If the first operand is a vector, the returned value is a585vector of the same length.586 587G_FMINNUM588^^^^^^^^^589 590Perform floating-point minimum on two values.591 592In the case where a single input is a NaN (either signaling or quiet),593the non-NaN input is returned.594 595The return value of (FMINNUM 0.0, -0.0) could be either 0.0 or -0.0.596 597G_FMAXNUM598^^^^^^^^^599 600Perform floating-point maximum on two values.601 602In the case where a single input is a NaN (either signaling or quiet),603the non-NaN input is returned.604 605The return value of (FMAXNUM 0.0, -0.0) could be either 0.0 or -0.0.606 607G_FMINNUM_IEEE608^^^^^^^^^^^^^^609 610Perform floating-point minimum on two values, following IEEE-754611definitions. This differs from FMINNUM in the handling of signaling612NaNs.613 614If one input is a signaling NaN, returns a quiet NaN. This matches615IEEE-754 2008's minnum/maxnum for signaling NaNs (which differs from6162019).617 618These treat -0 as ordered less than +0, matching the behavior of619IEEE-754 2019's minimumNumber/maximumNumber (which was unspecified in6202008).621 622G_FMAXNUM_IEEE623^^^^^^^^^^^^^^624 625Perform floating-point maximum on two values, following IEEE-754626definitions. This differs from FMAXNUM in the handling of signaling627NaNs.628 629If one input is a signaling NaN, returns a quiet NaN. This matches630IEEE-754 2008's minnum/maxnum for signaling NaNs (which differs from6312019).632 633These treat -0 as ordered less than +0, matching the behavior of634IEEE-754 2019's minimumNumber/maximumNumber (which was unspecified in6352008).636 637G_FMINIMUM638^^^^^^^^^^639 640NaN-propagating minimum that also treat -0.0 as less than 0.0. While641FMINNUM_IEEE follow IEEE 754-2008 semantics, FMINIMUM follows IEEE642754-2019 semantics.643 644G_FMAXIMUM645^^^^^^^^^^646 647NaN-propagating maximum that also treat -0.0 as less than 0.0. While648FMAXNUM_IEEE follow IEEE 754-2008 semantics, FMAXIMUM follows IEEE649754-2019 semantics.650 651G_FMINIMUMNUM652^^^^^^^^^^^^^653 654IEEE-754 2019 minimumNumber655 656G_FMAXIMUMNUM657^^^^^^^^^^^^^658 659IEEE-754 2019 maximumNumber660 661G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FREM662^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^663 664Perform the specified floating point arithmetic.665 666G_FMA667^^^^^668 669Perform a fused multiply add (i.e. without the intermediate rounding step).670 671G_FMAD672^^^^^^673 674Perform a non-fused multiply add (i.e. with the intermediate rounding step).675 676G_FPOW677^^^^^^678 679Raise the first operand to the power of the second.680 681G_FEXP, G_FEXP2682^^^^^^^^^^^^^^^683 684Calculate the base-e or base-2 exponential of a value685 686G_FLOG, G_FLOG2, G_FLOG10687^^^^^^^^^^^^^^^^^^^^^^^^^688 689Calculate the base-e, base-2, or base-10 respectively.690 691G_FCEIL, G_FSQRT, G_FFLOOR, G_FRINT, G_FNEARBYINT692^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^693 694These correspond to the standard C functions of the same name.695 696G_FCOS, G_FSIN, G_FSINCOS, G_FTAN, G_FACOS, G_FASIN, G_FATAN, G_FATAN2, G_FCOSH, G_FSINH, G_FTANH697^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^698 699These correspond to the standard C trigonometry functions of the same name.700 701G_INTRINSIC_TRUNC702^^^^^^^^^^^^^^^^^703 704Returns the operand rounded to the nearest integer not larger in magnitude than the operand.705 706G_INTRINSIC_ROUND707^^^^^^^^^^^^^^^^^708 709Returns the operand rounded to the nearest integer.710 711G_LROUND, G_LLROUND712^^^^^^^^^^^^^^^^^^^713 714Returns the source operand rounded to the nearest integer with ties away from715zero.716 717See the LLVM LangRef entry on '``llvm.lround.*'`` for details on behaviour.718 719.. code-block:: none720 721  %rounded_32:_(s32) = G_LROUND %round_me:_(s64)722  %rounded_64:_(s64) = G_LLROUND %round_me:_(s64)723 724Vector Specific Operations725--------------------------726 727G_VSCALE728^^^^^^^^729 730Puts the value of the runtime ``vscale`` multiplied by the value in the source731operand into the destination register. This can be useful in determining the732actual runtime number of elements in a vector.733 734.. code-block::735 736  %0:_(s32) = G_VSCALE 4737 738G_INSERT_SUBVECTOR739^^^^^^^^^^^^^^^^^^740 741Insert the second source vector into the first source vector. The index operand742represents the starting index in the first source vector at which the second743source vector should be inserted into.744 745The index must be a constant multiple of the second source vector's minimum746vector length. If the vectors are scalable, then the index is first scaled by747the runtime scaling factor. The indices inserted in the source vector must be748valid indices of that vector. If this condition cannot be determined statically749but is false at runtime, then the result vector is undefined.750 751.. code-block:: none752 753  %2:_(<vscale x 4 x i64>) = G_INSERT_SUBVECTOR %0:_(<vscale x 4 x i64>), %1:_(<vscale x 2 x i64>), 0754 755G_EXTRACT_SUBVECTOR756^^^^^^^^^^^^^^^^^^^757 758Extract a vector of destination type from the source vector. The index operand759represents the starting index from which a subvector is extracted from760the source vector.761 762The index must be a constant multiple of the source vector's minimum vector763length. If the source vector is a scalable vector, then the index is first764scaled by the runtime scaling factor. The indices extracted from the source765vector must be valid indices of that vector. If this condition cannot be766determined statically but is false at runtime, then the result vector is767undefined.768 769Mixing scalable vectors and fixed vectors are not allowed.770 771.. code-block:: none772 773  %3:_(<vscale x 4 x i64>) = G_EXTRACT_SUBVECTOR %2:_(<vscale x 8 x i64>), 2774 775G_CONCAT_VECTORS776^^^^^^^^^^^^^^^^777 778Concatenate vectors to form a longer vector.779 780.. code-block:: none781 782  %4:_(<16 x i32>) = G_CONCAT_VECTORS %0:_(<4 x i32>), %1:_(<4 x i32>),783                                      %2:_(<4 x i32>), %3:_(<4 x i32>)784 785 786G_BUILD_VECTOR, G_BUILD_VECTOR_TRUNC787^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^788 789Create a vector from multiple scalar registers. No implicit790conversion is performed (i.e. the result element type must be the791same as all source operands)792 793The _TRUNC version truncates the larger operand types to fit the794destination vector elt type.795 796.. code-block:: none797 798  %4:_(<4 x i32>) = G_BUILD_VECTOR %0:_(i32), %1:_(i32), %2:_(i32), %3:_(i32)799 800  %4:_(<4 x i32>) = G_BUILD_VECTOR_TRUNC %0:_(i64), %1:_(i64), %2:_(i64), %3:_(i64)801 802 803G_INSERT_VECTOR_ELT804^^^^^^^^^^^^^^^^^^^805 806Insert an element into a vector807 808.. code-block:: none809 810  %4:_(<16 x i32>) = G_INSERT_VECTOR_ELT %vec:_(<16 x i32>), %elt:_(i32), %idx:_(s64)811 812 813 814G_EXTRACT_VECTOR_ELT815^^^^^^^^^^^^^^^^^^^^816 817Extract an element from a vector818 819.. code-block:: none820 821  %elt:_(i32) = G_EXTRACT_VECTOR_ELT %vec:_(<16 x i32>), %idx:_(s64)822 823 824G_SHUFFLE_VECTOR825^^^^^^^^^^^^^^^^826 827Concatenate two vectors and shuffle the elements according to the mask operand.828The mask operand should be an IR Constant which exactly matches the829corresponding mask for the IR shufflevector instruction.830 831G_SPLAT_VECTOR832^^^^^^^^^^^^^^^^833 834Create a vector where all elements are the scalar from the source operand.835 836The type of the operand must be equal to or larger than the vector element837type. If the operand is larger than the vector element type, the scalar is838implicitly truncated to the vector element type.839 840G_STEP_VECTOR841^^^^^^^^^^^^^842 843Create a scalable vector where all lanes are linear sequences starting at 0844with a given unsigned step.845 846The type of the operand must be equal to the vector element type. Arithmetic847is performed modulo the bitwidth of the element. The step must be > 0.848Otherwise the vector is zero.849 850.. code-block::851 852  %0:_(<vscale x 2 x s64>) = G_STEP_VECTOR i64 4853 854  %1:_(<vscale x s32>) = G_STEP_VECTOR i32 4855 856  0, 1*Step, 2*Step, 3*Step, 4*Step, ...857 858G_VECTOR_COMPRESS859^^^^^^^^^^^^^^^^^860 861Given an input vector, a mask vector, and a passthru vector, continuously place862all selected (i.e., where mask[i] = true) input lanes in an output vector. All863remaining lanes in the output are taken from passthru, which may be undef.864 865Vector Reduction Operations866---------------------------867 868These operations represent horizontal vector reduction, producing a scalar result.869 870G_VECREDUCE_SEQ_FADD, G_VECREDUCE_SEQ_FMUL871^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^872 873The SEQ variants perform reductions in sequential order. The first operand is874an initial scalar accumulator value, and the second operand is the vector to reduce.875 876G_VECREDUCE_FADD, G_VECREDUCE_FMUL877^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^878 879These reductions are relaxed variants which may reduce the elements in any order.880 881G_VECREDUCE_FMAX, G_VECREDUCE_FMIN, G_VECREDUCE_FMAXIMUM, G_VECREDUCE_FMINIMUM882^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^883 884FMIN/FMAX/FMINIMUM/FMAXIMUM nodes can have flags, for NaN/NoNaN variants.885 886 887Integer/bitwise reductions888^^^^^^^^^^^^^^^^^^^^^^^^^^889 890* G_VECREDUCE_ADD891* G_VECREDUCE_MUL892* G_VECREDUCE_AND893* G_VECREDUCE_OR894* G_VECREDUCE_XOR895* G_VECREDUCE_SMAX896* G_VECREDUCE_SMIN897* G_VECREDUCE_UMAX898* G_VECREDUCE_UMIN899 900Integer reductions may have a result type larger than the vector element type.901However, the reduction is performed using the vector element type and the value902in the top bits is unspecified.903 904Memory Operations905-----------------906 907G_LOAD, G_SEXTLOAD, G_ZEXTLOAD908^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^909 910Generic load. Expects a MachineMemOperand in addition to explicit911operands. If the result size is larger than the memory size, the912high bits are undefined, sign-extended, or zero-extended respectively.913 914Only G_LOAD is valid if the result is a vector type. If the result is larger915than the memory size, the high elements are undefined (i.e. this is not a916per-element, vector anyextload)917 918Unlike in SelectionDAG, atomic loads are expressed with the same919opcodes as regular loads. G_LOAD, G_SEXTLOAD and G_ZEXTLOAD may all920have atomic memory operands.921 922G_INDEXED_LOAD923^^^^^^^^^^^^^^924 925Generic indexed load. Combines a GEP with a load. $newaddr is set to $base + $offset.926If $am is 0 (post-indexed), then the value is loaded from $base; if $am is 1 (pre-indexed)927then the value is loaded from $newaddr.928 929G_INDEXED_SEXTLOAD930^^^^^^^^^^^^^^^^^^931 932Same as G_INDEXED_LOAD except that the load performed is sign-extending, as with G_SEXTLOAD.933 934G_INDEXED_ZEXTLOAD935^^^^^^^^^^^^^^^^^^936 937Same as G_INDEXED_LOAD except that the load performed is zero-extending, as with G_ZEXTLOAD.938 939G_STORE940^^^^^^^941 942Generic store. Expects a MachineMemOperand in addition to explicit943operands. If the stored value size is greater than the memory size,944the high bits are implicitly truncated. If this is a vector store, the945high elements are discarded (i.e. this does not function as a per-lane946vector, truncating store)947 948G_INDEXED_STORE949^^^^^^^^^^^^^^^950 951Combines a store with a GEP. See description of G_INDEXED_LOAD for indexing behaviour.952 953G_ATOMIC_CMPXCHG_WITH_SUCCESS954^^^^^^^^^^^^^^^^^^^^^^^^^^^^^955 956Generic atomic cmpxchg with internal success check. Expects a957MachineMemOperand in addition to explicit operands.958 959G_ATOMIC_CMPXCHG960^^^^^^^^^^^^^^^^961 962Generic atomic cmpxchg. Expects a MachineMemOperand in addition to explicit963operands.964 965|all_g_atomicrmw|966^^^^^^^^^^^^^^^^^967 968.. |all_g_atomicrmw| replace:: G_ATOMICRMW_XCHG, G_ATOMICRMW_ADD,969                               G_ATOMICRMW_SUB, G_ATOMICRMW_AND,970                               G_ATOMICRMW_NAND, G_ATOMICRMW_OR,971                               G_ATOMICRMW_XOR, G_ATOMICRMW_MAX,972                               G_ATOMICRMW_MIN, G_ATOMICRMW_UMAX,973                               G_ATOMICRMW_UMIN, G_ATOMICRMW_FADD,974                               G_ATOMICRMW_FSUB, G_ATOMICRMW_FMAX,975                               G_ATOMICRMW_FMIN, G_ATOMICRMW_FMAXIMUM,976                               G_ATOMICRMW_FMINIMUM, G_ATOMICRMW_UINC_WRAP,977			       G_ATOMICRMW_UDEC_WRAP, G_ATOMICRMW_USUB_COND,978			       G_ATOMICRMW_USUB_SAT979 980Generic atomicrmw. Expects a MachineMemOperand in addition to explicit981operands.982 983G_FENCE984^^^^^^^985 986Generic fence. The first operand is the memory ordering. The second operand is987the syncscope.988 989See the LLVM LangRef entry on the '``fence'`` instruction for more details.990 991G_MEMCPY992^^^^^^^^993 994Generic memcpy. Expects two MachineMemOperands covering the store and load995respectively, in addition to explicit operands.996 997G_MEMCPY_INLINE998^^^^^^^^^^^^^^^999 1000Generic inlined memcpy. Like G_MEMCPY, but it is guaranteed that this version1001will not be lowered as a call to an external function. Currently the size1002operand is required to evaluate as a constant (not an immediate), though that is1003expected to change when llvm.memcpy.inline is taught to support dynamic sizes.1004 1005G_MEMMOVE1006^^^^^^^^^1007 1008Generic memmove. Similar to G_MEMCPY, but the source and destination memory1009ranges are allowed to overlap.1010 1011G_MEMSET1012^^^^^^^^1013 1014Generic memset. Expects a MachineMemOperand in addition to explicit operands.1015 1016G_BZERO1017^^^^^^^1018 1019Generic bzero. Expects a MachineMemOperand in addition to explicit operands.1020 1021Control Flow1022------------1023 1024G_PHI1025^^^^^1026 1027Implement the φ node in the SSA graph representing the function.1028 1029.. code-block:: none1030 1031  %dst(s8) = G_PHI %src1(s8), %bb.<id1>, %src2(s8), %bb.<id2>1032 1033G_BR1034^^^^1035 1036Unconditional branch1037 1038.. code-block:: none1039 1040  G_BR %bb.<id>1041 1042G_BRCOND1043^^^^^^^^1044 1045Conditional branch1046 1047.. code-block:: none1048 1049  G_BRCOND %condition, %basicblock.<id>1050 1051G_BRINDIRECT1052^^^^^^^^^^^^1053 1054Indirect branch1055 1056.. code-block:: none1057 1058  G_BRINDIRECT %src(p0)1059 1060G_BRJT1061^^^^^^1062 1063Indirect branch to jump table entry1064 1065.. code-block:: none1066 1067  G_BRJT %ptr(p0), %jti, %idx(s64)1068 1069G_JUMP_TABLE1070^^^^^^^^^^^^1071 1072Generates a pointer to the address of the jump table specified by the source1073operand. The source operand is a jump table index.1074G_JUMP_TABLE can be used in conjunction with G_BRJT to support jump table1075codegen with GlobalISel.1076 1077.. code-block:: none1078 1079  %dst:_(p0) = G_JUMP_TABLE %jump-table.01080 1081The above example generates a pointer to the source jump table index.1082 1083G_INVOKE_REGION_START1084^^^^^^^^^^^^^^^^^^^^^1085 1086A marker instruction that acts as a pseudo-terminator for regions of code that may1087throw exceptions. Being a terminator, it prevents code from being inserted after1088it during passes like legalization. This is needed because calls to exception1089throw routines do not return, so no code that must be on an executable path must1090be placed after throwing.1091 1092G_INTRINSIC, G_INTRINSIC_CONVERGENT1093^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^1094 1095Call an intrinsic that has no side-effects.1096 1097The _CONVERGENT variant corresponds to an LLVM IR intrinsic marked `convergent`.1098 1099.. note::1100 1101  Unlike SelectionDAG, there is no _VOID variant. Both of these are permitted1102  to have zero, one, or multiple results.1103 1104G_INTRINSIC_W_SIDE_EFFECTS, G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS1105^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^1106 1107Call an intrinsic that is considered to have unknown side-effects and as such1108cannot be reordered across other side-effecting instructions.1109 1110The _CONVERGENT variant corresponds to an LLVM IR intrinsic marked `convergent`.1111 1112.. note::1113 1114  Unlike SelectionDAG, there is no _VOID variant. Both of these are permitted1115  to have zero, one, or multiple results.1116 1117G_TRAP, G_DEBUGTRAP, G_UBSANTRAP1118^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^1119 1120Represents :ref:`llvm.trap <llvm.trap>`, :ref:`llvm.debugtrap <llvm.debugtrap>`1121and :ref:`llvm.ubsantrap <llvm.ubsantrap>` that generate a target-dependent1122trap instructions.1123 1124.. code-block:: none1125 1126  G_TRAP1127 1128.. code-block:: none1129 1130  G_DEBUGTRAP1131 1132.. code-block:: none1133 1134  G_UBSANTRAP 121135 1136Variadic Arguments1137------------------1138 1139G_VASTART1140^^^^^^^^^1141 1142.. caution::1143 1144  I found no documentation for this instruction at the time of writing.1145 1146G_VAARG1147^^^^^^^1148 1149.. caution::1150 1151  I found no documentation for this instruction at the time of writing.1152 1153Other Operations1154----------------1155 1156G_DYN_STACKALLOC1157^^^^^^^^^^^^^^^^1158 1159Dynamically realigns the stack pointer to the specified size and alignment.1160An alignment value of `0` or `1` means no specific alignment.1161 1162.. code-block:: none1163 1164  %8:_(p0) = G_DYN_STACKALLOC %7(s64), 321165 1166G_FREEZE1167^^^^^^^^1168 1169G_FREEZE is used to stop propagation of undef and poison values.1170 1171.. code-block:: none1172 1173  %1:_(s32) = G_FREEZE %0(s32)1174 1175Optimization Hints1176------------------1177 1178These instructions do not correspond to any target instructions. They act as1179hints for various combines.1180 1181G_ASSERT_SEXT, G_ASSERT_ZEXT1182^^^^^^^^^^^^^^^^^^^^^^^^^^^^1183 1184This signifies that the contents of a register were previously extended from a1185smaller type.1186 1187The smaller type is denoted using an immediate operand. For scalars, this is the1188width of the entire smaller type. For vectors, this is the width of the smaller1189element type.1190 1191.. code-block:: none1192 1193  %x_was_zexted:_(s32) = G_ASSERT_ZEXT %x(s32), 161194  %y_was_zexted:_(<2 x s32>) = G_ASSERT_ZEXT %y(<2 x s32>), 161195 1196  %z_was_sexted:_(s32) = G_ASSERT_SEXT %z(s32), 81197 1198G_ASSERT_SEXT and G_ASSERT_ZEXT act like copies, albeit with some restrictions.1199 1200The source and destination registers must1201 1202- Be virtual1203- Belong to the same register class1204- Belong to the same register bank1205 1206It should always be safe to1207 1208- Look through the source register1209- Replace the destination register with the source register1210 1211 1212Miscellaneous1213-------------1214 1215G_CONSTANT_FOLD_BARRIER1216^^^^^^^^^^^^^^^^^^^^^^^1217 1218This operation is used as an opaque barrier to prevent constant folding. Combines1219and other transformations should not look through this. These have no other1220semantics and can be safely eliminated if a target chooses.1221 1222 1223Unlisted: G_STACKSAVE, G_STACKRESTORE, G_FSHL, G_FSHR, G_SMULFIX, G_UMULFIX, G_SMULFIXSAT, G_UMULFIXSAT, G_SDIVFIX, G_UDIVFIX, G_SDIVFIXSAT, G_UDIVFIXSAT, G_FPOWI, G_FEXP10, G_FLDEXP, G_FFREXP, G_GET_FPENV, G_SET_FPENV, G_RESET_FPENV, G_GET_FPMODE, G_SET_FPMODE, G_RESET_FPMODE, G_INTRINSIC_FPTRUNC_ROUND, G_INTRINSIC_LRINT, G_INTRINSIC_LLRINT, G_INTRINSIC_ROUNDEVEN, G_READCYCLECOUNTER, G_READSTEADYCOUNTER, G_PREFETCH, G_READ_REGISTER, G_WRITE_REGISTER, G_STRICT_FADD, G_STRICT_FSUB, G_STRICT_FMUL, G_STRICT_FDIV, G_STRICT_FREM, G_STRICT_FMA, G_STRICT_FSQRT, G_STRICT_FLDEXP, G_ASSERT_ALIGN1224