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1User Guides2===========3 4NOTE: If you are a user who is only interested in using an LLVM-based compiler,5you should look into `Clang <https://clang.llvm.org>`_ instead. The6documentation here is intended for users who have a need to work with the7intermediate LLVM representation.8 9.. contents::10   :local:11 12.. toctree::13   :hidden:14 15   AArch64SME16   AddingConstrainedIntrinsics17   AdminTasks18   AdvancedBuilds19   AliasAnalysis20   AMDGPUUsage21   Benchmarking22   BigEndianNEON23   BuildingADistribution24   CFIVerify25   CMake26   CMakePrimer27   CodeGenerator28   CodeOfConduct29   CommandLine30   CompileCudaWithLLVM31   CoverageMappingFormat32   CycleTerminology33   DebuggingJITedCode34   DirectXUsage35   Docker36   DTLTO37   FatLTO38   ExtendingLLVM39   GitHub40   GoldPlugin41   GlobalISel/MIRPatterns42   HowToBuildOnARM43   HowToBuildWithPGO44   HowToBuildWindowsItaniumPrograms45   HowToCrossCompileBuiltinsOnArm46   HowToCrossCompileLLVM47   HowToUpdateDebugInfo48   InstCombineContributorGuide49   InstrProfileFormat50   InstrRefDebugInfo51   KeyInstructionsDebugInfo52   LinkTimeOptimization53   LoopTerminology54   MarkdownQuickstartTemplate55   MemorySSA56   MergeFunctions57   MCJITDesignAndImplementation58   MisExpect59   ORCv260   OpaquePointers61   JITLink62   NewPassManager63   NVPTXUsage64   Passes65   ReportingGuide66   ResponseGuide67   Remarks68   RemoveDIsDebugInfo69   RISCVUsage70   RISCV/RISCVVectorExtension71   SourceLevelDebugging72   SPIRVUsage73   SandboxIR74   StackSafetyAnalysis75   SupportLibrary76   TableGen/index77   TableGenFundamentals78   Telemetry79   Vectorizers80   WritingAnLLVMPass81   WritingAnLLVMNewPMPass82   WritingAnLLVMBackend83   yaml2obj84 85Clang86-----87 88:doc:`HowToBuildOnARM`89   Notes on building and testing LLVM/Clang on ARM.90 91:doc:`HowToBuildWithPGO`92    Notes on building LLVM/Clang with PGO.93 94:doc:`HowToCrossCompileLLVM`95   Notes on cross-building and testing LLVM/Clang.96 97`How to build the C, C++, ObjC, and ObjC++ front end`__98   Instructions for building the clang front-end from source.99 100   .. __: https://clang.llvm.org/get_started.html101 102:doc:`CoverageMappingFormat`103  This describes the format and encoding used for LLVM’s code coverage mapping.104 105:doc:`CFIVerify`106  A description of the verification tool for Control Flow Integrity.107 108LLVM Builds and Distributions109-----------------------------110 111:doc:`BuildingADistribution`112  A best-practices guide for using LLVM's CMake build system to package and113  distribute LLVM-based tools.114 115:doc:`CMake`116   An addendum to the main Getting Started guide for those using the `CMake117   build system <http://www.cmake.org>`_.118 119:doc:`Docker`120   A reference for using Dockerfiles provided with LLVM.121 122:doc:`Support Library <SupportLibrary>`123   This document describes the LLVM Support Library (``lib/Support``) and124   how to keep LLVM source code portable.125 126:doc:`AdvancedBuilds`127   This document describes more advanced build configurations.128 129Optimizations130-------------131 132:doc:`WritingAnLLVMNewPMPass`133   Information on how to write LLVM transformations under the new pass134   manager.135 136:doc:`WritingAnLLVMPass`137   Information on how to write LLVM transformations and analyses under the138   legacy pass manager.139 140:doc:`Passes`141   A list of optimizations and analyses implemented in LLVM.142 143:doc:`StackSafetyAnalysis`144  This document describes the design of the stack safety analysis of local145  variables.146 147:doc:`MergeFunctions`148  Describes functions merging optimization.149 150:doc:`AliasAnalysis`151   Information on how to write a new alias analysis implementation or how to152   use existing analyses.153 154:doc:`MemorySSA`155   Information about the MemorySSA utility in LLVM, as well as how to use it.156 157:doc:`LoopTerminology`158  A document describing Loops and associated terms as used in LLVM.159 160:doc:`CycleTerminology`161  A document describing cycles as a generalization of loops.162 163:doc:`Vectorizers`164   This document describes the current status of vectorization in LLVM.165 166:doc:`LinkTimeOptimization`167   This document describes the interface between LLVM intermodular optimizer168   and the linker and its design169 170:doc:`DTLTO`171   This document describes the DTLTO implementation, which allows for172   distributing ThinLTO backend compilations without requiring support from173   the build system.174 175:doc:`GoldPlugin`176   How to build your programs with link-time optimization on Linux.177 178:doc:`Remarks`179   A reference on the implementation of remarks in LLVM.180 181:doc:`Source Level Debugging with LLVM <SourceLevelDebugging>`182   This document describes the design and philosophy behind the LLVM183   source-level debugger.184 185:doc:`How to Update Debug Info <HowToUpdateDebugInfo>`186   This document specifies how to correctly update debug info in various kinds187   of code transformations.188 189:doc:`InstrRefDebugInfo`190   This document explains how LLVM uses value tracking, or instruction191   referencing, to determine variable locations for debug info in the final192   stages of compilation.193 194:doc:`RemoveDIsDebugInfo`195   This is a migration guide describing how to move from debug info using196   intrinsics such as dbg.value to using the non-instruction DbgRecord object.197 198:doc:`KeyInstructionsDebugInfo`199   This document explains how the debug info feature Key Instructions is200   implemented in LLVM.201 202:doc:`InstrProfileFormat`203   This document explains two binary formats of instrumentation-based profiles.204 205:doc:`InstCombineContributorGuide`206   This document specifies guidelines for contributions for InstCombine and207   related passes.208 209 210Code Generation211---------------212 213:doc:`WritingAnLLVMBackend`214   Information on how to write LLVM backends for machine targets.215 216:doc:`CodeGenerator`217   The design and implementation of the LLVM code generator.  Useful if you are218   working on retargetting LLVM to a new architecture, designing a new codegen219   pass, or enhancing existing components.220 221:doc:`TableGen <TableGen/index>`222   Describes the TableGen tool, which is used heavily by the LLVM code223   generator.224 225==========226GlobalISel227==========228 229:doc:`MIRPatterns <GlobalISel/MIRPatterns>`230   Describes the design of MIR Patterns and how to use them.231 232===233JIT234===235 236:doc:`MCJITDesignAndImplementation`237   Describes the inner workings of MCJIT execution engine.238 239:doc:`ORCv2`240   Describes the design and implementation of the ORC APIs, including some241   usage examples, and a guide for users transitioning from ORCv1 to ORCv2.242 243:doc:`JITLink`244   Describes the design and APIs for the JITLink library, ORC's new JIT245   linker.246 247:doc:`DebuggingJITedCode`248   How to debug JITed code with GDB.249 250Additional Topics251-----------------252 253:doc:`CommandLine`254  Provides information on using the command line parsing library.255 256:doc:`ExtendingLLVM`257  Look here to see how to add instructions and intrinsics to LLVM.258 259:doc:`AddingConstrainedIntrinsics`260   Gives the steps necessary when adding a new constrained math intrinsic261   to LLVM.262 263:doc:`HowToBuildWindowsItaniumPrograms`264   Notes on assembling a Windows Itanium environment.265 266:doc:`HowToCrossCompileBuiltinsOnArm`267   Notes on cross-building and testing the compiler-rt builtins for Arm.268 269:doc:`BigEndianNEON`270  LLVM's support for generating NEON instructions on big endian ARM targets is271  somewhat nonintuitive. This document explains the implementation and rationale.272 273:doc:`AArch64SME`274  LLVM's support for AArch64 SME ACLE and ABI.275 276:doc:`CompileCudaWithLLVM`277  LLVM support for CUDA.278 279:doc:`NVPTXUsage`280   This document describes using the NVPTX backend to compile GPU kernels.281 282:doc:`AMDGPUUsage`283   This document describes using the AMDGPU backend to compile GPU kernels.284 285:doc:`AMDGPUDwarfExtensionsForHeterogeneousDebugging`286   This document describes DWARF extensions to support heterogeneous debugging287   for targets such as the AMDGPU backend.288 289:doc:`AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack`290   This document describes a DWARF extension to allow location descriptions on291   the DWARF expression stack. It is part of292   :doc:`AMDGPUDwarfExtensionsForHeterogeneousDebugging`.293 294:doc:`SPIRVUsage`295   This document describes using the SPIR-V target to compile GPU kernels.296 297:doc:`DirectXUsage`298   This document describes using the DirectX target to compile GPU code for the299   DirectX runtime.300 301:doc:`RISCVUsage`302   This document describes using the RISC-V target.303 304:doc:`RISCV/RISCVVectorExtension`305   This document describes how the RISC-V Vector extension can be expressed in LLVM IR and how code is generated for it in the backend.306 307:doc:`Sandbox IR <SandboxIR>`308   This document describes the design and usage of Sandbox IR, a transactional layer over LLVM IR.309 310:doc:`Telemetry`311   This document describes the Telemetry framework in LLVM.312