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1//===-- DWARFExpression.cpp -----------------------------------------------===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9#include "llvm/DebugInfo/DWARF/DWARFExpressionPrinter.h"10#include "llvm/ADT/SmallString.h"11#include "llvm/DebugInfo/DWARF/DWARFUnit.h"12#include "llvm/DebugInfo/DWARF/LowLevel/DWARFExpression.h"13#include "llvm/Support/Format.h"14#include <cassert>15#include <cstdint>16 17using namespace llvm;18using namespace dwarf;19 20namespace llvm {21 22typedef DWARFExpression::Operation Op;23typedef Op::Description Desc;24 25static void prettyPrintBaseTypeRef(DWARFUnit *U, raw_ostream &OS,26                                   DIDumpOptions DumpOpts,27                                   ArrayRef<uint64_t> Operands,28                                   unsigned Operand) {29  assert(Operand < Operands.size() && "operand out of bounds");30  if (!U) {31    OS << format(" <base_type ref: 0x%" PRIx64 ">", Operands[Operand]);32    return;33  }34  auto Die = U->getDIEForOffset(U->getOffset() + Operands[Operand]);35  if (Die && Die.getTag() == dwarf::DW_TAG_base_type) {36    OS << " (";37    if (DumpOpts.Verbose)38      OS << format("0x%08" PRIx64 " -> ", Operands[Operand]);39    OS << format("0x%08" PRIx64 ")", U->getOffset() + Operands[Operand]);40    if (auto Name = dwarf::toString(Die.find(dwarf::DW_AT_name)))41      OS << " \"" << *Name << "\"";42  } else {43    OS << format(" <invalid base_type ref: 0x%" PRIx64 ">", Operands[Operand]);44  }45}46 47static bool printOp(const DWARFExpression::Operation *Op, raw_ostream &OS,48                    DIDumpOptions DumpOpts, const DWARFExpression *Expr,49                    DWARFUnit *U) {50  if (Op->isError()) {51    if (!DumpOpts.PrintRegisterOnly)52      OS << "<decoding error>";53    return false;54  }55 56  std::optional<unsigned> SubOpcode = Op->getSubCode();57 58  // In "register-only" mode, still show simple constant-valued locations.59  // This lets clients print annotations like "i = 0" when the location is60  // a constant (e.g. DW_OP_constu/consts ... DW_OP_stack_value).61  // We continue to suppress all other non-register ops in this mode.62  if (DumpOpts.PrintRegisterOnly) {63    // First, try pretty-printing registers (existing behavior below also does64    // this, but we need to short-circuit here to avoid printing opcode names).65    if ((Op->getCode() >= DW_OP_breg0 && Op->getCode() <= DW_OP_breg31) ||66        (Op->getCode() >= DW_OP_reg0 && Op->getCode() <= DW_OP_reg31) ||67        Op->getCode() == DW_OP_bregx || Op->getCode() == DW_OP_regx ||68        Op->getCode() == DW_OP_regval_type ||69        SubOpcode == DW_OP_LLVM_call_frame_entry_reg ||70        SubOpcode == DW_OP_LLVM_aspace_bregx) {71      if (prettyPrintRegisterOp(U, OS, DumpOpts, Op->getCode(),72                                Op->getRawOperands()))73        return true;74      // If we couldn't pretty-print, fall through and suppress.75    }76 77    // Show constants (decimal), suppress everything else.78    if (Op->getCode() == DW_OP_constu) {79      OS << (uint64_t)Op->getRawOperand(0);80      return true;81    }82    if (Op->getCode() == DW_OP_consts) {83      OS << (int64_t)Op->getRawOperand(0);84      return true;85    }86    if (Op->getCode() >= DW_OP_lit0 && Op->getCode() <= DW_OP_lit31) {87      OS << (unsigned)(Op->getCode() - DW_OP_lit0);88      return true;89    }90    if (Op->getCode() == DW_OP_stack_value)91      return true; // metadata; don't print a token92 93    return true; // suppress other opcodes silently in register-only mode94  }95 96  if (!DumpOpts.PrintRegisterOnly) {97    StringRef Name = OperationEncodingString(Op->getCode());98    assert(!Name.empty() && "DW_OP has no name!");99    OS << Name;100 101    if (SubOpcode) {102      StringRef SubName = SubOperationEncodingString(Op->getCode(), *SubOpcode);103      assert(!SubName.empty() && "DW_OP SubOp has no name!");104      OS << ' ' << SubName;105    }106  }107 108  if ((Op->getCode() >= DW_OP_breg0 && Op->getCode() <= DW_OP_breg31) ||109      (Op->getCode() >= DW_OP_reg0 && Op->getCode() <= DW_OP_reg31) ||110      Op->getCode() == DW_OP_bregx || Op->getCode() == DW_OP_regx ||111      Op->getCode() == DW_OP_regval_type ||112      SubOpcode == DW_OP_LLVM_call_frame_entry_reg ||113      SubOpcode == DW_OP_LLVM_aspace_bregx)114    if (prettyPrintRegisterOp(U, OS, DumpOpts, Op->getCode(),115                              Op->getRawOperands()))116      return true;117 118  if (!DumpOpts.PrintRegisterOnly) {119    for (unsigned Operand = 0; Operand < Op->getDescription().Op.size();120         ++Operand) {121      unsigned Size = Op->getDescription().Op[Operand];122      unsigned Signed = Size & DWARFExpression::Operation::SignBit;123 124      if (Size == DWARFExpression::Operation::SizeSubOpLEB) {125        assert(Operand == 0 && "DW_OP SubOp must be the first operand");126        assert(SubOpcode && "DW_OP SubOp description is inconsistent");127      } else if (Size == DWARFExpression::Operation::BaseTypeRef && U) {128        // For DW_OP_convert the operand may be 0 to indicate that conversion to129        // the generic type should be done. The same holds for130        // DW_OP_reinterpret, which is currently not supported.131        if (Op->getCode() == DW_OP_convert && Op->getRawOperand(Operand) == 0)132          OS << " 0x0";133        else134          prettyPrintBaseTypeRef(U, OS, DumpOpts, Op->getRawOperands(),135                                 Operand);136      } else if (Size == DWARFExpression::Operation::WasmLocationArg) {137        assert(Operand == 1);138        switch (Op->getRawOperand(0)) {139        case 0:140        case 1:141        case 2:142        case 3: // global as uint32143        case 4:144          OS << format(" 0x%" PRIx64, Op->getRawOperand(Operand));145          break;146        default:147          assert(false);148        }149      } else if (Size == DWARFExpression::Operation::SizeBlock) {150        uint64_t Offset = Op->getRawOperand(Operand);151        for (unsigned i = 0; i < Op->getRawOperand(Operand - 1); ++i)152          OS << format(" 0x%02x",153                       static_cast<uint8_t>(Expr->getData()[Offset++]));154      } else {155        if (Signed)156          OS << format(" %+" PRId64, (int64_t)Op->getRawOperand(Operand));157        else if (Op->getCode() != DW_OP_entry_value &&158                 Op->getCode() != DW_OP_GNU_entry_value)159          OS << format(" 0x%" PRIx64, Op->getRawOperand(Operand));160      }161    }162  }163  return true;164}165 166void printDwarfExpression(const DWARFExpression *E, raw_ostream &OS,167                          DIDumpOptions DumpOpts, DWARFUnit *U, bool IsEH) {168  uint32_t EntryValExprSize = 0;169  uint64_t EntryValStartOffset = 0;170  if (E->getData().empty())171    OS << "<empty>";172 173  for (auto &Op : *E) {174    DumpOpts.IsEH = IsEH;175    if (!printOp(&Op, OS, DumpOpts, E, U) && !DumpOpts.PrintRegisterOnly) {176      uint64_t FailOffset = Op.getEndOffset();177      while (FailOffset < E->getData().size())178        OS << format(" %02x", static_cast<uint8_t>(E->getData()[FailOffset++]));179      return;180    }181    if (!DumpOpts.PrintRegisterOnly) {182      if (Op.getCode() == DW_OP_entry_value ||183          Op.getCode() == DW_OP_GNU_entry_value) {184        OS << "(";185        EntryValExprSize = Op.getRawOperand(0);186        EntryValStartOffset = Op.getEndOffset();187        continue;188      }189 190      if (EntryValExprSize) {191        EntryValExprSize -= Op.getEndOffset() - EntryValStartOffset;192        if (EntryValExprSize == 0)193          OS << ")";194      }195 196      if (Op.getEndOffset() < E->getData().size())197        OS << ", ";198    }199  }200}201 202/// A user-facing string representation of a DWARF expression. This might be an203/// Address expression, in which case it will be implicitly dereferenced, or a204/// Value expression.205struct PrintedExpr {206  enum ExprKind {207    Address,208    Value,209  };210  ExprKind Kind;211  SmallString<16> String;212 213  PrintedExpr(ExprKind K = Address) : Kind(K) {}214};215 216static bool printCompactDWARFExpr(217    raw_ostream &OS, DWARFExpression::iterator I,218    const DWARFExpression::iterator E,219    std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg =220        nullptr) {221  SmallVector<PrintedExpr, 4> Stack;222 223  auto UnknownOpcode = [](raw_ostream &OS, uint8_t Opcode,224                          std::optional<unsigned> SubOpcode) -> bool {225    // If we hit an unknown operand, we don't know its effect on the stack,226    // so bail out on the whole expression.227    OS << "<unknown op " << dwarf::OperationEncodingString(Opcode) << " ("228       << (int)Opcode;229    if (SubOpcode)230      OS << ") subop " << dwarf::SubOperationEncodingString(Opcode, *SubOpcode)231         << " (" << *SubOpcode;232    OS << ")>";233    return false;234  };235 236  while (I != E) {237    const DWARFExpression::Operation &Op = *I;238    uint8_t Opcode = Op.getCode();239    switch (Opcode) {240    case dwarf::DW_OP_regx: {241      // DW_OP_regx: A register, with the register num given as an operand.242      // Printed as the plain register name.243      uint64_t DwarfRegNum = Op.getRawOperand(0);244      auto RegName = GetNameForDWARFReg(DwarfRegNum, false);245      if (RegName.empty())246        return false;247      raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String);248      S << RegName;249      break;250    }251    case dwarf::DW_OP_bregx: {252      int DwarfRegNum = Op.getRawOperand(0);253      int64_t Offset = Op.getRawOperand(1);254      auto RegName = GetNameForDWARFReg(DwarfRegNum, false);255      if (RegName.empty())256        return false;257      raw_svector_ostream S(Stack.emplace_back().String);258      S << RegName;259      if (Offset)260        S << format("%+" PRId64, Offset);261      break;262    }263    case dwarf::DW_OP_entry_value:264    case dwarf::DW_OP_GNU_entry_value: {265      // DW_OP_entry_value contains a sub-expression which must be rendered266      // separately.267      uint64_t SubExprLength = Op.getRawOperand(0);268      DWARFExpression::iterator SubExprEnd = I.skipBytes(SubExprLength);269      ++I;270      raw_svector_ostream S(Stack.emplace_back().String);271      S << "entry(";272      printCompactDWARFExpr(S, I, SubExprEnd, GetNameForDWARFReg);273      S << ")";274      I = SubExprEnd;275      continue;276    }277    case dwarf::DW_OP_stack_value: {278      // The top stack entry should be treated as the actual value of tne279      // variable, rather than the address of the variable in memory.280      assert(!Stack.empty());281      Stack.back().Kind = PrintedExpr::Value;282      break;283    }284    case dwarf::DW_OP_nop: {285      break;286    }287    case dwarf::DW_OP_LLVM_user: {288      std::optional<unsigned> SubOpcode = Op.getSubCode();289      if (SubOpcode == dwarf::DW_OP_LLVM_nop)290        break;291      return UnknownOpcode(OS, Opcode, SubOpcode);292    }293    default:294      if (Opcode >= dwarf::DW_OP_reg0 && Opcode <= dwarf::DW_OP_reg31) {295        // DW_OP_reg<N>: A register, with the register num implied by the296        // opcode. Printed as the plain register name.297        uint64_t DwarfRegNum = Opcode - dwarf::DW_OP_reg0;298        auto RegName = GetNameForDWARFReg(DwarfRegNum, false);299        if (RegName.empty())300          return false;301        raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String);302        S << RegName;303      } else if (Opcode >= dwarf::DW_OP_breg0 &&304                 Opcode <= dwarf::DW_OP_breg31) {305        int DwarfRegNum = Opcode - dwarf::DW_OP_breg0;306        int64_t Offset = Op.getRawOperand(0);307        auto RegName = GetNameForDWARFReg(DwarfRegNum, false);308        if (RegName.empty())309          return false;310        raw_svector_ostream S(Stack.emplace_back().String);311        S << RegName;312        if (Offset)313          S << format("%+" PRId64, Offset);314      } else {315        return UnknownOpcode(OS, Opcode, std::nullopt);316      }317      break;318    }319    ++I;320  }321 322  if (Stack.size() != 1) {323    OS << "<stack of size " << Stack.size() << ", expected 1>";324    return false;325  }326 327  if (Stack.front().Kind == PrintedExpr::Address)328    OS << "[" << Stack.front().String << "]";329  else330    OS << Stack.front().String;331 332  return true;333}334 335bool printDwarfExpressionCompact(336    const DWARFExpression *E, raw_ostream &OS,337    std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg) {338  return printCompactDWARFExpr(OS, E->begin(), E->end(), GetNameForDWARFReg);339}340 341bool prettyPrintRegisterOp(DWARFUnit *U, raw_ostream &OS,342                           DIDumpOptions DumpOpts, uint8_t Opcode,343                           ArrayRef<uint64_t> Operands) {344  if (!DumpOpts.GetNameForDWARFReg)345    return false;346 347  uint64_t DwarfRegNum;348  unsigned OpNum = 0;349 350  std::optional<unsigned> SubOpcode;351  if (Opcode == DW_OP_LLVM_user)352    SubOpcode = Operands[OpNum++];353 354  if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||355      Opcode == DW_OP_regval_type || SubOpcode == DW_OP_LLVM_aspace_bregx ||356      SubOpcode == DW_OP_LLVM_call_frame_entry_reg)357    DwarfRegNum = Operands[OpNum++];358  else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx)359    DwarfRegNum = Opcode - DW_OP_breg0;360  else361    DwarfRegNum = Opcode - DW_OP_reg0;362 363  auto RegName = DumpOpts.GetNameForDWARFReg(DwarfRegNum, DumpOpts.IsEH);364  if (!RegName.empty()) {365    if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||366        Opcode == DW_OP_bregx || SubOpcode == DW_OP_LLVM_aspace_bregx)367      OS << ' ' << RegName << format("%+" PRId64, Operands[OpNum]);368    else369      OS << ' ' << RegName.data();370 371    if (Opcode == DW_OP_regval_type)372      prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, 1);373    return true;374  }375 376  return false;377}378 379} // namespace llvm380