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1//===- AArch64CallLowering.h - Call lowering --------------------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8///9/// \file10/// This file describes how to lower LLVM calls to machine code calls.11///12//===----------------------------------------------------------------------===//13 14#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H15#define LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H16 17#include "llvm/ADT/ArrayRef.h"18#include "llvm/CodeGen/GlobalISel/CallLowering.h"19#include "llvm/IR/CallingConv.h"20#include <cstdint>21#include <functional>22 23namespace llvm {24 25class AArch64TargetLowering;26class CCValAssign;27class MachineIRBuilder;28class Type;29 30class AArch64CallLowering: public CallLowering {31public:32 AArch64CallLowering(const AArch64TargetLowering &TLI);33 34 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,35 ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,36 Register SwiftErrorVReg) const override;37 38 bool canLowerReturn(MachineFunction &MF, CallingConv::ID CallConv,39 SmallVectorImpl<BaseArgInfo> &Outs,40 bool IsVarArg) const override;41 42 bool fallBackToDAGISel(const MachineFunction &MF) const override;43 44 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,45 ArrayRef<ArrayRef<Register>> VRegs,46 FunctionLoweringInfo &FLI) const override;47 48 bool lowerCall(MachineIRBuilder &MIRBuilder,49 CallLoweringInfo &Info) const override;50 51 /// Returns true if the call can be lowered as a tail call.52 bool53 isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder,54 CallLoweringInfo &Info,55 SmallVectorImpl<ArgInfo> &InArgs,56 SmallVectorImpl<ArgInfo> &OutArgs) const;57 58 bool supportSwiftError() const override { return true; }59 60 bool isTypeIsValidForThisReturn(EVT Ty) const override;61 62private:63 using RegHandler = std::function<void(MachineIRBuilder &, Type *, unsigned,64 CCValAssign &)>;65 66 using MemHandler =67 std::function<void(MachineIRBuilder &, int, CCValAssign &)>;68 69 void saveVarArgRegisters(MachineIRBuilder &MIRBuilder,70 CallLowering::IncomingValueHandler &Handler,71 CCState &CCInfo) const;72 73 bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info,74 SmallVectorImpl<ArgInfo> &OutArgs) const;75 76 bool77 doCallerAndCalleePassArgsTheSameWay(CallLoweringInfo &Info,78 MachineFunction &MF,79 SmallVectorImpl<ArgInfo> &InArgs) const;80 81 bool82 areCalleeOutgoingArgsTailCallable(CallLoweringInfo &Info, MachineFunction &MF,83 SmallVectorImpl<ArgInfo> &OutArgs) const;84};85 86} // end namespace llvm87 88#endif // LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H89