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1//===- AArch64LegalizerInfo --------------------------------------*- C++ -*-==//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8/// \file9/// This file declares the targeting of the Machinelegalizer class for10/// AArch64.11/// \todo This should be generated by TableGen.12//===----------------------------------------------------------------------===//13 14#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H15#define LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H16 17#include "llvm/CodeGen/GlobalISel/GISelChangeObserver.h"18#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"19#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"20#include "llvm/CodeGen/MachineRegisterInfo.h"21 22namespace llvm {23 24class AArch64Subtarget;25 26class AArch64LegalizerInfo : public LegalizerInfo {27public:28  AArch64LegalizerInfo(const AArch64Subtarget &ST);29 30  bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,31                      LostDebugLocObserver &LocObserver) const override;32 33  bool legalizeIntrinsic(LegalizerHelper &Helper,34                         MachineInstr &MI) const override;35 36private:37  bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,38                     MachineIRBuilder &MIRBuilder) const;39  bool legalizeLoadStore(MachineInstr &MI, MachineRegisterInfo &MRI,40                         MachineIRBuilder &MIRBuilder,41                         GISelChangeObserver &Observer) const;42  bool legalizeShlAshrLshr(MachineInstr &MI, MachineRegisterInfo &MRI,43                           MachineIRBuilder &MIRBuilder,44                           GISelChangeObserver &Observer) const;45 46  bool legalizeSmallCMGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,47                                  MachineIRBuilder &MIRBuilder,48                                  GISelChangeObserver &Observer) const;49  bool legalizeBitfieldExtract(MachineInstr &MI, MachineRegisterInfo &MRI,50                               LegalizerHelper &Helper) const;51  bool legalizeRotate(MachineInstr &MI, MachineRegisterInfo &MRI,52                      LegalizerHelper &Helper) const;53  bool legalizeICMP(MachineInstr &MI, MachineRegisterInfo &MRI,54                    MachineIRBuilder &MIRBuilder) const;55  bool legalizeFunnelShift(MachineInstr &MI, MachineRegisterInfo &MRI,56                           MachineIRBuilder &MIRBuilder,57                           GISelChangeObserver &Observer,58                           LegalizerHelper &Helper) const;59  bool legalizeCTPOP(MachineInstr &MI, MachineRegisterInfo &MRI,60                     LegalizerHelper &Helper) const;61  bool legalizeAtomicCmpxchg128(MachineInstr &MI, MachineRegisterInfo &MRI,62                                LegalizerHelper &Helper) const;63  bool legalizeCTTZ(MachineInstr &MI, LegalizerHelper &Helper) const;64  bool legalizeMemOps(MachineInstr &MI, LegalizerHelper &Helper) const;65  bool legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,66                                LegalizerHelper &Helper) const;67  bool legalizeDynStackAlloc(MachineInstr &MI, LegalizerHelper &Helper) const;68  bool legalizePrefetch(MachineInstr &MI, LegalizerHelper &Helper) const;69  bool legalizeBitcast(MachineInstr &MI, LegalizerHelper &Helper) const;70  bool legalizeFptrunc(MachineInstr &MI, MachineIRBuilder &MIRBuilder,71                       MachineRegisterInfo &MRI) const;72  const AArch64Subtarget *ST;73};74} // End llvm namespace.75#endif76