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1//=== lib/CodeGen/GlobalISel/AMDGPUCombinerHelper.h -------------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8///9/// \file10/// This contains common combine transformations that may be used in a combine11/// pass.12///13//===----------------------------------------------------------------------===//14 15#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUCOMBINERHELPER_H16#define LLVM_LIB_TARGET_AMDGPU_AMDGPUCOMBINERHELPER_H17 18#include "GCNSubtarget.h"19#include "llvm/CodeGen/GlobalISel/Combiner.h"20#include "llvm/CodeGen/GlobalISel/CombinerHelper.h"21 22namespace llvm {23class AMDGPUCombinerHelper : public CombinerHelper {24protected:25 const GCNSubtarget &STI;26 const SIInstrInfo &TII;27 28public:29 using CombinerHelper::CombinerHelper;30 AMDGPUCombinerHelper(GISelChangeObserver &Observer, MachineIRBuilder &B,31 bool IsPreLegalize, GISelValueTracking *VT,32 MachineDominatorTree *MDT, const LegalizerInfo *LI,33 const GCNSubtarget &STI);34 35 bool matchFoldableFneg(MachineInstr &MI, MachineInstr *&MatchInfo) const;36 void applyFoldableFneg(MachineInstr &MI, MachineInstr *&MatchInfo) const;37 38 bool matchExpandPromotedF16FMed3(MachineInstr &MI, Register Src0,39 Register Src1, Register Src2) const;40 void applyExpandPromotedF16FMed3(MachineInstr &MI, Register Src0,41 Register Src1, Register Src2) const;42 43 bool matchCombineFmulWithSelectToFldexp(44 MachineInstr &MI, MachineInstr &Sel,45 std::function<void(MachineIRBuilder &)> &MatchInfo) const;46 47 bool matchConstantIs32BitMask(Register Reg) const;48};49 50} // namespace llvm51 52#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUCOMBINERHELPER_H53