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1//===-- AMDGPUGIsel.td - AMDGPU GlobalISel Patterns---------*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8// This files contains patterns that should only be used by GlobalISel.  For9// example patterns for V_* instructions that have S_* equivalents.10// SelectionDAG does not support selecting V_* instructions.11//===----------------------------------------------------------------------===//12 13include "AMDGPU.td"14include "AMDGPUCombine.td"15 16def sd_vsrc0 : ComplexPattern<i32, 1, "">;17def gi_vsrc0 :18    GIComplexOperandMatcher<s32, "selectVSRC0">,19    GIComplexPatternEquiv<sd_vsrc0>;20 21def sd_vcsrc : ComplexPattern<i32, 1, "">;22def gi_vcsrc :23    GIComplexOperandMatcher<s32, "selectVCSRC">,24    GIComplexPatternEquiv<sd_vcsrc>;25 26def gi_vop3mods0 :27    GIComplexOperandMatcher<s32, "selectVOP3Mods0">,28    GIComplexPatternEquiv<VOP3Mods0>;29 30def gi_vop3mods :31    GIComplexOperandMatcher<s32, "selectVOP3Mods">,32    GIComplexPatternEquiv<VOP3Mods>;33 34def gi_vop3modsnoncanonicalizing :35    GIComplexOperandMatcher<s32, "selectVOP3ModsNonCanonicalizing">,36    GIComplexPatternEquiv<VOP3ModsNonCanonicalizing>;37 38def gi_vop3_no_mods :39    GIComplexOperandMatcher<s32, "selectVOP3NoMods">,40    GIComplexPatternEquiv<VOP3NoMods>;41 42def gi_vop3omods :43    GIComplexOperandMatcher<s32, "selectVOP3OMods">,44    GIComplexPatternEquiv<VOP3OMods>;45 46def gi_vop3pmods :47    GIComplexOperandMatcher<s32, "selectVOP3PMods">,48    GIComplexPatternEquiv<VOP3PMods>;49 50def gi_vop3pmodsdot :51    GIComplexOperandMatcher<s32, "selectVOP3PModsDOT">,52    GIComplexPatternEquiv<VOP3PModsDOT>;53 54def gi_wmmaopselvop3pmods :55    GIComplexOperandMatcher<s32, "selectWMMAOpSelVOP3PMods">,56    GIComplexPatternEquiv<WMMAOpSelVOP3PMods>;57 58def gi_wmmavisrc :59    GIComplexOperandMatcher<s32, "selectWMMAVISrc">,60    GIComplexPatternEquiv<WMMAVISrc>;61 62def gi_wmmamods :63    GIComplexOperandMatcher<s32, "selectWMMAModsF32NegAbs">,64    GIComplexPatternEquiv<WMMAModsF32NegAbs>;65 66def gi_wmmamodsf16Neg :67    GIComplexOperandMatcher<s32, "selectWMMAModsF16Neg">,68    GIComplexPatternEquiv<WMMAModsF16Neg>;69 70def gi_wmmamodsf16NegAbs :71    GIComplexOperandMatcher<s32, "selectWMMAModsF16NegAbs">,72    GIComplexPatternEquiv<WMMAModsF16NegAbs>;73 74def gi_swmmacindex8 :75    GIComplexOperandMatcher<s32, "selectSWMMACIndex8">,76    GIComplexPatternEquiv<SWMMACIndex8>;77 78def gi_swmmacindex16 :79    GIComplexOperandMatcher<s32, "selectSWMMACIndex16">,80    GIComplexPatternEquiv<SWMMACIndex16>;81 82def gi_swmmacindex32 :83    GIComplexOperandMatcher<s64, "selectSWMMACIndex32">,84    GIComplexPatternEquiv<SWMMACIndex32>;85 86def gi_vop3opselmods :87    GIComplexOperandMatcher<s32, "selectVOP3OpSelMods">,88    GIComplexPatternEquiv<VOP3OpSelMods>;89 90def gi_vinterpmods :91    GIComplexOperandMatcher<s32, "selectVINTERPMods">,92    GIComplexPatternEquiv<VINTERPMods>;93 94def gi_vinterpmods_hi :95    GIComplexOperandMatcher<s32, "selectVINTERPModsHi">,96    GIComplexPatternEquiv<VINTERPModsHi>;97 98// FIXME: Why do we have both VOP3OpSel and VOP3OpSelMods?99def gi_vop3opsel :100    GIComplexOperandMatcher<s32, "selectVOP3OpSelMods">,101    GIComplexPatternEquiv<VOP3OpSel>;102 103def gi_smrd_imm :104    GIComplexOperandMatcher<s64, "selectSmrdImm">,105    GIComplexPatternEquiv<SMRDImm>;106 107def gi_smrd_imm32 :108    GIComplexOperandMatcher<s64, "selectSmrdImm32">,109    GIComplexPatternEquiv<SMRDImm32>;110 111def gi_smrd_sgpr :112    GIComplexOperandMatcher<s64, "selectSmrdSgpr">,113    GIComplexPatternEquiv<SMRDSgpr>;114 115def gi_smrd_sgpr_imm :116    GIComplexOperandMatcher<s64, "selectSmrdSgprImm">,117    GIComplexPatternEquiv<SMRDSgprImm>;118 119def gi_flat_offset :120    GIComplexOperandMatcher<s64, "selectFlatOffset">,121    GIComplexPatternEquiv<FlatOffset>;122def gi_global_offset :123    GIComplexOperandMatcher<s64, "selectGlobalOffset">,124    GIComplexPatternEquiv<GlobalOffset>;125def gi_global_saddr :126    GIComplexOperandMatcher<s64, "selectGlobalSAddr">,127    GIComplexPatternEquiv<GlobalSAddr>;128def gi_global_saddr_cpol :129    GIComplexOperandMatcher<s64, "selectGlobalSAddrCPol">,130    GIComplexPatternEquiv<GlobalSAddrCPol>;131def gi_global_saddr_cpol_m0 :132    GIComplexOperandMatcher<s64, "selectGlobalSAddrCPolM0">,133    GIComplexPatternEquiv<GlobalSAddrCPolM0>;134def gi_global_saddr_glc :135    GIComplexOperandMatcher<s64, "selectGlobalSAddrGLC">,136    GIComplexPatternEquiv<GlobalSAddrGLC>;137def gi_global_saddr_no_ioffset :138    GIComplexOperandMatcher<s64, "selectGlobalSAddrNoIOffset">,139    GIComplexPatternEquiv<GlobalSAddrNoIOffset>;140def gi_global_saddr_no_ioffset_m0 :141    GIComplexOperandMatcher<s64, "selectGlobalSAddrNoIOffsetM0">,142    GIComplexPatternEquiv<GlobalSAddrNoIOffsetM0>;143 144def gi_mubuf_scratch_offset :145    GIComplexOperandMatcher<s32, "selectMUBUFScratchOffset">,146    GIComplexPatternEquiv<MUBUFScratchOffset>;147 148def gi_buf_soffset :149    GIComplexOperandMatcher<s32, "selectBUFSOffset">,150    GIComplexPatternEquiv<BUFSOffset>;151 152def gi_mubuf_scratch_offen :153    GIComplexOperandMatcher<s32, "selectMUBUFScratchOffen">,154    GIComplexPatternEquiv<MUBUFScratchOffen>;155 156def gi_flat_scratch_offset :157    GIComplexOperandMatcher<s32, "selectScratchOffset">,158    GIComplexPatternEquiv<ScratchOffset>;159 160def gi_flat_scratch_saddr :161    GIComplexOperandMatcher<s32, "selectScratchSAddr">,162    GIComplexPatternEquiv<ScratchSAddr>;163 164def gi_flat_scratch_svaddr :165    GIComplexOperandMatcher<s32, "selectScratchSVAddr">,166    GIComplexPatternEquiv<ScratchSVAddr>;167 168def gi_ds_1addr_1offset :169    GIComplexOperandMatcher<s32, "selectDS1Addr1Offset">,170    GIComplexPatternEquiv<DS1Addr1Offset>;171 172def gi_ds_64bit_4byte_aligned :173    GIComplexOperandMatcher<s64, "selectDS64Bit4ByteAligned">,174    GIComplexPatternEquiv<DS64Bit4ByteAligned>;175 176def gi_ds_128bit_8byte_aligned :177    GIComplexOperandMatcher<s64, "selectDS128Bit8ByteAligned">,178    GIComplexPatternEquiv<DS128Bit8ByteAligned>;179 180def gi_mubuf_addr64 :181    GIComplexOperandMatcher<s64, "selectMUBUFAddr64">,182    GIComplexPatternEquiv<MUBUFAddr64>;183 184def gi_mubuf_offset :185    GIComplexOperandMatcher<s64, "selectMUBUFOffset">,186    GIComplexPatternEquiv<MUBUFOffset>;187 188def gi_smrd_buffer_imm :189    GIComplexOperandMatcher<s64, "selectSMRDBufferImm">,190    GIComplexPatternEquiv<SMRDBufferImm>;191 192def gi_smrd_buffer_imm32 :193    GIComplexOperandMatcher<s64, "selectSMRDBufferImm32">,194    GIComplexPatternEquiv<SMRDBufferImm32>;195 196def gi_smrd_buffer_sgpr_imm :197    GIComplexOperandMatcher<s64, "selectSMRDBufferSgprImm">,198    GIComplexPatternEquiv<SMRDBufferSgprImm>;199 200def gi_vop3_mad_mix_mods :201    GIComplexOperandMatcher<s64, "selectVOP3PMadMixMods">,202    GIComplexPatternEquiv<VOP3PMadMixMods>;203 204def gi_vop3_mad_mix_mods_ext :205    GIComplexOperandMatcher<s64, "selectVOP3PMadMixModsExt">,206    GIComplexPatternEquiv<VOP3PMadMixModsExt>;207 208// Separate load nodes are defined to glue m0 initialization in209// SelectionDAG. The GISel selector can just insert m0 initialization210// directly before selecting a glue-less load, so hide this211// distinction.212 213def : GINodeEquiv<G_LOAD, AMDGPUld_glue> {214  let CheckMMOIsNonAtomic = 1;215  let IfSignExtend = G_SEXTLOAD;216  let IfZeroExtend = G_ZEXTLOAD;217}218 219def : GINodeEquiv<G_STORE, AMDGPUst_glue> {220  let CheckMMOIsNonAtomic = 1;221}222 223def : GINodeEquiv<G_LOAD, AMDGPUatomic_ld_glue> {224  bit CheckMMOIsAtomic = 1;225  let IfSignExtend = G_SEXTLOAD;226  let IfZeroExtend = G_ZEXTLOAD;227}228 229def : GINodeEquiv<G_STORE, AMDGPUatomic_st_glue> {230  bit CheckMMOIsAtomic = 1;231}232 233 234def : GINodeEquiv<G_ATOMIC_CMPXCHG, atomic_cmp_swap_glue>;235def : GINodeEquiv<G_ATOMICRMW_XCHG, atomic_swap_glue>;236def : GINodeEquiv<G_ATOMICRMW_ADD, atomic_load_add_glue>;237def : GINodeEquiv<G_ATOMICRMW_SUB, atomic_load_sub_glue>;238def : GINodeEquiv<G_ATOMICRMW_AND, atomic_load_and_glue>;239def : GINodeEquiv<G_ATOMICRMW_OR, atomic_load_or_glue>;240def : GINodeEquiv<G_ATOMICRMW_XOR, atomic_load_xor_glue>;241def : GINodeEquiv<G_ATOMICRMW_MIN, atomic_load_min_glue>;242def : GINodeEquiv<G_ATOMICRMW_MAX, atomic_load_max_glue>;243def : GINodeEquiv<G_ATOMICRMW_UMIN, atomic_load_umin_glue>;244def : GINodeEquiv<G_ATOMICRMW_UMAX, atomic_load_umax_glue>;245def : GINodeEquiv<G_ATOMICRMW_FADD, atomic_load_fadd_glue>;246 247def : GINodeEquiv<G_AMDGPU_FFBH_U32, AMDGPUffbh_u32_impl>;248def : GINodeEquiv<G_AMDGPU_FFBL_B32, AMDGPUffbl_b32_impl>;249def : GINodeEquiv<G_AMDGPU_FMIN_LEGACY, AMDGPUfmin_legacy>;250def : GINodeEquiv<G_AMDGPU_FMAX_LEGACY, AMDGPUfmax_legacy>;251def : GINodeEquiv<G_AMDGPU_RCP_IFLAG, AMDGPUrcp_iflag>;252 253def : GINodeEquiv<G_AMDGPU_CVT_F32_UBYTE0, AMDGPUcvt_f32_ubyte0>;254def : GINodeEquiv<G_AMDGPU_CVT_F32_UBYTE1, AMDGPUcvt_f32_ubyte1>;255def : GINodeEquiv<G_AMDGPU_CVT_F32_UBYTE2, AMDGPUcvt_f32_ubyte2>;256def : GINodeEquiv<G_AMDGPU_CVT_F32_UBYTE3, AMDGPUcvt_f32_ubyte3>;257 258def : GINodeEquiv<G_AMDGPU_CVT_PK_I16_I32, AMDGPUpk_i16_i32_impl>;259def : GINodeEquiv<G_AMDGPU_SMED3, AMDGPUsmed3>;260def : GINodeEquiv<G_AMDGPU_UMED3, AMDGPUumed3>;261def : GINodeEquiv<G_AMDGPU_FMED3, AMDGPUfmed3_impl>;262def : GINodeEquiv<G_AMDGPU_CLAMP, AMDGPUclamp>;263 264def : GINodeEquiv<G_AMDGPU_ATOMIC_CMPXCHG, AMDGPUatomic_cmp_swap>;265def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD, SIbuffer_load>;266def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_USHORT, SIbuffer_load_ushort>;267def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_UBYTE, SIbuffer_load_ubyte>;268def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SSHORT, SIbuffer_load_short>;269def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SBYTE, SIbuffer_load_byte>;270def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_TFE, SIbuffer_load_tfe>;271def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_USHORT_TFE, SIbuffer_load_ushort_tfe>;272def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_UBYTE_TFE, SIbuffer_load_ubyte_tfe>;273def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SSHORT_TFE, SIbuffer_load_short_tfe>;274def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SBYTE_TFE, SIbuffer_load_byte_tfe>;275def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_FORMAT, SIbuffer_load_format>;276def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_FORMAT_TFE, SIbuffer_load_format_tfe>;277def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_FORMAT_D16, SIbuffer_load_format_d16>;278def : GINodeEquiv<G_AMDGPU_TBUFFER_LOAD_FORMAT, SItbuffer_load>;279def : GINodeEquiv<G_AMDGPU_TBUFFER_LOAD_FORMAT_D16, SItbuffer_load_d16>;280def : GINodeEquiv<G_AMDGPU_BUFFER_STORE, SIbuffer_store>;281def : GINodeEquiv<G_AMDGPU_BUFFER_STORE_SHORT, SIbuffer_store_short>;282def : GINodeEquiv<G_AMDGPU_BUFFER_STORE_BYTE, SIbuffer_store_byte>;283def : GINodeEquiv<G_AMDGPU_BUFFER_STORE_FORMAT, SIbuffer_store_format>;284def : GINodeEquiv<G_AMDGPU_BUFFER_STORE_FORMAT_D16, SIbuffer_store_format_d16>;285def : GINodeEquiv<G_AMDGPU_TBUFFER_STORE_FORMAT, SItbuffer_store>;286def : GINodeEquiv<G_AMDGPU_TBUFFER_STORE_FORMAT_D16, SItbuffer_store_d16>;287 288// FIXME: Check MMO is atomic289def : GINodeEquiv<G_ATOMICRMW_UINC_WRAP, atomic_load_uinc_wrap_glue>;290def : GINodeEquiv<G_ATOMICRMW_UDEC_WRAP, atomic_load_udec_wrap_glue>;291def : GINodeEquiv<G_ATOMICRMW_FMIN, atomic_load_fmin_glue>;292def : GINodeEquiv<G_ATOMICRMW_FMAX, atomic_load_fmax_glue>;293 294def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_SWAP, SIbuffer_atomic_swap>;295def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_ADD, SIbuffer_atomic_add>;296def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_SUB, SIbuffer_atomic_sub>;297def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_SMIN, SIbuffer_atomic_smin>;298def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_UMIN, SIbuffer_atomic_umin>;299def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_SMAX, SIbuffer_atomic_smax>;300def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_UMAX, SIbuffer_atomic_umax>;301def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_AND, SIbuffer_atomic_and>;302def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_OR, SIbuffer_atomic_or>;303def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_XOR, SIbuffer_atomic_xor>;304def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_INC, SIbuffer_atomic_inc>;305def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_DEC, SIbuffer_atomic_dec>;306def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_FADD, SIbuffer_atomic_fadd>;307def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_FMIN, SIbuffer_atomic_fmin>;308def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_FMAX, SIbuffer_atomic_fmax>;309def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_CMPSWAP, SIbuffer_atomic_cmpswap>;310def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_COND_SUB_U32, SIbuffer_atomic_cond_sub_u32>;311def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD, SIsbuffer_load>;312def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD_SBYTE, SIsbuffer_load_byte>;313def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD_UBYTE, SIsbuffer_load_ubyte>;314def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD_SSHORT, SIsbuffer_load_short>;315def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD_USHORT, SIsbuffer_load_ushort>;316def : GINodeEquiv<G_AMDGPU_S_BUFFER_PREFETCH, SIsbuffer_prefetch>;317 318def : GINodeEquiv<G_AMDGPU_LOAD_D16_LO, SIload_d16_lo>;319def : GINodeEquiv<G_AMDGPU_LOAD_D16_LO_U8, SIload_d16_lo_u8>;320def : GINodeEquiv<G_AMDGPU_LOAD_D16_LO_I8, SIload_d16_lo_i8>;321def : GINodeEquiv<G_AMDGPU_LOAD_D16_HI, SIload_d16_hi>;322def : GINodeEquiv<G_AMDGPU_LOAD_D16_HI_U8, SIload_d16_hi_u8>;323def : GINodeEquiv<G_AMDGPU_LOAD_D16_HI_I8, SIload_d16_hi_i8>;324 325def : GINodeEquiv<G_AMDGPU_WHOLE_WAVE_FUNC_SETUP, AMDGPUwhole_wave_setup>;326// G_AMDGPU_WHOLE_WAVE_FUNC_RETURN is simpler than AMDGPUwhole_wave_return,327// so we don't mark it as equivalent.328 329class GISelSop2Pat <330  SDPatternOperator node,331  Instruction inst,332  ValueType dst_vt,333  ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt>   : GCNPat <334 335  (dst_vt (node (src0_vt SReg_32:$src0), (src1_vt SReg_32:$src1))),336  (inst src0_vt:$src0, src1_vt:$src1)337>;338 339class GISelVop2Pat <340  SDPatternOperator node,341  Instruction inst,342  ValueType dst_vt,343  ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt>   : GCNPat <344 345  (dst_vt (node (src0_vt (sd_vsrc0 src0_vt:$src0)), (src1_vt VGPR_32:$src1))),346  (inst src0_vt:$src0, src1_vt:$src1)347>;348 349class GISelVop2CommutePat <350  SDPatternOperator node,351  Instruction inst,352  ValueType dst_vt,353  ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt>   : GCNPat <354 355  (dst_vt (node (src1_vt VGPR_32:$src1), (src0_vt (sd_vsrc0 src0_vt:$src0)))),356  (inst src0_vt:$src0, src1_vt:$src1)357>;358 359class GISelVop3Pat2 <360  SDPatternOperator node,361  Instruction inst,362  ValueType dst_vt,363  ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt>   : GCNPat <364 365  (dst_vt (node (src0_vt (sd_vcsrc src0_vt:$src0)), (src1_vt (sd_vcsrc src1_vt:$src1)))),366  (inst src0_vt:$src0, src1_vt:$src1)367>;368 369class GISelVop3Pat2CommutePat <370  SDPatternOperator node,371  Instruction inst,372  ValueType dst_vt,373  ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt>   : GCNPat <374 375  (dst_vt (node (src0_vt (sd_vcsrc src0_vt:$src0)), (src1_vt (sd_vcsrc src1_vt:$src1)))),376  (inst src0_vt:$src1, src1_vt:$src0)377>;378 379class GISelVop3Pat2ModsPat <380  SDPatternOperator node,381  Instruction inst,382  ValueType dst_vt,383  ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <384 385  (dst_vt (node (src0_vt (VOP3Mods0 src0_vt:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omods)),386                (src1_vt (VOP3Mods src1_vt:$src1, i32:$src1_modifiers)))),387  (inst i32:$src0_modifiers, src0_vt:$src0,388        i32:$src1_modifiers, src1_vt:$src1, $clamp, $omods)389>;390 391multiclass GISelVop2IntrPat <392  SDPatternOperator node, Instruction inst,393  ValueType dst_vt, ValueType src_vt = dst_vt> {394 395  def : GISelVop2Pat <node, inst, dst_vt, src_vt>;396 397  // FIXME: Intrinsics aren't marked as commutable, so we need to add an explicit398  // pattern to handle commuting.  This is another reason why legalizing to a399  // generic machine instruction may be better that matching the intrinsic400  // directly.401  def : GISelVop2CommutePat <node, inst, dst_vt, src_vt>;402}403 404// Since GlobalISel is more flexible then SelectionDAG, I think we can get405// away with adding patterns for integer types and not legalizing all406// loads and stores to vector types.  This should help simplify the load/store407// legalization.408foreach Ty = [i64, p0, p1, p4] in {409  defm : SMRD_Pattern <"S_LOAD_DWORDX2",  Ty>;410}411 412def gi_as_i32timm : GICustomOperandRenderer<"renderTruncTImm">,413  GISDNodeXFormEquiv<as_i32timm>;414 415def gi_as_i16timm : GICustomOperandRenderer<"renderTruncTImm">,416  GISDNodeXFormEquiv<as_i16timm>;417 418def gi_as_i8timm : GICustomOperandRenderer<"renderTruncTImm">,419  GISDNodeXFormEquiv<as_i8timm>;420 421def gi_as_i1timm : GICustomOperandRenderer<"renderTruncTImm">,422  GISDNodeXFormEquiv<as_i1timm>;423 424def gi_as_i1timm_zext : GICustomOperandRenderer<"renderZextBoolTImm">,425  GISDNodeXFormEquiv<as_i1timm_zext>;426 427def gi_NegateImm : GICustomOperandRenderer<"renderNegateImm">,428  GISDNodeXFormEquiv<NegateImm>;429 430def gi_bitcast_fpimm_to_i32 : GICustomOperandRenderer<"renderBitcastFPImm32">,431  GISDNodeXFormEquiv<bitcast_fpimm_to_i32>;432def gi_bitcast_fpimm_to_i64 : GICustomOperandRenderer<"renderBitcastFPImm64">,433  GISDNodeXFormEquiv<bitcast_fpimm_to_i64>;434 435def gi_IMMPopCount : GICustomOperandRenderer<"renderPopcntImm">,436  GISDNodeXFormEquiv<IMMPopCount>;437 438def gi_extract_cpol : GICustomOperandRenderer<"renderExtractCPol">,439  GISDNodeXFormEquiv<extract_cpol>;440 441def gi_extract_swz : GICustomOperandRenderer<"renderExtractSWZ">,442  GISDNodeXFormEquiv<extract_swz>;443 444def gi_extract_cpol_set_glc : GICustomOperandRenderer<"renderExtractCpolSetGLC">,445  GISDNodeXFormEquiv<extract_cpol_set_glc>;446 447def gi_frameindex_to_targetframeindex : GICustomOperandRenderer<"renderFrameIndex">,448  GISDNodeXFormEquiv<frameindex_to_targetframeindex>;449 450def gi_fp_pow2_to_exponent : GICustomOperandRenderer<"renderFPPow2ToExponent">,451  GISDNodeXFormEquiv<FPPow2ToExponentXForm>;452 453def gi_as_hw_round_mode : GICustomOperandRenderer<"renderRoundMode">,454  GISDNodeXFormEquiv<as_hw_round_mode>;455 456def gi_VOP3PModsNeg : GICustomOperandRenderer<"renderVOP3PModsNeg">,457  GISDNodeXFormEquiv<VOP3PModsNeg>;458def gi_VOP3PModsNegs : GICustomOperandRenderer<"renderVOP3PModsNegs">,459  GISDNodeXFormEquiv<VOP3PModsNegs>;460def gi_VOP3PModsNegAbs : GICustomOperandRenderer<"renderVOP3PModsNegAbs">,461  GISDNodeXFormEquiv<VOP3PModsNegAbs>;462 463def gi_prefetch_loc : GICustomOperandRenderer<"renderPrefetchLoc">,464  GISDNodeXFormEquiv<PrefetchLoc>;465 466def gi_MFMALdScaleModifierOp : GICustomOperandRenderer<"renderScaledMAIIntrinsicOperand">,467  GISDNodeXFormEquiv<MFMALdScaleXForm>;468