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1//===-- AMDGPUInstrInfo.h - AMDGPU Instruction Information ------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9/// \file10/// Contains the definition of a TargetInstrInfo class that is common11/// to all AMD GPUs.12//13//===----------------------------------------------------------------------===//14 15#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRINFO_H16#define LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRINFO_H17 18#include "Utils/AMDGPUBaseInfo.h"19 20namespace llvm {21 22class GCNSubtarget;23class MachineMemOperand;24class MachineInstr;25 26namespace AMDGPU {27 28bool isUniformMMO(const MachineMemOperand *MMO);29 30/// Return the intrinsic ID for opcodes with the G_AMDGPU_INTRIN_ prefix.31///32/// These opcodes have an Intrinsic::ID operand similar to a GIntrinsic. But33/// they are not actual instances of GIntrinsics, so we cannot use34/// GIntrinsic::getIntrinsicID() on them.35Intrinsic::ID getIntrinsicID(const MachineInstr &I);36 37struct RsrcIntrinsic {38 unsigned Intr;39 uint8_t RsrcArg;40 bool IsImage;41};42const RsrcIntrinsic *lookupRsrcIntrinsic(unsigned Intr);43 44struct D16ImageDimIntrinsic {45 unsigned Intr;46 unsigned D16HelperIntr;47};48const D16ImageDimIntrinsic *lookupD16ImageDimIntrinsic(unsigned Intr);49 50struct ImageDimIntrinsicInfo {51 unsigned Intr;52 unsigned BaseOpcode;53 unsigned AtomicNoRetBaseOpcode;54 MIMGDim Dim;55 56 uint8_t NumOffsetArgs;57 uint8_t NumBiasArgs;58 uint8_t NumZCompareArgs;59 uint8_t NumGradients;60 uint8_t NumDmask;61 uint8_t NumData;62 uint8_t NumVAddrs;63 uint8_t NumArgs;64 65 uint8_t DMaskIndex;66 uint8_t VAddrStart;67 uint8_t OffsetIndex;68 uint8_t BiasIndex;69 uint8_t ZCompareIndex;70 uint8_t GradientStart;71 uint8_t CoordStart;72 uint8_t LodIndex;73 uint8_t MipIndex;74 uint8_t VAddrEnd;75 uint8_t RsrcIndex;76 uint8_t SampIndex;77 uint8_t UnormIndex;78 uint8_t TexFailCtrlIndex;79 uint8_t CachePolicyIndex;80 81 uint8_t BiasTyArg;82 uint8_t GradientTyArg;83 uint8_t CoordTyArg;84};85const ImageDimIntrinsicInfo *getImageDimIntrinsicInfo(unsigned Intr);86 87const ImageDimIntrinsicInfo *88getImageDimIntrinsicByBaseOpcode(unsigned BaseOpcode, unsigned Dim);89 90} // end AMDGPU namespace91} // End llvm namespace92 93#endif94