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1//===- AMDGPULegalizerInfo ---------------------------------------*- C++ -*-==//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8/// \file9/// This file declares the targeting of the Machinelegalizer class for10/// AMDGPU.11/// \todo This should be generated by TableGen.12//===----------------------------------------------------------------------===//13 14#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H15#define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H16 17#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"18#include "AMDGPUArgumentUsageInfo.h"19#include "SIInstrInfo.h"20 21namespace llvm {22 23class GCNTargetMachine;24class GCNSubtarget;25class MachineIRBuilder;26 27namespace AMDGPU {28struct ImageDimIntrinsicInfo;29}30class AMDGPULegalizerInfo final : public LegalizerInfo {31 const GCNSubtarget &ST;32 33public:34 AMDGPULegalizerInfo(const GCNSubtarget &ST,35 const GCNTargetMachine &TM);36 37 bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,38 LostDebugLocObserver &LocObserver) const override;39 40 Register getSegmentAperture(unsigned AddrSpace,41 MachineRegisterInfo &MRI,42 MachineIRBuilder &B) const;43 44 bool legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI,45 MachineIRBuilder &B) const;46 bool legalizeFroundeven(MachineInstr &MI, MachineRegisterInfo &MRI,47 MachineIRBuilder &B) const;48 bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,49 MachineIRBuilder &B) const;50 bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI,51 MachineIRBuilder &B) const;52 bool legalizeIntrinsicTrunc(MachineInstr &MI, MachineRegisterInfo &MRI,53 MachineIRBuilder &B) const;54 bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,55 MachineIRBuilder &B, bool Signed) const;56 bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI,57 MachineIRBuilder &B, bool Signed) const;58 bool legalizeMinNumMaxNum(LegalizerHelper &Helper, MachineInstr &MI) const;59 bool legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,60 MachineIRBuilder &B) const;61 bool legalizeInsertVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,62 MachineIRBuilder &B) const;63 64 bool legalizeSinCos(MachineInstr &MI, MachineRegisterInfo &MRI,65 MachineIRBuilder &B) const;66 67 bool buildPCRelGlobalAddress(Register DstReg, LLT PtrTy, MachineIRBuilder &B,68 const GlobalValue *GV, int64_t Offset,69 unsigned GAFlags = SIInstrInfo::MO_NONE) const;70 71 void buildAbsGlobalAddress(Register DstReg, LLT PtrTy, MachineIRBuilder &B,72 const GlobalValue *GV,73 MachineRegisterInfo &MRI) const;74 75 bool legalizeGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,76 MachineIRBuilder &B) const;77 bool legalizeLoad(LegalizerHelper &Helper, MachineInstr &MI) const;78 bool legalizeStore(LegalizerHelper &Helper, MachineInstr &MI) const;79 80 bool legalizeFMad(MachineInstr &MI, MachineRegisterInfo &MRI,81 MachineIRBuilder &B) const;82 83 bool legalizeAtomicCmpXChg(MachineInstr &MI, MachineRegisterInfo &MRI,84 MachineIRBuilder &B) const;85 86 std::pair<Register, Register>87 getScaledLogInput(MachineIRBuilder &B, Register Src, unsigned Flags) const;88 89 bool legalizeFlog2(MachineInstr &MI, MachineIRBuilder &B) const;90 bool legalizeFlogCommon(MachineInstr &MI, MachineIRBuilder &B) const;91 bool legalizeFlogUnsafe(MachineIRBuilder &B, Register Dst, Register Src,92 bool IsLog10, unsigned Flags) const;93 bool legalizeFExp2(MachineInstr &MI, MachineIRBuilder &B) const;94 bool legalizeFExpUnsafe(MachineIRBuilder &B, Register Dst, Register Src,95 unsigned Flags) const;96 bool legalizeFExp(MachineInstr &MI, MachineIRBuilder &B) const;97 bool legalizeFPow(MachineInstr &MI, MachineIRBuilder &B) const;98 bool legalizeFFloor(MachineInstr &MI, MachineRegisterInfo &MRI,99 MachineIRBuilder &B) const;100 101 bool legalizeBuildVector(MachineInstr &MI, MachineRegisterInfo &MRI,102 MachineIRBuilder &B) const;103 104 void buildMultiply(LegalizerHelper &Helper, MutableArrayRef<Register> Accum,105 ArrayRef<Register> Src0, ArrayRef<Register> Src1,106 bool UsePartialMad64_32,107 bool SeparateOddAlignedProducts) const;108 bool legalizeMul(LegalizerHelper &Helper, MachineInstr &MI) const;109 bool legalizeCTLZ_CTTZ(MachineInstr &MI, MachineRegisterInfo &MRI,110 MachineIRBuilder &B) const;111 bool legalizeCTLZ_ZERO_UNDEF(MachineInstr &MI, MachineRegisterInfo &MRI,112 MachineIRBuilder &B) const;113 114 void buildLoadInputValue(Register DstReg, MachineIRBuilder &B,115 const ArgDescriptor *Arg,116 const TargetRegisterClass *ArgRC, LLT ArgTy) const;117 bool legalizeWorkGroupId(118 MachineInstr &MI, MachineIRBuilder &B,119 AMDGPUFunctionArgInfo::PreloadedValue ClusterIdPV,120 AMDGPUFunctionArgInfo::PreloadedValue ClusterMaxIdPV,121 AMDGPUFunctionArgInfo::PreloadedValue ClusterWorkGroupIdPV) const;122 bool loadInputValue(Register DstReg, MachineIRBuilder &B,123 AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;124 125 bool legalizePointerAsRsrcIntrin(MachineInstr &MI, MachineRegisterInfo &MRI,126 MachineIRBuilder &B) const;127 128 bool legalizePreloadedArgIntrin(129 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,130 AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;131 bool legalizeWorkitemIDIntrinsic(132 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,133 unsigned Dim, AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;134 135 Register getKernargParameterPtr(MachineIRBuilder &B, int64_t Offset) const;136 bool legalizeKernargMemParameter(MachineInstr &MI, MachineIRBuilder &B,137 uint64_t Offset,138 Align Alignment = Align(4)) const;139 140 bool legalizeUnsignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI,141 MachineIRBuilder &B) const;142 143 void legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg,144 Register DstRemReg, Register Num,145 Register Den) const;146 147 void legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg,148 Register DstRemReg, Register Num,149 Register Den) const;150 151 bool legalizeSignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI,152 MachineIRBuilder &B) const;153 154 bool legalizeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,155 MachineIRBuilder &B) const;156 bool legalizeFDIV16(MachineInstr &MI, MachineRegisterInfo &MRI,157 MachineIRBuilder &B) const;158 bool legalizeFDIV32(MachineInstr &MI, MachineRegisterInfo &MRI,159 MachineIRBuilder &B) const;160 bool legalizeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI,161 MachineIRBuilder &B) const;162 bool legalizeFFREXP(MachineInstr &MI, MachineRegisterInfo &MRI,163 MachineIRBuilder &B) const;164 bool legalizeFastUnsafeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,165 MachineIRBuilder &B) const;166 bool legalizeFastUnsafeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI,167 MachineIRBuilder &B) const;168 bool legalizeFDIVFastIntrin(MachineInstr &MI, MachineRegisterInfo &MRI,169 MachineIRBuilder &B) const;170 171 bool legalizeFSQRTF16(MachineInstr &MI, MachineRegisterInfo &MRI,172 MachineIRBuilder &B) const;173 bool legalizeFSQRTF32(MachineInstr &MI, MachineRegisterInfo &MRI,174 MachineIRBuilder &B) const;175 bool legalizeFSQRTF64(MachineInstr &MI, MachineRegisterInfo &MRI,176 MachineIRBuilder &B) const;177 bool legalizeFSQRT(MachineInstr &MI, MachineRegisterInfo &MRI,178 MachineIRBuilder &B) const;179 180 bool legalizeRsqClampIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,181 MachineIRBuilder &B) const;182 183 bool getImplicitArgPtr(Register DstReg, MachineRegisterInfo &MRI,184 MachineIRBuilder &B) const;185 186 bool legalizeImplicitArgPtr(MachineInstr &MI, MachineRegisterInfo &MRI,187 MachineIRBuilder &B) const;188 189 bool getLDSKernelId(Register DstReg, MachineRegisterInfo &MRI,190 MachineIRBuilder &B) const;191 192 bool legalizeLDSKernelId(MachineInstr &MI, MachineRegisterInfo &MRI,193 MachineIRBuilder &B) const;194 195 bool legalizeIsAddrSpace(MachineInstr &MI, MachineRegisterInfo &MRI,196 MachineIRBuilder &B, unsigned AddrSpace) const;197 198 std::pair<Register, unsigned> splitBufferOffsets(MachineIRBuilder &B,199 Register OrigOffset) const;200 201 Register handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI,202 Register Reg, bool ImageStore = false) const;203 Register fixStoreSourceType(MachineIRBuilder &B, Register VData, LLT MemTy,204 bool IsFormat) const;205 206 bool legalizeBufferStore(MachineInstr &MI, LegalizerHelper &Helper,207 bool IsTyped, bool IsFormat) const;208 bool legalizeBufferLoad(MachineInstr &MI, LegalizerHelper &Helper,209 bool IsFormat, bool IsTyped) const;210 bool legalizeBufferAtomic(MachineInstr &MI, MachineIRBuilder &B,211 Intrinsic::ID IID) const;212 213 bool legalizeBVHIntersectRayIntrinsic(MachineInstr &MI,214 MachineIRBuilder &B) const;215 216 bool legalizeBVHDualOrBVH8IntersectRayIntrinsic(MachineInstr &MI,217 MachineIRBuilder &B) const;218 219 bool legalizeLaneOp(LegalizerHelper &Helper, MachineInstr &MI,220 Intrinsic::ID IID) const;221 222 bool legalizeBVHIntrinsic(MachineInstr &MI, MachineIRBuilder &B) const;223 224 bool legalizeStackSave(MachineInstr &MI, MachineIRBuilder &B) const;225 bool legalizeWaveID(MachineInstr &MI, MachineIRBuilder &B) const;226 bool legalizeConstHwRegRead(MachineInstr &MI, MachineIRBuilder &B,227 AMDGPU::Hwreg::Id HwReg, unsigned LowBit,228 unsigned Width) const;229 230 bool legalizeGetFPEnv(MachineInstr &MI, MachineRegisterInfo &MRI,231 MachineIRBuilder &B) const;232 bool legalizeSetFPEnv(MachineInstr &MI, MachineRegisterInfo &MRI,233 MachineIRBuilder &B) const;234 235 bool legalizeImageIntrinsic(236 MachineInstr &MI, MachineIRBuilder &B,237 GISelChangeObserver &Observer,238 const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr) const;239 240 bool legalizeSBufferLoad(LegalizerHelper &Helper, MachineInstr &MI) const;241 242 bool legalizeSBufferPrefetch(LegalizerHelper &Helper, MachineInstr &MI) const;243 244 bool legalizeTrap(MachineInstr &MI, MachineRegisterInfo &MRI,245 MachineIRBuilder &B) const;246 bool legalizeTrapEndpgm(MachineInstr &MI, MachineRegisterInfo &MRI,247 MachineIRBuilder &B) const;248 bool legalizeTrapHsaQueuePtr(MachineInstr &MI, MachineRegisterInfo &MRI,249 MachineIRBuilder &B) const;250 bool legalizeTrapHsa(MachineInstr &MI, MachineRegisterInfo &MRI,251 MachineIRBuilder &B) const;252 bool legalizeDebugTrap(MachineInstr &MI, MachineRegisterInfo &MRI,253 MachineIRBuilder &B) const;254 255 bool legalizeIntrinsic(LegalizerHelper &Helper,256 MachineInstr &MI) const override;257};258} // End llvm namespace.259#endif260