204 lines · cpp
1//===-- R600TargetMachine.cpp - TargetMachine for hw codegen targets-------===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9/// \file10/// This file contains both AMDGPU-R600 target machine and the CodeGen pass11/// builder. The target machine contains all of the hardware specific12/// information needed to emit code for R600 GPUs and the CodeGen pass builder13/// handles the pass pipeline for new pass manager.14//15//===----------------------------------------------------------------------===//16 17#include "R600TargetMachine.h"18#include "R600.h"19#include "R600MachineFunctionInfo.h"20#include "R600MachineScheduler.h"21#include "R600TargetTransformInfo.h"22#include "llvm/Passes/CodeGenPassBuilder.h"23#include "llvm/Transforms/Scalar.h"24#include <optional>25 26using namespace llvm;27 28static cl::opt<bool>29 EnableR600StructurizeCFG("r600-ir-structurize",30 cl::desc("Use StructurizeCFG IR pass"),31 cl::init(true));32 33static cl::opt<bool> EnableR600IfConvert("r600-if-convert",34 cl::desc("Use if conversion pass"),35 cl::ReallyHidden, cl::init(true));36 37static cl::opt<bool, true> EnableAMDGPUFunctionCallsOpt(38 "amdgpu-function-calls", cl::desc("Enable AMDGPU function call support"),39 cl::location(AMDGPUTargetMachine::EnableFunctionCalls), cl::init(true),40 cl::Hidden);41 42static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) {43 return new ScheduleDAGMILive(C, std::make_unique<R600SchedStrategy>());44}45 46static MachineSchedRegistry R600SchedRegistry("r600",47 "Run R600's custom scheduler",48 createR600MachineScheduler);49 50//===----------------------------------------------------------------------===//51// R600 CodeGen Pass Builder interface.52//===----------------------------------------------------------------------===//53 54class R600CodeGenPassBuilder55 : public CodeGenPassBuilder<R600CodeGenPassBuilder, R600TargetMachine> {56public:57 R600CodeGenPassBuilder(R600TargetMachine &TM, const CGPassBuilderOption &Opts,58 PassInstrumentationCallbacks *PIC);59 60 void addPreISel(AddIRPass &addPass) const;61 void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const;62 Error addInstSelector(AddMachinePass &) const;63};64 65//===----------------------------------------------------------------------===//66// R600 Target Machine (R600 -> Cayman)67//===----------------------------------------------------------------------===//68 69R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,70 StringRef CPU, StringRef FS,71 const TargetOptions &Options,72 std::optional<Reloc::Model> RM,73 std::optional<CodeModel::Model> CM,74 CodeGenOptLevel OL, bool JIT)75 : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {76 setRequiresStructuredCFG(true);77 78 // Override the default since calls aren't supported for r600.79 if (EnableFunctionCalls &&80 EnableAMDGPUFunctionCallsOpt.getNumOccurrences() == 0)81 EnableFunctionCalls = false;82}83 84const TargetSubtargetInfo *85R600TargetMachine::getSubtargetImpl(const Function &F) const {86 StringRef GPU = getGPUName(F);87 StringRef FS = getFeatureString(F);88 89 SmallString<128> SubtargetKey(GPU);90 SubtargetKey.append(FS);91 92 auto &I = SubtargetMap[SubtargetKey];93 if (!I) {94 // This needs to be done before we create a new subtarget since any95 // creation will depend on the TM and the code generation flags on the96 // function that reside in TargetOptions.97 resetTargetOptions(F);98 I = std::make_unique<R600Subtarget>(TargetTriple, GPU, FS, *this);99 }100 101 return I.get();102}103 104TargetTransformInfo105R600TargetMachine::getTargetTransformInfo(const Function &F) const {106 return TargetTransformInfo(std::make_unique<R600TTIImpl>(this, F));107}108 109ScheduleDAGInstrs *110R600TargetMachine::createMachineScheduler(MachineSchedContext *C) const {111 return createR600MachineScheduler(C);112}113 114namespace {115class R600PassConfig final : public AMDGPUPassConfig {116public:117 R600PassConfig(TargetMachine &TM, PassManagerBase &PM)118 : AMDGPUPassConfig(TM, PM) {}119 120 bool addPreISel() override;121 bool addInstSelector() override;122 void addPreRegAlloc() override;123 void addPreSched2() override;124 void addPreEmitPass() override;125};126} // namespace127 128//===----------------------------------------------------------------------===//129// R600 Pass Setup130//===----------------------------------------------------------------------===//131 132bool R600PassConfig::addPreISel() {133 AMDGPUPassConfig::addPreISel();134 135 if (EnableR600StructurizeCFG)136 addPass(createStructurizeCFGPass());137 return false;138}139 140bool R600PassConfig::addInstSelector() {141 addPass(createR600ISelDag(getAMDGPUTargetMachine(), getOptLevel()));142 return false;143}144 145void R600PassConfig::addPreRegAlloc() { addPass(createR600VectorRegMerger()); }146 147void R600PassConfig::addPreSched2() {148 addPass(createR600EmitClauseMarkers());149 if (EnableR600IfConvert)150 addPass(&IfConverterID);151 addPass(createR600ClauseMergePass());152}153 154void R600PassConfig::addPreEmitPass() {155 addPass(createR600MachineCFGStructurizerPass());156 addPass(createR600ExpandSpecialInstrsPass());157 addPass(createR600Packetizer());158 addPass(createR600ControlFlowFinalizer());159}160 161TargetPassConfig *R600TargetMachine::createPassConfig(PassManagerBase &PM) {162 return new R600PassConfig(*this, PM);163}164 165Error R600TargetMachine::buildCodeGenPipeline(166 ModulePassManager &MPM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,167 CodeGenFileType FileType, const CGPassBuilderOption &Opts,168 PassInstrumentationCallbacks *PIC) {169 R600CodeGenPassBuilder CGPB(*this, Opts, PIC);170 return CGPB.buildPipeline(MPM, Out, DwoOut, FileType);171}172 173MachineFunctionInfo *R600TargetMachine::createMachineFunctionInfo(174 BumpPtrAllocator &Allocator, const Function &F,175 const TargetSubtargetInfo *STI) const {176 return R600MachineFunctionInfo::create<R600MachineFunctionInfo>(177 Allocator, F, static_cast<const R600Subtarget *>(STI));178}179 180//===----------------------------------------------------------------------===//181// R600 CodeGen Pass Builder interface.182//===----------------------------------------------------------------------===//183 184R600CodeGenPassBuilder::R600CodeGenPassBuilder(185 R600TargetMachine &TM, const CGPassBuilderOption &Opts,186 PassInstrumentationCallbacks *PIC)187 : CodeGenPassBuilder(TM, Opts, PIC) {188 Opt.RequiresCodeGenSCCOrder = true;189}190 191void R600CodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {192 // TODO: Add passes pre instruction selection.193}194 195void R600CodeGenPassBuilder::addAsmPrinter(AddMachinePass &addPass,196 CreateMCStreamer) const {197 // TODO: Add AsmPrinter.198}199 200Error R600CodeGenPassBuilder::addInstSelector(AddMachinePass &) const {201 // TODO: Add instruction selector.202 return Error::success();203}204