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1//===--- SIProgramInfo.h ----------------------------------------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9/// \file10/// Defines struct to track resource usage and hardware flags for kernels and11/// entry functions.12///13//14//===----------------------------------------------------------------------===//15 16#ifndef LLVM_LIB_TARGET_AMDGPU_SIPROGRAMINFO_H17#define LLVM_LIB_TARGET_AMDGPU_SIPROGRAMINFO_H18 19#include "llvm/IR/CallingConv.h"20#include "llvm/Support/Compiler.h"21#include <cstdint>22#include <optional>23 24namespace llvm {25 26class GCNSubtarget;27class MCContext;28class MCExpr;29class MachineFunction;30 31/// Track resource usage for kernels / entry functions.32struct LLVM_EXTERNAL_VISIBILITY SIProgramInfo {33 std::optional<uint64_t> CodeSizeInBytes;34 35 // Fields set in PGM_RSRC1 pm4 packet.36 const MCExpr *VGPRBlocks = nullptr;37 const MCExpr *SGPRBlocks = nullptr;38 uint32_t Priority = 0;39 uint32_t FloatMode = 0;40 uint32_t Priv = 0;41 uint32_t DX10Clamp = 0;42 uint32_t DebugMode = 0;43 uint32_t IEEEMode = 0;44 uint32_t WgpMode = 0; // GFX10+45 uint32_t MemOrdered = 0; // GFX10+46 uint32_t FwdProgress = 0; // GFX10+47 uint32_t RrWgMode = 0; // GFX12+48 const MCExpr *ScratchSize = nullptr;49 50 // State used to calculate fields set in PGM_RSRC2 pm4 packet.51 uint32_t LDSBlocks = 0;52 const MCExpr *ScratchBlocks = nullptr;53 54 // Fields set in PGM_RSRC2 pm4 packet55 const MCExpr *ScratchEnable = nullptr;56 uint32_t UserSGPR = 0;57 uint32_t TrapHandlerEnable = 0;58 uint32_t TGIdXEnable = 0;59 uint32_t TGIdYEnable = 0;60 uint32_t TGIdZEnable = 0;61 uint32_t TGSizeEnable = 0;62 uint32_t TIdIGCompCount = 0;63 uint32_t EXCPEnMSB = 0;64 uint32_t LdsSize = 0;65 uint32_t EXCPEnable = 0;66 67 const MCExpr *ComputePGMRSrc3 = nullptr;68 69 const MCExpr *NumVGPR = nullptr;70 const MCExpr *NumArchVGPR = nullptr;71 const MCExpr *NumAccVGPR = nullptr;72 const MCExpr *AccumOffset = nullptr;73 uint32_t TgSplit = 0;74 const MCExpr *NumSGPR = nullptr;75 unsigned SGPRSpill = 0;76 unsigned VGPRSpill = 0;77 uint32_t LDSSize = 0;78 const MCExpr *FlatUsed = nullptr;79 80 // Number of SGPRs that meets number of waves per execution unit request.81 const MCExpr *NumSGPRsForWavesPerEU = nullptr;82 83 // Number of VGPRs that meets number of waves per execution unit request.84 const MCExpr *NumVGPRsForWavesPerEU = nullptr;85 86 // Number of named barriers used by the kernel.87 const MCExpr *NamedBarCnt = nullptr;88 89 // Final occupancy.90 const MCExpr *Occupancy = nullptr;91 92 // Whether there is recursion, dynamic allocas, indirect calls or some other93 // reason there may be statically unknown stack usage.94 const MCExpr *DynamicCallStack = nullptr;95 96 // Bonus information for debugging.97 const MCExpr *VCCUsed = nullptr;98 99 SIProgramInfo() = default;100 101 // The constructor sets the values for each member as shown in the struct.102 // However, setting the MCExpr members to their zero value equivalent103 // happens in reset together with (duplicated) value re-set for the104 // non-MCExpr members.105 void reset(const MachineFunction &MF);106 107 // Get function code size and cache the value.108 // If \p IsLowerBound is set it returns a minimal code size which is safe109 // to address.110 uint64_t getFunctionCodeSize(const MachineFunction &MF,111 bool IsLowerBound = false);112 113 /// Compute the value of the ComputePGMRsrc1 register.114 const MCExpr *getComputePGMRSrc1(const GCNSubtarget &ST,115 MCContext &Ctx) const;116 const MCExpr *getPGMRSrc1(CallingConv::ID CC, const GCNSubtarget &ST,117 MCContext &Ctx) const;118 119 /// Compute the value of the ComputePGMRsrc2 register.120 const MCExpr *getComputePGMRSrc2(MCContext &Ctx) const;121 const MCExpr *getPGMRSrc2(CallingConv::ID CC, MCContext &Ctx) const;122};123 124} // namespace llvm125 126#endif // LLVM_LIB_TARGET_AMDGPU_SIPROGRAMINFO_H127