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1//===-- VOPCInstructions.td - Vector Instruction Definitions --------------===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9//===----------------------------------------------------------------------===//10// Encodings11//===----------------------------------------------------------------------===//12 13class VOPCe <bits<8> op> : Enc32 {14 bits<9> src0;15 bits<8> src1;16 17 let Inst{8-0} = src0;18 let Inst{16-9} = src1;19 let Inst{24-17} = op;20 let Inst{31-25} = 0x3e;21}22 23class VOPC_SDWAe <bits<8> op, VOPProfile P> : VOP_SDWAe <P> {24 bits<8> src1;25 26 let Inst{8-0} = 0xf9; // sdwa27 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0);28 let Inst{24-17} = op;29 let Inst{31-25} = 0x3e; // encoding30}31 32class VOPC_SDWA9e <bits<8> op, VOPProfile P> : VOP_SDWA9Be <P> {33 bits<9> src1;34 35 let Inst{8-0} = 0xf9; // sdwa36 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0);37 let Inst{24-17} = op;38 let Inst{31-25} = 0x3e; // encoding39 let Inst{63} = !if(P.HasSrc1, src1{8}, 0); // src1_sgpr40}41 42 43//===----------------------------------------------------------------------===//44// VOPC classes45//===----------------------------------------------------------------------===//46 47// VOPC instructions are a special case because for the 32-bit48// encoding, we want to display the implicit vcc write as if it were49// an explicit $dst.50class VOPC_Profile<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> :51 VOPProfile <[i1, vt0, vt1, untyped]> {52 // We want to exclude instructions with 64bit operands53 let HasExtDPP = getHasVOP3DPP<DstVT, Src0VT, Src1VT, Src2VT>.ret;54 let Asm32 = "$src0, $src1";55 56 let AsmDPP = !if (HasModifiers,57 "$src0_modifiers, $src1_modifiers "58 "$dpp_ctrl$row_mask$bank_mask$bound_ctrl",59 "$src0, $src1 $dpp_ctrl$row_mask$bank_mask$bound_ctrl");60 let AsmDPP8 = "$src0, $src1 $dpp8$fi";61 let AsmDPP16 = AsmDPP#"$fi";62 // VOPC DPP Instructions do not need an old operand63 let TieRegDPP = "";64 let InsDPP = getInsDPP<VOPDstOperand<Src0DPP.RegClass>, Src0DPP, Src1DPP, Src2DPP,65 NumSrcArgs, HasModifiers, Src0ModDPP, Src1ModDPP,66 Src2ModDPP, 0/*HasOld*/>.ret;67 let InsDPP16 = getInsDPP16<VOPDstOperand<Src0DPP.RegClass>, Src0DPP, Src1DPP, Src2DPP,68 NumSrcArgs, HasModifiers, Src0ModDPP, Src1ModDPP,69 Src2ModDPP, 0/*HasOld*/>.ret;70 let InsDPP8 = getInsDPP8<VOPDstOperand<Src0DPP.RegClass>, Src0DPP, Src1DPP, Src2DPP,71 NumSrcArgs, HasModifiers, Src0ModDPP, Src1ModDPP,72 Src2ModDPP, 0/*HasOld*/>.ret;73 74 // The destination for 32-bit encoding is implicit.75 let HasDst32 = 0;76 // VOPC disallows dst_sel and dst_unused as they have no effect on destination77 let EmitDstSel = 0;78 let Outs64 = (outs VOPDstS64orS32:$sdst);79 let OutsVOP3DPP = Outs64;80 let OutsVOP3DPP8 = Outs64;81 let InsVOP3DPP = getInsVOP3DPP<InsVOP3Base, Src0VOP3DPP, NumSrcArgs, 0/*HasOld*/>.ret;82 let InsVOP3DPP16 = getInsVOP3DPP16<InsVOP3Base, Src0VOP3DPP, NumSrcArgs, 0/*HasOld*/>.ret;83 let InsVOP3DPP8 = getInsVOP3DPP8<InsVOP3Base, Src0VOP3DPP, NumSrcArgs, 0/*HasOld*/>.ret;84 list<SchedReadWrite> Schedule = sched;85}86 87multiclass VOPC_Profile_t16<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> {88 def NAME : VOPC_Profile<sched, vt0, vt1>;89 def _t16 : VOPC_Profile<sched, vt0, vt1> {90 let IsTrue16 = 1;91 let IsRealTrue16 = 1;92 let HasOpSel = 1;93 let HasModifiers = 1; // All instructions at least have OpSel94 let DstRC = getVALUDstForVT<DstVT, 1 /*IsTrue16*/, 0 /*IsVOP3Encoding*/>.ret;95 let Src0RC32 = getVOPSrc0ForVT<Src0VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;96 let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;97 let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;98 let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;99 let Src2DPP = getVregSrcForVT<Src2VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;100 let Src0ModDPP = getSrcModDPP_t16<Src0VT, 0/*IsFake16*/>.ret;101 let Src1ModDPP = getSrcModDPP_t16<Src1VT, 0/*IsFake16*/>.ret;102 let Src2ModDPP = getSrcModDPP_t16<Src2VT, 0/*IsFake16*/>.ret;103 let Src0VOP3DPP = VGPROp_16;104 let Src1VOP3DPP = getVOP3DPPSrcForVT<Src1VT, 0/*IsFake16*/>.ret;105 let Src2VOP3DPP = getVOP3DPPSrcForVT<Src2VT, 0/*IsFake16*/>.ret;106 107 let DstRC64 = getVALUDstForVT<DstVT, 1/*IsTrue16*/, 1/*IsVOP3Encoding*/>.ret;108 let Src0RC64 = getVOP3SrcForVT<Src0VT, 1/*IsTrue16*/>.ret;109 let Src1RC64 = getVOP3SrcForVT<Src1VT, 1/*IsTrue16*/>.ret;110 let Src2RC64 = getVOP3SrcForVT<Src2VT, 1/*IsTrue16*/>.ret;111 let Src0Mod = getSrc0Mod<Src0VT, DstVT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;112 let Src1Mod = getSrcMod<Src1VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;113 let Src2Mod = getSrcMod<Src2VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;114 let Src0ModVOP3DPP = getSrc0ModVOP3DPP<Src0VT, DstVT, 0/*IsFake16*/>.ret;115 let Src1ModVOP3DPP = getSrcModVOP3VC<Src1VT, 0/*IsFake16*/>.ret;116 let Src2ModVOP3DPP = getSrcModVOP3VC<Src2VT, 0/*IsFake16*/>.ret;117 }118 def _fake16: VOPC_Profile<sched, vt0, vt1> {119 let IsTrue16 = 1;120 let DstRC = getVALUDstForVT_fake16<DstVT>.ret;121 let Src0RC32 = getVOPSrc0ForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;122 let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;123 let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;124 let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;125 let Src2DPP = getVregSrcForVT<Src2VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;126 let Src0ModDPP = getSrcModDPP_t16<Src0VT, 1/*IsFake16*/>.ret;127 let Src1ModDPP = getSrcModDPP_t16<Src1VT, 1/*IsFake16*/>.ret;128 let Src2ModDPP = getSrcModDPP_t16<Src2VT, 1/*IsFake16*/>.ret;129 let Src0VOP3DPP = VGPROp_32;130 let Src1VOP3DPP = getVOP3DPPSrcForVT<Src1VT, 1/*IsFake16*/>.ret;131 let Src2VOP3DPP = getVOP3DPPSrcForVT<Src2VT, 1/*IsFake16*/>.ret;132 133 let DstRC64 = getVALUDstForVT<DstVT>.ret;134 let Src0RC64 = getVOP3SrcForVT<Src0VT, 0/*IsTrue16*/>.ret;135 let Src1RC64 = getVOP3SrcForVT<Src1VT, 0/*IsTrue16*/>.ret;136 let Src2RC64 = getVOP3SrcForVT<Src2VT, 0/*IsTrue16*/>.ret;137 let Src0Mod = getSrc0Mod<Src0VT, DstVT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;138 let Src1Mod = getSrcMod<Src1VT, 0/*IsTrue16*/, 1/*IsFake16*/>.ret;139 let Src2Mod = getSrcMod<Src2VT, 0/*IsTrue16*/, 1/*IsFake16*/>.ret;140 let Src0ModVOP3DPP = getSrc0ModVOP3DPP<Src0VT, DstVT, 1/*IsFake16*/>.ret;141 let Src1ModVOP3DPP = getSrcModVOP3VC<Src1VT, 1/*IsFake16*/>.ret;142 let Src2ModVOP3DPP = getSrcModVOP3VC<Src2VT, 1/*IsFake16*/>.ret;143 }144}145 146class VOPC_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt0,147 ValueType vt1 = vt0> :148 VOPC_Profile<sched, vt0, vt1> {149 let Outs64 = (outs );150 let OutsVOP3DPP = Outs64;151 let OutsVOP3DPP8 = Outs64;152 let OutsSDWA = (outs );153 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0,154 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1,155 src0_sel:$src0_sel, src1_sel:$src1_sel);156 let HasDst = 0;157 let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel";158 let EmitDst = 0;159}160 161multiclass VOPC_NoSdst_Profile_t16<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> {162 def NAME : VOPC_NoSdst_Profile<sched, vt0, vt1>;163 def _t16 : VOPC_NoSdst_Profile<sched, vt0, vt1> {164 let IsTrue16 = 1;165 let IsRealTrue16 = 1;166 let HasOpSel = 1;167 let HasModifiers = 1; // All instructions at least have OpSel168 let Src0RC32 = getVOPSrc0ForVT<Src0VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;169 let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;170 let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;171 let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;172 let Src2DPP = getVregSrcForVT<Src2VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;173 let Src0ModDPP = getSrcModDPP_t16<Src0VT, 0/*IsFake16*/>.ret;174 let Src1ModDPP = getSrcModDPP_t16<Src1VT, 0/*IsFake16*/>.ret;175 let Src2ModDPP = getSrcModDPP_t16<Src2VT, 0/*IsFake16*/>.ret;176 let Src0VOP3DPP = VGPROp_16;177 let Src1VOP3DPP = getVOP3DPPSrcForVT<Src1VT, 0/*IsFake16*/>.ret;178 let Src2VOP3DPP = getVOP3DPPSrcForVT<Src2VT, 0/*IsFake16*/>.ret;179 180 let Src0RC64 = getVOP3SrcForVT<Src0VT, 1/*IsTrue16*/>.ret;181 let Src1RC64 = getVOP3SrcForVT<Src1VT, 1/*IsTrue16*/>.ret;182 let Src2RC64 = getVOP3SrcForVT<Src2VT, 1/*IsTrue16*/>.ret;183 let Src0Mod = getSrc0Mod<Src0VT, DstVT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;184 let Src1Mod = getSrcMod<Src1VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;185 let Src2Mod = getSrcMod<Src2VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;186 let Src0ModVOP3DPP = getSrc0ModVOP3DPP<Src0VT, DstVT, 0/*IsFake16*/>.ret;187 let Src1ModVOP3DPP = getSrcModVOP3VC<Src1VT, 0/*IsFake16*/>.ret;188 let Src2ModVOP3DPP = getSrcModVOP3VC<Src2VT, 0/*IsFake16*/>.ret;189 }190 def _fake16 : VOPC_NoSdst_Profile<sched, vt0, vt1> {191 let IsTrue16 = 1;192 let Src0RC32 = getVOPSrc0ForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;193 let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;194 let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;195 let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;196 let Src2DPP = getVregSrcForVT<Src2VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;197 let Src0ModDPP = getSrcModDPP_t16<Src0VT, 1/*IsFake16*/>.ret;198 let Src1ModDPP = getSrcModDPP_t16<Src1VT, 1/*IsFake16*/>.ret;199 let Src2ModDPP = getSrcModDPP_t16<Src2VT, 1/*IsFake16*/>.ret;200 let Src0VOP3DPP = VGPROp_32;201 let Src1VOP3DPP = getVOP3DPPSrcForVT<Src1VT, 1/*IsFake16*/>.ret;202 let Src2VOP3DPP = getVOP3DPPSrcForVT<Src2VT, 1/*IsFake16*/>.ret;203 204 let Src0RC64 = getVOP3SrcForVT<Src0VT, 0/*IsTrue16*/>.ret;205 let Src1RC64 = getVOP3SrcForVT<Src1VT, 0/*IsTrue16*/>.ret;206 let Src2RC64 = getVOP3SrcForVT<Src2VT, 0/*IsTrue16*/>.ret;207 let Src0Mod = getSrc0Mod<Src0VT, DstVT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;208 let Src1Mod = getSrcMod<Src1VT, 0/*IsTrue16*/, 1/*IsFake16*/>.ret;209 let Src2Mod = getSrcMod<Src2VT, 0/*IsTrue16*/, 1/*IsFake16*/>.ret;210 let Src0ModVOP3DPP = getSrc0ModVOP3DPP<Src0VT, DstVT, 1/*IsFake16*/>.ret;211 let Src1ModVOP3DPP = getSrcModVOP3VC<Src1VT, 1/*IsFake16*/>.ret;212 let Src2ModVOP3DPP = getSrcModVOP3VC<Src2VT, 1/*IsFake16*/>.ret;213 }214}215 216class VOPC_Pseudo <string opName, VOPC_Profile P, list<dag> pattern=[],217 bit DefVcc = 1> :218 InstSI<(outs), P.Ins32, "", pattern>,219 VOP <opName>,220 SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> {221 222 let isPseudo = 1;223 let isCodeGenOnly = 1;224 let UseNamedOperandTable = 1;225 226 string Mnemonic = opName;227 string AsmOperands = P.Asm32;228 229 let Size = 4;230 let mayLoad = 0;231 let mayStore = 0;232 let hasSideEffects = 0;233 234 let ReadsModeReg = P.Src0VT.isFP;235 236 let VALU = 1;237 let VOPC = 1;238 let Uses = !if(ReadsModeReg, [MODE, EXEC], [EXEC]);239 let Defs = !if(DefVcc, [VCC], []);240 241 VOPProfile Pfl = P;242}243 244class VOPC_Real <VOPC_Pseudo ps, int EncodingFamily, string asm_name = ps.PseudoInstr> :245 InstSI <ps.OutOperandList, ps.InOperandList, asm_name # " " # ps.AsmOperands, []>,246 SIMCInstr <ps.PseudoInstr, EncodingFamily> {247 248 let VALU = 1;249 let VOPC = 1;250 let isPseudo = 0;251 let isCodeGenOnly = 0;252 253 let Constraints = ps.Constraints;254 255 // copy relevant pseudo op flags256 let SubtargetPredicate = ps.SubtargetPredicate;257 let True16Predicate = ps.True16Predicate;258 let OtherPredicates = ps.OtherPredicates;259 let AsmMatchConverter = ps.AsmMatchConverter;260 let Constraints = ps.Constraints;261 let TSFlags = ps.TSFlags;262 let UseNamedOperandTable = ps.UseNamedOperandTable;263 let Uses = ps.Uses;264 let Defs = ps.Defs;265 let SchedRW = ps.SchedRW;266 let mayLoad = ps.mayLoad;267 let mayStore = ps.mayStore;268 let isConvergent = ps.isConvergent;269}270 271class VOPC_SDWA_Pseudo <string OpName, VOPProfile P, list<dag> pattern=[]> :272 VOP_SDWA_Pseudo <OpName, P, pattern> {273 let AsmMatchConverter = "cvtSdwaVOPC";274}275 276// This class is used only with VOPC instructions. Use $sdst for out operand277class VOPCInstAlias <VOP3_Pseudo ps, Instruction inst,278 string Asm32 = ps.Pfl.Asm32, string real_name = ps.OpName,279 VOPProfile p = ps.Pfl> :280 InstAlias <real_name#" "#Asm32, (inst)>, PredicateControl {281 282 field bit isCompare;283 field bit isCommutable;284 285 let ResultInst =286 !if (p.HasDst32,287 !if (!eq(p.NumSrcArgs, 0),288 // 1 dst, 0 src289 (inst p.DstRC:$sdst),290 !if (!eq(p.NumSrcArgs, 1),291 // 1 dst, 1 src292 (inst p.DstRC:$sdst, p.Src0RC32:$src0),293 !if (!eq(p.NumSrcArgs, 2),294 // 1 dst, 2 src295 (inst p.DstRC:$sdst, p.Src0RC32:$src0, p.Src1RC32:$src1),296 // else - unreachable297 (inst)))),298 // else299 !if (!eq(p.NumSrcArgs, 2),300 // 0 dst, 2 src301 (inst p.Src0RC32:$src0, p.Src1RC32:$src1),302 !if (!eq(p.NumSrcArgs, 1),303 // 0 dst, 1 src304 (inst p.Src0RC32:$src1),305 // else306 // 0 dst, 0 src307 (inst))));308 309 let AsmVariantName = AMDGPUAsmVariants.Default;310 let SubtargetPredicate = AssemblerPredicate;311 312 string DecoderNamespace; // dummy313}314 315multiclass VOPCInstAliases <string old_name, string Arch, string real_name = old_name, string mnemonic_from = real_name> {316 def : VOPCInstAlias <!cast<VOP3_Pseudo>(old_name#"_e64"),317 !cast<Instruction>(real_name#"_e32_"#Arch),318 !cast<VOP3_Pseudo>(old_name#"_e64").Pfl.Asm32,319 mnemonic_from>;320 let WaveSizePredicate = isWave32 in {321 def : VOPCInstAlias <!cast<VOP3_Pseudo>(old_name#"_e64"),322 !cast<Instruction>(real_name#"_e32_"#Arch),323 "vcc_lo, "#!cast<VOP3_Pseudo>(old_name#"_e64").Pfl.Asm32,324 mnemonic_from>;325 }326 let WaveSizePredicate = isWave64 in {327 def : VOPCInstAlias <!cast<VOP3_Pseudo>(old_name#"_e64"),328 !cast<Instruction>(real_name#"_e32_"#Arch),329 "vcc, "#!cast<VOP3_Pseudo>(old_name#"_e64").Pfl.Asm32,330 mnemonic_from>;331 }332}333 334multiclass VOPCXInstAliases <string old_name, string Arch, string real_name = old_name, string mnemonic_from = real_name> {335 def : VOPCInstAlias <!cast<VOP3_Pseudo>(old_name#"_e64"),336 !cast<Instruction>(real_name#"_e32_"#Arch),337 !cast<VOP3_Pseudo>(old_name#"_e64").Pfl.Asm32,338 mnemonic_from>;339}340 341class getVOPCPat64 <SDPatternOperator cond, VOPProfile P> : LetDummies {342 list<dag> ret = !if(P.HasModifiers,343 [(set i1:$sdst,344 (setcc (P.Src0VT345 !if(P.HasOMod,346 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod),347 !if(P.HasClamp,348 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp),349 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers)))),350 (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)),351 cond))],352 [(set i1:$sdst, (setcc P.Src0VT:$src0, P.Src1VT:$src1, cond))]);353}354 355class VCMPXNoSDstTable <bit has_sdst, string Name> {356 bit HasSDst = has_sdst;357 string NoSDstOp = Name;358}359 360class VCMPVCMPXTable <string Name> {361 bit IsVCMPX = 0;362 string VCMPOp = Name;363}364 365multiclass VOPC_Pseudos <string opName,366 VOPC_Profile P,367 SDPatternOperator cond = COND_NULL,368 string revOp = opName,369 bit DefExec = 0> {370 371 def _e32 : VOPC_Pseudo <opName, P>,372 Commutable_REV<revOp#"_e32", !eq(revOp, opName)>,373 VCMPXNoSDstTable<1, opName#"_e32">,374 VCMPVCMPXTable<opName#"_e32"> {375 let Defs = !if(DefExec, [VCC, EXEC], [VCC]);376 let SchedRW = P.Schedule;377 let isConvergent = DefExec;378 let isCompare = 1;379 let isCommutable = 1;380 }381 382 def _e64 : VOP3_Pseudo<opName, P, getVOPCPat64<cond, P>.ret, /*IsVOP3P*/false, P.HasOpSel>,383 Commutable_REV<revOp#"_e64", !eq(revOp, opName)>,384 VCMPXNoSDstTable<1, opName#"_e64">,385 VCMPVCMPXTable<opName#"_e64"> {386 let Defs = !if(DefExec, [EXEC], []);387 let SchedRW = P.Schedule;388 let isCompare = 1;389 let isCommutable = 1;390 let AsmMatchConverter = !cond(391 P.HasOpSel : "cvtVOP3OpSel",392 !or(P.HasModifiers, P.HasOMod, P.HasIntClamp) : "cvtVOP3",393 1 : "");394 }395 396 if P.HasExtSDWA then397 def _sdwa : VOPC_SDWA_Pseudo <opName, P> {398 let Defs = !if(DefExec, [EXEC], []);399 let SchedRW = P.Schedule;400 let isConvergent = DefExec;401 let isCompare = 1;402 }403 404 let SubtargetPredicate = isGFX11Plus in {405 if P.HasExtDPP then406 def _e32_dpp : VOP_DPP_Pseudo<opName, P> {407 let Defs = !if(DefExec, [VCC, EXEC], [VCC]);408 let SchedRW = P.Schedule;409 let isConvergent = DefExec;410 let isCompare = 1;411 let VOPC = 1;412 let Constraints = "";413 }414 if P.HasExtVOP3DPP then415 def _e64_dpp : VOP3_DPP_Pseudo<opName, P> {416 let Defs = !if(DefExec, [EXEC], []);417 let SchedRW = P.Schedule;418 let isCompare = 1;419 let Constraints = "";420 }421 } // end SubtargetPredicate = isGFX11Plus422 423}424 425let SubtargetPredicate = HasSdstCMPX in {426multiclass VOPCX_Pseudos <string opName,427 VOPC_Profile P, VOPC_Profile P_NoSDst,428 SDPatternOperator cond = COND_NULL,429 string revOp = opName> :430 VOPC_Pseudos <opName, P, cond, revOp, 1> {431 432 def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>,433 Commutable_REV<revOp#"_nosdst_e32", !eq(revOp, opName)>,434 VCMPXNoSDstTable<0, opName#"_e32">,435 VCMPVCMPXTable<!subst("v_cmpx", "v_cmp", opName#"_e32")> {436 let Defs = [EXEC];437 let SchedRW = P_NoSDst.Schedule;438 let isConvergent = 1;439 let isCompare = 1;440 let isCommutable = 1;441 let SubtargetPredicate = HasNoSdstCMPX;442 let IsVCMPX = 1;443 }444 445 def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst, [], /*IsVOP3P*/false, P_NoSDst.HasOpSel>,446 Commutable_REV<revOp#"_nosdst_e64", !eq(revOp, opName)>,447 VCMPXNoSDstTable<0, opName#"_e64">,448 VCMPVCMPXTable<!subst("v_cmpx", "v_cmp", opName#"_e64")> {449 let Defs = [EXEC];450 let SchedRW = P_NoSDst.Schedule;451 let isCompare = 1;452 let isCommutable = 1;453 let SubtargetPredicate = HasNoSdstCMPX;454 let IsVCMPX = 1;455 let AsmMatchConverter = !cond(456 P_NoSDst.HasOpSel : "cvtVOP3OpSel",457 !or(P_NoSDst.HasModifiers, P_NoSDst.HasOMod, P_NoSDst.HasIntClamp) : "cvtVOP3",458 1 : "");459 }460 461 if P_NoSDst.HasExtSDWA then462 def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> {463 let Defs = [EXEC];464 let SchedRW = P_NoSDst.Schedule;465 let isConvergent = 1;466 let isCompare = 1;467 let SubtargetPredicate = HasNoSdstCMPX;468 }469 470 let SubtargetPredicate = isGFX11Plus in {471 if P.HasExtDPP then472 def _nosdst_e32_dpp : VOP_DPP_Pseudo<opName#"_nosdst", P_NoSDst> {473 let Defs = [EXEC];474 let SchedRW = P_NoSDst.Schedule;475 let isConvergent = 1;476 let isCompare = 1;477 let VOPC = 1;478 let Constraints = "";479 }480 if P.HasExtVOP3DPP then481 def _nosdst_e64_dpp : VOP3_DPP_Pseudo<opName#"_nosdst", P_NoSDst> {482 let Defs = [EXEC];483 let SchedRW = P_NoSDst.Schedule;484 let isCompare = 1;485 let Constraints = "";486 }487 } // end SubtargetPredicate = isGFX11Plus488}489} // End SubtargetPredicate = HasSdstCMPX490 491defm VOPC_I1_F16_F16 : VOPC_Profile_t16<[Write32Bit], f16>;492def VOPC_I1_F32_F32 : VOPC_Profile<[Write32Bit], f32>;493def VOPC_I1_F64_F64 : VOPC_Profile<[WriteDoubleAdd], f64>;494defm VOPC_I1_I16_I16 : VOPC_Profile_t16<[Write32Bit], i16>;495def VOPC_I1_I32_I32 : VOPC_Profile<[Write32Bit], i32>;496def VOPC_I1_I64_I64 : VOPC_Profile<[Write64Bit], i64>;497 498defm VOPC_F16_F16 : VOPC_NoSdst_Profile_t16<[Write32Bit], f16>;499def VOPC_F32_F32 : VOPC_NoSdst_Profile<[Write32Bit], f32>;500def VOPC_F64_F64 : VOPC_NoSdst_Profile<[Write64Bit], f64>;501defm VOPC_I16_I16 : VOPC_NoSdst_Profile_t16<[Write32Bit], i16>;502def VOPC_I32_I32 : VOPC_NoSdst_Profile<[Write32Bit], i32>;503def VOPC_I64_I64 : VOPC_NoSdst_Profile<[Write64Bit], i64>;504 505multiclass VOPC_F16 <string opName, SDPatternOperator cond = COND_NULL,506 string revOp = opName> {507 let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {508 defm NAME : VOPC_Pseudos <opName, VOPC_I1_F16_F16, cond, revOp, 0>;509 }510 let True16Predicate = UseRealTrue16Insts in {511 defm _t16 : VOPC_Pseudos <opName#"_t16", VOPC_I1_F16_F16_t16, cond, revOp#"_t16", 0>;512 }513 let True16Predicate = UseFakeTrue16Insts in {514 defm _fake16 : VOPC_Pseudos <opName#"_fake16", VOPC_I1_F16_F16_fake16, cond, revOp#"_fake16", 0>;515 }516}517 518multiclass VOPC_F32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :519 VOPC_Pseudos <opName, VOPC_I1_F32_F32, cond, revOp, 0>;520 521multiclass VOPC_F64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :522 VOPC_Pseudos <opName, VOPC_I1_F64_F64, cond, revOp, 0>;523 524multiclass VOPC_I16 <string opName, SDPatternOperator cond = COND_NULL,525 string revOp = opName> {526 let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {527 defm NAME : VOPC_Pseudos <opName, VOPC_I1_I16_I16, cond, revOp, 0>;528 }529 let True16Predicate = UseRealTrue16Insts in {530 defm _t16 : VOPC_Pseudos <opName#"_t16", VOPC_I1_I16_I16_t16, cond, revOp#"_t16", 0>;531 }532 let True16Predicate = UseFakeTrue16Insts in {533 defm _fake16 : VOPC_Pseudos <opName#"_fake16", VOPC_I1_I16_I16_fake16, cond, revOp#"_fake16", 0>;534 }535}536 537multiclass VOPC_I32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :538 VOPC_Pseudos <opName, VOPC_I1_I32_I32, cond, revOp, 0>;539 540multiclass VOPC_I64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :541 VOPC_Pseudos <opName, VOPC_I1_I64_I64, cond, revOp, 0>;542 543 544multiclass VOPCX_F16<string opName, string revOp = opName> {545 let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {546 defm NAME : VOPCX_Pseudos <opName, VOPC_I1_F16_F16, VOPC_F16_F16, COND_NULL, revOp>;547 }548 let True16Predicate = UseRealTrue16Insts in {549 defm _t16 : VOPCX_Pseudos <opName#"_t16", VOPC_I1_F16_F16_t16, VOPC_F16_F16_t16, COND_NULL, revOp#"_t16">;550 }551 let True16Predicate = UseFakeTrue16Insts in {552 defm _fake16 : VOPCX_Pseudos <opName#"_fake16", VOPC_I1_F16_F16_fake16, VOPC_F16_F16_fake16, COND_NULL, revOp#"_fake16">;553 }554}555 556multiclass VOPCX_F32 <string opName, string revOp = opName> :557 VOPCX_Pseudos <opName, VOPC_I1_F32_F32, VOPC_F32_F32, COND_NULL, revOp>;558 559multiclass VOPCX_F64 <string opName, string revOp = opName> :560 VOPCX_Pseudos <opName, VOPC_I1_F64_F64, VOPC_F64_F64, COND_NULL, revOp>;561 562multiclass VOPCX_I16<string opName, string revOp = opName> {563 let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {564 defm NAME : VOPCX_Pseudos <opName, VOPC_I1_I16_I16, VOPC_I16_I16, COND_NULL, revOp>;565 }566 let True16Predicate = UseRealTrue16Insts in {567 defm _t16 : VOPCX_Pseudos <opName#"_t16", VOPC_I1_I16_I16_t16, VOPC_I16_I16_t16, COND_NULL, revOp#"_t16">;568 }569 let True16Predicate = UseFakeTrue16Insts in {570 defm _fake16 : VOPCX_Pseudos <opName#"_fake16", VOPC_I1_I16_I16_fake16, VOPC_I16_I16_fake16, COND_NULL, revOp#"_fake16">;571 }572}573 574multiclass VOPCX_I32 <string opName, string revOp = opName> :575 VOPCX_Pseudos <opName, VOPC_I1_I32_I32, VOPC_I32_I32, COND_NULL, revOp>;576 577multiclass VOPCX_I64 <string opName, string revOp = opName> :578 VOPCX_Pseudos <opName, VOPC_I1_I64_I64, VOPC_I64_I64, COND_NULL, revOp>;579 580 581//===----------------------------------------------------------------------===//582// Compare instructions583//===----------------------------------------------------------------------===//584 585defm V_CMP_F_F32 : VOPC_F32 <"v_cmp_f_f32">;586defm V_CMP_LT_F32 : VOPC_F32 <"v_cmp_lt_f32", COND_OLT, "v_cmp_gt_f32">;587defm V_CMP_EQ_F32 : VOPC_F32 <"v_cmp_eq_f32", COND_OEQ>;588defm V_CMP_LE_F32 : VOPC_F32 <"v_cmp_le_f32", COND_OLE, "v_cmp_ge_f32">;589defm V_CMP_GT_F32 : VOPC_F32 <"v_cmp_gt_f32", COND_OGT>;590defm V_CMP_LG_F32 : VOPC_F32 <"v_cmp_lg_f32", COND_ONE>;591defm V_CMP_GE_F32 : VOPC_F32 <"v_cmp_ge_f32", COND_OGE>;592defm V_CMP_O_F32 : VOPC_F32 <"v_cmp_o_f32", COND_O>;593defm V_CMP_U_F32 : VOPC_F32 <"v_cmp_u_f32", COND_UO>;594defm V_CMP_NGE_F32 : VOPC_F32 <"v_cmp_nge_f32", COND_ULT, "v_cmp_nle_f32">;595defm V_CMP_NLG_F32 : VOPC_F32 <"v_cmp_nlg_f32", COND_UEQ>;596defm V_CMP_NGT_F32 : VOPC_F32 <"v_cmp_ngt_f32", COND_ULE, "v_cmp_nlt_f32">;597defm V_CMP_NLE_F32 : VOPC_F32 <"v_cmp_nle_f32", COND_UGT>;598defm V_CMP_NEQ_F32 : VOPC_F32 <"v_cmp_neq_f32", COND_UNE>;599defm V_CMP_NLT_F32 : VOPC_F32 <"v_cmp_nlt_f32", COND_UGE>;600defm V_CMP_TRU_F32 : VOPC_F32 <"v_cmp_tru_f32">;601 602defm V_CMPX_F_F32 : VOPCX_F32 <"v_cmpx_f_f32">;603defm V_CMPX_LT_F32 : VOPCX_F32 <"v_cmpx_lt_f32", "v_cmpx_gt_f32">;604defm V_CMPX_EQ_F32 : VOPCX_F32 <"v_cmpx_eq_f32">;605defm V_CMPX_LE_F32 : VOPCX_F32 <"v_cmpx_le_f32", "v_cmpx_ge_f32">;606defm V_CMPX_GT_F32 : VOPCX_F32 <"v_cmpx_gt_f32">;607defm V_CMPX_LG_F32 : VOPCX_F32 <"v_cmpx_lg_f32">;608defm V_CMPX_GE_F32 : VOPCX_F32 <"v_cmpx_ge_f32">;609defm V_CMPX_O_F32 : VOPCX_F32 <"v_cmpx_o_f32">;610defm V_CMPX_U_F32 : VOPCX_F32 <"v_cmpx_u_f32">;611defm V_CMPX_NGE_F32 : VOPCX_F32 <"v_cmpx_nge_f32", "v_cmpx_nle_f32">;612defm V_CMPX_NLG_F32 : VOPCX_F32 <"v_cmpx_nlg_f32">;613defm V_CMPX_NGT_F32 : VOPCX_F32 <"v_cmpx_ngt_f32", "v_cmpx_nlt_f32">;614defm V_CMPX_NLE_F32 : VOPCX_F32 <"v_cmpx_nle_f32">;615defm V_CMPX_NEQ_F32 : VOPCX_F32 <"v_cmpx_neq_f32">;616defm V_CMPX_NLT_F32 : VOPCX_F32 <"v_cmpx_nlt_f32">;617defm V_CMPX_TRU_F32 : VOPCX_F32 <"v_cmpx_tru_f32">;618 619defm V_CMP_F_F64 : VOPC_F64 <"v_cmp_f_f64">;620defm V_CMP_LT_F64 : VOPC_F64 <"v_cmp_lt_f64", COND_OLT, "v_cmp_gt_f64">;621defm V_CMP_EQ_F64 : VOPC_F64 <"v_cmp_eq_f64", COND_OEQ>;622defm V_CMP_LE_F64 : VOPC_F64 <"v_cmp_le_f64", COND_OLE, "v_cmp_ge_f64">;623defm V_CMP_GT_F64 : VOPC_F64 <"v_cmp_gt_f64", COND_OGT>;624defm V_CMP_LG_F64 : VOPC_F64 <"v_cmp_lg_f64", COND_ONE>;625defm V_CMP_GE_F64 : VOPC_F64 <"v_cmp_ge_f64", COND_OGE>;626defm V_CMP_O_F64 : VOPC_F64 <"v_cmp_o_f64", COND_O>;627defm V_CMP_U_F64 : VOPC_F64 <"v_cmp_u_f64", COND_UO>;628defm V_CMP_NGE_F64 : VOPC_F64 <"v_cmp_nge_f64", COND_ULT, "v_cmp_nle_f64">;629defm V_CMP_NLG_F64 : VOPC_F64 <"v_cmp_nlg_f64", COND_UEQ>;630defm V_CMP_NGT_F64 : VOPC_F64 <"v_cmp_ngt_f64", COND_ULE, "v_cmp_nlt_f64">;631defm V_CMP_NLE_F64 : VOPC_F64 <"v_cmp_nle_f64", COND_UGT>;632defm V_CMP_NEQ_F64 : VOPC_F64 <"v_cmp_neq_f64", COND_UNE>;633defm V_CMP_NLT_F64 : VOPC_F64 <"v_cmp_nlt_f64", COND_UGE>;634defm V_CMP_TRU_F64 : VOPC_F64 <"v_cmp_tru_f64">;635 636defm V_CMPX_F_F64 : VOPCX_F64 <"v_cmpx_f_f64">;637defm V_CMPX_LT_F64 : VOPCX_F64 <"v_cmpx_lt_f64", "v_cmpx_gt_f64">;638defm V_CMPX_EQ_F64 : VOPCX_F64 <"v_cmpx_eq_f64">;639defm V_CMPX_LE_F64 : VOPCX_F64 <"v_cmpx_le_f64", "v_cmpx_ge_f64">;640defm V_CMPX_GT_F64 : VOPCX_F64 <"v_cmpx_gt_f64">;641defm V_CMPX_LG_F64 : VOPCX_F64 <"v_cmpx_lg_f64">;642defm V_CMPX_GE_F64 : VOPCX_F64 <"v_cmpx_ge_f64">;643defm V_CMPX_O_F64 : VOPCX_F64 <"v_cmpx_o_f64">;644defm V_CMPX_U_F64 : VOPCX_F64 <"v_cmpx_u_f64">;645defm V_CMPX_NGE_F64 : VOPCX_F64 <"v_cmpx_nge_f64", "v_cmpx_nle_f64">;646defm V_CMPX_NLG_F64 : VOPCX_F64 <"v_cmpx_nlg_f64">;647defm V_CMPX_NGT_F64 : VOPCX_F64 <"v_cmpx_ngt_f64", "v_cmpx_nlt_f64">;648defm V_CMPX_NLE_F64 : VOPCX_F64 <"v_cmpx_nle_f64">;649defm V_CMPX_NEQ_F64 : VOPCX_F64 <"v_cmpx_neq_f64">;650defm V_CMPX_NLT_F64 : VOPCX_F64 <"v_cmpx_nlt_f64">;651defm V_CMPX_TRU_F64 : VOPCX_F64 <"v_cmpx_tru_f64">;652 653let SubtargetPredicate = isGFX6GFX7 in {654 655defm V_CMPS_F_F32 : VOPC_F32 <"v_cmps_f_f32">;656defm V_CMPS_LT_F32 : VOPC_F32 <"v_cmps_lt_f32", COND_NULL, "v_cmps_gt_f32">;657defm V_CMPS_EQ_F32 : VOPC_F32 <"v_cmps_eq_f32">;658defm V_CMPS_LE_F32 : VOPC_F32 <"v_cmps_le_f32", COND_NULL, "v_cmps_ge_f32">;659defm V_CMPS_GT_F32 : VOPC_F32 <"v_cmps_gt_f32">;660defm V_CMPS_LG_F32 : VOPC_F32 <"v_cmps_lg_f32">;661defm V_CMPS_GE_F32 : VOPC_F32 <"v_cmps_ge_f32">;662defm V_CMPS_O_F32 : VOPC_F32 <"v_cmps_o_f32">;663defm V_CMPS_U_F32 : VOPC_F32 <"v_cmps_u_f32">;664defm V_CMPS_NGE_F32 : VOPC_F32 <"v_cmps_nge_f32", COND_NULL, "v_cmps_nle_f32">;665defm V_CMPS_NLG_F32 : VOPC_F32 <"v_cmps_nlg_f32">;666defm V_CMPS_NGT_F32 : VOPC_F32 <"v_cmps_ngt_f32", COND_NULL, "v_cmps_nlt_f32">;667defm V_CMPS_NLE_F32 : VOPC_F32 <"v_cmps_nle_f32">;668defm V_CMPS_NEQ_F32 : VOPC_F32 <"v_cmps_neq_f32">;669defm V_CMPS_NLT_F32 : VOPC_F32 <"v_cmps_nlt_f32">;670defm V_CMPS_TRU_F32 : VOPC_F32 <"v_cmps_tru_f32">;671 672defm V_CMPSX_F_F32 : VOPCX_F32 <"v_cmpsx_f_f32">;673defm V_CMPSX_LT_F32 : VOPCX_F32 <"v_cmpsx_lt_f32", "v_cmpsx_gt_f32">;674defm V_CMPSX_EQ_F32 : VOPCX_F32 <"v_cmpsx_eq_f32">;675defm V_CMPSX_LE_F32 : VOPCX_F32 <"v_cmpsx_le_f32", "v_cmpsx_ge_f32">;676defm V_CMPSX_GT_F32 : VOPCX_F32 <"v_cmpsx_gt_f32">;677defm V_CMPSX_LG_F32 : VOPCX_F32 <"v_cmpsx_lg_f32">;678defm V_CMPSX_GE_F32 : VOPCX_F32 <"v_cmpsx_ge_f32">;679defm V_CMPSX_O_F32 : VOPCX_F32 <"v_cmpsx_o_f32">;680defm V_CMPSX_U_F32 : VOPCX_F32 <"v_cmpsx_u_f32">;681defm V_CMPSX_NGE_F32 : VOPCX_F32 <"v_cmpsx_nge_f32", "v_cmpsx_nle_f32">;682defm V_CMPSX_NLG_F32 : VOPCX_F32 <"v_cmpsx_nlg_f32">;683defm V_CMPSX_NGT_F32 : VOPCX_F32 <"v_cmpsx_ngt_f32", "v_cmpsx_nlt_f32">;684defm V_CMPSX_NLE_F32 : VOPCX_F32 <"v_cmpsx_nle_f32">;685defm V_CMPSX_NEQ_F32 : VOPCX_F32 <"v_cmpsx_neq_f32">;686defm V_CMPSX_NLT_F32 : VOPCX_F32 <"v_cmpsx_nlt_f32">;687defm V_CMPSX_TRU_F32 : VOPCX_F32 <"v_cmpsx_tru_f32">;688 689defm V_CMPS_F_F64 : VOPC_F64 <"v_cmps_f_f64">;690defm V_CMPS_LT_F64 : VOPC_F64 <"v_cmps_lt_f64", COND_NULL, "v_cmps_gt_f64">;691defm V_CMPS_EQ_F64 : VOPC_F64 <"v_cmps_eq_f64">;692defm V_CMPS_LE_F64 : VOPC_F64 <"v_cmps_le_f64", COND_NULL, "v_cmps_ge_f64">;693defm V_CMPS_GT_F64 : VOPC_F64 <"v_cmps_gt_f64">;694defm V_CMPS_LG_F64 : VOPC_F64 <"v_cmps_lg_f64">;695defm V_CMPS_GE_F64 : VOPC_F64 <"v_cmps_ge_f64">;696defm V_CMPS_O_F64 : VOPC_F64 <"v_cmps_o_f64">;697defm V_CMPS_U_F64 : VOPC_F64 <"v_cmps_u_f64">;698defm V_CMPS_NGE_F64 : VOPC_F64 <"v_cmps_nge_f64", COND_NULL, "v_cmps_nle_f64">;699defm V_CMPS_NLG_F64 : VOPC_F64 <"v_cmps_nlg_f64">;700defm V_CMPS_NGT_F64 : VOPC_F64 <"v_cmps_ngt_f64", COND_NULL, "v_cmps_nlt_f64">;701defm V_CMPS_NLE_F64 : VOPC_F64 <"v_cmps_nle_f64">;702defm V_CMPS_NEQ_F64 : VOPC_F64 <"v_cmps_neq_f64">;703defm V_CMPS_NLT_F64 : VOPC_F64 <"v_cmps_nlt_f64">;704defm V_CMPS_TRU_F64 : VOPC_F64 <"v_cmps_tru_f64">;705 706defm V_CMPSX_F_F64 : VOPCX_F64 <"v_cmpsx_f_f64">;707defm V_CMPSX_LT_F64 : VOPCX_F64 <"v_cmpsx_lt_f64", "v_cmpsx_gt_f64">;708defm V_CMPSX_EQ_F64 : VOPCX_F64 <"v_cmpsx_eq_f64">;709defm V_CMPSX_LE_F64 : VOPCX_F64 <"v_cmpsx_le_f64", "v_cmpsx_ge_f64">;710defm V_CMPSX_GT_F64 : VOPCX_F64 <"v_cmpsx_gt_f64">;711defm V_CMPSX_LG_F64 : VOPCX_F64 <"v_cmpsx_lg_f64">;712defm V_CMPSX_GE_F64 : VOPCX_F64 <"v_cmpsx_ge_f64">;713defm V_CMPSX_O_F64 : VOPCX_F64 <"v_cmpsx_o_f64">;714defm V_CMPSX_U_F64 : VOPCX_F64 <"v_cmpsx_u_f64">;715defm V_CMPSX_NGE_F64 : VOPCX_F64 <"v_cmpsx_nge_f64", "v_cmpsx_nle_f64">;716defm V_CMPSX_NLG_F64 : VOPCX_F64 <"v_cmpsx_nlg_f64">;717defm V_CMPSX_NGT_F64 : VOPCX_F64 <"v_cmpsx_ngt_f64", "v_cmpsx_nlt_f64">;718defm V_CMPSX_NLE_F64 : VOPCX_F64 <"v_cmpsx_nle_f64">;719defm V_CMPSX_NEQ_F64 : VOPCX_F64 <"v_cmpsx_neq_f64">;720defm V_CMPSX_NLT_F64 : VOPCX_F64 <"v_cmpsx_nlt_f64">;721defm V_CMPSX_TRU_F64 : VOPCX_F64 <"v_cmpsx_tru_f64">;722 723} // End SubtargetPredicate = isGFX6GFX7724 725let SubtargetPredicate = Has16BitInsts in {726 727defm V_CMP_F_F16 : VOPC_F16 <"v_cmp_f_f16">;728defm V_CMP_LT_F16 : VOPC_F16 <"v_cmp_lt_f16", COND_OLT, "v_cmp_gt_f16">;729defm V_CMP_EQ_F16 : VOPC_F16 <"v_cmp_eq_f16", COND_OEQ>;730defm V_CMP_LE_F16 : VOPC_F16 <"v_cmp_le_f16", COND_OLE, "v_cmp_ge_f16">;731defm V_CMP_GT_F16 : VOPC_F16 <"v_cmp_gt_f16", COND_OGT>;732defm V_CMP_LG_F16 : VOPC_F16 <"v_cmp_lg_f16", COND_ONE>;733defm V_CMP_GE_F16 : VOPC_F16 <"v_cmp_ge_f16", COND_OGE>;734defm V_CMP_O_F16 : VOPC_F16 <"v_cmp_o_f16", COND_O>;735defm V_CMP_U_F16 : VOPC_F16 <"v_cmp_u_f16", COND_UO>;736defm V_CMP_NGE_F16 : VOPC_F16 <"v_cmp_nge_f16", COND_ULT, "v_cmp_nle_f16">;737defm V_CMP_NLG_F16 : VOPC_F16 <"v_cmp_nlg_f16", COND_UEQ>;738defm V_CMP_NGT_F16 : VOPC_F16 <"v_cmp_ngt_f16", COND_ULE, "v_cmp_nlt_f16">;739defm V_CMP_NLE_F16 : VOPC_F16 <"v_cmp_nle_f16", COND_UGT>;740defm V_CMP_NEQ_F16 : VOPC_F16 <"v_cmp_neq_f16", COND_UNE>;741defm V_CMP_NLT_F16 : VOPC_F16 <"v_cmp_nlt_f16", COND_UGE>;742defm V_CMP_TRU_F16 : VOPC_F16 <"v_cmp_tru_f16">;743 744defm V_CMPX_F_F16 : VOPCX_F16 <"v_cmpx_f_f16">;745defm V_CMPX_LT_F16 : VOPCX_F16 <"v_cmpx_lt_f16", "v_cmpx_gt_f16">;746defm V_CMPX_EQ_F16 : VOPCX_F16 <"v_cmpx_eq_f16">;747defm V_CMPX_LE_F16 : VOPCX_F16 <"v_cmpx_le_f16", "v_cmpx_ge_f16">;748defm V_CMPX_GT_F16 : VOPCX_F16 <"v_cmpx_gt_f16">;749defm V_CMPX_LG_F16 : VOPCX_F16 <"v_cmpx_lg_f16">;750defm V_CMPX_GE_F16 : VOPCX_F16 <"v_cmpx_ge_f16">;751defm V_CMPX_O_F16 : VOPCX_F16 <"v_cmpx_o_f16">;752defm V_CMPX_U_F16 : VOPCX_F16 <"v_cmpx_u_f16">;753defm V_CMPX_NGE_F16 : VOPCX_F16 <"v_cmpx_nge_f16", "v_cmpx_nle_f16">;754defm V_CMPX_NLG_F16 : VOPCX_F16 <"v_cmpx_nlg_f16">;755defm V_CMPX_NGT_F16 : VOPCX_F16 <"v_cmpx_ngt_f16", "v_cmpx_nlt_f16">;756defm V_CMPX_NLE_F16 : VOPCX_F16 <"v_cmpx_nle_f16">;757defm V_CMPX_NEQ_F16 : VOPCX_F16 <"v_cmpx_neq_f16">;758defm V_CMPX_NLT_F16 : VOPCX_F16 <"v_cmpx_nlt_f16">;759defm V_CMPX_TRU_F16 : VOPCX_F16 <"v_cmpx_tru_f16">;760 761defm V_CMP_F_I16 : VOPC_I16 <"v_cmp_f_i16">;762defm V_CMP_LT_I16 : VOPC_I16 <"v_cmp_lt_i16", COND_SLT, "v_cmp_gt_i16">;763defm V_CMP_EQ_I16 : VOPC_I16 <"v_cmp_eq_i16">;764defm V_CMP_LE_I16 : VOPC_I16 <"v_cmp_le_i16", COND_SLE, "v_cmp_ge_i16">;765defm V_CMP_GT_I16 : VOPC_I16 <"v_cmp_gt_i16", COND_SGT>;766defm V_CMP_NE_I16 : VOPC_I16 <"v_cmp_ne_i16">;767defm V_CMP_GE_I16 : VOPC_I16 <"v_cmp_ge_i16", COND_SGE>;768defm V_CMP_T_I16 : VOPC_I16 <"v_cmp_t_i16">;769 770defm V_CMP_F_U16 : VOPC_I16 <"v_cmp_f_u16">;771defm V_CMP_LT_U16 : VOPC_I16 <"v_cmp_lt_u16", COND_ULT, "v_cmp_gt_u16">;772defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>;773defm V_CMP_LE_U16 : VOPC_I16 <"v_cmp_le_u16", COND_ULE, "v_cmp_ge_u16">;774defm V_CMP_GT_U16 : VOPC_I16 <"v_cmp_gt_u16", COND_UGT>;775defm V_CMP_NE_U16 : VOPC_I16 <"v_cmp_ne_u16", COND_NE>;776defm V_CMP_GE_U16 : VOPC_I16 <"v_cmp_ge_u16", COND_UGE>;777defm V_CMP_T_U16 : VOPC_I16 <"v_cmp_t_u16">;778 779defm V_CMPX_F_I16 : VOPCX_I16 <"v_cmpx_f_i16">;780defm V_CMPX_LT_I16 : VOPCX_I16 <"v_cmpx_lt_i16", "v_cmpx_gt_i16">;781defm V_CMPX_EQ_I16 : VOPCX_I16 <"v_cmpx_eq_i16">;782defm V_CMPX_LE_I16 : VOPCX_I16 <"v_cmpx_le_i16", "v_cmpx_ge_i16">;783defm V_CMPX_GT_I16 : VOPCX_I16 <"v_cmpx_gt_i16">;784defm V_CMPX_NE_I16 : VOPCX_I16 <"v_cmpx_ne_i16">;785defm V_CMPX_GE_I16 : VOPCX_I16 <"v_cmpx_ge_i16">;786defm V_CMPX_T_I16 : VOPCX_I16 <"v_cmpx_t_i16">;787 788defm V_CMPX_F_U16 : VOPCX_I16 <"v_cmpx_f_u16">;789defm V_CMPX_LT_U16 : VOPCX_I16 <"v_cmpx_lt_u16", "v_cmpx_gt_u16">;790defm V_CMPX_EQ_U16 : VOPCX_I16 <"v_cmpx_eq_u16">;791defm V_CMPX_LE_U16 : VOPCX_I16 <"v_cmpx_le_u16", "v_cmpx_ge_u16">;792defm V_CMPX_GT_U16 : VOPCX_I16 <"v_cmpx_gt_u16">;793defm V_CMPX_NE_U16 : VOPCX_I16 <"v_cmpx_ne_u16">;794defm V_CMPX_GE_U16 : VOPCX_I16 <"v_cmpx_ge_u16">;795defm V_CMPX_T_U16 : VOPCX_I16 <"v_cmpx_t_u16">;796 797} // End SubtargetPredicate = Has16BitInsts798 799defm V_CMP_F_I32 : VOPC_I32 <"v_cmp_f_i32">;800defm V_CMP_LT_I32 : VOPC_I32 <"v_cmp_lt_i32", COND_SLT, "v_cmp_gt_i32">;801defm V_CMP_EQ_I32 : VOPC_I32 <"v_cmp_eq_i32">;802defm V_CMP_LE_I32 : VOPC_I32 <"v_cmp_le_i32", COND_SLE, "v_cmp_ge_i32">;803defm V_CMP_GT_I32 : VOPC_I32 <"v_cmp_gt_i32", COND_SGT>;804defm V_CMP_NE_I32 : VOPC_I32 <"v_cmp_ne_i32">;805defm V_CMP_GE_I32 : VOPC_I32 <"v_cmp_ge_i32", COND_SGE>;806defm V_CMP_T_I32 : VOPC_I32 <"v_cmp_t_i32">;807 808defm V_CMPX_F_I32 : VOPCX_I32 <"v_cmpx_f_i32">;809defm V_CMPX_LT_I32 : VOPCX_I32 <"v_cmpx_lt_i32", "v_cmpx_gt_i32">;810defm V_CMPX_EQ_I32 : VOPCX_I32 <"v_cmpx_eq_i32">;811defm V_CMPX_LE_I32 : VOPCX_I32 <"v_cmpx_le_i32", "v_cmpx_ge_i32">;812defm V_CMPX_GT_I32 : VOPCX_I32 <"v_cmpx_gt_i32">;813defm V_CMPX_NE_I32 : VOPCX_I32 <"v_cmpx_ne_i32">;814defm V_CMPX_GE_I32 : VOPCX_I32 <"v_cmpx_ge_i32">;815defm V_CMPX_T_I32 : VOPCX_I32 <"v_cmpx_t_i32">;816 817defm V_CMP_F_I64 : VOPC_I64 <"v_cmp_f_i64">;818defm V_CMP_LT_I64 : VOPC_I64 <"v_cmp_lt_i64", COND_SLT, "v_cmp_gt_i64">;819defm V_CMP_EQ_I64 : VOPC_I64 <"v_cmp_eq_i64">;820defm V_CMP_LE_I64 : VOPC_I64 <"v_cmp_le_i64", COND_SLE, "v_cmp_ge_i64">;821defm V_CMP_GT_I64 : VOPC_I64 <"v_cmp_gt_i64", COND_SGT>;822defm V_CMP_NE_I64 : VOPC_I64 <"v_cmp_ne_i64">;823defm V_CMP_GE_I64 : VOPC_I64 <"v_cmp_ge_i64", COND_SGE>;824defm V_CMP_T_I64 : VOPC_I64 <"v_cmp_t_i64">;825 826defm V_CMPX_F_I64 : VOPCX_I64 <"v_cmpx_f_i64">;827defm V_CMPX_LT_I64 : VOPCX_I64 <"v_cmpx_lt_i64", "v_cmpx_gt_i64">;828defm V_CMPX_EQ_I64 : VOPCX_I64 <"v_cmpx_eq_i64">;829defm V_CMPX_LE_I64 : VOPCX_I64 <"v_cmpx_le_i64", "v_cmpx_ge_i64">;830defm V_CMPX_GT_I64 : VOPCX_I64 <"v_cmpx_gt_i64">;831defm V_CMPX_NE_I64 : VOPCX_I64 <"v_cmpx_ne_i64">;832defm V_CMPX_GE_I64 : VOPCX_I64 <"v_cmpx_ge_i64">;833defm V_CMPX_T_I64 : VOPCX_I64 <"v_cmpx_t_i64">;834 835defm V_CMP_F_U32 : VOPC_I32 <"v_cmp_f_u32">;836defm V_CMP_LT_U32 : VOPC_I32 <"v_cmp_lt_u32", COND_ULT, "v_cmp_gt_u32">;837defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>;838defm V_CMP_LE_U32 : VOPC_I32 <"v_cmp_le_u32", COND_ULE, "v_cmp_ge_u32">;839defm V_CMP_GT_U32 : VOPC_I32 <"v_cmp_gt_u32", COND_UGT>;840defm V_CMP_NE_U32 : VOPC_I32 <"v_cmp_ne_u32", COND_NE>;841defm V_CMP_GE_U32 : VOPC_I32 <"v_cmp_ge_u32", COND_UGE>;842defm V_CMP_T_U32 : VOPC_I32 <"v_cmp_t_u32">;843 844defm V_CMPX_F_U32 : VOPCX_I32 <"v_cmpx_f_u32">;845defm V_CMPX_LT_U32 : VOPCX_I32 <"v_cmpx_lt_u32", "v_cmpx_gt_u32">;846defm V_CMPX_EQ_U32 : VOPCX_I32 <"v_cmpx_eq_u32">;847defm V_CMPX_LE_U32 : VOPCX_I32 <"v_cmpx_le_u32", "v_cmpx_ge_u32">;848defm V_CMPX_GT_U32 : VOPCX_I32 <"v_cmpx_gt_u32">;849defm V_CMPX_NE_U32 : VOPCX_I32 <"v_cmpx_ne_u32">;850defm V_CMPX_GE_U32 : VOPCX_I32 <"v_cmpx_ge_u32">;851defm V_CMPX_T_U32 : VOPCX_I32 <"v_cmpx_t_u32">;852 853defm V_CMP_F_U64 : VOPC_I64 <"v_cmp_f_u64">;854defm V_CMP_LT_U64 : VOPC_I64 <"v_cmp_lt_u64", COND_ULT, "v_cmp_gt_u64">;855defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>;856defm V_CMP_LE_U64 : VOPC_I64 <"v_cmp_le_u64", COND_ULE, "v_cmp_ge_u64">;857defm V_CMP_GT_U64 : VOPC_I64 <"v_cmp_gt_u64", COND_UGT>;858defm V_CMP_NE_U64 : VOPC_I64 <"v_cmp_ne_u64", COND_NE>;859defm V_CMP_GE_U64 : VOPC_I64 <"v_cmp_ge_u64", COND_UGE>;860defm V_CMP_T_U64 : VOPC_I64 <"v_cmp_t_u64">;861 862defm V_CMPX_F_U64 : VOPCX_I64 <"v_cmpx_f_u64">;863defm V_CMPX_LT_U64 : VOPCX_I64 <"v_cmpx_lt_u64", "v_cmpx_gt_u64">;864defm V_CMPX_EQ_U64 : VOPCX_I64 <"v_cmpx_eq_u64">;865defm V_CMPX_LE_U64 : VOPCX_I64 <"v_cmpx_le_u64", "v_cmpx_ge_u64">;866defm V_CMPX_GT_U64 : VOPCX_I64 <"v_cmpx_gt_u64">;867defm V_CMPX_NE_U64 : VOPCX_I64 <"v_cmpx_ne_u64">;868defm V_CMPX_GE_U64 : VOPCX_I64 <"v_cmpx_ge_u64">;869defm V_CMPX_T_U64 : VOPCX_I64 <"v_cmpx_t_u64">;870 871//===----------------------------------------------------------------------===//872// Class instructions873//===----------------------------------------------------------------------===//874 875class VOPC_Class_Profile_Base<list<SchedReadWrite> sched, ValueType src0VT, ValueType src1VT = i32> :876 VOPC_Profile<sched, src0VT, src1VT> {877 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0,878 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1,879 Clamp:$clamp, src0_sel:$src0_sel, src1_sel:$src1_sel);880 881 let AsmSDWA = " vcc, $src0_modifiers, $src1_modifiers$clamp $src0_sel $src1_sel";882 let HasClamp = 0;883 let HasOMod = 0;884}885 886class VOPC_Class_Profile<list<SchedReadWrite> sched, ValueType src0VT, ValueType src1VT = i32> :887 VOPC_Class_Profile_Base<sched, src0VT, src1VT> {888 let AsmDPP = "$src0_modifiers, $src1 $dpp_ctrl$row_mask$bank_mask$bound_ctrl";889 let AsmDPP16 = AsmDPP#"$fi";890 let InsDPP = (ins Src0ModDPP:$src0_modifiers, Src0DPP:$src0, Src1DPP:$src1, dpp_ctrl:$dpp_ctrl, DppRowMask:$row_mask, DppBankMask:$bank_mask, DppBoundCtrl:$bound_ctrl);891 let InsDPP16 = !con(InsDPP, (ins Dpp16FI:$fi));892 // DPP8 forbids modifiers and can inherit from VOPC_Profile893 894 let Ins64 = (ins Src0Mod:$src0_modifiers, Src0RC64:$src0, Src1RC64:$src1);895 dag InsPartVOP3DPP = (ins FPVRegInputMods:$src0_modifiers, VGPROp_32:$src0, VCSrc_b32:$src1);896 let InsVOP3Base = !con(InsPartVOP3DPP, !if(HasOpSel, (ins op_sel0:$op_sel),897 (ins)));898 let AsmVOP3Base = "$sdst, $src0_modifiers, $src1";899 let HasSrc1Mods = 0;900}901 902multiclass VOPC_Class_Profile_t16<list<SchedReadWrite> sched> {903 def NAME : VOPC_Class_Profile<sched, f16>;904 def _t16 : VOPC_Class_Profile_Base<sched, f16, f16> {905 let IsTrue16 = 1;906 let IsRealTrue16 = 1;907 let HasOpSel = 1;908 let HasModifiers = 1; // All instructions at least have OpSel909 let DstRC = getVALUDstForVT<DstVT, 1 /*IsTrue16*/, 0 /*IsVOP3Encoding*/>.ret;910 let Src0RC32 = getVOPSrc0ForVT<Src0VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;911 let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;912 let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;913 let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;914 let Src2DPP = getVregSrcForVT<Src2VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;915 let Src0ModDPP = getSrcModDPP_t16<Src0VT, 0/*IsFake16*/>.ret;916 let Src1ModDPP = getSrcModDPP_t16<Src1VT, 0/*IsFake16*/>.ret;917 let Src2ModDPP = getSrcModDPP_t16<Src2VT, 0/*IsFake16*/>.ret;918 let Src0VOP3DPP = VGPROp_16;919 let Src1VOP3DPP = getVOP3DPPSrcForVT<Src1VT, 0/*IsFake16*/>.ret;920 let Src2VOP3DPP = getVOP3DPPSrcForVT<Src2VT, 0/*IsFake16*/>.ret;921 922 let DstRC64 = getVALUDstForVT<DstVT, 1/*IsTrue16*/, 1/*IsVOP3Encoding*/>.ret;923 let Src0RC64 = getVOP3SrcForVT<Src0VT, 1/*IsTrue16*/>.ret;924 let Src1RC64 = getVOP3SrcForVT<Src1VT, 1/*IsTrue16*/>.ret;925 let Src2RC64 = getVOP3SrcForVT<Src2VT, 1/*IsTrue16*/>.ret;926 let Src0Mod = getSrc0Mod<Src0VT, DstVT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;927 let Src1Mod = getSrcMod<Src1VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;928 let Src2Mod = getSrcMod<Src2VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;929 let Src0ModVOP3DPP = getSrc0ModVOP3DPP<Src0VT, DstVT, 0/*IsFake16*/>.ret;930 let Src1ModVOP3DPP = getSrcModVOP3VC<Src1VT, 0/*IsFake16*/>.ret;931 let Src2ModVOP3DPP = getSrcModVOP3VC<Src2VT, 0/*IsFake16*/>.ret;932 }933 def _fake16 : VOPC_Class_Profile_Base<sched, f16, f16> {934 let IsTrue16 = 1;935 let DstRC = getVALUDstForVT_fake16<DstVT>.ret;936 let Src0RC32 = getVOPSrc0ForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;937 let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;938 let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;939 let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;940 let Src2DPP = getVregSrcForVT<Src2VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;941 let Src0ModDPP = getSrcModDPP_t16<Src0VT, 1/*IsFake16*/>.ret;942 let Src1ModDPP = getSrcModDPP_t16<Src1VT, 1/*IsFake16*/>.ret;943 let Src2ModDPP = getSrcModDPP_t16<Src2VT, 1/*IsFake16*/>.ret;944 let Src0VOP3DPP = VGPROp_32;945 let Src1VOP3DPP = getVOP3DPPSrcForVT<Src1VT, 1/*IsFake16*/>.ret;946 let Src2VOP3DPP = getVOP3DPPSrcForVT<Src2VT, 1/*IsFake16*/>.ret;947 948 let DstRC64 = getVALUDstForVT<DstVT>.ret;949 let Src0RC64 = getVOP3SrcForVT<Src0VT, 0/*IsTrue16*/>.ret;950 let Src1RC64 = getVOP3SrcForVT<Src1VT, 0/*IsTrue16*/>.ret;951 let Src2RC64 = getVOP3SrcForVT<Src2VT, 0/*IsTrue16*/>.ret;952 let Src0Mod = getSrc0Mod<Src0VT, DstVT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;953 let Src1Mod = getSrcMod<Src1VT, 0/*IsTrue16*/, 1/*IsFake16*/>.ret;954 let Src2Mod = getSrcMod<Src2VT, 0/*IsTrue16*/, 1/*IsFake16*/>.ret;955 let Src0ModVOP3DPP = getSrc0ModVOP3DPP<Src0VT, DstVT, 1/*IsFake16*/>.ret;956 let Src1ModVOP3DPP = getSrcModVOP3VC<Src1VT, 1/*IsFake16*/>.ret;957 let Src2ModVOP3DPP = getSrcModVOP3VC<Src2VT, 1/*IsFake16*/>.ret;958 }959}960 961class VOPC_Class_NoSdst_Profile<list<SchedReadWrite> sched, ValueType src0VT, ValueType src1VT = i32> :962 VOPC_Class_Profile_Base<sched, src0VT, src1VT> {963 let Outs64 = (outs );964 let OutsSDWA = (outs );965 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0,966 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1,967 src0_sel:$src0_sel, src1_sel:$src1_sel);968 let HasDst = 0;969 let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel";970 let EmitDst = 0;971}972 973multiclass VOPC_Class_NoSdst_Profile_t16<list<SchedReadWrite> sched> {974 def NAME : VOPC_Class_NoSdst_Profile<sched, f16>;975 def _t16 : VOPC_Class_NoSdst_Profile<sched, f16, f16> {976 let IsTrue16 = 1;977 let IsRealTrue16 = 1;978 let HasOpSel = 1;979 let HasModifiers = 1; // All instructions at least have OpSel980 let Src0RC32 = getVOPSrc0ForVT<Src0VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;981 let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;982 let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;983 let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;984 let Src2DPP = getVregSrcForVT<Src2VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;985 let Src0ModDPP = getSrcModDPP_t16<Src0VT, 0/*IsFake16*/>.ret;986 let Src1ModDPP = getSrcModDPP_t16<Src1VT, 0/*IsFake16*/>.ret;987 let Src2ModDPP = getSrcModDPP_t16<Src2VT, 0/*IsFake16*/>.ret;988 let Src0VOP3DPP = VGPROp_16;989 let Src1VOP3DPP = getVOP3DPPSrcForVT<Src1VT, 0/*IsFake16*/>.ret;990 let Src2VOP3DPP = getVOP3DPPSrcForVT<Src2VT, 0/*IsFake16*/>.ret;991 992 let Src0RC64 = getVOP3SrcForVT<Src0VT, 1/*IsTrue16*/>.ret;993 let Src1RC64 = getVOP3SrcForVT<Src1VT, 1/*IsTrue16*/>.ret;994 let Src2RC64 = getVOP3SrcForVT<Src2VT, 1/*IsTrue16*/>.ret;995 let Src0Mod = getSrc0Mod<Src0VT, DstVT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;996 let Src1Mod = getSrcMod<Src1VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;997 let Src2Mod = getSrcMod<Src2VT, 1/*IsTrue16*/, 0/*IsFake16*/>.ret;998 let Src0ModVOP3DPP = getSrc0ModVOP3DPP<Src0VT, DstVT, 0/*IsFake16*/>.ret;999 let Src1ModVOP3DPP = getSrcModVOP3VC<Src1VT, 0/*IsFake16*/>.ret;1000 let Src2ModVOP3DPP = getSrcModVOP3VC<Src2VT, 0/*IsFake16*/>.ret;1001 }1002 def _fake16 : VOPC_Class_NoSdst_Profile<sched, f16, f16> {1003 let IsTrue16 = 1;1004 let Src0RC32 = getVOPSrc0ForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;1005 let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;1006 let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;1007 let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;1008 let Src2DPP = getVregSrcForVT<Src2VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;1009 let Src0ModDPP = getSrcModDPP_t16<Src0VT, 1/*IsFake16*/>.ret;1010 let Src1ModDPP = getSrcModDPP_t16<Src1VT, 1/*IsFake16*/>.ret;1011 let Src2ModDPP = getSrcModDPP_t16<Src2VT, 1/*IsFake16*/>.ret;1012 let Src0VOP3DPP = VGPROp_32;1013 let Src1VOP3DPP = getVOP3DPPSrcForVT<Src1VT, 1/*IsFake16*/>.ret;1014 let Src2VOP3DPP = getVOP3DPPSrcForVT<Src2VT, 1/*IsFake16*/>.ret;1015 1016 let Src0RC64 = getVOP3SrcForVT<Src0VT, 0/*IsTrue16*/>.ret;1017 let Src1RC64 = getVOP3SrcForVT<Src1VT, 0/*IsTrue16*/>.ret;1018 let Src2RC64 = getVOP3SrcForVT<Src2VT, 0/*IsTrue16*/>.ret;1019 let Src0Mod = getSrc0Mod<Src0VT, DstVT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;1020 let Src1Mod = getSrcMod<Src1VT, 0/*IsTrue16*/, 1/*IsFake16*/>.ret;1021 let Src2Mod = getSrcMod<Src2VT, 0/*IsTrue16*/, 1/*IsFake16*/>.ret;1022 let Src0ModVOP3DPP = getSrc0ModVOP3DPP<Src0VT, DstVT, 1/*IsFake16*/>.ret;1023 let Src1ModVOP3DPP = getSrcModVOP3VC<Src1VT, 1/*IsFake16*/>.ret;1024 let Src2ModVOP3DPP = getSrcModVOP3VC<Src2VT, 1/*IsFake16*/>.ret;1025 }1026}1027 1028multiclass VOPCClassPat64<string inst_name> {1029 defvar inst = !cast<VOP_Pseudo>(inst_name#"_e64");1030 defvar P = inst.Pfl;1031 def : GCNPat <1032 (i1:$sdst1033 (AMDGPUfp_class1034 (P.Src0VT (VOP3ModsNonCanonicalizing P.Src0VT:$src0, i32:$src0_modifiers)),1035 P.Src1VT:$src1)),1036 (inst i32:$src0_modifiers, P.Src0VT:$src0, P.Src1VT:$src1)1037 >;1038}1039 1040multiclass VOPCClassPat64_t16<string inst_name> {1041 defvar inst = !cast<VOP_Pseudo>(inst_name#"_t16_e64");1042 defvar P = inst.Pfl;1043 def : GCNPat <1044 (i1:$sdst1045 (AMDGPUfp_class1046 (P.Src0VT (VOP3ModsNonCanonicalizing P.Src0VT:$src0, i32:$src0_modifiers)),1047 i32:$src1)),1048 (inst i32:$src0_modifiers, VSrcT_f16:$src0,1049 0 /* src1_modifiers */, (f16 (EXTRACT_SUBREG VGPR_32:$src1, lo16)),1050 0) /* op_sel */1051 >;1052}1053 1054multiclass VOPCClassPat64_fake16<string inst_name> {1055 defvar inst = !cast<VOP_Pseudo>(inst_name#"_fake16_e64");1056 defvar P = inst.Pfl;1057 def : GCNPat <1058 (i1:$sdst1059 (AMDGPUfp_class1060 (P.Src0VT (VOP3ModsNonCanonicalizing P.Src0VT:$src0, i32:$src0_modifiers)),1061 i32:$src1)),1062 (inst i32:$src0_modifiers, P.Src0VT:$src0,1063 0 /*src1_modifiers*/, VGPR_32:$src1)1064 >;1065}1066 1067// cmp_class ignores the FP mode and faithfully reports the unmodified1068// source value.1069let ReadsModeReg = 0, mayRaiseFPException = 0 in {1070multiclass VOPC_Class_Pseudos <string opName, VOPC_Profile p, bit DefExec,1071 bit DefVcc = 1> {1072 def _e32 : VOPC_Pseudo <opName, p>,1073 VCMPXNoSDstTable<1, opName#"_e32"> {1074 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]),1075 !if(DefVcc, [VCC], []));1076 let SchedRW = p.Schedule;1077 let isConvergent = DefExec;1078 }1079 1080 def _e64 : VOP3_Pseudo<opName, p, [], 0/*IsVOP3P*/, p.HasOpSel>,1081 VCMPXNoSDstTable<1, opName#"_e64"> {1082 let Defs = !if(DefExec, [EXEC], []);1083 let SchedRW = p.Schedule;1084 let AsmMatchConverter = !cond(1085 p.HasOpSel : "cvtVOP3OpSel",1086 !or(p.HasModifiers, p.HasOMod, p.HasIntClamp) : "cvtVOP3",1087 1 : "");1088 }1089 1090 if p.HasExtSDWA then1091 def _sdwa : VOPC_SDWA_Pseudo <opName, p> {1092 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]),1093 !if(DefVcc, [VCC], []));1094 let SchedRW = p.Schedule;1095 let isConvergent = DefExec;1096 }1097 1098 let SubtargetPredicate = isGFX11Plus in {1099 if p.HasExtDPP then1100 def _e32_dpp : VOP_DPP_Pseudo<opName, p> {1101 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]),1102 !if(DefVcc, [VCC], []));1103 let SchedRW = p.Schedule;1104 let isConvergent = DefExec;1105 let VOPC = 1;1106 let Constraints = "";1107 }1108 if p.HasExtVOP3DPP then1109 def _e64_dpp : VOP3_DPP_Pseudo<opName, p> {1110 let Defs = !if(DefExec, [EXEC], []);1111 let SchedRW = p.Schedule;1112 let Constraints = "";1113 }1114 } // end SubtargetPredicate = isGFX11Plus1115}1116 1117let SubtargetPredicate = HasSdstCMPX in {1118multiclass VOPCX_Class_Pseudos <string opName,1119 VOPC_Profile P,1120 VOPC_Profile P_NoSDst> :1121 VOPC_Class_Pseudos <opName, P, 1, 1> {1122 1123 def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>,1124 VCMPXNoSDstTable<0, opName#"_e32"> {1125 let Defs = [EXEC];1126 let SchedRW = P_NoSDst.Schedule;1127 let isConvergent = 1;1128 let SubtargetPredicate = HasNoSdstCMPX;1129 }1130 1131 def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst, [], 0/*IsVOP3P*/, P_NoSDst.HasOpSel>,1132 VCMPXNoSDstTable<0, opName#"_e64"> {1133 let Defs = [EXEC];1134 let SchedRW = P_NoSDst.Schedule;1135 let SubtargetPredicate = HasNoSdstCMPX;1136 let AsmMatchConverter = !cond(1137 P_NoSDst.HasOpSel : "cvtVOP3OpSel",1138 !or(P_NoSDst.HasModifiers, P_NoSDst.HasOMod, P_NoSDst.HasIntClamp) : "cvtVOP3",1139 1 : "");1140 }1141 1142 if P_NoSDst.HasExtSDWA then1143 def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> {1144 let Defs = [EXEC];1145 let SchedRW = P_NoSDst.Schedule;1146 let isConvergent = 1;1147 let SubtargetPredicate = HasNoSdstCMPX;1148 }1149 1150 let SubtargetPredicate = isGFX11Plus in {1151 if P.HasExtDPP then1152 def _nosdst_e32_dpp : VOP_DPP_Pseudo<opName#"_nosdst", P_NoSDst> {1153 let Defs = [EXEC];1154 let SchedRW = P_NoSDst.Schedule;1155 let isConvergent = 1;1156 let VOPC = 1;1157 let Constraints = "";1158 }1159 if P.HasExtVOP3DPP then1160 def _nosdst_e64_dpp : VOP3_DPP_Pseudo<opName#"_nosdst", P_NoSDst> {1161 let Defs = [EXEC];1162 let SchedRW = P_NoSDst.Schedule;1163 let Constraints = "";1164 }1165 } // end SubtargetPredicate = isGFX11Plus1166}1167} // End SubtargetPredicate = HasSdstCMPX1168} // End ReadsModeReg = 0, mayRaiseFPException = 01169 1170defm VOPC_I1_F16_I16 : VOPC_Class_Profile_t16<[Write32Bit]>;1171def VOPC_I1_F32_I32 : VOPC_Class_Profile<[Write32Bit], f32>;1172def VOPC_I1_F64_I32 : VOPC_Class_Profile<[WriteDoubleAdd], f64>;1173 1174defm VOPC_F16_I16 : VOPC_Class_NoSdst_Profile_t16<[Write32Bit]>;1175def VOPC_F32_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f32>;1176def VOPC_F64_I32 : VOPC_Class_NoSdst_Profile<[Write64Bit], f64>;1177 1178multiclass VOPC_CLASS_F16 <string opName> {1179 let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {1180 defm NAME : VOPC_Class_Pseudos <opName, VOPC_I1_F16_I16, 0>;1181 defm : VOPCClassPat64<NAME>;1182 }1183 let True16Predicate = UseRealTrue16Insts in {1184 defm _t16 : VOPC_Class_Pseudos <opName#"_t16", VOPC_I1_F16_I16_t16, 0>;1185 defm : VOPCClassPat64_t16<NAME>;1186 }1187 let True16Predicate = UseFakeTrue16Insts in {1188 defm _fake16 : VOPC_Class_Pseudos <opName#"_fake16", VOPC_I1_F16_I16_fake16, 0>;1189 defm : VOPCClassPat64_fake16<NAME>;1190 }1191}1192 1193multiclass VOPCX_CLASS_F16 <string opName> {1194 let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {1195 defm NAME : VOPCX_Class_Pseudos <opName, VOPC_I1_F16_I16, VOPC_F16_I16>;1196 }1197 let True16Predicate = UseRealTrue16Insts in {1198 defm _t16 : VOPCX_Class_Pseudos <opName#"_t16", VOPC_I1_F16_I16_t16, VOPC_F16_I16_t16>;1199 }1200 let True16Predicate = UseFakeTrue16Insts in {1201 defm _fake16 : VOPCX_Class_Pseudos <opName#"_fake16", VOPC_I1_F16_I16_fake16, VOPC_F16_I16_fake16>;1202 }1203}1204 1205multiclass VOPC_CLASS_F32 <string opName> {1206 defm NAME : VOPC_Class_Pseudos <opName, VOPC_I1_F32_I32, 0>;1207 defm : VOPCClassPat64<NAME>;1208}1209 1210multiclass VOPCX_CLASS_F32 <string opName> :1211 VOPCX_Class_Pseudos <opName, VOPC_I1_F32_I32, VOPC_F32_I32>;1212 1213multiclass VOPC_CLASS_F64 <string opName> {1214 defm NAME : VOPC_Class_Pseudos <opName, VOPC_I1_F64_I32, 0>;1215 defm : VOPCClassPat64<NAME>;1216}1217 1218multiclass VOPCX_CLASS_F64 <string opName> :1219 VOPCX_Class_Pseudos <opName, VOPC_I1_F64_I32, VOPC_F64_I32>;1220 1221defm V_CMP_CLASS_F32 : VOPC_CLASS_F32 <"v_cmp_class_f32">;1222defm V_CMPX_CLASS_F32 : VOPCX_CLASS_F32 <"v_cmpx_class_f32">;1223defm V_CMP_CLASS_F64 : VOPC_CLASS_F64 <"v_cmp_class_f64">;1224defm V_CMPX_CLASS_F64 : VOPCX_CLASS_F64 <"v_cmpx_class_f64">;1225 1226defm V_CMP_CLASS_F16 : VOPC_CLASS_F16 <"v_cmp_class_f16">;1227defm V_CMPX_CLASS_F16 : VOPCX_CLASS_F16 <"v_cmpx_class_f16">;1228 1229//===----------------------------------------------------------------------===//1230// V_ICMPIntrinsic Pattern.1231//===----------------------------------------------------------------------===//1232 1233// We need to use COPY_TO_REGCLASS to w/a the problem when ReplaceAllUsesWith()1234// complaints it cannot replace i1 <-> i64/i32 if node was not morphed in place.1235multiclass ICMP_Pattern <PatFrags cond, Instruction inst, ValueType vt, dag dstInst = (inst $src0, $src1)> {1236 def : GCNPat <1237 (WaveSizeVT (AMDGPUsetcc vt:$src0, vt:$src1, cond)),1238 dstInst1239 >;1240 1241 let WaveSizePredicate = isWave32 in {1242 // Support codegen of i64 setcc in wave32 mode.1243 def : GCNPat <1244 (i64 (AMDGPUsetcc vt:$src0, vt:$src1, cond)),1245 (i64 (REG_SEQUENCE SReg_64, dstInst, sub0, (S_MOV_B32 (i32 0)), sub1))1246 >;1247 }1248}1249 1250multiclass ICMP_Pattern_t16<PatFrags cond, Instruction inst, ValueType vt>1251 : ICMP_Pattern<cond, inst, vt, (inst 0, $src0, 0, $src1)>;1252 1253defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>;1254defm : ICMP_Pattern <COND_NE, V_CMP_NE_U32_e64, i32>;1255defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U32_e64, i32>;1256defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U32_e64, i32>;1257defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U32_e64, i32>;1258defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U32_e64, i32>;1259defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I32_e64, i32>;1260defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I32_e64, i32>;1261defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I32_e64, i32>;1262defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I32_e64, i32>;1263 1264defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>;1265defm : ICMP_Pattern <COND_NE, V_CMP_NE_U64_e64, i64>;1266defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U64_e64, i64>;1267defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U64_e64, i64>;1268defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U64_e64, i64>;1269defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U64_e64, i64>;1270defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I64_e64, i64>;1271defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I64_e64, i64>;1272defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I64_e64, i64>;1273defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I64_e64, i64>;1274 1275let True16Predicate = UseRealTrue16Insts in {1276defm : ICMP_Pattern_t16 <COND_EQ, V_CMP_EQ_U16_t16_e64, i16>;1277defm : ICMP_Pattern_t16 <COND_NE, V_CMP_NE_U16_t16_e64, i16>;1278defm : ICMP_Pattern_t16 <COND_UGT, V_CMP_GT_U16_t16_e64, i16>;1279defm : ICMP_Pattern_t16 <COND_UGE, V_CMP_GE_U16_t16_e64, i16>;1280defm : ICMP_Pattern_t16 <COND_ULT, V_CMP_LT_U16_t16_e64, i16>;1281defm : ICMP_Pattern_t16 <COND_ULE, V_CMP_LE_U16_t16_e64, i16>;1282defm : ICMP_Pattern_t16 <COND_SGT, V_CMP_GT_I16_t16_e64, i16>;1283defm : ICMP_Pattern_t16 <COND_SGE, V_CMP_GE_I16_t16_e64, i16>;1284defm : ICMP_Pattern_t16 <COND_SLT, V_CMP_LT_I16_t16_e64, i16>;1285defm : ICMP_Pattern_t16 <COND_SLE, V_CMP_LE_I16_t16_e64, i16>;1286} // End True16Predicate = UseRealTrue16Insts1287 1288let True16Predicate = UseFakeTrue16Insts in {1289defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_fake16_e64, i16>;1290defm : ICMP_Pattern <COND_NE, V_CMP_NE_U16_fake16_e64, i16>;1291defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U16_fake16_e64, i16>;1292defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U16_fake16_e64, i16>;1293defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U16_fake16_e64, i16>;1294defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U16_fake16_e64, i16>;1295defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I16_fake16_e64, i16>;1296defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I16_fake16_e64, i16>;1297defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I16_fake16_e64, i16>;1298defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I16_fake16_e64, i16>;1299} // End True16Predicate = UseFakeTrue16Insts1300 1301let True16Predicate = NotHasTrue16BitInsts in {1302defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_e64, i16>;1303defm : ICMP_Pattern <COND_NE, V_CMP_NE_U16_e64, i16>;1304defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U16_e64, i16>;1305defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U16_e64, i16>;1306defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U16_e64, i16>;1307defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U16_e64, i16>;1308defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I16_e64, i16>;1309defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I16_e64, i16>;1310defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I16_e64, i16>;1311defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I16_e64, i16>;1312} // End True16Predicate = NotHasTrue16BitInsts1313 1314multiclass FCMP_Pattern <PatFrags cond, Instruction inst, ValueType vt> {1315 let WaveSizePredicate = isWave64 in1316 def : GCNPat <1317 (i64 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)),1318 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)),1319 (i64 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1,1320 DSTCLAMP.NONE), SReg_64))1321 >;1322 1323 let WaveSizePredicate = isWave32 in {1324 def : GCNPat <1325 (i32 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)),1326 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)),1327 (i32 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1,1328 DSTCLAMP.NONE), SReg_32))1329 >;1330 1331 def : GCNPat <1332 (i64 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)),1333 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)),1334 (i64 (REG_SEQUENCE SReg_64, (inst $src0_modifiers, $src0, $src1_modifiers, $src1,1335 DSTCLAMP.NONE), sub0,1336 (S_MOV_B32 (i32 0)), sub1))1337 >;1338 }1339}1340 1341defm : FCMP_Pattern <COND_O, V_CMP_O_F32_e64, f32>;1342defm : FCMP_Pattern <COND_UO, V_CMP_U_F32_e64, f32>;1343defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F32_e64, f32>;1344defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F32_e64, f32>;1345defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F32_e64, f32>;1346defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F32_e64, f32>;1347defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F32_e64, f32>;1348defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F32_e64, f32>;1349 1350defm : FCMP_Pattern <COND_O, V_CMP_O_F64_e64, f64>;1351defm : FCMP_Pattern <COND_UO, V_CMP_U_F64_e64, f64>;1352defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F64_e64, f64>;1353defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F64_e64, f64>;1354defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F64_e64, f64>;1355defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F64_e64, f64>;1356defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F64_e64, f64>;1357defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F64_e64, f64>;1358 1359defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F32_e64, f32>;1360defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F32_e64, f32>;1361defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F32_e64, f32>;1362defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F32_e64, f32>;1363defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F32_e64, f32>;1364defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F32_e64, f32>;1365 1366defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F64_e64, f64>;1367defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F64_e64, f64>;1368defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F64_e64, f64>;1369defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F64_e64, f64>;1370defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F64_e64, f64>;1371defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F64_e64, f64>;1372 1373let True16Predicate = UseRealTrue16Insts in {1374defm : FCMP_Pattern <COND_O, V_CMP_O_F16_t16_e64, f16>;1375defm : FCMP_Pattern <COND_UO, V_CMP_U_F16_t16_e64, f16>;1376defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F16_t16_e64, f16>;1377defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F16_t16_e64, f16>;1378defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F16_t16_e64, f16>;1379defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F16_t16_e64, f16>;1380defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F16_t16_e64, f16>;1381defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F16_t16_e64, f16>;1382 1383defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F16_t16_e64, f16>;1384defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F16_t16_e64, f16>;1385defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F16_t16_e64, f16>;1386defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F16_t16_e64, f16>;1387defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F16_t16_e64, f16>;1388defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F16_t16_e64, f16>;1389} // End True16Predicate = UseRealTrue16Insts1390 1391let True16Predicate = UseFakeTrue16Insts in {1392defm : FCMP_Pattern <COND_O, V_CMP_O_F16_fake16_e64, f16>;1393defm : FCMP_Pattern <COND_UO, V_CMP_U_F16_fake16_e64, f16>;1394defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F16_fake16_e64, f16>;1395defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F16_fake16_e64, f16>;1396defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F16_fake16_e64, f16>;1397defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F16_fake16_e64, f16>;1398defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F16_fake16_e64, f16>;1399defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F16_fake16_e64, f16>;1400 1401defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F16_fake16_e64, f16>;1402defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F16_fake16_e64, f16>;1403defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F16_fake16_e64, f16>;1404defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F16_fake16_e64, f16>;1405defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F16_fake16_e64, f16>;1406defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F16_fake16_e64, f16>;1407} // End True16Predicate = UseFakeTrue16Insts1408 1409let True16Predicate = NotHasTrue16BitInsts in {1410defm : FCMP_Pattern <COND_O, V_CMP_O_F16_e64, f16>;1411defm : FCMP_Pattern <COND_UO, V_CMP_U_F16_e64, f16>;1412defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F16_e64, f16>;1413defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F16_e64, f16>;1414defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F16_e64, f16>;1415defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F16_e64, f16>;1416defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F16_e64, f16>;1417defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F16_e64, f16>;1418 1419defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F16_e64, f16>;1420defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F16_e64, f16>;1421defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F16_e64, f16>;1422defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F16_e64, f16>;1423defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F16_e64, f16>;1424defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F16_e64, f16>;1425} // End True16Predicate = NotHasTrue16BitInsts1426 1427//===----------------------------------------------------------------------===//1428// DPP Encodings1429//===----------------------------------------------------------------------===//1430 1431// VOPC321432 1433class VOPC_DPPe_Common<bits<8> op> : Enc64 {1434 bits<8> src1;1435 let Inst{16-9} = src1;1436 let Inst{24-17} = op;1437 let Inst{31-25} = 0x3e;1438}1439 1440class VOPC_DPP_Base<bits<8> op, string OpName, VOPProfile P>1441 : VOP_DPP_Base<OpName, P, P.InsDPP16, " " #P.AsmDPP16>,1442 VOPC_DPPe_Common<op> {1443 Instruction Opcode = !cast<Instruction>(NAME);1444 1445 bits<2> src0_modifiers;1446 bits<8> src0;1447 bits<2> src1_modifiers;1448 bits<9> dpp_ctrl;1449 bits<1> bound_ctrl;1450 bits<4> bank_mask;1451 bits<4> row_mask;1452 bit fi;1453 1454 let Inst{8-0} = 0xfa;1455 1456 let Inst{39-32} = !if (P.HasSrc0, src0{7-0}, 0);1457 let Inst{48-40} = dpp_ctrl;1458 let Inst{50} = fi;1459 let Inst{51} = bound_ctrl;1460 let Inst{52} = !if (P.HasSrc0Mods, src0_modifiers{0}, 0); // src0_neg1461 let Inst{53} = !if (P.HasSrc0Mods, src0_modifiers{1}, 0); // src0_abs1462 let Inst{54} = !if (P.HasSrc1Mods, src1_modifiers{0}, 0); // src1_neg1463 let Inst{55} = !if (P.HasSrc1Mods, src1_modifiers{1}, 0); // src1_abs1464 let Inst{59-56} = bank_mask;1465 let Inst{63-60} = row_mask;1466 1467 let AsmMatchConverter = "cvtDPP";1468 let VOPC = 1;1469}1470 1471class VOPC_DPP8_Base<bits<8> op, string OpName, VOPProfile P>1472 : VOP_DPP8_Base<OpName, P, P.InsDPP8, " " #P.AsmDPP8>,1473 VOPC_DPPe_Common<op> {1474 Instruction Opcode = !cast<Instruction>(NAME);1475 1476 bits<8> src0;1477 bits<24> dpp8;1478 bits<9> fi;1479 1480 let Inst{8-0} = fi;1481 1482 let Inst{39-32} = !if (P.HasSrc0, src0{7-0}, 0);1483 let Inst{63-40} = dpp8{23-0};1484 1485 let AsmMatchConverter = "cvtDPP8";1486 let VOPC = 1;1487}1488 1489class VOPC_DPP16<bits<8> op, VOP_DPP_Pseudo ps, string opName = ps.OpName>1490 : VOPC_DPP_Base<op, opName, ps.Pfl> {1491 let AssemblerPredicate = HasDPP16;1492 let SubtargetPredicate = HasDPP16;1493 let True16Predicate = ps.True16Predicate;1494 let hasSideEffects = ps.hasSideEffects;1495 let Defs = ps.Defs;1496 let SchedRW = ps.SchedRW;1497 let Uses = ps.Uses;1498 let OtherPredicates = ps.OtherPredicates;1499 let Constraints = ps.Constraints;1500}1501 1502class VOPC_DPP16_SIMC<bits<8> op, VOP_DPP_Pseudo ps, int subtarget,1503 string opName = ps.OpName>1504 : VOPC_DPP16<op, ps, opName>, SIMCInstr<ps.PseudoInstr, subtarget>;1505 1506class VOPC_DPP8<bits<8> op, VOPC_Pseudo ps, string opName = ps.OpName>1507 : VOPC_DPP8_Base<op, opName, ps.Pfl> {1508 // Note ps is the non-dpp pseudo1509 let hasSideEffects = ps.hasSideEffects;1510 let Defs = ps.Defs;1511 let SchedRW = ps.SchedRW;1512 let Uses = ps.Uses;1513 let OtherPredicates = ps.OtherPredicates;1514 let True16Predicate = ps.True16Predicate;1515 let Constraints = "";1516}1517 1518// VOPC641519 1520class VOPC64_DPP<VOP_DPP_Pseudo ps, string opName = ps.OpName>1521 : VOP3_DPP_Base<opName, ps.Pfl, 1> {1522 Instruction Opcode = !cast<Instruction>(NAME);1523 let AssemblerPredicate = HasDPP16;1524 let SubtargetPredicate = HasDPP16;1525 let True16Predicate = ps.True16Predicate;1526 let hasSideEffects = ps.hasSideEffects;1527 let Defs = ps.Defs;1528 let SchedRW = ps.SchedRW;1529 let Uses = ps.Uses;1530 let OtherPredicates = ps.OtherPredicates;1531 let Constraints = ps.Constraints;1532}1533 1534class VOPC64_DPP16_Dst<bits<10> op, VOP_DPP_Pseudo ps,1535 string opName = ps.OpName>1536 : VOPC64_DPP<ps, opName>, VOP3_DPP_Enc<op, ps.Pfl, 1> {1537 bits<8> sdst;1538 let Inst{7-0} = sdst;1539}1540 1541class VOPC64_DPP16_NoDst<bits<10> op, VOP_DPP_Pseudo ps,1542 string opName = ps.OpName>1543 : VOPC64_DPP<ps, opName>, VOP3_DPP_Enc<op, ps.Pfl, 1> {1544 let Inst{7-0} = ?;1545}1546 1547class VOPC64_DPP16_Dst_t16<bits<10> op, VOP_DPP_Pseudo ps,1548 string opName = ps.OpName>1549 : VOPC64_DPP<ps, opName>, VOP3_DPP_Enc_t16<op, ps.Pfl, 1> {1550 bits<8> sdst;1551 let Inst{7-0} = sdst;1552 let Inst{14} = 0;1553}1554 1555class VOPC64_DPP16_NoDst_t16<bits<10> op, VOP_DPP_Pseudo ps,1556 string opName = ps.OpName>1557 : VOPC64_DPP<ps, opName>, VOP3_DPP_Enc_t16<op, ps.Pfl, 1> {1558 let Inst{7-0} = ?;1559 let Inst{14} = 0;1560}1561 1562class VOPC64_DPP8<VOP_Pseudo ps, string opName = ps.OpName>1563 : VOP3_DPP8_Base<opName, ps.Pfl> {1564 Instruction Opcode = !cast<Instruction>(NAME);1565 // Note ps is the non-dpp pseudo1566 let hasSideEffects = ps.hasSideEffects;1567 let Defs = ps.Defs;1568 let SchedRW = ps.SchedRW;1569 let Uses = ps.Uses;1570 let OtherPredicates = ps.OtherPredicates;1571 let True16Predicate = ps.True16Predicate;1572}1573 1574class VOPC64_DPP8_Dst<bits<10> op, VOP_Pseudo ps, string opName = ps.OpName>1575 : VOPC64_DPP8<ps, opName>, VOP3_DPP8_Enc<op, ps.Pfl> {1576 bits<8> sdst;1577 let Inst{7-0} = sdst;1578 let Constraints = "";1579}1580 1581class VOPC64_DPP8_NoDst<bits<10> op, VOP_Pseudo ps, string opName = ps.OpName>1582 : VOPC64_DPP8<ps, opName>, VOP3_DPP8_Enc<op, ps.Pfl> {1583 let Inst{7-0} = ?;1584 let Constraints = "";1585}1586 1587class VOPC64_DPP8_Dst_t16<bits<10> op, VOP_Pseudo ps, string opName = ps.OpName>1588 : VOPC64_DPP8<ps, opName>, VOP3_DPP8_Enc_t16<op, ps.Pfl> {1589 bits<8> sdst;1590 let Inst{7-0} = sdst;1591 let Inst{14} = 0;1592 let Constraints = "";1593}1594 1595class VOPC64_DPP8_NoDst_t16<bits<10> op, VOP_Pseudo ps, string opName = ps.OpName>1596 : VOPC64_DPP8<ps, opName>, VOP3_DPP8_Enc_t16<op, ps.Pfl> {1597 let Inst{7-0} = ?;1598 let Inst{14} = 0;1599 let Constraints = "";1600}1601 1602//===----------------------------------------------------------------------===//1603// Target-specific instruction encodings.1604//===----------------------------------------------------------------------===//1605 1606//===----------------------------------------------------------------------===//1607// GFX11, GFX121608//===----------------------------------------------------------------------===//1609 1610multiclass VOPC_Real_Base<GFXGen Gen, bits<9> op> {1611 let AssemblerPredicate = Gen.AssemblerPredicate, DecoderNamespace = Gen.DecoderNamespace in {1612 defvar ps32 = !cast<VOPC_Pseudo>(NAME#"_e32");1613 defvar ps64 = !cast<VOP3_Pseudo>(NAME#"_e64");1614 def _e32#Gen.Suffix : VOPC_Real<ps32, Gen.Subtarget>,1615 VOPCe<op{7-0}>;1616 def _e64#Gen.Suffix : VOP3_Real_Gen<ps64, Gen>,1617 VOP3a_gfx11_gfx12<{0, op}, ps64.Pfl> {1618 // Encoding used for VOPC instructions encoded as VOP3 differs from1619 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst.1620 bits<8> sdst;1621 let Inst{7-0} = sdst;1622 }1623 1624 defm : VOPCInstAliases<NAME, !substr(Gen.Suffix,1)>;1625 1626 if ps32.Pfl.HasExtDPP then {1627 defvar psDPP = !cast<VOP_DPP_Pseudo>(NAME #"_e32" #"_dpp");1628 defvar AsmDPP = ps32.Pfl.AsmDPP16;1629 def _e32_dpp#Gen.Suffix : VOPC_DPP16_SIMC<op{7-0}, psDPP, Gen.Subtarget>;1630 def _e32_dpp_w32#Gen.Suffix : VOPC_DPP16<op{7-0}, psDPP> {1631 let AsmString = psDPP.OpName # " vcc_lo, " # AsmDPP;1632 let isAsmParserOnly = 1;1633 let WaveSizePredicate = isWave32;1634 }1635 def _e32_dpp_w64#Gen.Suffix : VOPC_DPP16<op{7-0}, psDPP> {1636 let AsmString = psDPP.OpName # " vcc, " # AsmDPP;1637 let isAsmParserOnly = 1;1638 let WaveSizePredicate = isWave64;1639 }1640 defvar AsmDPP8 = ps32.Pfl.AsmDPP8;1641 def _e32_dpp8#Gen.Suffix : VOPC_DPP8<op{7-0}, ps32>;1642 def _e32_dpp8_w32#Gen.Suffix : VOPC_DPP8<op{7-0}, ps32> {1643 let AsmString = ps32.OpName # " vcc_lo, " # AsmDPP8;1644 let isAsmParserOnly = 1;1645 let WaveSizePredicate = isWave32;1646 }1647 def _e32_dpp8_w64#Gen.Suffix : VOPC_DPP8<op{7-0}, ps32> {1648 let AsmString = ps32.OpName # " vcc, " # AsmDPP8;1649 let isAsmParserOnly = 1;1650 let WaveSizePredicate = isWave64;1651 }1652 }1653 if ps64.Pfl.HasExtVOP3DPP then {1654 defvar psDPP = !cast<VOP_DPP_Pseudo>(NAME #"_e64" #"_dpp");1655 def _e64_dpp#Gen.Suffix : VOPC64_DPP16_Dst<{0, op}, psDPP>,1656 SIMCInstr<psDPP.PseudoInstr, Gen.Subtarget>;1657 def _e64_dpp8#Gen.Suffix : VOPC64_DPP8_Dst<{0, op}, ps64>;1658 }1659 } // AssemblerPredicate = Gen.AssemblerPredicate, DecoderNamespace = Gen.DecoderNamespace1660}1661 1662multiclass VOPC_Real_with_name<GFXGen Gen, bits<9> op, string OpName,1663 string asm_name, string pseudo_mnemonic = ""> {1664 defvar ps32 = !cast<VOPC_Pseudo>(OpName#"_e32");1665 defvar ps64 = !cast<VOP3_Pseudo>(OpName#"_e64");1666 let AssemblerPredicate = Gen.AssemblerPredicate in {1667 def : AMDGPUMnemonicAlias<!if(!empty(pseudo_mnemonic), ps32.Mnemonic,1668 pseudo_mnemonic),1669 asm_name, ps32.AsmVariantName>;1670 def : AMDGPUMnemonicAlias<!if(!empty(pseudo_mnemonic), ps64.Mnemonic,1671 pseudo_mnemonic),1672 asm_name, ps64.AsmVariantName>;1673 1674 let DecoderNamespace = Gen.DecoderNamespace # !if(ps32.Pfl.IsRealTrue16, "", "_FAKE16") in {1675 def _e32#Gen.Suffix :1676 // 32 and 64 bit forms of the instruction have _e32 and _e641677 // respectively appended to their assembly mnemonic.1678 // _e64 is printed as part of the VOPDstS64orS32 operand, whereas1679 // the destination-less 32bit forms add it to the asmString here.1680 VOPC_Real<ps32, Gen.Subtarget, asm_name#"_e32">,1681 VOPCe<op{7-0}>;1682 if ps64.Pfl.IsRealTrue16 then {1683 def _e64#Gen.Suffix :1684 VOP3_Real_Gen<ps64, Gen, asm_name>,1685 VOP3e_t16_gfx11_gfx12<{0, op}, ps64.Pfl> {1686 // Encoding used for VOPC instructions encoded as VOP3 differs from1687 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst.1688 bits<8> sdst;1689 let Inst{7-0} = sdst;1690 let Inst{14} = 0;1691 }1692 } else {1693 def _e64#Gen.Suffix :1694 VOP3_Real_Gen<ps64, Gen, asm_name>,1695 VOP3a_gfx11_gfx12<{0, op}, ps64.Pfl> {1696 // Encoding used for VOPC instructions encoded as VOP3 differs from1697 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst.1698 bits<8> sdst;1699 let Inst{7-0} = sdst;1700 }1701 }1702 1703 defm : VOPCInstAliases<OpName, !substr(Gen.Suffix, 1), NAME, asm_name>;1704 1705 if ps32.Pfl.HasExtDPP then {1706 defvar psDPP = !cast<VOP_DPP_Pseudo>(OpName #"_e32" #"_dpp");1707 defvar AsmDPP = ps32.Pfl.AsmDPP16;1708 def _e32_dpp#Gen.Suffix : VOPC_DPP16_SIMC<op{7-0}, psDPP,1709 Gen.Subtarget, asm_name>;1710 def _e32_dpp_w32#Gen.Suffix1711 : VOPC_DPP16<op{7-0}, psDPP, asm_name> {1712 let AsmString = asm_name # " vcc_lo, " # AsmDPP;1713 let isAsmParserOnly = 1;1714 let WaveSizePredicate = isWave32;1715 }1716 def _e32_dpp_w64#Gen.Suffix1717 : VOPC_DPP16<op{7-0}, psDPP, asm_name> {1718 let AsmString = asm_name # " vcc, " # AsmDPP;1719 let isAsmParserOnly = 1;1720 let WaveSizePredicate = isWave64;1721 }1722 defvar AsmDPP8 = ps32.Pfl.AsmDPP8;1723 def _e32_dpp8#Gen.Suffix : VOPC_DPP8<op{7-0}, ps32, asm_name>;1724 def _e32_dpp8_w32#Gen.Suffix1725 : VOPC_DPP8<op{7-0}, ps32, asm_name> {1726 let AsmString = asm_name # " vcc_lo, " # AsmDPP8;1727 let isAsmParserOnly = 1;1728 let WaveSizePredicate = isWave32;1729 }1730 def _e32_dpp8_w64#Gen.Suffix1731 : VOPC_DPP8<op{7-0}, ps32, asm_name> {1732 let AsmString = asm_name # " vcc, " # AsmDPP8;1733 let isAsmParserOnly = 1;1734 let WaveSizePredicate = isWave64;1735 }1736 }1737 1738 if ps64.Pfl.HasExtVOP3DPP then {1739 defvar psDPP = !cast<VOP_DPP_Pseudo>(OpName #"_e64" #"_dpp");1740 if ps64.Pfl.IsRealTrue16 then {1741 def _e64_dpp#Gen.Suffix : VOPC64_DPP16_Dst_t16<{0, op}, psDPP, asm_name>,1742 SIMCInstr<psDPP.PseudoInstr, Gen.Subtarget>;1743 def _e64_dpp8#Gen.Suffix : VOPC64_DPP8_Dst_t16<{0, op}, ps64, asm_name>;1744 } else {1745 def _e64_dpp#Gen.Suffix : VOPC64_DPP16_Dst<{0, op}, psDPP, asm_name>,1746 SIMCInstr<psDPP.PseudoInstr, Gen.Subtarget>;1747 def _e64_dpp8#Gen.Suffix : VOPC64_DPP8_Dst<{0, op}, ps64, asm_name>;1748 }1749 } // end if ps64.Pfl.HasExtVOP3DPP1750 } // End DecoderNamespace1751 } // End AssemblerPredicate1752}1753 1754multiclass VOPC_Real_t16<GFXGen Gen, bits<9> op, string asm_name,1755 string OpName = NAME, string pseudo_mnemonic = ""> :1756 VOPC_Real_with_name<Gen, op, OpName, asm_name, pseudo_mnemonic>;1757 1758multiclass VOPCX_Real<GFXGen Gen, bits<9> op> {1759 let AssemblerPredicate = Gen.AssemblerPredicate, DecoderNamespace = Gen.DecoderNamespace in {1760 defvar ps32 = !cast<VOPC_Pseudo>(NAME#"_nosdst_e32");1761 defvar ps64 = !cast<VOP3_Pseudo>(NAME#"_nosdst_e64");1762 def _e32#Gen.Suffix :1763 VOPC_Real<ps32, Gen.Subtarget>,1764 VOPCe<op{7-0}> {1765 let AsmString = !subst("_nosdst", "", ps32.PseudoInstr)1766 # " " # ps32.AsmOperands;1767 }1768 def _e64#Gen.Suffix :1769 VOP3_Real_Gen<ps64, Gen>,1770 VOP3a_gfx11_gfx12<{0, op}, ps64.Pfl> {1771 let Inst{7-0} = ?; // sdst1772 let AsmString = !subst("_nosdst", "", ps64.Mnemonic)1773 # "{_e64} " # ps64.AsmOperands;1774 }1775 1776 defm : VOPCXInstAliases<NAME, !substr(Gen.Suffix, 1)>;1777 1778 if ps32.Pfl.HasExtDPP then {1779 defvar psDPP = !cast<VOP_DPP_Pseudo>(NAME #"_nosdst_e32" #"_dpp");1780 defvar AsmDPP = ps32.Pfl.AsmDPP16;1781 def _e32_dpp#Gen.Suffix1782 : VOPC_DPP16_SIMC<op{7-0}, psDPP, Gen.Subtarget> {1783 let AsmString = !subst("_nosdst", "", psDPP.OpName) # " " # AsmDPP;1784 }1785 defvar AsmDPP8 = ps32.Pfl.AsmDPP8;1786 def _e32_dpp8#Gen.Suffix : VOPC_DPP8<op{7-0}, ps32> {1787 let AsmString = !subst("_nosdst", "", ps32.OpName) # " " # AsmDPP8;1788 }1789 }1790 1791 if ps64.Pfl.HasExtVOP3DPP then {1792 defvar psDPP = !cast<VOP_DPP_Pseudo>(NAME #"_nosdst_e64" #"_dpp");1793 defvar AsmDPP = ps64.Pfl.AsmVOP3DPP16;1794 def _e64_dpp#Gen.Suffix1795 : VOPC64_DPP16_NoDst<{0, op}, psDPP>,1796 SIMCInstr<psDPP.PseudoInstr, Gen.Subtarget> {1797 let AsmString = !subst("_nosdst", "", psDPP.OpName)1798 # "{_e64_dpp} " # AsmDPP;1799 }1800 defvar AsmDPP8 = ps64.Pfl.AsmVOP3DPP8;1801 def _e64_dpp8#Gen.Suffix : VOPC64_DPP8_NoDst<{0, op}, ps64> {1802 let AsmString = !subst("_nosdst", "", ps64.OpName)1803 # "{_e64_dpp} " # AsmDPP8;1804 }1805 }1806 } // End AssemblerPredicate = Gen.AssemblerPredicate, DecoderNamespace = Gen.DecoderNamespace1807}1808 1809multiclass VOPCX_Real_with_name<GFXGen Gen, bits<9> op, string OpName,1810 string asm_name, string pseudo_mnemonic = ""> {1811 defvar ps32 = !cast<VOPC_Pseudo>(OpName#"_nosdst_e32");1812 defvar ps64 = !cast<VOP3_Pseudo>(OpName#"_nosdst_e64");1813 let AssemblerPredicate = Gen.AssemblerPredicate in {1814 def : AMDGPUMnemonicAlias<!if(!empty(pseudo_mnemonic), !subst("_nosdst", "", ps32.Mnemonic),1815 pseudo_mnemonic),1816 asm_name, ps32.AsmVariantName>;1817 def : AMDGPUMnemonicAlias<!if(!empty(pseudo_mnemonic), !subst("_nosdst", "", ps64.Mnemonic),1818 pseudo_mnemonic),1819 asm_name, ps64.AsmVariantName>;1820 1821 let DecoderNamespace = Gen.DecoderNamespace # !if(ps32.Pfl.IsRealTrue16, "", "_FAKE16") in {1822 def _e32#Gen.Suffix1823 : VOPC_Real<ps32, Gen.Subtarget, asm_name>,1824 VOPCe<op{7-0}> {1825 let AsmString = asm_name # "{_e32} " # ps32.AsmOperands;1826 }1827 1828 if ps64.Pfl.IsRealTrue16 then {1829 def _e64#Gen.Suffix1830 : VOP3_Real_Gen<ps64, Gen, asm_name>,1831 VOP3e_t16_gfx11_gfx12<{0, op}, ps64.Pfl> {1832 let Inst{7-0} = ?; // sdst1833 let Inst{14} = 0;1834 let AsmString = asm_name # "{_e64} " # ps64.AsmOperands;1835 }1836 } else {1837 def _e64#Gen.Suffix1838 : VOP3_Real_Gen<ps64, Gen, asm_name>,1839 VOP3a_gfx11_gfx12<{0, op}, ps64.Pfl> {1840 let Inst{7-0} = ?; // sdst1841 let AsmString = asm_name # "{_e64} " # ps64.AsmOperands;1842 }1843 }1844 1845 defm : VOPCXInstAliases<OpName, !substr(Gen.Suffix, 1), NAME, asm_name>;1846 1847 if ps32.Pfl.HasExtDPP then {1848 defvar psDPP = !cast<VOP_DPP_Pseudo>(OpName#"_nosdst_e32"#"_dpp");1849 def _e32_dpp#Gen.Suffix : VOPC_DPP16_SIMC<op{7-0}, psDPP,1850 Gen.Subtarget, asm_name>;1851 def _e32_dpp8#Gen.Suffix : VOPC_DPP8<op{7-0}, ps32, asm_name>;1852 }1853 if ps64.Pfl.HasExtVOP3DPP then {1854 defvar psDPP = !cast<VOP_DPP_Pseudo>(OpName#"_nosdst_e64"#"_dpp");1855 defvar AsmDPP = ps64.Pfl.AsmVOP3DPP16;1856 defvar AsmDPP8 = ps64.Pfl.AsmVOP3DPP8;1857 if ps64.Pfl.IsRealTrue16 then {1858 def _e64_dpp#Gen.Suffix1859 : VOPC64_DPP16_NoDst_t16<{0, op}, psDPP, asm_name>,1860 SIMCInstr<psDPP.PseudoInstr, Gen.Subtarget> {1861 let AsmString = asm_name # "{_e64_dpp} " # AsmDPP;1862 }1863 def _e64_dpp8#Gen.Suffix : VOPC64_DPP8_NoDst_t16<{0, op}, ps64, asm_name> {1864 let AsmString = asm_name # "{_e64_dpp} " # AsmDPP8;1865 }1866 } else {1867 def _e64_dpp#Gen.Suffix1868 : VOPC64_DPP16_NoDst<{0, op}, psDPP, asm_name>,1869 SIMCInstr<psDPP.PseudoInstr, Gen.Subtarget> {1870 let AsmString = asm_name # "{_e64_dpp} " # AsmDPP;1871 }1872 def _e64_dpp8#Gen.Suffix : VOPC64_DPP8_NoDst<{0, op}, ps64, asm_name> {1873 let AsmString = asm_name # "{_e64_dpp} " # AsmDPP8;1874 }1875 }1876 } // End if ps64.Pfl.HasExtVOP3DPP1877 } // End DecoderNamespace1878 } // End AssemblerPredicate1879}1880 1881multiclass VOPCX_Real_t16<GFXGen Gen, bits<9> op, string asm_name,1882 string OpName = NAME, string pseudo_mnemonic = ""> :1883 VOPCX_Real_with_name<Gen, op, OpName, asm_name, pseudo_mnemonic>;1884 1885multiclass VOPC_Real_gfx11<bits<9> op> : VOPC_Real_Base<GFX11Gen, op>;1886 1887multiclass VOPC_Real_with_name_gfx11<bits<9> op, string OpName, string asm_name,1888 string pseudo_mnemonic = "">1889 : VOPC_Real_with_name<GFX11Gen, op, OpName, asm_name, pseudo_mnemonic>;1890 1891multiclass VOPCX_Real_gfx11<bits<9> op> : VOPCX_Real<GFX11Gen, op>;1892 1893multiclass VOPCX_Real_with_name_gfx11<bits<9> op, string OpName,1894 string asm_name, string pseudo_mnemonic = ""> :1895 VOPCX_Real_with_name<GFX11Gen, op, OpName, asm_name, pseudo_mnemonic>;1896 1897multiclass VOPC_Real_gfx11_gfx12<bits<9> op> :1898 VOPC_Real_Base<GFX11Gen, op>, VOPC_Real_Base<GFX12Gen, op>;1899 1900multiclass VOPCX_Real_gfx11_gfx12<bits<9> op> :1901 VOPCX_Real<GFX11Gen, op>, VOPCX_Real<GFX12Gen, op>;1902 1903multiclass VOPC_Real_t16_gfx11<bits <9> op, string asm_name,1904 string OpName = NAME, string pseudo_mnemonic = ""> :1905 VOPC_Real_t16<GFX11Gen, op, asm_name, OpName, pseudo_mnemonic>;1906 1907multiclass VOPC_Real_t16_and_fake16_gfx11<bits <9> op, string asm_name,1908 string OpName = NAME, string pseudo_mnemonic = ""> {1909 defm _t16: VOPC_Real_t16_gfx11<op, asm_name, OpName#"_t16", pseudo_mnemonic>;1910 defm _fake16: VOPC_Real_t16_gfx11<op, asm_name, OpName#"_fake16", pseudo_mnemonic>;1911}1912 1913multiclass VOPC_Real_t16_gfx11_gfx12<bits <9> op, string asm_name,1914 string OpName = NAME, string pseudo_mnemonic = ""> :1915 VOPC_Real_t16<GFX11Gen, op, asm_name, OpName, pseudo_mnemonic>,1916 VOPC_Real_t16<GFX12Gen, op, asm_name, OpName, pseudo_mnemonic>;1917 1918multiclass VOPC_Real_t16_and_fake16_gfx11_gfx12<bits <9> op, string asm_name,1919 string OpName = NAME, string pseudo_mnemonic = ""> {1920 defm _t16: VOPC_Real_t16_gfx11_gfx12<op, asm_name, OpName#"_t16", pseudo_mnemonic>;1921 defm _fake16: VOPC_Real_t16_gfx11_gfx12<op, asm_name, OpName#"_fake16", pseudo_mnemonic>;1922}1923 1924multiclass VOPCX_Real_t16_gfx11<bits<9> op, string asm_name,1925 string OpName = NAME, string pseudo_mnemonic = ""> :1926 VOPCX_Real_t16<GFX11Gen, op, asm_name, OpName, pseudo_mnemonic>;1927 1928multiclass VOPCX_Real_t16_and_fake16_gfx11<bits<9> op, string asm_name,1929 string OpName = NAME, string pseudo_mnemonic = ""> {1930 defm _t16: VOPCX_Real_t16_gfx11<op, asm_name, OpName#"_t16", pseudo_mnemonic>;1931 defm _fake16: VOPCX_Real_t16_gfx11<op, asm_name, OpName#"_fake16", pseudo_mnemonic>;1932}1933 1934multiclass VOPCX_Real_t16_gfx11_gfx12<bits<9> op, string asm_name,1935 string OpName = NAME, string pseudo_mnemonic = ""> :1936 VOPCX_Real_t16<GFX11Gen, op, asm_name, OpName, pseudo_mnemonic>,1937 VOPCX_Real_t16<GFX12Gen, op, asm_name, OpName, pseudo_mnemonic>;1938 1939multiclass VOPCX_Real_t16_and_fake16_gfx11_gfx12<bits<9> op, string asm_name,1940 string OpName = NAME, string pseudo_mnemonic = ""> {1941 defm _t16: VOPCX_Real_t16_gfx11_gfx12<op, asm_name, OpName#"_t16", pseudo_mnemonic>;1942 defm _fake16: VOPCX_Real_t16_gfx11_gfx12<op, asm_name, OpName#"_fake16", pseudo_mnemonic>;1943}1944 1945defm V_CMP_F_F16 : VOPC_Real_t16_and_fake16_gfx11<0x000, "v_cmp_f_f16">;1946defm V_CMP_LT_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x001, "v_cmp_lt_f16">;1947defm V_CMP_EQ_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x002, "v_cmp_eq_f16">;1948defm V_CMP_LE_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x003, "v_cmp_le_f16">;1949defm V_CMP_GT_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x004, "v_cmp_gt_f16">;1950defm V_CMP_LG_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x005, "v_cmp_lg_f16">;1951defm V_CMP_GE_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x006, "v_cmp_ge_f16">;1952defm V_CMP_O_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x007, "v_cmp_o_f16">;1953defm V_CMP_U_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x008, "v_cmp_u_f16">;1954defm V_CMP_NGE_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x009, "v_cmp_nge_f16">;1955defm V_CMP_NLG_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x00a, "v_cmp_nlg_f16">;1956defm V_CMP_NGT_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x00b, "v_cmp_ngt_f16">;1957defm V_CMP_NLE_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x00c, "v_cmp_nle_f16">;1958defm V_CMP_NEQ_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x00d, "v_cmp_neq_f16">;1959defm V_CMP_NLT_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x00e, "v_cmp_nlt_f16">;1960defm V_CMP_T_F16 : VOPC_Real_t16_and_fake16_gfx11<0x00f, "v_cmp_t_f16", "V_CMP_TRU_F16", "v_cmp_tru_f16">;1961 1962defm V_CMP_F_F32 : VOPC_Real_gfx11<0x010>;1963defm V_CMP_LT_F32 : VOPC_Real_gfx11_gfx12<0x011>;1964defm V_CMP_EQ_F32 : VOPC_Real_gfx11_gfx12<0x012>;1965defm V_CMP_LE_F32 : VOPC_Real_gfx11_gfx12<0x013>;1966defm V_CMP_GT_F32 : VOPC_Real_gfx11_gfx12<0x014>;1967defm V_CMP_LG_F32 : VOPC_Real_gfx11_gfx12<0x015>;1968defm V_CMP_GE_F32 : VOPC_Real_gfx11_gfx12<0x016>;1969defm V_CMP_O_F32 : VOPC_Real_gfx11_gfx12<0x017>;1970defm V_CMP_U_F32 : VOPC_Real_gfx11_gfx12<0x018>;1971defm V_CMP_NGE_F32 : VOPC_Real_gfx11_gfx12<0x019>;1972defm V_CMP_NLG_F32 : VOPC_Real_gfx11_gfx12<0x01a>;1973defm V_CMP_NGT_F32 : VOPC_Real_gfx11_gfx12<0x01b>;1974defm V_CMP_NLE_F32 : VOPC_Real_gfx11_gfx12<0x01c>;1975defm V_CMP_NEQ_F32 : VOPC_Real_gfx11_gfx12<0x01d>;1976defm V_CMP_NLT_F32 : VOPC_Real_gfx11_gfx12<0x01e>;1977defm V_CMP_T_F32 : VOPC_Real_with_name_gfx11<0x01f, "V_CMP_TRU_F32", "v_cmp_t_f32">;1978defm V_CMP_T_F64 : VOPC_Real_with_name_gfx11<0x02f, "V_CMP_TRU_F64", "v_cmp_t_f64">;1979 1980defm V_CMP_LT_I16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x031, "v_cmp_lt_i16">;1981defm V_CMP_EQ_I16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x032, "v_cmp_eq_i16">;1982defm V_CMP_LE_I16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x033, "v_cmp_le_i16">;1983defm V_CMP_GT_I16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x034, "v_cmp_gt_i16">;1984defm V_CMP_NE_I16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x035, "v_cmp_ne_i16">;1985defm V_CMP_GE_I16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x036, "v_cmp_ge_i16">;1986defm V_CMP_LT_U16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x039, "v_cmp_lt_u16">;1987defm V_CMP_EQ_U16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x03a, "v_cmp_eq_u16">;1988defm V_CMP_LE_U16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x03b, "v_cmp_le_u16">;1989defm V_CMP_GT_U16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x03c, "v_cmp_gt_u16">;1990defm V_CMP_NE_U16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x03d, "v_cmp_ne_u16">;1991defm V_CMP_GE_U16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x03e, "v_cmp_ge_u16">;1992 1993defm V_CMP_F_I32 : VOPC_Real_gfx11<0x040>;1994defm V_CMP_LT_I32 : VOPC_Real_gfx11_gfx12<0x041>;1995defm V_CMP_EQ_I32 : VOPC_Real_gfx11_gfx12<0x042>;1996defm V_CMP_LE_I32 : VOPC_Real_gfx11_gfx12<0x043>;1997defm V_CMP_GT_I32 : VOPC_Real_gfx11_gfx12<0x044>;1998defm V_CMP_NE_I32 : VOPC_Real_gfx11_gfx12<0x045>;1999defm V_CMP_GE_I32 : VOPC_Real_gfx11_gfx12<0x046>;2000defm V_CMP_T_I32 : VOPC_Real_gfx11<0x047>;2001defm V_CMP_F_U32 : VOPC_Real_gfx11<0x048>;2002defm V_CMP_LT_U32 : VOPC_Real_gfx11_gfx12<0x049>;2003defm V_CMP_EQ_U32 : VOPC_Real_gfx11_gfx12<0x04a>;2004defm V_CMP_LE_U32 : VOPC_Real_gfx11_gfx12<0x04b>;2005defm V_CMP_GT_U32 : VOPC_Real_gfx11_gfx12<0x04c>;2006defm V_CMP_NE_U32 : VOPC_Real_gfx11_gfx12<0x04d>;2007defm V_CMP_GE_U32 : VOPC_Real_gfx11_gfx12<0x04e>;2008defm V_CMP_T_U32 : VOPC_Real_gfx11<0x04f>;2009 2010defm V_CMP_F_I64 : VOPC_Real_gfx11<0x050>;2011defm V_CMP_LT_I64 : VOPC_Real_gfx11_gfx12<0x051>;2012defm V_CMP_EQ_I64 : VOPC_Real_gfx11_gfx12<0x052>;2013defm V_CMP_LE_I64 : VOPC_Real_gfx11_gfx12<0x053>;2014defm V_CMP_GT_I64 : VOPC_Real_gfx11_gfx12<0x054>;2015defm V_CMP_NE_I64 : VOPC_Real_gfx11_gfx12<0x055>;2016defm V_CMP_GE_I64 : VOPC_Real_gfx11_gfx12<0x056>;2017defm V_CMP_T_I64 : VOPC_Real_gfx11<0x057>;2018defm V_CMP_F_U64 : VOPC_Real_gfx11<0x058>;2019defm V_CMP_LT_U64 : VOPC_Real_gfx11_gfx12<0x059>;2020defm V_CMP_EQ_U64 : VOPC_Real_gfx11_gfx12<0x05a>;2021defm V_CMP_LE_U64 : VOPC_Real_gfx11_gfx12<0x05b>;2022defm V_CMP_GT_U64 : VOPC_Real_gfx11_gfx12<0x05c>;2023defm V_CMP_NE_U64 : VOPC_Real_gfx11_gfx12<0x05d>;2024defm V_CMP_GE_U64 : VOPC_Real_gfx11_gfx12<0x05e>;2025defm V_CMP_T_U64 : VOPC_Real_gfx11<0x05f>;2026 2027defm V_CMP_CLASS_F16 : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x07d, "v_cmp_class_f16">;2028defm V_CMP_CLASS_F32 : VOPC_Real_gfx11_gfx12<0x07e>;2029defm V_CMP_CLASS_F64 : VOPC_Real_gfx11_gfx12<0x07f>;2030 2031defm V_CMPX_F_F16 : VOPCX_Real_t16_and_fake16_gfx11<0x080, "v_cmpx_f_f16">;2032defm V_CMPX_LT_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x081, "v_cmpx_lt_f16">;2033defm V_CMPX_EQ_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x082, "v_cmpx_eq_f16">;2034defm V_CMPX_LE_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x083, "v_cmpx_le_f16">;2035defm V_CMPX_GT_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x084, "v_cmpx_gt_f16">;2036defm V_CMPX_LG_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x085, "v_cmpx_lg_f16">;2037defm V_CMPX_GE_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x086, "v_cmpx_ge_f16">;2038defm V_CMPX_O_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x087, "v_cmpx_o_f16">;2039defm V_CMPX_U_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x088, "v_cmpx_u_f16">;2040defm V_CMPX_NGE_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x089, "v_cmpx_nge_f16">;2041defm V_CMPX_NLG_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x08a, "v_cmpx_nlg_f16">;2042defm V_CMPX_NGT_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x08b, "v_cmpx_ngt_f16">;2043defm V_CMPX_NLE_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x08c, "v_cmpx_nle_f16">;2044defm V_CMPX_NEQ_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x08d, "v_cmpx_neq_f16">;2045defm V_CMPX_NLT_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x08e, "v_cmpx_nlt_f16">;2046defm V_CMPX_T_F16 : VOPCX_Real_t16_and_fake16_gfx11<0x08f, "v_cmpx_t_f16", "V_CMPX_TRU_F16", "v_cmpx_tru_f16">;2047 2048defm V_CMPX_F_F32 : VOPCX_Real_gfx11<0x090>;2049defm V_CMPX_LT_F32 : VOPCX_Real_gfx11_gfx12<0x091>;2050defm V_CMPX_EQ_F32 : VOPCX_Real_gfx11_gfx12<0x092>;2051defm V_CMPX_LE_F32 : VOPCX_Real_gfx11_gfx12<0x093>;2052defm V_CMPX_GT_F32 : VOPCX_Real_gfx11_gfx12<0x094>;2053defm V_CMPX_LG_F32 : VOPCX_Real_gfx11_gfx12<0x095>;2054defm V_CMPX_GE_F32 : VOPCX_Real_gfx11_gfx12<0x096>;2055defm V_CMPX_O_F32 : VOPCX_Real_gfx11_gfx12<0x097>;2056defm V_CMPX_U_F32 : VOPCX_Real_gfx11_gfx12<0x098>;2057defm V_CMPX_NGE_F32 : VOPCX_Real_gfx11_gfx12<0x099>;2058defm V_CMPX_NLG_F32 : VOPCX_Real_gfx11_gfx12<0x09a>;2059defm V_CMPX_NGT_F32 : VOPCX_Real_gfx11_gfx12<0x09b>;2060defm V_CMPX_NLE_F32 : VOPCX_Real_gfx11_gfx12<0x09c>;2061defm V_CMPX_NEQ_F32 : VOPCX_Real_gfx11_gfx12<0x09d>;2062defm V_CMPX_NLT_F32 : VOPCX_Real_gfx11_gfx12<0x09e>;2063defm V_CMPX_T_F32 : VOPCX_Real_with_name_gfx11<0x09f, "V_CMPX_TRU_F32", "v_cmpx_t_f32">;2064 2065defm V_CMPX_F_F64 : VOPCX_Real_gfx11<0x0a0>;2066defm V_CMPX_LT_F64 : VOPCX_Real_gfx11_gfx12<0x0a1>;2067defm V_CMPX_EQ_F64 : VOPCX_Real_gfx11_gfx12<0x0a2>;2068defm V_CMPX_LE_F64 : VOPCX_Real_gfx11_gfx12<0x0a3>;2069defm V_CMPX_GT_F64 : VOPCX_Real_gfx11_gfx12<0x0a4>;2070defm V_CMPX_LG_F64 : VOPCX_Real_gfx11_gfx12<0x0a5>;2071defm V_CMPX_GE_F64 : VOPCX_Real_gfx11_gfx12<0x0a6>;2072defm V_CMPX_O_F64 : VOPCX_Real_gfx11_gfx12<0x0a7>;2073defm V_CMPX_U_F64 : VOPCX_Real_gfx11_gfx12<0x0a8>;2074defm V_CMPX_NGE_F64 : VOPCX_Real_gfx11_gfx12<0x0a9>;2075defm V_CMPX_NLG_F64 : VOPCX_Real_gfx11_gfx12<0x0aa>;2076defm V_CMPX_NGT_F64 : VOPCX_Real_gfx11_gfx12<0x0ab>;2077defm V_CMPX_NLE_F64 : VOPCX_Real_gfx11_gfx12<0x0ac>;2078defm V_CMPX_NEQ_F64 : VOPCX_Real_gfx11_gfx12<0x0ad>;2079defm V_CMPX_NLT_F64 : VOPCX_Real_gfx11_gfx12<0x0ae>;2080defm V_CMPX_T_F64 : VOPCX_Real_with_name_gfx11<0x0af, "V_CMPX_TRU_F64", "v_cmpx_t_f64">;2081 2082defm V_CMPX_LT_I16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0b1, "v_cmpx_lt_i16">;2083defm V_CMPX_EQ_I16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0b2, "v_cmpx_eq_i16">;2084defm V_CMPX_LE_I16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0b3, "v_cmpx_le_i16">;2085defm V_CMPX_GT_I16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0b4, "v_cmpx_gt_i16">;2086defm V_CMPX_NE_I16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0b5, "v_cmpx_ne_i16">;2087defm V_CMPX_GE_I16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0b6, "v_cmpx_ge_i16">;2088defm V_CMPX_LT_U16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0b9, "v_cmpx_lt_u16">;2089defm V_CMPX_EQ_U16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0ba, "v_cmpx_eq_u16">;2090defm V_CMPX_LE_U16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0bb, "v_cmpx_le_u16">;2091defm V_CMPX_GT_U16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0bc, "v_cmpx_gt_u16">;2092defm V_CMPX_NE_U16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0bd, "v_cmpx_ne_u16">;2093defm V_CMPX_GE_U16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0be, "v_cmpx_ge_u16">;2094 2095defm V_CMPX_F_I32 : VOPCX_Real_gfx11<0x0c0>;2096defm V_CMPX_LT_I32 : VOPCX_Real_gfx11_gfx12<0x0c1>;2097defm V_CMPX_EQ_I32 : VOPCX_Real_gfx11_gfx12<0x0c2>;2098defm V_CMPX_LE_I32 : VOPCX_Real_gfx11_gfx12<0x0c3>;2099defm V_CMPX_GT_I32 : VOPCX_Real_gfx11_gfx12<0x0c4>;2100defm V_CMPX_NE_I32 : VOPCX_Real_gfx11_gfx12<0x0c5>;2101defm V_CMPX_GE_I32 : VOPCX_Real_gfx11_gfx12<0x0c6>;2102defm V_CMPX_T_I32 : VOPCX_Real_gfx11<0x0c7>;2103defm V_CMPX_F_U32 : VOPCX_Real_gfx11<0x0c8>;2104defm V_CMPX_LT_U32 : VOPCX_Real_gfx11_gfx12<0x0c9>;2105defm V_CMPX_EQ_U32 : VOPCX_Real_gfx11_gfx12<0x0ca>;2106defm V_CMPX_LE_U32 : VOPCX_Real_gfx11_gfx12<0x0cb>;2107defm V_CMPX_GT_U32 : VOPCX_Real_gfx11_gfx12<0x0cc>;2108defm V_CMPX_NE_U32 : VOPCX_Real_gfx11_gfx12<0x0cd>;2109defm V_CMPX_GE_U32 : VOPCX_Real_gfx11_gfx12<0x0ce>;2110defm V_CMPX_T_U32 : VOPCX_Real_gfx11<0x0cf>;2111 2112defm V_CMPX_F_I64 : VOPCX_Real_gfx11<0x0d0>;2113defm V_CMPX_LT_I64 : VOPCX_Real_gfx11_gfx12<0x0d1>;2114defm V_CMPX_EQ_I64 : VOPCX_Real_gfx11_gfx12<0x0d2>;2115defm V_CMPX_LE_I64 : VOPCX_Real_gfx11_gfx12<0x0d3>;2116defm V_CMPX_GT_I64 : VOPCX_Real_gfx11_gfx12<0x0d4>;2117defm V_CMPX_NE_I64 : VOPCX_Real_gfx11_gfx12<0x0d5>;2118defm V_CMPX_GE_I64 : VOPCX_Real_gfx11_gfx12<0x0d6>;2119defm V_CMPX_T_I64 : VOPCX_Real_gfx11<0x0d7>;2120defm V_CMPX_F_U64 : VOPCX_Real_gfx11<0x0d8>;2121defm V_CMPX_LT_U64 : VOPCX_Real_gfx11_gfx12<0x0d9>;2122defm V_CMPX_EQ_U64 : VOPCX_Real_gfx11_gfx12<0x0da>;2123defm V_CMPX_LE_U64 : VOPCX_Real_gfx11_gfx12<0x0db>;2124defm V_CMPX_GT_U64 : VOPCX_Real_gfx11_gfx12<0x0dc>;2125defm V_CMPX_NE_U64 : VOPCX_Real_gfx11_gfx12<0x0dd>;2126defm V_CMPX_GE_U64 : VOPCX_Real_gfx11_gfx12<0x0de>;2127defm V_CMPX_T_U64 : VOPCX_Real_gfx11<0x0df>;2128defm V_CMPX_CLASS_F16 : VOPCX_Real_t16_and_fake16_gfx11_gfx12<0x0fd, "v_cmpx_class_f16">;2129defm V_CMPX_CLASS_F32 : VOPCX_Real_gfx11_gfx12<0x0fe>;2130defm V_CMPX_CLASS_F64 : VOPCX_Real_gfx11_gfx12<0x0ff>;2131 2132let AssemblerPredicate = isGFX11Only in {2133 def : AMDGPUMnemonicAlias<"v_cmp_tru_i32", "v_cmp_t_i32">;2134 def : AMDGPUMnemonicAlias<"v_cmp_tru_u32", "v_cmp_t_u32">;2135 def : AMDGPUMnemonicAlias<"v_cmp_tru_i64", "v_cmp_t_i64">;2136 def : AMDGPUMnemonicAlias<"v_cmp_tru_u64", "v_cmp_t_u64">;2137 def : AMDGPUMnemonicAlias<"v_cmpx_tru_i32", "v_cmpx_t_i32">;2138 def : AMDGPUMnemonicAlias<"v_cmpx_tru_u32", "v_cmpx_t_u32">;2139 def : AMDGPUMnemonicAlias<"v_cmpx_tru_i64", "v_cmpx_t_i64">;2140 def : AMDGPUMnemonicAlias<"v_cmpx_tru_u64", "v_cmpx_t_u64">;2141}2142 2143//===----------------------------------------------------------------------===//2144// GFX10.2145//===----------------------------------------------------------------------===//2146 2147let AssemblerPredicate = isGFX10Only, DecoderNamespace = "GFX10" in {2148 multiclass VOPC_Real_gfx10<bits<9> op> {2149 def _e32_gfx10 :2150 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.GFX10>,2151 VOPCe<op{7-0}>;2152 def _e64_gfx10 :2153 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.GFX10>,2154 VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> {2155 // Encoding used for VOPC instructions encoded as VOP3 differs from2156 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst.2157 bits<8> sdst;2158 let Inst{7-0} = sdst;2159 }2160 2161 if !cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9 then2162 def _sdwa_gfx10 :2163 VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>,2164 VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>;2165 2166 defm : VOPCInstAliases<NAME, "gfx10">;2167 }2168 2169 multiclass VOPCX_Real_gfx10<bits<9> op> {2170 def _e32_gfx10 :2171 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32"), SIEncodingFamily.GFX10>,2172 VOPCe<op{7-0}> {2173 let AsmString = !subst("_nosdst", "", !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").PseudoInstr)2174 # " " # !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").AsmOperands;2175 }2176 2177 def _e64_gfx10 :2178 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_nosdst_e64"), SIEncodingFamily.GFX10>,2179 VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Pfl> {2180 let Inst{7-0} = ?; // sdst2181 let AsmString = !subst("_nosdst", "", !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Mnemonic)2182 # "{_e64} " # !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").AsmOperands;2183 }2184 2185 if !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").Pfl.HasExtSDWA9 then2186 def _sdwa_gfx10 :2187 VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa")>,2188 VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Pfl> {2189 let AsmString = !subst("_nosdst", "", !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Mnemonic)2190 # "{_sdwa} " # !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").AsmOperands9;2191 }2192 2193 defm : VOPCXInstAliases<NAME, "gfx10">;2194 }2195} // End AssemblerPredicate = isGFX10Only, DecoderNamespace = "GFX10"2196 2197defm V_CMP_LT_I16 : VOPC_Real_gfx10<0x089>;2198defm V_CMP_EQ_I16 : VOPC_Real_gfx10<0x08a>;2199defm V_CMP_LE_I16 : VOPC_Real_gfx10<0x08b>;2200defm V_CMP_GT_I16 : VOPC_Real_gfx10<0x08c>;2201defm V_CMP_NE_I16 : VOPC_Real_gfx10<0x08d>;2202defm V_CMP_GE_I16 : VOPC_Real_gfx10<0x08e>;2203defm V_CMP_CLASS_F16 : VOPC_Real_gfx10<0x08f>;2204defm V_CMPX_LT_I16 : VOPCX_Real_gfx10<0x099>;2205defm V_CMPX_EQ_I16 : VOPCX_Real_gfx10<0x09a>;2206defm V_CMPX_LE_I16 : VOPCX_Real_gfx10<0x09b>;2207defm V_CMPX_GT_I16 : VOPCX_Real_gfx10<0x09c>;2208defm V_CMPX_NE_I16 : VOPCX_Real_gfx10<0x09d>;2209defm V_CMPX_GE_I16 : VOPCX_Real_gfx10<0x09e>;2210defm V_CMPX_CLASS_F16 : VOPCX_Real_gfx10<0x09f>;2211defm V_CMP_LT_U16 : VOPC_Real_gfx10<0x0a9>;2212defm V_CMP_EQ_U16 : VOPC_Real_gfx10<0x0aa>;2213defm V_CMP_LE_U16 : VOPC_Real_gfx10<0x0ab>;2214defm V_CMP_GT_U16 : VOPC_Real_gfx10<0x0ac>;2215defm V_CMP_NE_U16 : VOPC_Real_gfx10<0x0ad>;2216defm V_CMP_GE_U16 : VOPC_Real_gfx10<0x0ae>;2217defm V_CMPX_LT_U16 : VOPCX_Real_gfx10<0x0b9>;2218defm V_CMPX_EQ_U16 : VOPCX_Real_gfx10<0x0ba>;2219defm V_CMPX_LE_U16 : VOPCX_Real_gfx10<0x0bb>;2220defm V_CMPX_GT_U16 : VOPCX_Real_gfx10<0x0bc>;2221defm V_CMPX_NE_U16 : VOPCX_Real_gfx10<0x0bd>;2222defm V_CMPX_GE_U16 : VOPCX_Real_gfx10<0x0be>;2223defm V_CMP_F_F16 : VOPC_Real_gfx10<0x0c8>;2224defm V_CMP_LT_F16 : VOPC_Real_gfx10<0x0c9>;2225defm V_CMP_EQ_F16 : VOPC_Real_gfx10<0x0ca>;2226defm V_CMP_LE_F16 : VOPC_Real_gfx10<0x0cb>;2227defm V_CMP_GT_F16 : VOPC_Real_gfx10<0x0cc>;2228defm V_CMP_LG_F16 : VOPC_Real_gfx10<0x0cd>;2229defm V_CMP_GE_F16 : VOPC_Real_gfx10<0x0ce>;2230defm V_CMP_O_F16 : VOPC_Real_gfx10<0x0cf>;2231defm V_CMPX_F_F16 : VOPCX_Real_gfx10<0x0d8>;2232defm V_CMPX_LT_F16 : VOPCX_Real_gfx10<0x0d9>;2233defm V_CMPX_EQ_F16 : VOPCX_Real_gfx10<0x0da>;2234defm V_CMPX_LE_F16 : VOPCX_Real_gfx10<0x0db>;2235defm V_CMPX_GT_F16 : VOPCX_Real_gfx10<0x0dc>;2236defm V_CMPX_LG_F16 : VOPCX_Real_gfx10<0x0dd>;2237defm V_CMPX_GE_F16 : VOPCX_Real_gfx10<0x0de>;2238defm V_CMPX_O_F16 : VOPCX_Real_gfx10<0x0df>;2239defm V_CMP_U_F16 : VOPC_Real_gfx10<0x0e8>;2240defm V_CMP_NGE_F16 : VOPC_Real_gfx10<0x0e9>;2241defm V_CMP_NLG_F16 : VOPC_Real_gfx10<0x0ea>;2242defm V_CMP_NGT_F16 : VOPC_Real_gfx10<0x0eb>;2243defm V_CMP_NLE_F16 : VOPC_Real_gfx10<0x0ec>;2244defm V_CMP_NEQ_F16 : VOPC_Real_gfx10<0x0ed>;2245defm V_CMP_NLT_F16 : VOPC_Real_gfx10<0x0ee>;2246defm V_CMP_TRU_F16 : VOPC_Real_gfx10<0x0ef>;2247defm V_CMPX_U_F16 : VOPCX_Real_gfx10<0x0f8>;2248defm V_CMPX_NGE_F16 : VOPCX_Real_gfx10<0x0f9>;2249defm V_CMPX_NLG_F16 : VOPCX_Real_gfx10<0x0fa>;2250defm V_CMPX_NGT_F16 : VOPCX_Real_gfx10<0x0fb>;2251defm V_CMPX_NLE_F16 : VOPCX_Real_gfx10<0x0fc>;2252defm V_CMPX_NEQ_F16 : VOPCX_Real_gfx10<0x0fd>;2253defm V_CMPX_NLT_F16 : VOPCX_Real_gfx10<0x0fe>;2254defm V_CMPX_TRU_F16 : VOPCX_Real_gfx10<0x0ff>;2255 2256//===----------------------------------------------------------------------===//2257// GFX6, GFX7, GFX10.2258//===----------------------------------------------------------------------===//2259 2260let AssemblerPredicate = isGFX6GFX7, DecoderNamespace = "GFX6GFX7" in {2261 multiclass VOPC_Real_gfx6_gfx7<bits<9> op> {2262 def _e32_gfx6_gfx7 :2263 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>,2264 VOPCe<op{7-0}>;2265 def _e64_gfx6_gfx7 :2266 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>,2267 VOP3a_gfx6_gfx7<op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> {2268 // Encoding used for VOPC instructions encoded as VOP3 differs from2269 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst.2270 bits<8> sdst;2271 let Inst{7-0} = sdst;2272 }2273 2274 defm : VOPCInstAliases<NAME, "gfx6_gfx7">;2275 }2276} // End AssemblerPredicate = isGFX6GFX7, DecoderNamespace = "GFX6GFX7"2277 2278multiclass VOPC_Real_gfx6_gfx7_gfx10<bits<9> op> :2279 VOPC_Real_gfx6_gfx7<op>, VOPC_Real_gfx10<op>;2280 2281multiclass VOPCX_Real_gfx6_gfx7<bits<9> op> :2282 VOPC_Real_gfx6_gfx7<op>;2283 2284multiclass VOPCX_Real_gfx6_gfx7_gfx10 <bits<9> op> :2285 VOPC_Real_gfx6_gfx7<op>, VOPCX_Real_gfx10<op>;2286 2287multiclass VOPC_Real_gfx6_gfx7_gfx10_gfx11<bits<9> op> :2288 VOPC_Real_gfx6_gfx7_gfx10<op>, VOPC_Real_Base<GFX11Gen, op>;2289 2290multiclass VOPCX_Real_gfx6_gfx7_gfx10_gfx11<bits<9> op> :2291 VOPCX_Real_gfx6_gfx7_gfx10<op>, VOPCX_Real<GFX11Gen, op>;2292 2293multiclass VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<bits<9> op> :2294 VOPC_Real_gfx6_gfx7_gfx10_gfx11<op>, VOPC_Real_Base<GFX12Gen, op>;2295 2296defm V_CMP_F_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x000>;2297defm V_CMP_LT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x001>;2298defm V_CMP_EQ_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x002>;2299defm V_CMP_LE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x003>;2300defm V_CMP_GT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x004>;2301defm V_CMP_LG_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x005>;2302defm V_CMP_GE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x006>;2303defm V_CMP_O_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x007>;2304defm V_CMP_U_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x008>;2305defm V_CMP_NGE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x009>;2306defm V_CMP_NLG_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00a>;2307defm V_CMP_NGT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00b>;2308defm V_CMP_NLE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00c>;2309defm V_CMP_NEQ_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00d>;2310defm V_CMP_NLT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00e>;2311defm V_CMP_TRU_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00f>;2312defm V_CMPX_F_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x010>;2313defm V_CMPX_LT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x011>;2314defm V_CMPX_EQ_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x012>;2315defm V_CMPX_LE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x013>;2316defm V_CMPX_GT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x014>;2317defm V_CMPX_LG_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x015>;2318defm V_CMPX_GE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x016>;2319defm V_CMPX_O_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x017>;2320defm V_CMPX_U_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x018>;2321defm V_CMPX_NGE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x019>;2322defm V_CMPX_NLG_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01a>;2323defm V_CMPX_NGT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01b>;2324defm V_CMPX_NLE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01c>;2325defm V_CMPX_NEQ_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01d>;2326defm V_CMPX_NLT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01e>;2327defm V_CMPX_TRU_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01f>;2328defm V_CMP_F_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x020>;2329defm V_CMP_LT_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x021>;2330defm V_CMP_EQ_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x022>;2331defm V_CMP_LE_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x023>;2332defm V_CMP_GT_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x024>;2333defm V_CMP_LG_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x025>;2334defm V_CMP_GE_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x026>;2335defm V_CMP_O_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x027>;2336defm V_CMP_U_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x028>;2337defm V_CMP_NGE_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x029>;2338defm V_CMP_NLG_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x02a>;2339defm V_CMP_NGT_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x02b>;2340defm V_CMP_NLE_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x02c>;2341defm V_CMP_NEQ_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x02d>;2342defm V_CMP_NLT_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11_gfx12<0x02e>;2343defm V_CMP_TRU_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02f>;2344defm V_CMPX_F_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x030>;2345defm V_CMPX_LT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x031>;2346defm V_CMPX_EQ_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x032>;2347defm V_CMPX_LE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x033>;2348defm V_CMPX_GT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x034>;2349defm V_CMPX_LG_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x035>;2350defm V_CMPX_GE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x036>;2351defm V_CMPX_O_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x037>;2352defm V_CMPX_U_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x038>;2353defm V_CMPX_NGE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x039>;2354defm V_CMPX_NLG_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03a>;2355defm V_CMPX_NGT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03b>;2356defm V_CMPX_NLE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03c>;2357defm V_CMPX_NEQ_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03d>;2358defm V_CMPX_NLT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03e>;2359defm V_CMPX_TRU_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03f>;2360defm V_CMPS_F_F32 : VOPC_Real_gfx6_gfx7<0x040>;2361defm V_CMPS_LT_F32 : VOPC_Real_gfx6_gfx7<0x041>;2362defm V_CMPS_EQ_F32 : VOPC_Real_gfx6_gfx7<0x042>;2363defm V_CMPS_LE_F32 : VOPC_Real_gfx6_gfx7<0x043>;2364defm V_CMPS_GT_F32 : VOPC_Real_gfx6_gfx7<0x044>;2365defm V_CMPS_LG_F32 : VOPC_Real_gfx6_gfx7<0x045>;2366defm V_CMPS_GE_F32 : VOPC_Real_gfx6_gfx7<0x046>;2367defm V_CMPS_O_F32 : VOPC_Real_gfx6_gfx7<0x047>;2368defm V_CMPS_U_F32 : VOPC_Real_gfx6_gfx7<0x048>;2369defm V_CMPS_NGE_F32 : VOPC_Real_gfx6_gfx7<0x049>;2370defm V_CMPS_NLG_F32 : VOPC_Real_gfx6_gfx7<0x04a>;2371defm V_CMPS_NGT_F32 : VOPC_Real_gfx6_gfx7<0x04b>;2372defm V_CMPS_NLE_F32 : VOPC_Real_gfx6_gfx7<0x04c>;2373defm V_CMPS_NEQ_F32 : VOPC_Real_gfx6_gfx7<0x04d>;2374defm V_CMPS_NLT_F32 : VOPC_Real_gfx6_gfx7<0x04e>;2375defm V_CMPS_TRU_F32 : VOPC_Real_gfx6_gfx7<0x04f>;2376defm V_CMPSX_F_F32 : VOPCX_Real_gfx6_gfx7<0x050>;2377defm V_CMPSX_LT_F32 : VOPCX_Real_gfx6_gfx7<0x051>;2378defm V_CMPSX_EQ_F32 : VOPCX_Real_gfx6_gfx7<0x052>;2379defm V_CMPSX_LE_F32 : VOPCX_Real_gfx6_gfx7<0x053>;2380defm V_CMPSX_GT_F32 : VOPCX_Real_gfx6_gfx7<0x054>;2381defm V_CMPSX_LG_F32 : VOPCX_Real_gfx6_gfx7<0x055>;2382defm V_CMPSX_GE_F32 : VOPCX_Real_gfx6_gfx7<0x056>;2383defm V_CMPSX_O_F32 : VOPCX_Real_gfx6_gfx7<0x057>;2384defm V_CMPSX_U_F32 : VOPCX_Real_gfx6_gfx7<0x058>;2385defm V_CMPSX_NGE_F32 : VOPCX_Real_gfx6_gfx7<0x059>;2386defm V_CMPSX_NLG_F32 : VOPCX_Real_gfx6_gfx7<0x05a>;2387defm V_CMPSX_NGT_F32 : VOPCX_Real_gfx6_gfx7<0x05b>;2388defm V_CMPSX_NLE_F32 : VOPCX_Real_gfx6_gfx7<0x05c>;2389defm V_CMPSX_NEQ_F32 : VOPCX_Real_gfx6_gfx7<0x05d>;2390defm V_CMPSX_NLT_F32 : VOPCX_Real_gfx6_gfx7<0x05e>;2391defm V_CMPSX_TRU_F32 : VOPCX_Real_gfx6_gfx7<0x05f>;2392defm V_CMPS_F_F64 : VOPC_Real_gfx6_gfx7<0x060>;2393defm V_CMPS_LT_F64 : VOPC_Real_gfx6_gfx7<0x061>;2394defm V_CMPS_EQ_F64 : VOPC_Real_gfx6_gfx7<0x062>;2395defm V_CMPS_LE_F64 : VOPC_Real_gfx6_gfx7<0x063>;2396defm V_CMPS_GT_F64 : VOPC_Real_gfx6_gfx7<0x064>;2397defm V_CMPS_LG_F64 : VOPC_Real_gfx6_gfx7<0x065>;2398defm V_CMPS_GE_F64 : VOPC_Real_gfx6_gfx7<0x066>;2399defm V_CMPS_O_F64 : VOPC_Real_gfx6_gfx7<0x067>;2400defm V_CMPS_U_F64 : VOPC_Real_gfx6_gfx7<0x068>;2401defm V_CMPS_NGE_F64 : VOPC_Real_gfx6_gfx7<0x069>;2402defm V_CMPS_NLG_F64 : VOPC_Real_gfx6_gfx7<0x06a>;2403defm V_CMPS_NGT_F64 : VOPC_Real_gfx6_gfx7<0x06b>;2404defm V_CMPS_NLE_F64 : VOPC_Real_gfx6_gfx7<0x06c>;2405defm V_CMPS_NEQ_F64 : VOPC_Real_gfx6_gfx7<0x06d>;2406defm V_CMPS_NLT_F64 : VOPC_Real_gfx6_gfx7<0x06e>;2407defm V_CMPS_TRU_F64 : VOPC_Real_gfx6_gfx7<0x06f>;2408defm V_CMPSX_F_F64 : VOPCX_Real_gfx6_gfx7<0x070>;2409defm V_CMPSX_LT_F64 : VOPCX_Real_gfx6_gfx7<0x071>;2410defm V_CMPSX_EQ_F64 : VOPCX_Real_gfx6_gfx7<0x072>;2411defm V_CMPSX_LE_F64 : VOPCX_Real_gfx6_gfx7<0x073>;2412defm V_CMPSX_GT_F64 : VOPCX_Real_gfx6_gfx7<0x074>;2413defm V_CMPSX_LG_F64 : VOPCX_Real_gfx6_gfx7<0x075>;2414defm V_CMPSX_GE_F64 : VOPCX_Real_gfx6_gfx7<0x076>;2415defm V_CMPSX_O_F64 : VOPCX_Real_gfx6_gfx7<0x077>;2416defm V_CMPSX_U_F64 : VOPCX_Real_gfx6_gfx7<0x078>;2417defm V_CMPSX_NGE_F64 : VOPCX_Real_gfx6_gfx7<0x079>;2418defm V_CMPSX_NLG_F64 : VOPCX_Real_gfx6_gfx7<0x07a>;2419defm V_CMPSX_NGT_F64 : VOPCX_Real_gfx6_gfx7<0x07b>;2420defm V_CMPSX_NLE_F64 : VOPCX_Real_gfx6_gfx7<0x07c>;2421defm V_CMPSX_NEQ_F64 : VOPCX_Real_gfx6_gfx7<0x07d>;2422defm V_CMPSX_NLT_F64 : VOPCX_Real_gfx6_gfx7<0x07e>;2423defm V_CMPSX_TRU_F64 : VOPCX_Real_gfx6_gfx7<0x07f>;2424defm V_CMP_F_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x080>;2425defm V_CMP_LT_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x081>;2426defm V_CMP_EQ_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x082>;2427defm V_CMP_LE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x083>;2428defm V_CMP_GT_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x084>;2429defm V_CMP_NE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x085>;2430defm V_CMP_GE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x086>;2431defm V_CMP_T_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x087>;2432defm V_CMP_CLASS_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x088>;2433defm V_CMPX_F_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x090>;2434defm V_CMPX_LT_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x091>;2435defm V_CMPX_EQ_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x092>;2436defm V_CMPX_LE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x093>;2437defm V_CMPX_GT_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x094>;2438defm V_CMPX_NE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x095>;2439defm V_CMPX_GE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x096>;2440defm V_CMPX_T_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x097>;2441defm V_CMPX_CLASS_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x098>;2442defm V_CMP_F_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a0>;2443defm V_CMP_LT_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a1>;2444defm V_CMP_EQ_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a2>;2445defm V_CMP_LE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a3>;2446defm V_CMP_GT_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a4>;2447defm V_CMP_NE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a5>;2448defm V_CMP_GE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a6>;2449defm V_CMP_T_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a7>;2450defm V_CMP_CLASS_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a8>;2451defm V_CMPX_F_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b0>;2452defm V_CMPX_LT_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b1>;2453defm V_CMPX_EQ_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b2>;2454defm V_CMPX_LE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b3>;2455defm V_CMPX_GT_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b4>;2456defm V_CMPX_NE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b5>;2457defm V_CMPX_GE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b6>;2458defm V_CMPX_T_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b7>;2459defm V_CMPX_CLASS_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b8>;2460defm V_CMP_F_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c0>;2461defm V_CMP_LT_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c1>;2462defm V_CMP_EQ_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c2>;2463defm V_CMP_LE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c3>;2464defm V_CMP_GT_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c4>;2465defm V_CMP_NE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c5>;2466defm V_CMP_GE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c6>;2467defm V_CMP_T_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c7>;2468defm V_CMPX_F_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d0>;2469defm V_CMPX_LT_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d1>;2470defm V_CMPX_EQ_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d2>;2471defm V_CMPX_LE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d3>;2472defm V_CMPX_GT_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d4>;2473defm V_CMPX_NE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d5>;2474defm V_CMPX_GE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d6>;2475defm V_CMPX_T_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d7>;2476defm V_CMP_F_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e0>;2477defm V_CMP_LT_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e1>;2478defm V_CMP_EQ_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e2>;2479defm V_CMP_LE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e3>;2480defm V_CMP_GT_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e4>;2481defm V_CMP_NE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e5>;2482defm V_CMP_GE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e6>;2483defm V_CMP_T_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e7>;2484defm V_CMPX_F_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f0>;2485defm V_CMPX_LT_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f1>;2486defm V_CMPX_EQ_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f2>;2487defm V_CMPX_LE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f3>;2488defm V_CMPX_GT_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f4>;2489defm V_CMPX_NE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f5>;2490defm V_CMPX_GE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f6>;2491defm V_CMPX_T_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f7>;2492 2493//===----------------------------------------------------------------------===//2494// GFX8, GFX9 (VI).2495//===----------------------------------------------------------------------===//2496 2497multiclass VOPC_Real_vi <bits<10> op> {2498 let AssemblerPredicate = isGFX8GFX9, DecoderNamespace = "GFX8" in {2499 def _e32_vi :2500 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>,2501 VOPCe<op{7-0}>;2502 2503 def _e64_vi :2504 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>,2505 VOP3a_vi <op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> {2506 // Encoding used for VOPC instructions encoded as VOP32507 // Differs from VOP3e by destination name (sdst) as VOPC doesn't have vector dst2508 bits<8> sdst;2509 let Inst{7-0} = sdst;2510 }2511 }2512 2513 if !cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA then2514 def _sdwa_vi :2515 VOP_SDWA8_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>,2516 VOPC_SDWAe <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>;2517 2518 if !cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9 then2519 def _sdwa_gfx9 :2520 VOP_SDWA9_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>,2521 VOPC_SDWA9e <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>;2522 2523 let AssemblerPredicate = isGFX8GFX9 in {2524 defm : VOPCInstAliases<NAME, "vi">;2525 }2526}2527 2528defm V_CMP_CLASS_F32 : VOPC_Real_vi <0x10>;2529defm V_CMPX_CLASS_F32 : VOPC_Real_vi <0x11>;2530defm V_CMP_CLASS_F64 : VOPC_Real_vi <0x12>;2531defm V_CMPX_CLASS_F64 : VOPC_Real_vi <0x13>;2532defm V_CMP_CLASS_F16 : VOPC_Real_vi <0x14>;2533defm V_CMPX_CLASS_F16 : VOPC_Real_vi <0x15>;2534 2535defm V_CMP_F_F16 : VOPC_Real_vi <0x20>;2536defm V_CMP_LT_F16 : VOPC_Real_vi <0x21>;2537defm V_CMP_EQ_F16 : VOPC_Real_vi <0x22>;2538defm V_CMP_LE_F16 : VOPC_Real_vi <0x23>;2539defm V_CMP_GT_F16 : VOPC_Real_vi <0x24>;2540defm V_CMP_LG_F16 : VOPC_Real_vi <0x25>;2541defm V_CMP_GE_F16 : VOPC_Real_vi <0x26>;2542defm V_CMP_O_F16 : VOPC_Real_vi <0x27>;2543defm V_CMP_U_F16 : VOPC_Real_vi <0x28>;2544defm V_CMP_NGE_F16 : VOPC_Real_vi <0x29>;2545defm V_CMP_NLG_F16 : VOPC_Real_vi <0x2a>;2546defm V_CMP_NGT_F16 : VOPC_Real_vi <0x2b>;2547defm V_CMP_NLE_F16 : VOPC_Real_vi <0x2c>;2548defm V_CMP_NEQ_F16 : VOPC_Real_vi <0x2d>;2549defm V_CMP_NLT_F16 : VOPC_Real_vi <0x2e>;2550defm V_CMP_TRU_F16 : VOPC_Real_vi <0x2f>;2551 2552defm V_CMPX_F_F16 : VOPC_Real_vi <0x30>;2553defm V_CMPX_LT_F16 : VOPC_Real_vi <0x31>;2554defm V_CMPX_EQ_F16 : VOPC_Real_vi <0x32>;2555defm V_CMPX_LE_F16 : VOPC_Real_vi <0x33>;2556defm V_CMPX_GT_F16 : VOPC_Real_vi <0x34>;2557defm V_CMPX_LG_F16 : VOPC_Real_vi <0x35>;2558defm V_CMPX_GE_F16 : VOPC_Real_vi <0x36>;2559defm V_CMPX_O_F16 : VOPC_Real_vi <0x37>;2560defm V_CMPX_U_F16 : VOPC_Real_vi <0x38>;2561defm V_CMPX_NGE_F16 : VOPC_Real_vi <0x39>;2562defm V_CMPX_NLG_F16 : VOPC_Real_vi <0x3a>;2563defm V_CMPX_NGT_F16 : VOPC_Real_vi <0x3b>;2564defm V_CMPX_NLE_F16 : VOPC_Real_vi <0x3c>;2565defm V_CMPX_NEQ_F16 : VOPC_Real_vi <0x3d>;2566defm V_CMPX_NLT_F16 : VOPC_Real_vi <0x3e>;2567defm V_CMPX_TRU_F16 : VOPC_Real_vi <0x3f>;2568 2569defm V_CMP_F_F32 : VOPC_Real_vi <0x40>;2570defm V_CMP_LT_F32 : VOPC_Real_vi <0x41>;2571defm V_CMP_EQ_F32 : VOPC_Real_vi <0x42>;2572defm V_CMP_LE_F32 : VOPC_Real_vi <0x43>;2573defm V_CMP_GT_F32 : VOPC_Real_vi <0x44>;2574defm V_CMP_LG_F32 : VOPC_Real_vi <0x45>;2575defm V_CMP_GE_F32 : VOPC_Real_vi <0x46>;2576defm V_CMP_O_F32 : VOPC_Real_vi <0x47>;2577defm V_CMP_U_F32 : VOPC_Real_vi <0x48>;2578defm V_CMP_NGE_F32 : VOPC_Real_vi <0x49>;2579defm V_CMP_NLG_F32 : VOPC_Real_vi <0x4a>;2580defm V_CMP_NGT_F32 : VOPC_Real_vi <0x4b>;2581defm V_CMP_NLE_F32 : VOPC_Real_vi <0x4c>;2582defm V_CMP_NEQ_F32 : VOPC_Real_vi <0x4d>;2583defm V_CMP_NLT_F32 : VOPC_Real_vi <0x4e>;2584defm V_CMP_TRU_F32 : VOPC_Real_vi <0x4f>;2585 2586defm V_CMPX_F_F32 : VOPC_Real_vi <0x50>;2587defm V_CMPX_LT_F32 : VOPC_Real_vi <0x51>;2588defm V_CMPX_EQ_F32 : VOPC_Real_vi <0x52>;2589defm V_CMPX_LE_F32 : VOPC_Real_vi <0x53>;2590defm V_CMPX_GT_F32 : VOPC_Real_vi <0x54>;2591defm V_CMPX_LG_F32 : VOPC_Real_vi <0x55>;2592defm V_CMPX_GE_F32 : VOPC_Real_vi <0x56>;2593defm V_CMPX_O_F32 : VOPC_Real_vi <0x57>;2594defm V_CMPX_U_F32 : VOPC_Real_vi <0x58>;2595defm V_CMPX_NGE_F32 : VOPC_Real_vi <0x59>;2596defm V_CMPX_NLG_F32 : VOPC_Real_vi <0x5a>;2597defm V_CMPX_NGT_F32 : VOPC_Real_vi <0x5b>;2598defm V_CMPX_NLE_F32 : VOPC_Real_vi <0x5c>;2599defm V_CMPX_NEQ_F32 : VOPC_Real_vi <0x5d>;2600defm V_CMPX_NLT_F32 : VOPC_Real_vi <0x5e>;2601defm V_CMPX_TRU_F32 : VOPC_Real_vi <0x5f>;2602 2603defm V_CMP_F_F64 : VOPC_Real_vi <0x60>;2604defm V_CMP_LT_F64 : VOPC_Real_vi <0x61>;2605defm V_CMP_EQ_F64 : VOPC_Real_vi <0x62>;2606defm V_CMP_LE_F64 : VOPC_Real_vi <0x63>;2607defm V_CMP_GT_F64 : VOPC_Real_vi <0x64>;2608defm V_CMP_LG_F64 : VOPC_Real_vi <0x65>;2609defm V_CMP_GE_F64 : VOPC_Real_vi <0x66>;2610defm V_CMP_O_F64 : VOPC_Real_vi <0x67>;2611defm V_CMP_U_F64 : VOPC_Real_vi <0x68>;2612defm V_CMP_NGE_F64 : VOPC_Real_vi <0x69>;2613defm V_CMP_NLG_F64 : VOPC_Real_vi <0x6a>;2614defm V_CMP_NGT_F64 : VOPC_Real_vi <0x6b>;2615defm V_CMP_NLE_F64 : VOPC_Real_vi <0x6c>;2616defm V_CMP_NEQ_F64 : VOPC_Real_vi <0x6d>;2617defm V_CMP_NLT_F64 : VOPC_Real_vi <0x6e>;2618defm V_CMP_TRU_F64 : VOPC_Real_vi <0x6f>;2619 2620defm V_CMPX_F_F64 : VOPC_Real_vi <0x70>;2621defm V_CMPX_LT_F64 : VOPC_Real_vi <0x71>;2622defm V_CMPX_EQ_F64 : VOPC_Real_vi <0x72>;2623defm V_CMPX_LE_F64 : VOPC_Real_vi <0x73>;2624defm V_CMPX_GT_F64 : VOPC_Real_vi <0x74>;2625defm V_CMPX_LG_F64 : VOPC_Real_vi <0x75>;2626defm V_CMPX_GE_F64 : VOPC_Real_vi <0x76>;2627defm V_CMPX_O_F64 : VOPC_Real_vi <0x77>;2628defm V_CMPX_U_F64 : VOPC_Real_vi <0x78>;2629defm V_CMPX_NGE_F64 : VOPC_Real_vi <0x79>;2630defm V_CMPX_NLG_F64 : VOPC_Real_vi <0x7a>;2631defm V_CMPX_NGT_F64 : VOPC_Real_vi <0x7b>;2632defm V_CMPX_NLE_F64 : VOPC_Real_vi <0x7c>;2633defm V_CMPX_NEQ_F64 : VOPC_Real_vi <0x7d>;2634defm V_CMPX_NLT_F64 : VOPC_Real_vi <0x7e>;2635defm V_CMPX_TRU_F64 : VOPC_Real_vi <0x7f>;2636 2637defm V_CMP_F_I16 : VOPC_Real_vi <0xa0>;2638defm V_CMP_LT_I16 : VOPC_Real_vi <0xa1>;2639defm V_CMP_EQ_I16 : VOPC_Real_vi <0xa2>;2640defm V_CMP_LE_I16 : VOPC_Real_vi <0xa3>;2641defm V_CMP_GT_I16 : VOPC_Real_vi <0xa4>;2642defm V_CMP_NE_I16 : VOPC_Real_vi <0xa5>;2643defm V_CMP_GE_I16 : VOPC_Real_vi <0xa6>;2644defm V_CMP_T_I16 : VOPC_Real_vi <0xa7>;2645 2646defm V_CMP_F_U16 : VOPC_Real_vi <0xa8>;2647defm V_CMP_LT_U16 : VOPC_Real_vi <0xa9>;2648defm V_CMP_EQ_U16 : VOPC_Real_vi <0xaa>;2649defm V_CMP_LE_U16 : VOPC_Real_vi <0xab>;2650defm V_CMP_GT_U16 : VOPC_Real_vi <0xac>;2651defm V_CMP_NE_U16 : VOPC_Real_vi <0xad>;2652defm V_CMP_GE_U16 : VOPC_Real_vi <0xae>;2653defm V_CMP_T_U16 : VOPC_Real_vi <0xaf>;2654 2655defm V_CMPX_F_I16 : VOPC_Real_vi <0xb0>;2656defm V_CMPX_LT_I16 : VOPC_Real_vi <0xb1>;2657defm V_CMPX_EQ_I16 : VOPC_Real_vi <0xb2>;2658defm V_CMPX_LE_I16 : VOPC_Real_vi <0xb3>;2659defm V_CMPX_GT_I16 : VOPC_Real_vi <0xb4>;2660defm V_CMPX_NE_I16 : VOPC_Real_vi <0xb5>;2661defm V_CMPX_GE_I16 : VOPC_Real_vi <0xb6>;2662defm V_CMPX_T_I16 : VOPC_Real_vi <0xb7>;2663 2664defm V_CMPX_F_U16 : VOPC_Real_vi <0xb8>;2665defm V_CMPX_LT_U16 : VOPC_Real_vi <0xb9>;2666defm V_CMPX_EQ_U16 : VOPC_Real_vi <0xba>;2667defm V_CMPX_LE_U16 : VOPC_Real_vi <0xbb>;2668defm V_CMPX_GT_U16 : VOPC_Real_vi <0xbc>;2669defm V_CMPX_NE_U16 : VOPC_Real_vi <0xbd>;2670defm V_CMPX_GE_U16 : VOPC_Real_vi <0xbe>;2671defm V_CMPX_T_U16 : VOPC_Real_vi <0xbf>;2672 2673defm V_CMP_F_I32 : VOPC_Real_vi <0xc0>;2674defm V_CMP_LT_I32 : VOPC_Real_vi <0xc1>;2675defm V_CMP_EQ_I32 : VOPC_Real_vi <0xc2>;2676defm V_CMP_LE_I32 : VOPC_Real_vi <0xc3>;2677defm V_CMP_GT_I32 : VOPC_Real_vi <0xc4>;2678defm V_CMP_NE_I32 : VOPC_Real_vi <0xc5>;2679defm V_CMP_GE_I32 : VOPC_Real_vi <0xc6>;2680defm V_CMP_T_I32 : VOPC_Real_vi <0xc7>;2681 2682defm V_CMPX_F_I32 : VOPC_Real_vi <0xd0>;2683defm V_CMPX_LT_I32 : VOPC_Real_vi <0xd1>;2684defm V_CMPX_EQ_I32 : VOPC_Real_vi <0xd2>;2685defm V_CMPX_LE_I32 : VOPC_Real_vi <0xd3>;2686defm V_CMPX_GT_I32 : VOPC_Real_vi <0xd4>;2687defm V_CMPX_NE_I32 : VOPC_Real_vi <0xd5>;2688defm V_CMPX_GE_I32 : VOPC_Real_vi <0xd6>;2689defm V_CMPX_T_I32 : VOPC_Real_vi <0xd7>;2690 2691defm V_CMP_F_I64 : VOPC_Real_vi <0xe0>;2692defm V_CMP_LT_I64 : VOPC_Real_vi <0xe1>;2693defm V_CMP_EQ_I64 : VOPC_Real_vi <0xe2>;2694defm V_CMP_LE_I64 : VOPC_Real_vi <0xe3>;2695defm V_CMP_GT_I64 : VOPC_Real_vi <0xe4>;2696defm V_CMP_NE_I64 : VOPC_Real_vi <0xe5>;2697defm V_CMP_GE_I64 : VOPC_Real_vi <0xe6>;2698defm V_CMP_T_I64 : VOPC_Real_vi <0xe7>;2699 2700defm V_CMPX_F_I64 : VOPC_Real_vi <0xf0>;2701defm V_CMPX_LT_I64 : VOPC_Real_vi <0xf1>;2702defm V_CMPX_EQ_I64 : VOPC_Real_vi <0xf2>;2703defm V_CMPX_LE_I64 : VOPC_Real_vi <0xf3>;2704defm V_CMPX_GT_I64 : VOPC_Real_vi <0xf4>;2705defm V_CMPX_NE_I64 : VOPC_Real_vi <0xf5>;2706defm V_CMPX_GE_I64 : VOPC_Real_vi <0xf6>;2707defm V_CMPX_T_I64 : VOPC_Real_vi <0xf7>;2708 2709defm V_CMP_F_U32 : VOPC_Real_vi <0xc8>;2710defm V_CMP_LT_U32 : VOPC_Real_vi <0xc9>;2711defm V_CMP_EQ_U32 : VOPC_Real_vi <0xca>;2712defm V_CMP_LE_U32 : VOPC_Real_vi <0xcb>;2713defm V_CMP_GT_U32 : VOPC_Real_vi <0xcc>;2714defm V_CMP_NE_U32 : VOPC_Real_vi <0xcd>;2715defm V_CMP_GE_U32 : VOPC_Real_vi <0xce>;2716defm V_CMP_T_U32 : VOPC_Real_vi <0xcf>;2717 2718defm V_CMPX_F_U32 : VOPC_Real_vi <0xd8>;2719defm V_CMPX_LT_U32 : VOPC_Real_vi <0xd9>;2720defm V_CMPX_EQ_U32 : VOPC_Real_vi <0xda>;2721defm V_CMPX_LE_U32 : VOPC_Real_vi <0xdb>;2722defm V_CMPX_GT_U32 : VOPC_Real_vi <0xdc>;2723defm V_CMPX_NE_U32 : VOPC_Real_vi <0xdd>;2724defm V_CMPX_GE_U32 : VOPC_Real_vi <0xde>;2725defm V_CMPX_T_U32 : VOPC_Real_vi <0xdf>;2726 2727defm V_CMP_F_U64 : VOPC_Real_vi <0xe8>;2728defm V_CMP_LT_U64 : VOPC_Real_vi <0xe9>;2729defm V_CMP_EQ_U64 : VOPC_Real_vi <0xea>;2730defm V_CMP_LE_U64 : VOPC_Real_vi <0xeb>;2731defm V_CMP_GT_U64 : VOPC_Real_vi <0xec>;2732defm V_CMP_NE_U64 : VOPC_Real_vi <0xed>;2733defm V_CMP_GE_U64 : VOPC_Real_vi <0xee>;2734defm V_CMP_T_U64 : VOPC_Real_vi <0xef>;2735 2736defm V_CMPX_F_U64 : VOPC_Real_vi <0xf8>;2737defm V_CMPX_LT_U64 : VOPC_Real_vi <0xf9>;2738defm V_CMPX_EQ_U64 : VOPC_Real_vi <0xfa>;2739defm V_CMPX_LE_U64 : VOPC_Real_vi <0xfb>;2740defm V_CMPX_GT_U64 : VOPC_Real_vi <0xfc>;2741defm V_CMPX_NE_U64 : VOPC_Real_vi <0xfd>;2742defm V_CMPX_GE_U64 : VOPC_Real_vi <0xfe>;2743defm V_CMPX_T_U64 : VOPC_Real_vi <0xff>;2744