285 lines · c
1//===- ARMInstPrinter.h - Convert ARM MCInst to assembly syntax -*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This class prints an ARM MCInst to a .s file.10//11//===----------------------------------------------------------------------===//12 13#ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMINSTPRINTER_H14#define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMINSTPRINTER_H15 16#include "MCTargetDesc/ARMMCTargetDesc.h"17#include "llvm/MC/MCInstPrinter.h"18 19namespace llvm {20 21class ARMInstPrinter : public MCInstPrinter {22public:23 ARMInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,24 const MCRegisterInfo &MRI);25 26 bool applyTargetSpecificCLOption(StringRef Opt) override;27 28 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,29 const MCSubtargetInfo &STI, raw_ostream &O) override;30 void printRegName(raw_ostream &OS, MCRegister Reg) override;31 32 // Autogenerated by tblgen.33 std::pair<const char *, uint64_t>34 getMnemonic(const MCInst &MI) const override;35 void printInstruction(const MCInst *MI, uint64_t Address,36 const MCSubtargetInfo &STI, raw_ostream &O);37 virtual bool printAliasInstr(const MCInst *MI, uint64_t Address,38 const MCSubtargetInfo &STI, raw_ostream &O);39 virtual void printCustomAliasOperand(const MCInst *MI, uint64_t Address,40 unsigned OpIdx, unsigned PrintMethodIdx,41 const MCSubtargetInfo &STI,42 raw_ostream &O);43 static const char *getRegisterName(MCRegister Reg,44 unsigned AltIdx = ARM::NoRegAltName);45 46 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,47 raw_ostream &O);48 void printOperand(const MCInst *MI, uint64_t Address, unsigned OpNum,49 const MCSubtargetInfo &STI, raw_ostream &O);50 51 void printSORegRegOperand(const MCInst *MI, unsigned OpNum,52 const MCSubtargetInfo &STI, raw_ostream &O);53 void printSORegImmOperand(const MCInst *MI, unsigned OpNum,54 const MCSubtargetInfo &STI, raw_ostream &O);55 56 void printAddrModeTBB(const MCInst *MI, unsigned OpNum,57 const MCSubtargetInfo &STI, raw_ostream &O);58 void printAddrModeTBH(const MCInst *MI, unsigned OpNum,59 const MCSubtargetInfo &STI, raw_ostream &O);60 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum,61 const MCSubtargetInfo &STI, raw_ostream &O);62 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum,63 const MCSubtargetInfo &STI, raw_ostream &O);64 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum,65 const MCSubtargetInfo &STI, raw_ostream &O);66 void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum,67 const MCSubtargetInfo &STI, raw_ostream &O);68 template <bool AlwaysPrintImm0>69 void printAddrMode3Operand(const MCInst *MI, unsigned OpNum,70 const MCSubtargetInfo &STI, raw_ostream &O);71 void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum,72 const MCSubtargetInfo &STI, raw_ostream &O);73 void printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op, raw_ostream &O,74 bool AlwaysPrintImm0);75 void printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum,76 const MCSubtargetInfo &STI, raw_ostream &O);77 void printPostIdxRegOperand(const MCInst *MI, unsigned OpNum,78 const MCSubtargetInfo &STI, raw_ostream &O);79 void printPostIdxImm8s4Operand(const MCInst *MI, unsigned OpNum,80 const MCSubtargetInfo &STI, raw_ostream &O);81 82 void printLdStmModeOperand(const MCInst *MI, unsigned OpNum,83 const MCSubtargetInfo &STI, raw_ostream &O);84 template <bool AlwaysPrintImm0>85 void printAddrMode5Operand(const MCInst *MI, unsigned OpNum,86 const MCSubtargetInfo &STI, raw_ostream &O);87 template <bool AlwaysPrintImm0>88 void printAddrMode5FP16Operand(const MCInst *MI, unsigned OpNum,89 const MCSubtargetInfo &STI, raw_ostream &O);90 void printAddrMode6Operand(const MCInst *MI, unsigned OpNum,91 const MCSubtargetInfo &STI, raw_ostream &O);92 void printAddrMode7Operand(const MCInst *MI, unsigned OpNum,93 const MCSubtargetInfo &STI, raw_ostream &O);94 void printAddrMode6OffsetOperand(const MCInst *MI, unsigned OpNum,95 const MCSubtargetInfo &STI, raw_ostream &O);96 97 void printBitfieldInvMaskImmOperand(const MCInst *MI, unsigned OpNum,98 const MCSubtargetInfo &STI,99 raw_ostream &O);100 void printMemBOption(const MCInst *MI, unsigned OpNum,101 const MCSubtargetInfo &STI, raw_ostream &O);102 void printInstSyncBOption(const MCInst *MI, unsigned OpNum,103 const MCSubtargetInfo &STI, raw_ostream &O);104 void printTraceSyncBOption(const MCInst *MI, unsigned OpNum,105 const MCSubtargetInfo &STI, raw_ostream &O);106 void printShiftImmOperand(const MCInst *MI, unsigned OpNum,107 const MCSubtargetInfo &STI, raw_ostream &O);108 void printPKHLSLShiftImm(const MCInst *MI, unsigned OpNum,109 const MCSubtargetInfo &STI, raw_ostream &O);110 void printPKHASRShiftImm(const MCInst *MI, unsigned OpNum,111 const MCSubtargetInfo &STI, raw_ostream &O);112 113 template <unsigned scale>114 void printAdrLabelOperand(const MCInst *MI, unsigned OpNum,115 const MCSubtargetInfo &STI, raw_ostream &O);116 template <unsigned scale>117 void printAdrLabelOperand(const MCInst *MI, uint64_t /*Address*/,118 unsigned OpNum, const MCSubtargetInfo &STI,119 raw_ostream &O) {120 printAdrLabelOperand<scale>(MI, OpNum, STI, O);121 }122 void printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum,123 const MCSubtargetInfo &STI, raw_ostream &O);124 void printThumbSRImm(const MCInst *MI, unsigned OpNum,125 const MCSubtargetInfo &STI, raw_ostream &O);126 void printThumbITMask(const MCInst *MI, unsigned OpNum,127 const MCSubtargetInfo &STI, raw_ostream &O);128 void printThumbAddrModeRROperand(const MCInst *MI, unsigned OpNum,129 const MCSubtargetInfo &STI, raw_ostream &O);130 void printThumbAddrModeImm5SOperand(const MCInst *MI, unsigned OpNum,131 const MCSubtargetInfo &STI,132 raw_ostream &O, unsigned Scale);133 void printThumbAddrModeImm5S1Operand(const MCInst *MI, unsigned OpNum,134 const MCSubtargetInfo &STI,135 raw_ostream &O);136 void printThumbAddrModeImm5S2Operand(const MCInst *MI, unsigned OpNum,137 const MCSubtargetInfo &STI,138 raw_ostream &O);139 void printThumbAddrModeImm5S4Operand(const MCInst *MI, unsigned OpNum,140 const MCSubtargetInfo &STI,141 raw_ostream &O);142 void printThumbAddrModeSPOperand(const MCInst *MI, unsigned OpNum,143 const MCSubtargetInfo &STI, raw_ostream &O);144 145 void printT2SOOperand(const MCInst *MI, unsigned OpNum,146 const MCSubtargetInfo &STI, raw_ostream &O);147 template <bool AlwaysPrintImm0>148 void printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum,149 const MCSubtargetInfo &STI, raw_ostream &O);150 template <bool AlwaysPrintImm0>151 void printT2AddrModeImm8Operand(const MCInst *MI, unsigned OpNum,152 const MCSubtargetInfo &STI, raw_ostream &O);153 template <bool AlwaysPrintImm0>154 void printT2AddrModeImm8s4Operand(const MCInst *MI, unsigned OpNum,155 const MCSubtargetInfo &STI, raw_ostream &O);156 void printT2AddrModeImm0_1020s4Operand(const MCInst *MI, unsigned OpNum,157 const MCSubtargetInfo &STI,158 raw_ostream &O);159 void printT2AddrModeImm8OffsetOperand(const MCInst *MI, unsigned OpNum,160 const MCSubtargetInfo &STI,161 raw_ostream &O);162 void printT2AddrModeImm8s4OffsetOperand(const MCInst *MI, unsigned OpNum,163 const MCSubtargetInfo &STI,164 raw_ostream &O);165 void printT2AddrModeSoRegOperand(const MCInst *MI, unsigned OpNum,166 const MCSubtargetInfo &STI, raw_ostream &O);167 168 void printSetendOperand(const MCInst *MI, unsigned OpNum,169 const MCSubtargetInfo &STI, raw_ostream &O);170 void printCPSIMod(const MCInst *MI, unsigned OpNum,171 const MCSubtargetInfo &STI, raw_ostream &O);172 void printCPSIFlag(const MCInst *MI, unsigned OpNum,173 const MCSubtargetInfo &STI, raw_ostream &O);174 void printMSRMaskOperand(const MCInst *MI, unsigned OpNum,175 const MCSubtargetInfo &STI, raw_ostream &O);176 void printBankedRegOperand(const MCInst *MI, unsigned OpNum,177 const MCSubtargetInfo &STI, raw_ostream &O);178 void printPredicateOperand(const MCInst *MI, unsigned OpNum,179 const MCSubtargetInfo &STI, raw_ostream &O);180 void printMandatoryPredicateOperand(const MCInst *MI, unsigned OpNum,181 const MCSubtargetInfo &STI,182 raw_ostream &O);183 void printMandatoryRestrictedPredicateOperand(const MCInst *MI,184 unsigned OpNum,185 const MCSubtargetInfo &STI,186 raw_ostream &O);187 void printMandatoryInvertedPredicateOperand(const MCInst *MI, unsigned OpNum,188 const MCSubtargetInfo &STI,189 raw_ostream &O);190 void printSBitModifierOperand(const MCInst *MI, unsigned OpNum,191 const MCSubtargetInfo &STI, raw_ostream &O);192 void printRegisterList(const MCInst *MI, unsigned OpNum,193 const MCSubtargetInfo &STI, raw_ostream &O);194 void printNoHashImmediate(const MCInst *MI, unsigned OpNum,195 const MCSubtargetInfo &STI, raw_ostream &O);196 void printPImmediate(const MCInst *MI, unsigned OpNum,197 const MCSubtargetInfo &STI, raw_ostream &O);198 void printCImmediate(const MCInst *MI, unsigned OpNum,199 const MCSubtargetInfo &STI, raw_ostream &O);200 void printCoprocOptionImm(const MCInst *MI, unsigned OpNum,201 const MCSubtargetInfo &STI, raw_ostream &O);202 void printFPImmOperand(const MCInst *MI, unsigned OpNum,203 const MCSubtargetInfo &STI, raw_ostream &O);204 void printVMOVModImmOperand(const MCInst *MI, unsigned OpNum,205 const MCSubtargetInfo &STI, raw_ostream &O);206 void printImmPlusOneOperand(const MCInst *MI, unsigned OpNum,207 const MCSubtargetInfo &STI, raw_ostream &O);208 void printRotImmOperand(const MCInst *MI, unsigned OpNum,209 const MCSubtargetInfo &STI, raw_ostream &O);210 void printModImmOperand(const MCInst *MI, unsigned OpNum,211 const MCSubtargetInfo &STI, raw_ostream &O);212 void printGPRPairOperand(const MCInst *MI, unsigned OpNum,213 const MCSubtargetInfo &STI, raw_ostream &O);214 215 void printPCLabel(const MCInst *MI, unsigned OpNum,216 const MCSubtargetInfo &STI, raw_ostream &O);217 void printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,218 const MCSubtargetInfo &STI, raw_ostream &O);219 void printThumbLdrLabelOperand(const MCInst *MI, uint64_t /*Address*/,220 unsigned OpNum, const MCSubtargetInfo &STI,221 raw_ostream &O) {222 printThumbLdrLabelOperand(MI, OpNum, STI, O);223 }224 void printFBits16(const MCInst *MI, unsigned OpNum,225 const MCSubtargetInfo &STI, raw_ostream &O);226 void printFBits32(const MCInst *MI, unsigned OpNum,227 const MCSubtargetInfo &STI, raw_ostream &O);228 void printVectorIndex(const MCInst *MI, unsigned OpNum,229 const MCSubtargetInfo &STI, raw_ostream &O);230 void printVectorListOne(const MCInst *MI, unsigned OpNum,231 const MCSubtargetInfo &STI, raw_ostream &O);232 void printVectorListTwo(const MCInst *MI, unsigned OpNum,233 const MCSubtargetInfo &STI, raw_ostream &O);234 void printVectorListTwoSpaced(const MCInst *MI, unsigned OpNum,235 const MCSubtargetInfo &STI, raw_ostream &O);236 void printVectorListThree(const MCInst *MI, unsigned OpNum,237 const MCSubtargetInfo &STI, raw_ostream &O);238 void printVectorListFour(const MCInst *MI, unsigned OpNum,239 const MCSubtargetInfo &STI, raw_ostream &O);240 void printVectorListOneAllLanes(const MCInst *MI, unsigned OpNum,241 const MCSubtargetInfo &STI, raw_ostream &O);242 void printVectorListTwoAllLanes(const MCInst *MI, unsigned OpNum,243 const MCSubtargetInfo &STI, raw_ostream &O);244 void printVectorListThreeAllLanes(const MCInst *MI, unsigned OpNum,245 const MCSubtargetInfo &STI, raw_ostream &O);246 void printVectorListFourAllLanes(const MCInst *MI, unsigned OpNum,247 const MCSubtargetInfo &STI, raw_ostream &O);248 void printVectorListTwoSpacedAllLanes(const MCInst *MI, unsigned OpNum,249 const MCSubtargetInfo &STI,250 raw_ostream &O);251 void printVectorListThreeSpacedAllLanes(const MCInst *MI, unsigned OpNum,252 const MCSubtargetInfo &STI,253 raw_ostream &O);254 void printVectorListFourSpacedAllLanes(const MCInst *MI, unsigned OpNum,255 const MCSubtargetInfo &STI,256 raw_ostream &O);257 void printVectorListThreeSpaced(const MCInst *MI, unsigned OpNum,258 const MCSubtargetInfo &STI, raw_ostream &O);259 void printVectorListFourSpaced(const MCInst *MI, unsigned OpNum,260 const MCSubtargetInfo &STI, raw_ostream &O);261 template<unsigned NumRegs>262 void printMVEVectorList(const MCInst *MI, unsigned OpNum,263 const MCSubtargetInfo &STI, raw_ostream &O);264 template<int64_t Angle, int64_t Remainder>265 void printComplexRotationOp(const MCInst *MI, unsigned OpNum,266 const MCSubtargetInfo &STI, raw_ostream &O);267 // MVE268 void printVPTPredicateOperand(const MCInst *MI, unsigned OpNum,269 const MCSubtargetInfo &STI,270 raw_ostream &O);271 void printVPTMask(const MCInst *MI, unsigned OpNum,272 const MCSubtargetInfo &STI, raw_ostream &O);273 template<int shift>274 void printMveAddrModeRQOperand(const MCInst *MI, unsigned OpNum,275 const MCSubtargetInfo &STI, raw_ostream &O);276 void printMveSaturateOp(const MCInst *MI, unsigned OpNum,277 const MCSubtargetInfo &STI, raw_ostream &O);278private:279 unsigned DefaultAltIdx = ARM::NoRegAltName;280};281 282} // end namespace llvm283 284#endif // LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMINSTPRINTER_H285