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1//===-- CSKYInstrInfo.h - CSKY Instruction Information --------*- C++ -*---===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file contains the CSKY implementation of the TargetInstrInfo class.10//11//===----------------------------------------------------------------------===//12 13#ifndef LLVM_LIB_TARGET_CSKY_CSKYINSTRINFO_H14#define LLVM_LIB_TARGET_CSKY_CSKYINSTRINFO_H15 16#include "MCTargetDesc/CSKYMCTargetDesc.h"17#include "llvm/CodeGen/TargetInstrInfo.h"18 19#define GET_INSTRINFO_HEADER20#include "CSKYGenInstrInfo.inc"21 22namespace llvm {23 24class CSKYRegisterInfo;25class CSKYSubtarget;26 27class CSKYInstrInfo : public CSKYGenInstrInfo {28 bool v2sf;29 bool v2df;30 bool v3sf;31 bool v3df;32 33protected:34 const CSKYSubtarget &STI;35 36public:37 CSKYInstrInfo(const CSKYSubtarget &STI, const CSKYRegisterInfo &RI);38 39 Register isLoadFromStackSlot(const MachineInstr &MI,40 int &FrameIndex) const override;41 Register isStoreToStackSlot(const MachineInstr &MI,42 int &FrameIndex) const override;43 44 void storeRegToStackSlot(45 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg,46 bool IsKill, int FrameIndex, const TargetRegisterClass *RC, Register VReg,47 MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;48 49 void loadRegFromStackSlot(50 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg,51 int FrameIndex, const TargetRegisterClass *RC, Register VReg,52 MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;53 54 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,55 const DebugLoc &DL, Register DestReg, Register SrcReg,56 bool KillSrc, bool RenamableDest = false,57 bool RenamableSrc = false) const override;58 59 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,60 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,61 const DebugLoc &DL,62 int *BytesAdded = nullptr) const override;63 64 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,65 MachineBasicBlock *&FBB,66 SmallVectorImpl<MachineOperand> &Cond,67 bool AllowModify = false) const override;68 69 unsigned removeBranch(MachineBasicBlock &MBB,70 int *BytesRemoved = nullptr) const override;71 72 bool73 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;74 75 MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const override;76 77 unsigned getInstSizeInBytes(const MachineInstr &MI) const override;78 79 Register getGlobalBaseReg(MachineFunction &MF) const;80 81 // Materializes the given integer Val into DstReg.82 Register movImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,83 const DebugLoc &DL, uint64_t Val,84 MachineInstr::MIFlag Flag = MachineInstr::NoFlags) const;85};86 87} // namespace llvm88 89#endif // LLVM_LIB_TARGET_CSKY_CSKYINSTRINFO_H90