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1//===--- HexagonHazardRecognizer.h - Hexagon Post RA Hazard Recognizer ----===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8// This file defines the hazard recognizer for scheduling on Hexagon.9//===----------------------------------------------------------------------===//10 11#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONPROFITRECOGNIZER_H12#define LLVM_LIB_TARGET_HEXAGON_HEXAGONPROFITRECOGNIZER_H13 14#include "HexagonInstrInfo.h"15#include "HexagonSubtarget.h"16#include "llvm/ADT/SmallSet.h"17#include "llvm/CodeGen/DFAPacketizer.h"18#include "llvm/CodeGen/ScheduleHazardRecognizer.h"19 20namespace llvm {21 22class HexagonHazardRecognizer : public ScheduleHazardRecognizer {23 DFAPacketizer *Resources;24 const HexagonInstrInfo *TII;25 unsigned PacketNum = 0;26 // If the packet contains a potential dot cur instruction. This is27 // used for the scheduling priority function.28 SUnit *UsesDotCur = nullptr;29 // The packet number when a dor cur is emitted. If its use is not generated30 // in the same packet, then try to wait another cycle before emitting.31 int DotCurPNum = -1;32 // Does the packet contain a load. Used to restrict another load, if possible.33 bool UsesLoad = false;34 // Check if we should prefer a vector store that will become a .new version.35 // The .new store uses different resources than a normal store, and the36 // packetizer will not generate the .new if the regular store does not have37 // resources available (even if the .new version does). To help, the schedule38 // attempts to schedule the .new as soon as possible in the packet.39 SUnit *PrefVectorStoreNew = nullptr;40 // The set of registers defined by instructions in the current packet.41 SmallSet<unsigned, 8> RegDefs;42 43 // Return true if the instruction is a store that is converted to a new value44 // store because its value is defined in the same packet.45 bool isNewStore(MachineInstr &MI);46 47public:48 HexagonHazardRecognizer(const InstrItineraryData *II,49 const HexagonInstrInfo *HII,50 const HexagonSubtarget &ST)51 : Resources(ST.createDFAPacketizer(II)), TII(HII) { }52 53 ~HexagonHazardRecognizer() override { delete Resources; }54 55 /// This callback is invoked when a new block of instructions is about to be56 /// scheduled. The hazard state is set to an initialized state.57 void Reset() override;58 59 /// Return the hazard type of emitting this node. There are three60 /// possible results. Either:61 /// * NoHazard: it is legal to issue this instruction on this cycle.62 /// * Hazard: issuing this instruction would stall the machine. If some63 /// other instruction is available, issue it first.64 HazardType getHazardType(SUnit *SU, int stalls) override;65 66 /// This callback is invoked when an instruction is emitted to be scheduled,67 /// to advance the hazard state.68 void EmitInstruction(SUnit *) override;69 70 /// This callback may be invoked if getHazardType returns NoHazard. If, even71 /// though there is no hazard, it would be better to schedule another72 /// available instruction, this callback should return true.73 bool ShouldPreferAnother(SUnit *) override;74 75 /// This callback is invoked whenever the next top-down instruction to be76 /// scheduled cannot issue in the current cycle, either because of latency77 /// or resource conflicts. This should increment the internal state of the78 /// hazard recognizer so that previously "Hazard" instructions will now not79 /// be hazards.80 void AdvanceCycle() override;81};82 83} // end namespace llvm84 85#endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONPROFITRECOGNIZER_H86