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1//===-- LanaiISelLowering.h - Lanai DAG Lowering Interface -....-*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// This file defines the interfaces that Lanai uses to lower LLVM code into a10// selection DAG.11//12//===----------------------------------------------------------------------===//13 14#ifndef LLVM_LIB_TARGET_LANAI_LANAIISELLOWERING_H15#define LLVM_LIB_TARGET_LANAI_LANAIISELLOWERING_H16 17#include "Lanai.h"18#include "LanaiRegisterInfo.h"19#include "llvm/CodeGen/SelectionDAG.h"20#include "llvm/CodeGen/TargetLowering.h"21 22namespace llvm {23 24class LanaiSubtarget;25 26class LanaiTargetLowering : public TargetLowering {27public:28 LanaiTargetLowering(const TargetMachine &TM, const LanaiSubtarget &STI);29 30 // LowerOperation - Provide custom lowering hooks for some operations.31 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;32 33 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;34 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;35 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;36 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;37 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;38 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;39 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;40 SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) const;41 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;42 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;43 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;44 SDValue LowerSHL_PARTS(SDValue Op, SelectionDAG &DAG) const;45 SDValue LowerSRL_PARTS(SDValue Op, SelectionDAG &DAG) const;46 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;47 48 bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,49 bool IsVarArg,50 const SmallVectorImpl<ISD::OutputArg> &Outs,51 LLVMContext &Context, const Type *RetTy) const override;52 53 Register getRegisterByName(const char *RegName, LLT VT,54 const MachineFunction &MF) const override;55 std::pair<unsigned, const TargetRegisterClass *>56 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,57 StringRef Constraint, MVT VT) const override;58 ConstraintWeight59 getSingleConstraintMatchWeight(AsmOperandInfo &Info,60 const char *Constraint) const override;61 void LowerAsmOperandForConstraint(SDValue Op, StringRef Constraint,62 std::vector<SDValue> &Ops,63 SelectionDAG &DAG) const override;64 65 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;66 67 void computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known,68 const APInt &DemandedElts,69 const SelectionDAG &DAG,70 unsigned Depth = 0) const override;71 72private:73 SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,74 CallingConv::ID CallConv, bool IsVarArg,75 bool IsTailCall,76 const SmallVectorImpl<ISD::OutputArg> &Outs,77 const SmallVectorImpl<SDValue> &OutVals,78 const SmallVectorImpl<ISD::InputArg> &Ins,79 const SDLoc &dl, SelectionDAG &DAG,80 SmallVectorImpl<SDValue> &InVals) const;81 82 SDValue LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv,83 bool IsVarArg,84 const SmallVectorImpl<ISD::InputArg> &Ins,85 const SDLoc &DL, SelectionDAG &DAG,86 SmallVectorImpl<SDValue> &InVals) const;87 88 SDValue LowerCallResult(SDValue Chain, SDValue InGlue,89 CallingConv::ID CallConv, bool IsVarArg,90 const SmallVectorImpl<ISD::InputArg> &Ins,91 const SDLoc &DL, SelectionDAG &DAG,92 SmallVectorImpl<SDValue> &InVals) const;93 94 SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI,95 SmallVectorImpl<SDValue> &InVals) const override;96 97 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,98 bool IsVarArg,99 const SmallVectorImpl<ISD::InputArg> &Ins,100 const SDLoc &DL, SelectionDAG &DAG,101 SmallVectorImpl<SDValue> &InVals) const override;102 103 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,104 const SmallVectorImpl<ISD::OutputArg> &Outs,105 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,106 SelectionDAG &DAG) const override;107 108 const LanaiRegisterInfo *TRI;109};110} // namespace llvm111 112#endif // LLVM_LIB_TARGET_LANAI_LANAIISELLOWERING_H113