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1//===- LanaiRegisterInfo.td - Lanai Register defs ------------*- tablegen -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8// Declarations that describe the Lanai register file9//===----------------------------------------------------------------------===//10 11// Registers are identified with 5-bit ID numbers.12class LanaiReg<bits<5> num, string n, list<Register> subregs = [],13 list<string> altNames = []> : Register<n, altNames> {14 field bits<5> Num;15 let Num = num;16 let Namespace = "Lanai";17 let SubRegs = subregs;18}19 20let Namespace = "Lanai" in {21 def sub_32 : SubRegIndex<32>;22}23 24// Integer registers25foreach i = 0-31 in {26 def R#i : LanaiReg<i, "r"#i>, DwarfRegNum<[i]>;27}28 29// Register aliases30let SubRegIndices = [sub_32] in {31 def PC : LanaiReg< 2, "pc", [R2]>, DwarfRegAlias<R2>;32 def SP : LanaiReg< 4, "sp", [R4]>, DwarfRegAlias<R4>;33 def FP : LanaiReg< 5, "fp", [R5]>, DwarfRegAlias<R5>;34 def RV : LanaiReg< 8, "rv", [R8]>, DwarfRegAlias<R8>;35 def RR1 : LanaiReg<10, "rr1", [R10]>, DwarfRegAlias<R10>;36 def RR2 : LanaiReg<11, "rr2", [R11]>, DwarfRegAlias<R11>;37 def RCA : LanaiReg<15, "rca", [R15]>, DwarfRegAlias<R15>;38}39 40// Define a status register to capture the dependencies between the set flag41// and setcc instructions42def SR : LanaiReg< 0, "sw">;43 44// Register classes.45def GPR : RegisterClass<"Lanai", [i32], 32,46 (add R3, R9, R12, R13, R14, R16, R17,47 (sequence "R%i", 20, 31),48 R6, R7, R18, R19, // registers for passing arguments49 R15, RCA, // register for constant addresses50 R10, RR1, R11, RR2, // programmer controlled registers51 R8, RV, // return value52 R5, FP, // frame pointer53 R4, SP, // stack pointer54 R2, PC, // program counter55 R1, // all 1s (0xffffffff)56 R0 // constant 057 )>;58 59// Condition code register class60def CCR : RegisterClass<"Lanai", [i32], 32, (add SR)> {61 let CopyCost = -1; // Don't allow copying of status registers62 let isAllocatable = 0;63}64